| .. | .. |
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| 84 | 84 | unsigned int cdev = 0; |
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| 85 | 85 | u32 mnistat, tnistat, tstatus, mcmd; |
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| 86 | 86 | u16 tnicmd, mnicmd; |
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| 87 | | - u8 mcapndx; |
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| 88 | 87 | u32 tot_bw = 0, tot_n = 0, tot_rq = 0, y_max, rq_isoch, rq_async; |
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| 89 | 88 | u32 step, rem, rem_isoch, rem_async; |
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| 90 | 89 | int ret = 0; |
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| .. | .. |
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| 137 | 136 | list_for_each(pos, head) { |
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| 138 | 137 | cur = list_entry(pos, struct agp_3_5_dev, list); |
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| 139 | 138 | dev = cur->dev; |
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| 140 | | - |
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| 141 | | - mcapndx = cur->capndx; |
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| 142 | 139 | |
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| 143 | 140 | pci_read_config_dword(dev, cur->capndx+AGPNISTAT, &mnistat); |
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| 144 | 141 | |
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| .. | .. |
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| 251 | 248 | cur = master[cdev].dev; |
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| 252 | 249 | dev = cur->dev; |
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| 253 | 250 | |
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| 254 | | - mcapndx = cur->capndx; |
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| 255 | | - |
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| 256 | 251 | master[cdev].rq += (cdev == ndevs - 1) |
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| 257 | 252 | ? (rem_async + rem_isoch) : step; |
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| 258 | 253 | |
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| .. | .. |
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| 319 | 314 | { |
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| 320 | 315 | struct pci_dev *td = bridge->dev, *dev = NULL; |
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| 321 | 316 | u8 mcapndx; |
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| 322 | | - u32 isoch, arqsz; |
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| 317 | + u32 isoch; |
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| 323 | 318 | u32 tstatus, mstatus, ncapid; |
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| 324 | 319 | u32 mmajor; |
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| 325 | 320 | u16 mpstat; |
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| .. | .. |
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| 333 | 328 | isoch = (tstatus >> 17) & 0x1; |
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| 334 | 329 | if (isoch == 0) /* isoch xfers not available, bail out. */ |
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| 335 | 330 | return -ENODEV; |
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| 336 | | - |
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| 337 | | - arqsz = (tstatus >> 13) & 0x7; |
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| 338 | 331 | |
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| 339 | 332 | /* |
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| 340 | 333 | * Allocate a head for our AGP 3.5 device list |
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