| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * sata_nv.c - NVIDIA nForce SATA |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright 2004 NVIDIA Corp. All rights reserved. |
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| 5 | 6 | * Copyright 2004 Andrew Chew |
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| 6 | | - * |
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| 7 | | - * |
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| 8 | | - * This program is free software; you can redistribute it and/or modify |
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| 9 | | - * it under the terms of the GNU General Public License as published by |
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| 10 | | - * the Free Software Foundation; either version 2, or (at your option) |
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| 11 | | - * any later version. |
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| 12 | | - * |
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| 13 | | - * This program is distributed in the hope that it will be useful, |
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| 14 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 15 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 16 | | - * GNU General Public License for more details. |
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| 17 | | - * |
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| 18 | | - * You should have received a copy of the GNU General Public License |
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| 19 | | - * along with this program; see the file COPYING. If not, write to |
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| 20 | | - * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 21 | | - * |
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| 22 | 7 | * |
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| 23 | 8 | * libata documentation is available via 'make {ps|pdf}docs', |
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| 24 | 9 | * as Documentation/driver-api/libata.rst |
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| .. | .. |
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| 33 | 18 | * similar to the ADMA specification (with some modifications). |
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| 34 | 19 | * This allows the use of NCQ. Non-DMA-mapped ATA commands are still |
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| 35 | 20 | * sent through the legacy interface. |
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| 36 | | - * |
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| 37 | 21 | */ |
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| 38 | 22 | |
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| 39 | 23 | #include <linux/kernel.h> |
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| .. | .. |
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| 1138 | 1122 | |
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| 1139 | 1123 | /* |
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| 1140 | 1124 | * Now that the legacy PRD and padding buffer are allocated we can |
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| 1141 | | - * try to raise the DMA mask to allocate the CPB/APRD table. |
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| 1125 | + * raise the DMA mask to allocate the CPB/APRD table. |
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| 1142 | 1126 | */ |
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| 1143 | | - rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
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| 1144 | | - if (rc) { |
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| 1145 | | - rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
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| 1146 | | - if (rc) |
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| 1147 | | - return rc; |
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| 1148 | | - } |
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| 1127 | + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
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| 1128 | + |
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| 1149 | 1129 | pp->adma_dma_mask = *dev->dma_mask; |
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| 1150 | 1130 | |
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| 1151 | 1131 | mem = dmam_alloc_coherent(dev, NV_ADMA_PORT_PRIV_DMA_SZ, |
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| 1152 | 1132 | &mem_dma, GFP_KERNEL); |
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| 1153 | 1133 | if (!mem) |
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| 1154 | 1134 | return -ENOMEM; |
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| 1155 | | - memset(mem, 0, NV_ADMA_PORT_PRIV_DMA_SZ); |
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| 1156 | 1135 | |
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| 1157 | 1136 | /* |
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| 1158 | 1137 | * First item in chunk of DMA memory: |
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| .. | .. |
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| 1964 | 1943 | &pp->prd_dma, GFP_KERNEL); |
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| 1965 | 1944 | if (!pp->prd) |
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| 1966 | 1945 | return -ENOMEM; |
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| 1967 | | - memset(pp->prd, 0, ATA_PRD_TBL_SZ * ATA_MAX_QUEUE); |
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| 1968 | 1946 | |
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| 1969 | 1947 | ap->private_data = pp; |
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| 1970 | 1948 | pp->sactive_block = ap->ioaddr.scr_addr + 4 * SCR_ACTIVE; |
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| .. | .. |
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| 2351 | 2329 | // Make sure this is a SATA controller by counting the number of bars |
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| 2352 | 2330 | // (NVIDIA SATA controllers will always have six bars). Otherwise, |
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| 2353 | 2331 | // it's an IDE controller and we ignore it. |
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| 2354 | | - for (bar = 0; bar < 6; bar++) |
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| 2332 | + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) |
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| 2355 | 2333 | if (pci_resource_start(pdev, bar) == 0) |
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| 2356 | 2334 | return -ENODEV; |
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| 2357 | 2335 | |
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