write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/drivers/ata/libahci.c
..
..
@@ -1199,6 +1199,26 @@
1199
1199
 	return sprintf(buf, "%d\n", emp->blink_policy);
1200
1200
 }
1201
1201
 
1202
+static void ahci_port_clear_pending_irq(struct ata_port *ap)
1203
+{
1204
+	struct ahci_host_priv *hpriv = ap->host->private_data;
1205
+	void __iomem *port_mmio = ahci_port_base(ap);
1206
+	u32 tmp;
1207
+
1208
+	/* clear SError */
1209
+	tmp = readl(port_mmio + PORT_SCR_ERR);
1210
+	dev_dbg(ap->host->dev, "PORT_SCR_ERR 0x%x\n", tmp);
1211
+	writel(tmp, port_mmio + PORT_SCR_ERR);
1212
+
1213
+	/* clear port IRQ */
1214
+	tmp = readl(port_mmio + PORT_IRQ_STAT);
1215
+	dev_dbg(ap->host->dev, "PORT_IRQ_STAT 0x%x\n", tmp);
1216
+	if (tmp)
1217
+		writel(tmp, port_mmio + PORT_IRQ_STAT);
1218
+
1219
+	writel(1 << ap->port_no, hpriv->mmio + HOST_IRQ_STAT);
1220
+}
1221
+
1202
1222
 static void ahci_port_init(struct device *dev, struct ata_port *ap,
1203
1223
 			   int port_no, void __iomem *mmio,
1204
1224
 			   void __iomem *port_mmio)
..
..
@@ -1213,18 +1233,7 @@
1213
1233
 	if (rc)
1214
1234
 		dev_warn(dev, "%s (%d)\n", emsg, rc);
1215
1235
 
1216
-	/* clear SError */
1217
-	tmp = readl(port_mmio + PORT_SCR_ERR);
1218
-	VPRINTK("PORT_SCR_ERR 0x%x\n", tmp);
1219
-	writel(tmp, port_mmio + PORT_SCR_ERR);
1220
-
1221
-	/* clear port IRQ */
1222
-	tmp = readl(port_mmio + PORT_IRQ_STAT);
1223
-	VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp);
1224
-	if (tmp)
1225
-		writel(tmp, port_mmio + PORT_IRQ_STAT);
1226
-
1227
-	writel(1 << port_no, mmio + HOST_IRQ_STAT);
1236
+	ahci_port_clear_pending_irq(ap);
1228
1237
 
1229
1238
 	/* mark esata ports */
1230
1239
 	tmp = readl(port_mmio + PORT_CMD);
..
..
@@ -1251,10 +1260,10 @@
1251
1260
 	}
1252
1261
 
1253
1262
 	tmp = readl(mmio + HOST_CTL);
1254
-	VPRINTK("HOST_CTL 0x%x\n", tmp);
1263
+	dev_dbg(host->dev, "HOST_CTL 0x%x\n", tmp);
1255
1264
 	writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
1256
1265
 	tmp = readl(mmio + HOST_CTL);
1257
-	VPRINTK("HOST_CTL 0x%x\n", tmp);
1266
+	dev_dbg(host->dev, "HOST_CTL 0x%x\n", tmp);
1258
1267
 }
1259
1268
 EXPORT_SYMBOL_GPL(ahci_init_controller);
1260
1269
 
..
..
@@ -1553,6 +1562,8 @@
1553
1562
 	ata_tf_init(link->device, &tf);
1554
1563
 	tf.command = ATA_BUSY;
1555
1564
 	ata_tf_to_fis(&tf, 0, 0, d2h_fis);
1565
+
1566
+	ahci_port_clear_pending_irq(ap);
1556
1567
 
1557
1568
 	rc = sata_link_hardreset(link, timing, deadline, online,
1558
1569
 				 ahci_check_ready);
..
..
@@ -1905,16 +1916,12 @@
1905
1916
 	void __iomem *port_mmio = ahci_port_base(ap);
1906
1917
 	u32 status;
1907
1918
 
1908
-	VPRINTK("ENTER\n");
1909
-
1910
1919
 	status = readl(port_mmio + PORT_IRQ_STAT);
1911
1920
 	writel(status, port_mmio + PORT_IRQ_STAT);
1912
1921
 
1913
1922
 	spin_lock(ap->lock);
1914
1923
 	ahci_handle_port_interrupt(ap, port_mmio, status);
1915
1924
 	spin_unlock(ap->lock);
1916
-
1917
-	VPRINTK("EXIT\n");
1918
1925
 
1919
1926
 	return IRQ_HANDLED;
1920
1927
 }
..
..
@@ -1932,9 +1939,7 @@
1932
1939
 		ap = host->ports[i];
1933
1940
 		if (ap) {
1934
1941
 			ahci_port_intr(ap);
1935
-			VPRINTK("port %u\n", i);
1936
1942
 		} else {
1937
-			VPRINTK("port %u (no irq)\n", i);
1938
1943
 			if (ata_ratelimit())
1939
1944
 				dev_warn(host->dev,
1940
1945
 					 "interrupt on disabled port %u\n", i);
..
..
@@ -1954,8 +1959,6 @@
1954
1959
 	unsigned int rc = 0;
1955
1960
 	void __iomem *mmio;
1956
1961
 	u32 irq_stat, irq_masked;
1957
-
1958
-	VPRINTK("ENTER\n");
1959
1962
 
1960
1963
 	hpriv = host->private_data;
1961
1964
 	mmio = hpriv->mmio;
..
..
@@ -1983,8 +1986,6 @@
1983
1986
 	writel(irq_stat, mmio + HOST_IRQ_STAT);
1984
1987
 
1985
1988
 	spin_unlock(&host->lock);
1986
-
1987
-	VPRINTK("EXIT\n");
1988
1989
 
1989
1990
 	return IRQ_RETVAL(rc);
1990
1991
 }