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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/x86/kvm/pmu.h
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@@ -15,6 +15,8 @@
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 #define VMWARE_BACKDOOR_PMC_REAL_TIME		0x10001
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 #define VMWARE_BACKDOOR_PMC_APPARENT_TIME	0x10002
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+#define MAX_FIXED_COUNTERS	3
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+
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 struct kvm_event_hw_type_mapping {
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 	u8 eventsel;
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 	u8 unit_mask;
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@@ -22,16 +24,16 @@
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 };
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 struct kvm_pmu_ops {
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-	unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select,
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-				    u8 unit_mask);
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+	unsigned int (*pmc_perf_hw_id)(struct kvm_pmc *pmc);
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 	unsigned (*find_fixed_event)(int idx);
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 	bool (*pmc_is_enabled)(struct kvm_pmc *pmc);
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 	struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);
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-	struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx,
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-					  u64 *mask);
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-	int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx);
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+	struct kvm_pmc *(*rdpmc_ecx_to_pmc)(struct kvm_vcpu *vcpu,
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+		unsigned int idx, u64 *mask);
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+	struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, u32 msr);
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+	int (*is_valid_rdpmc_ecx)(struct kvm_vcpu *vcpu, unsigned int idx);
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 	bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);
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-	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
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+	int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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 	void (*refresh)(struct kvm_vcpu *vcpu);
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 	void (*init)(struct kvm_vcpu *vcpu);
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@@ -57,12 +59,21 @@
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 	return counter & pmc_bitmask(pmc);
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 }
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+static inline void pmc_release_perf_event(struct kvm_pmc *pmc)
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+{
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+	if (pmc->perf_event) {
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+		perf_event_release_kernel(pmc->perf_event);
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+		pmc->perf_event = NULL;
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+		pmc->current_config = 0;
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+		pmc_to_pmu(pmc)->event_count--;
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+	}
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+}
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+
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 static inline void pmc_stop_counter(struct kvm_pmc *pmc)
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 {
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 	if (pmc->perf_event) {
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 		pmc->counter = pmc_read_counter(pmc);
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-		perf_event_release_kernel(pmc->perf_event);
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-		pmc->perf_event = NULL;
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+		pmc_release_perf_event(pmc);
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 	}
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 }
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..
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@@ -78,7 +89,13 @@
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 static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
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 {
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-	return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
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+	return kvm_x86_ops.pmu_ops->pmc_is_enabled(pmc);
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+}
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+
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+static inline bool kvm_valid_perf_global_ctrl(struct kvm_pmu *pmu,
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+						 u64 data)
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+{
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+	return !(pmu->global_ctrl_mask & data);
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 }
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 /* returns general purpose PMC with the specified MSR. Note that it can be
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@@ -113,6 +130,15 @@
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 	return NULL;
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 }
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+static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value)
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+{
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+	u64 sample_period = (-counter_value) & pmc_bitmask(pmc);
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+
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+	if (!sample_period)
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+		sample_period = pmc_bitmask(pmc) + 1;
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+	return sample_period;
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+}
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+
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 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
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 void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
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 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);
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@@ -120,14 +146,16 @@
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 void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu);
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 void kvm_pmu_handle_event(struct kvm_vcpu *vcpu);
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 int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
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-int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx);
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+int kvm_pmu_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx);
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 bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);
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-int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
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+int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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 void kvm_pmu_refresh(struct kvm_vcpu *vcpu);
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 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
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 void kvm_pmu_init(struct kvm_vcpu *vcpu);
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+void kvm_pmu_cleanup(struct kvm_vcpu *vcpu);
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 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
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+int kvm_vm_ioctl_set_pmu_event_filter(struct kvm *kvm, void __user *argp);
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 bool is_vmware_backdoor_pmc(u32 pmc_idx);
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