| .. | .. |
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| 90 | 90 | #define __raw_writew __writew |
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| 91 | 91 | #define __raw_writel __writel |
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| 92 | 92 | |
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| 93 | | -#define mmiowb() barrier() |
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| 94 | | - |
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| 95 | 93 | #ifdef CONFIG_X86_64 |
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| 96 | 94 | |
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| 97 | 95 | build_mmio_read(readq, "q", u64, "=r", :"memory") |
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| .. | .. |
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| 167 | 165 | { |
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| 168 | 166 | return (unsigned int)virt_to_phys(address); |
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| 169 | 167 | } |
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| 170 | | -#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page)) |
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| 171 | 168 | #define isa_bus_to_virt phys_to_virt |
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| 172 | 169 | |
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| 173 | 170 | /* |
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| .. | .. |
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| 183 | 180 | * The default ioremap() behavior is non-cached; if you need something |
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| 184 | 181 | * else, you probably want one of the following. |
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| 185 | 182 | */ |
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| 186 | | -extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); |
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| 187 | | -#define ioremap_nocache ioremap_nocache |
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| 188 | 183 | extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size); |
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| 189 | 184 | #define ioremap_uc ioremap_uc |
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| 190 | | - |
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| 191 | 185 | extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); |
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| 192 | 186 | #define ioremap_cache ioremap_cache |
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| 193 | 187 | extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, unsigned long prot_val); |
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| 194 | 188 | #define ioremap_prot ioremap_prot |
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| 189 | +extern void __iomem *ioremap_encrypted(resource_size_t phys_addr, unsigned long size); |
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| 190 | +#define ioremap_encrypted ioremap_encrypted |
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| 195 | 191 | |
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| 196 | 192 | /** |
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| 197 | 193 | * ioremap - map bus memory into CPU space |
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| .. | .. |
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| 207 | 203 | * If the area you are trying to map is a PCI BAR you should have a |
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| 208 | 204 | * look at pci_iomap(). |
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| 209 | 205 | */ |
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| 210 | | -static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) |
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| 211 | | -{ |
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| 212 | | - return ioremap_nocache(offset, size); |
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| 213 | | -} |
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| 206 | +void __iomem *ioremap(resource_size_t offset, unsigned long size); |
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| 214 | 207 | #define ioremap ioremap |
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| 215 | 208 | |
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| 216 | 209 | extern void iounmap(volatile void __iomem *addr); |
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| .. | .. |
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| 219 | 212 | extern void set_iounmap_nonlazy(void); |
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| 220 | 213 | |
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| 221 | 214 | #ifdef __KERNEL__ |
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| 215 | + |
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| 216 | +void memcpy_fromio(void *, const volatile void __iomem *, size_t); |
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| 217 | +void memcpy_toio(volatile void __iomem *, const void *, size_t); |
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| 218 | +void memset_io(volatile void __iomem *, int, size_t); |
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| 219 | + |
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| 220 | +#define memcpy_fromio memcpy_fromio |
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| 221 | +#define memcpy_toio memcpy_toio |
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| 222 | +#define memset_io memset_io |
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| 222 | 223 | |
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| 223 | 224 | #include <asm-generic/iomap.h> |
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| 224 | 225 | |
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| .. | .. |
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| 369 | 370 | |
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| 370 | 371 | extern bool is_early_ioremap_ptep(pte_t *ptep); |
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| 371 | 372 | |
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| 372 | | -#ifdef CONFIG_XEN |
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| 373 | | -#include <xen/xen.h> |
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| 374 | | -struct bio_vec; |
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| 375 | | - |
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| 376 | | -extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1, |
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| 377 | | - const struct bio_vec *vec2); |
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| 378 | | - |
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| 379 | | -#define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \ |
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| 380 | | - (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \ |
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| 381 | | - (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2))) |
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| 382 | | -#endif /* CONFIG_XEN */ |
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| 383 | | - |
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| 384 | 373 | #define IO_SPACE_LIMIT 0xffff |
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| 385 | 374 | |
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| 386 | 375 | #include <asm-generic/io.h> |
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| .. | .. |
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| 410 | 399 | extern bool phys_mem_access_encrypted(unsigned long phys_addr, |
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| 411 | 400 | unsigned long size); |
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| 412 | 401 | |
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| 402 | +/** |
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| 403 | + * iosubmit_cmds512 - copy data to single MMIO location, in 512-bit units |
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| 404 | + * @dst: destination, in MMIO space (must be 512-bit aligned) |
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| 405 | + * @src: source |
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| 406 | + * @count: number of 512 bits quantities to submit |
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| 407 | + * |
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| 408 | + * Submit data from kernel space to MMIO space, in units of 512 bits at a |
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| 409 | + * time. Order of access is not guaranteed, nor is a memory barrier |
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| 410 | + * performed afterwards. |
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| 411 | + * |
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| 412 | + * Warning: Do not use this helper unless your driver has checked that the CPU |
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| 413 | + * instruction is supported on the platform. |
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| 414 | + */ |
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| 415 | +static inline void iosubmit_cmds512(void __iomem *dst, const void *src, |
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| 416 | + size_t count) |
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| 417 | +{ |
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| 418 | + const u8 *from = src; |
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| 419 | + const u8 *end = from + count * 64; |
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| 420 | + |
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| 421 | + while (from < end) { |
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| 422 | + movdir64b(dst, from); |
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| 423 | + from += 64; |
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| 424 | + } |
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| 425 | +} |
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| 426 | + |
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| 413 | 427 | #endif /* _ASM_X86_IO_H */ |
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