write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/x86/include/asm/atomic64_64.h
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@@ -17,9 +17,9 @@
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  * Atomically reads the value of @v.
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  * Doesn't imply a read memory barrier.
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  */
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-static inline long arch_atomic64_read(const atomic64_t *v)
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+static inline s64 arch_atomic64_read(const atomic64_t *v)
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 {
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-	return READ_ONCE((v)->counter);
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+	return __READ_ONCE((v)->counter);
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 }
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 /**
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@@ -29,9 +29,9 @@
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  *
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  * Atomically sets the value of @v to @i.
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  */
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-static inline void arch_atomic64_set(atomic64_t *v, long i)
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+static inline void arch_atomic64_set(atomic64_t *v, s64 i)
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 {
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-	WRITE_ONCE(v->counter, i);
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+	__WRITE_ONCE(v->counter, i);
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 }
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 /**
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@@ -41,7 +41,7 @@
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  *
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  * Atomically adds @i to @v.
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  */
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-static __always_inline void arch_atomic64_add(long i, atomic64_t *v)
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+static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v)
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 {
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 	asm volatile(LOCK_PREFIX "addq %1,%0"
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 		     : "=m" (v->counter)
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@@ -55,7 +55,7 @@
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  *
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  * Atomically subtracts @i from @v.
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  */
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-static inline void arch_atomic64_sub(long i, atomic64_t *v)
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+static inline void arch_atomic64_sub(s64 i, atomic64_t *v)
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 {
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 	asm volatile(LOCK_PREFIX "subq %1,%0"
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 		     : "=m" (v->counter)
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@@ -71,9 +71,9 @@
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  * true if the result is zero, or false for all
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  * other cases.
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  */
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-static inline bool arch_atomic64_sub_and_test(long i, atomic64_t *v)
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+static inline bool arch_atomic64_sub_and_test(s64 i, atomic64_t *v)
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 {
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-	GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, "er", i, "%0", e);
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+	return GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, e, "er", i);
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 }
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 #define arch_atomic64_sub_and_test arch_atomic64_sub_and_test
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@@ -115,7 +115,7 @@
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  */
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 static inline bool arch_atomic64_dec_and_test(atomic64_t *v)
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 {
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-	GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, "%0", e);
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+	return GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, e);
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 }
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 #define arch_atomic64_dec_and_test arch_atomic64_dec_and_test
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@@ -129,7 +129,7 @@
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  */
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 static inline bool arch_atomic64_inc_and_test(atomic64_t *v)
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 {
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-	GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, "%0", e);
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+	return GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, e);
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 }
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 #define arch_atomic64_inc_and_test arch_atomic64_inc_and_test
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@@ -142,9 +142,9 @@
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  * if the result is negative, or false when
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  * result is greater than or equal to zero.
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  */
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-static inline bool arch_atomic64_add_negative(long i, atomic64_t *v)
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+static inline bool arch_atomic64_add_negative(s64 i, atomic64_t *v)
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 {
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-	GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, "er", i, "%0", s);
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+	return GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, s, "er", i);
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 }
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 #define arch_atomic64_add_negative arch_atomic64_add_negative
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@@ -155,43 +155,49 @@
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  *
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  * Atomically adds @i to @v and returns @i + @v
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  */
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-static __always_inline long arch_atomic64_add_return(long i, atomic64_t *v)
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+static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)
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 {
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 	return i + xadd(&v->counter, i);
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 }
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+#define arch_atomic64_add_return arch_atomic64_add_return
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-static inline long arch_atomic64_sub_return(long i, atomic64_t *v)
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+static inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v)
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 {
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 	return arch_atomic64_add_return(-i, v);
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 }
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+#define arch_atomic64_sub_return arch_atomic64_sub_return
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-static inline long arch_atomic64_fetch_add(long i, atomic64_t *v)
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+static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)
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 {
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 	return xadd(&v->counter, i);
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 }
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+#define arch_atomic64_fetch_add arch_atomic64_fetch_add
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-static inline long arch_atomic64_fetch_sub(long i, atomic64_t *v)
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+static inline s64 arch_atomic64_fetch_sub(s64 i, atomic64_t *v)
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 {
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 	return xadd(&v->counter, -i);
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 }
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+#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub
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-static inline long arch_atomic64_cmpxchg(atomic64_t *v, long old, long new)
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+static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
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 {
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 	return arch_cmpxchg(&v->counter, old, new);
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 }
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+#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg
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-#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg
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-static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, long new)
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+static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new)
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 {
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 	return try_cmpxchg(&v->counter, old, new);
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 }
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+#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg
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-static inline long arch_atomic64_xchg(atomic64_t *v, long new)
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+static inline s64 arch_atomic64_xchg(atomic64_t *v, s64 new)
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 {
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 	return arch_xchg(&v->counter, new);
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 }
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+#define arch_atomic64_xchg arch_atomic64_xchg
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-static inline void arch_atomic64_and(long i, atomic64_t *v)
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+static inline void arch_atomic64_and(s64 i, atomic64_t *v)
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 {
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 	asm volatile(LOCK_PREFIX "andq %1,%0"
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 			: "+m" (v->counter)
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@@ -199,7 +205,7 @@
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 			: "memory");
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 }
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-static inline long arch_atomic64_fetch_and(long i, atomic64_t *v)
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+static inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v)
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 {
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 	s64 val = arch_atomic64_read(v);
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@@ -207,8 +213,9 @@
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 	} while (!arch_atomic64_try_cmpxchg(v, &val, val & i));
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 	return val;
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 }
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+#define arch_atomic64_fetch_and arch_atomic64_fetch_and
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-static inline void arch_atomic64_or(long i, atomic64_t *v)
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+static inline void arch_atomic64_or(s64 i, atomic64_t *v)
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 {
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 	asm volatile(LOCK_PREFIX "orq %1,%0"
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 			: "+m" (v->counter)
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@@ -216,7 +223,7 @@
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 			: "memory");
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 }
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-static inline long arch_atomic64_fetch_or(long i, atomic64_t *v)
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+static inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v)
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 {
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 	s64 val = arch_atomic64_read(v);
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@@ -224,8 +231,9 @@
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 	} while (!arch_atomic64_try_cmpxchg(v, &val, val | i));
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 	return val;
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 }
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+#define arch_atomic64_fetch_or arch_atomic64_fetch_or
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-static inline void arch_atomic64_xor(long i, atomic64_t *v)
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+static inline void arch_atomic64_xor(s64 i, atomic64_t *v)
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 {
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 	asm volatile(LOCK_PREFIX "xorq %1,%0"
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 			: "+m" (v->counter)
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@@ -233,7 +241,7 @@
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 			: "memory");
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 }
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-static inline long arch_atomic64_fetch_xor(long i, atomic64_t *v)
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+static inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v)
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 {
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 	s64 val = arch_atomic64_read(v);
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@@ -241,5 +249,6 @@
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 	} while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i));
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 	return val;
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 }
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+#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
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 #endif /* _ASM_X86_ATOMIC64_64_H */