write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/sh/math-emu/math.c
..
..
@@ -468,109 +468,6 @@
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 }
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 /**
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- *	denormal_to_double - Given denormalized float number,
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- *	                     store double float
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- *
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- *	@fpu: Pointer to sh_fpu_soft structure
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- *	@n: Index to FP register
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- */
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-static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n)
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-{
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-	unsigned long du, dl;
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-	unsigned long x = fpu->fpul;
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-	int exp = 1023 - 126;
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-
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-	if (x != 0 && (x & 0x7f800000) == 0) {
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-		du = (x & 0x80000000);
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-		while ((x & 0x00800000) == 0) {
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-			x <<= 1;
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-			exp--;
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-		}
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-		x &= 0x007fffff;
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-		du |= (exp << 20) | (x >> 3);
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-		dl = x << 29;
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-
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-		fpu->fp_regs[n] = du;
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-		fpu->fp_regs[n+1] = dl;
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-	}
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-}
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-
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-/**
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- *	ieee_fpe_handler - Handle denormalized number exception
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- *
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- *	@regs: Pointer to register structure
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- *
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- *	Returns 1 when it's handled (should not cause exception).
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- */
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-static int ieee_fpe_handler(struct pt_regs *regs)
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-{
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-	unsigned short insn = *(unsigned short *)regs->pc;
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-	unsigned short finsn;
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-	unsigned long nextpc;
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-	int nib[4] = {
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-		(insn >> 12) & 0xf,
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-		(insn >> 8) & 0xf,
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-		(insn >> 4) & 0xf,
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-		insn & 0xf};
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-
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-	if (nib[0] == 0xb ||
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-	    (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
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-		regs->pr = regs->pc + 4;
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-
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-	if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
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-		nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
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-		finsn = *(unsigned short *) (regs->pc + 2);
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-	} else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
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-		if (regs->sr & 1)
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-			nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
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-		else
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-			nextpc = regs->pc + 4;
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-		finsn = *(unsigned short *) (regs->pc + 2);
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-	} else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
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-		if (regs->sr & 1)
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-			nextpc = regs->pc + 4;
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-		else
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-			nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
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-		finsn = *(unsigned short *) (regs->pc + 2);
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-	} else if (nib[0] == 0x4 && nib[3] == 0xb &&
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-		 (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
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-		nextpc = regs->regs[nib[1]];
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-		finsn = *(unsigned short *) (regs->pc + 2);
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-	} else if (nib[0] == 0x0 && nib[3] == 0x3 &&
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-		 (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
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-		nextpc = regs->pc + 4 + regs->regs[nib[1]];
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-		finsn = *(unsigned short *) (regs->pc + 2);
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-	} else if (insn == 0x000b) { /* rts */
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-		nextpc = regs->pr;
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-		finsn = *(unsigned short *) (regs->pc + 2);
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-	} else {
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-		nextpc = regs->pc + 2;
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-		finsn = insn;
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-	}
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-
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-	if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
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-		struct task_struct *tsk = current;
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-
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-		if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) {
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-			/* FPU error */
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-			denormal_to_double (&tsk->thread.xstate->softfpu,
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-					    (finsn >> 8) & 0xf);
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-			tsk->thread.xstate->softfpu.fpscr &=
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-				~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
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-			task_thread_info(tsk)->status |= TS_USEDFPU;
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-		} else {
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-			force_sig_fault(SIGFPE, FPE_FLTINV,
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-					(void __user *)regs->pc, tsk);
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-		}
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-
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-		regs->pc = nextpc;
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-		return 1;
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-	}
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-
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-	return 0;
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-}
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-
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-/**
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  * fpu_init - Initialize FPU registers
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  * @fpu: Pointer to software emulated FPU registers.
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  */