write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/powerpc/perf/perf_regs.c
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@@ -1,10 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright 2016 Anju T, IBM Corporation.
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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 #include <linux/errno.h>
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@@ -17,9 +13,11 @@
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 #include <asm/ptrace.h>
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 #include <asm/perf_regs.h>
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+u64 PERF_REG_EXTENDED_MASK;
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+
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 #define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
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-#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
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+#define REG_RESERVED (~(PERF_REG_EXTENDED_MASK | PERF_REG_PMU_MASK))
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 static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
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 	PT_REGS_OFFSET(PERF_REG_POWERPC_R0,  gpr[0]),
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@@ -69,11 +67,60 @@
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 	PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
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 	PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
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 	PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
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+	PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),
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+	PT_REGS_OFFSET(PERF_REG_POWERPC_MMCRA, dsisr),
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 };
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+
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+/* Function to return the extended register values */
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+static u64 get_ext_regs_value(int idx)
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+{
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+	switch (idx) {
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+	case PERF_REG_POWERPC_MMCR0:
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+		return mfspr(SPRN_MMCR0);
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+	case PERF_REG_POWERPC_MMCR1:
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+		return mfspr(SPRN_MMCR1);
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+	case PERF_REG_POWERPC_MMCR2:
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+		return mfspr(SPRN_MMCR2);
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+#ifdef CONFIG_PPC64
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+	case PERF_REG_POWERPC_MMCR3:
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+		return mfspr(SPRN_MMCR3);
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+	case PERF_REG_POWERPC_SIER2:
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+		return mfspr(SPRN_SIER2);
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+	case PERF_REG_POWERPC_SIER3:
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+		return mfspr(SPRN_SIER3);
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+#endif
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+	default: return 0;
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+	}
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+}
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 u64 perf_reg_value(struct pt_regs *regs, int idx)
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 {
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-	if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
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+	u64 perf_reg_extended_max = PERF_REG_POWERPC_MAX;
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+
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+	if (cpu_has_feature(CPU_FTR_ARCH_31))
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+		perf_reg_extended_max = PERF_REG_MAX_ISA_31;
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+	else if (cpu_has_feature(CPU_FTR_ARCH_300))
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+		perf_reg_extended_max = PERF_REG_MAX_ISA_300;
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+
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+	if (idx == PERF_REG_POWERPC_SIER &&
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+	   (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
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+	    IS_ENABLED(CONFIG_PPC32) ||
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+	    !is_sier_available()))
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+		return 0;
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+
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+	if (idx == PERF_REG_POWERPC_MMCRA &&
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+	   (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
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+	    IS_ENABLED(CONFIG_PPC32)))
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+		return 0;
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+
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+	if (idx >= PERF_REG_POWERPC_MAX && idx < perf_reg_extended_max)
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+		return get_ext_regs_value(idx);
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+
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+	/*
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+	 * If the idx is referring to value beyond the
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+	 * supported registers, return 0 with a warning
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+	 */
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+	if (WARN_ON_ONCE(idx >= perf_reg_extended_max))
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 		return 0;
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 	return regs_get_register(regs, pt_regs_offset[idx]);
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 }
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 void perf_get_regs_user(struct perf_regs *regs_user,
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-			struct pt_regs *regs,
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-			struct pt_regs *regs_user_copy)
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+			struct pt_regs *regs)
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 {
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 	regs_user->regs = task_pt_regs(current);
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 	regs_user->abi = (regs_user->regs) ? perf_reg_abi(current) :