write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/powerpc/perf/core-fsl-emb.c
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@@ -1,13 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Performance event support - Freescale Embedded Performance Monitor
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  *
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  * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
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  * Copyright 2010 Freescale Semiconductor, Inc.
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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 #include <linux/kernel.h>
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 #include <linux/sched.h>
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@@ -34,19 +30,6 @@
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 static atomic_t num_events;
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 /* Used to avoid races in calling reserve/release_pmc_hardware */
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 static DEFINE_MUTEX(pmc_reserve_mutex);
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-
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-/*
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- * If interrupts were soft-disabled when a PMU interrupt occurs, treat
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- * it as an NMI.
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- */
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-static inline int perf_intr_is_nmi(struct pt_regs *regs)
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-{
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-#ifdef __powerpc64__
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-	return (regs->softe & IRQS_DISABLED);
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-#else
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-	return 0;
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-#endif
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-}
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 static void perf_event_interrupt(struct pt_regs *regs);
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@@ -662,14 +645,6 @@
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 	struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
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 	struct perf_event *event;
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 	unsigned long val;
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-	int found = 0;
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-	int nmi;
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-
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-	nmi = perf_intr_is_nmi(regs);
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-	if (nmi)
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-		nmi_enter();
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-	else
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-		irq_enter();
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 	for (i = 0; i < ppmu->n_counter; ++i) {
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 		event = cpuhw->event[i];
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@@ -678,7 +653,6 @@
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 		if ((int)val < 0) {
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 			if (event) {
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 				/* event has overflowed */
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-				found = 1;
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 				record_and_restart(event, val, regs);
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 			} else {
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 				/*
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@@ -694,18 +668,15 @@
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 	mtmsr(mfmsr() | MSR_PMM);
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 	mtpmr(PMRN_PMGC0, PMGC0_PMIE | PMGC0_FCECE);
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 	isync();
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-
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-	if (nmi)
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-		nmi_exit();
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-	else
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-		irq_exit();
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 }
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-void hw_perf_event_setup(int cpu)
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+static int fsl_emb_pmu_prepare_cpu(unsigned int cpu)
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 {
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 	struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
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 	memset(cpuhw, 0, sizeof(*cpuhw));
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+
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+	return 0;
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 }
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 int register_fsl_emb_pmu(struct fsl_emb_pmu *pmu)
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@@ -718,6 +689,8 @@
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 		pmu->name);
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 	perf_pmu_register(&fsl_emb_pmu, "cpu", PERF_TYPE_RAW);
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+	cpuhp_setup_state(CPUHP_PERF_POWER, "perf/powerpc:prepare",
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+			  fsl_emb_pmu_prepare_cpu, NULL);
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 	return 0;
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 }