write in 30M

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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/powerpc/kernel/align.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /* align.c - handle alignment exceptions for the Power PC.
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  *
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  * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
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@@ -10,11 +11,6 @@
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  * Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp
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  *                    <benh@kernel.crashing.org>
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  *   Merge ppc32 and ppc64 implementations
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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 #include <linux/kernel.h>
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@@ -28,6 +24,7 @@
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 #include <asm/disassemble.h>
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 #include <asm/cpu_has_feature.h>
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 #include <asm/sstep.h>
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+#include <asm/inst.h>
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 struct aligninfo {
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 	unsigned char len;
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@@ -108,7 +105,7 @@
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  * so we don't need the address swizzling.
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  */
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 static int emulate_spe(struct pt_regs *regs, unsigned int reg,
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-		       unsigned int instr)
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+		       struct ppc_inst ppc_instr)
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 {
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 	int ret;
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 	union {
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@@ -119,8 +116,9 @@
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 	} data, temp;
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 	unsigned char __user *p, *addr;
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 	unsigned long *evr = &current->thread.evr[reg];
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-	unsigned int nb, flags;
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+	unsigned int nb, flags, instr;
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+	instr = ppc_inst_val(ppc_instr);
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 	instr = (instr >> 1) & 0x1f;
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 	/* DAR has the operand effective address */
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@@ -131,8 +129,7 @@
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 	/* Verify the address of the operand */
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 	if (unlikely(user_mode(regs) &&
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-		     !access_ok((flags & ST ? VERIFY_WRITE : VERIFY_READ),
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-				addr, nb)))
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+		     !access_ok(addr, nb)))
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 		return -EFAULT;
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 	/* userland only */
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@@ -181,9 +178,11 @@
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 			ret |= __get_user_inatomic(temp.v[1], p++);
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 			ret |= __get_user_inatomic(temp.v[2], p++);
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 			ret |= __get_user_inatomic(temp.v[3], p++);
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+			fallthrough;
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 		case 4:
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 			ret |= __get_user_inatomic(temp.v[4], p++);
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 			ret |= __get_user_inatomic(temp.v[5], p++);
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+			fallthrough;
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 		case 2:
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 			ret |= __get_user_inatomic(temp.v[6], p++);
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 			ret |= __get_user_inatomic(temp.v[7], p++);
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@@ -264,9 +263,11 @@
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 			ret |= __put_user_inatomic(data.v[1], p++);
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 			ret |= __put_user_inatomic(data.v[2], p++);
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 			ret |= __put_user_inatomic(data.v[3], p++);
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+			fallthrough;
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 		case 4:
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 			ret |= __put_user_inatomic(data.v[4], p++);
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 			ret |= __put_user_inatomic(data.v[5], p++);
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+			fallthrough;
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 		case 2:
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 			ret |= __put_user_inatomic(data.v[6], p++);
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 			ret |= __put_user_inatomic(data.v[7], p++);
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@@ -294,7 +295,7 @@
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 int fix_alignment(struct pt_regs *regs)
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 {
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-	unsigned int instr;
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+	struct ppc_inst instr;
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 	struct instruction_op op;
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 	int r, type;
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@@ -304,18 +305,18 @@
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 	 */
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 	CHECK_FULL_REGS(regs);
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-	if (unlikely(__get_user(instr, (unsigned int __user *)regs->nip)))
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+	if (unlikely(__get_user_instr(instr, (void __user *)regs->nip)))
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 		return -EFAULT;
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 	if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE)) {
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 		/* We don't handle PPC little-endian any more... */
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 		if (cpu_has_feature(CPU_FTR_PPC_LE))
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 			return -EIO;
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-		instr = swab32(instr);
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+		instr = ppc_inst_swab(instr);
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 	}
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 #ifdef CONFIG_SPE
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-	if ((instr >> 26) == 0x4) {
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-		int reg = (instr >> 21) & 0x1f;
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+	if (ppc_inst_primary_opcode(instr) == 0x4) {
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+		int reg = (ppc_inst_val(instr) >> 21) & 0x1f;
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 		PPC_WARN_ALIGNMENT(spe, regs);
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 		return emulate_spe(regs, reg, instr);
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 	}
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@@ -332,7 +333,7 @@
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 	 * when pasting to a co-processor. Furthermore, paste_last is the
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 	 * synchronisation point for preceding copy/paste sequences.
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 	 */
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-	if ((instr & 0xfc0006fe) == (PPC_INST_COPY & 0xfc0006fe))
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+	if ((ppc_inst_val(instr) & 0xfc0006fe) == (PPC_INST_COPY & 0xfc0006fe))
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 		return -EIO;
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 	r = analyse_instr(&op, regs, instr);