write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/arch/arm/mach-sa1100/neponset.c
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@@ -5,12 +5,12 @@
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 #include <linux/err.h>
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 #include <linux/gpio/driver.h>
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 #include <linux/gpio/gpio-reg.h>
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+#include <linux/gpio/machine.h>
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 #include <linux/init.h>
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 #include <linux/ioport.h>
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 #include <linux/irq.h>
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 #include <linux/kernel.h>
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 #include <linux/module.h>
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-#include <linux/platform_data/sa11x0-serial.h>
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 #include <linux/platform_device.h>
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 #include <linux/pm.h>
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 #include <linux/serial_core.h>
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@@ -20,7 +20,7 @@
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 #include <asm/mach-types.h>
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 #include <asm/mach/map.h>
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 #include <asm/hardware/sa1111.h>
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-#include <asm/sizes.h>
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+#include <linux/sizes.h>
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 #include <mach/hardware.h>
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 #include <mach/assabet.h>
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@@ -48,23 +48,8 @@
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 #define IRR_SA1111	(1 << 2)
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 #define NCR_NGPIO	7
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-
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-#define MDM_CTL0_RTS1	(1 << 0)
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-#define MDM_CTL0_DTR1	(1 << 1)
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-#define MDM_CTL0_RTS2	(1 << 2)
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-#define MDM_CTL0_DTR2	(1 << 3)
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 #define MDM_CTL0_NGPIO	4
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-
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-#define MDM_CTL1_CTS1	(1 << 0)
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-#define MDM_CTL1_DSR1	(1 << 1)
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-#define MDM_CTL1_DCD1	(1 << 2)
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-#define MDM_CTL1_CTS2	(1 << 3)
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-#define MDM_CTL1_DSR2	(1 << 4)
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-#define MDM_CTL1_DCD2	(1 << 5)
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 #define MDM_CTL1_NGPIO	6
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-
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-#define AUD_SEL_1341	(1 << 0)
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-#define AUD_MUTE_1341	(1 << 1)
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 #define AUD_NGPIO	2
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 extern void sa1110_mb_disable(void);
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@@ -96,6 +81,43 @@
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 	struct gpio_chip *gpio[4];
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 };
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+static struct gpiod_lookup_table neponset_uart1_gpio_table = {
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+	.dev_id = "sa11x0-uart.1",
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+	.table = {
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+		GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
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+		{ },
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+	},
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+};
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+
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+static struct gpiod_lookup_table neponset_uart3_gpio_table = {
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+	.dev_id = "sa11x0-uart.3",
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+	.table = {
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+		GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
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+		GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
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+		{ },
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+	},
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+};
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+
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+static struct gpiod_lookup_table neponset_pcmcia_table = {
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+	.dev_id = "1800",
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+	.table = {
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+		GPIO_LOOKUP("sa1111", 1, "a0vcc", GPIO_ACTIVE_HIGH),
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+		GPIO_LOOKUP("sa1111", 0, "a1vcc", GPIO_ACTIVE_HIGH),
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+		GPIO_LOOKUP("neponset-ncr", 5, "a0vpp", GPIO_ACTIVE_HIGH),
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+		GPIO_LOOKUP("neponset-ncr", 6, "a1vpp", GPIO_ACTIVE_HIGH),
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+		GPIO_LOOKUP("sa1111", 2, "b0vcc", GPIO_ACTIVE_HIGH),
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+		GPIO_LOOKUP("sa1111", 3, "b1vcc", GPIO_ACTIVE_HIGH),
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+		{ },
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+	},
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+};
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+
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 static struct neponset_drvdata *nep;
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 void neponset_ncr_frob(unsigned int mask, unsigned int val)
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@@ -109,69 +131,6 @@
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 		WARN(1, "nep unset\n");
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 }
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 EXPORT_SYMBOL(neponset_ncr_frob);
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-
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-static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
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-{
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-	struct neponset_drvdata *n = nep;
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-	unsigned long mask, val = 0;
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-
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-	if (!n)
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-		return;
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-
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-	if (port->mapbase == _Ser1UTCR0) {
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-		mask = MDM_CTL0_RTS2 | MDM_CTL0_DTR2;
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-
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-		if (!(mctrl & TIOCM_RTS))
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-			val |= MDM_CTL0_RTS2;
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-
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-		if (!(mctrl & TIOCM_DTR))
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-			val |= MDM_CTL0_DTR2;
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-	} else if (port->mapbase == _Ser3UTCR0) {
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-		mask = MDM_CTL0_RTS1 | MDM_CTL0_DTR1;
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-
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-		if (!(mctrl & TIOCM_RTS))
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-			val |= MDM_CTL0_RTS1;
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-
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-		if (!(mctrl & TIOCM_DTR))
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-			val |= MDM_CTL0_DTR1;
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-	}
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-
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-	n->gpio[1]->set_multiple(n->gpio[1], &mask, &val);
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-}
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-
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-static u_int neponset_get_mctrl(struct uart_port *port)
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-{
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-	void __iomem *base = nep->base;
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-	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
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-	u_int mdm_ctl1;
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-
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-	if (!base)
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-		return ret;
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-
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-	mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
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-	if (port->mapbase == _Ser1UTCR0) {
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-		if (mdm_ctl1 & MDM_CTL1_DCD2)
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-			ret &= ~TIOCM_CD;
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-		if (mdm_ctl1 & MDM_CTL1_CTS2)
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-			ret &= ~TIOCM_CTS;
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-		if (mdm_ctl1 & MDM_CTL1_DSR2)
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-			ret &= ~TIOCM_DSR;
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-	} else if (port->mapbase == _Ser3UTCR0) {
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-		if (mdm_ctl1 & MDM_CTL1_DCD1)
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-			ret &= ~TIOCM_CD;
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-		if (mdm_ctl1 & MDM_CTL1_CTS1)
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-			ret &= ~TIOCM_CTS;
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-		if (mdm_ctl1 & MDM_CTL1_DSR1)
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-			ret &= ~TIOCM_DSR;
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-	}
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-
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-	return ret;
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-}
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-
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-static struct sa1100_port_fns neponset_port_fns = {
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-	.set_mctrl	= neponset_set_mctrl,
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-	.get_mctrl	= neponset_get_mctrl,
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-};
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 /*
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  * Install handler for Neponset IRQ.  Note that we have to loop here
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@@ -374,6 +333,10 @@
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 			   d->base + AUD_CTL, AUD_NGPIO, false,
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 			   neponset_aud_names);
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+	gpiod_add_lookup_table(&neponset_uart1_gpio_table);
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+	gpiod_add_lookup_table(&neponset_uart3_gpio_table);
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+	gpiod_add_lookup_table(&neponset_pcmcia_table);
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+
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 	/*
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 	 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
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 	 * something on the Neponset activates this IRQ on sleep (eth?)
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@@ -385,8 +348,6 @@
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 	dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
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 		 d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
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 	nep = d;
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-
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-	sa1100_register_uart_fns(&neponset_port_fns);
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 	/* Ensure that the memory bus request/grant signals are setup */
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 	sa1110_mb_disable();
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@@ -424,6 +385,11 @@
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 		platform_device_unregister(d->sa1111);
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 	if (!IS_ERR(d->smc91x))
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 		platform_device_unregister(d->smc91x);
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+
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+	gpiod_remove_lookup_table(&neponset_pcmcia_table);
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+	gpiod_remove_lookup_table(&neponset_uart3_gpio_table);
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+	gpiod_remove_lookup_table(&neponset_uart1_gpio_table);
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+
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 	irq_set_chained_handler(irq, NULL);
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 	irq_free_descs(d->irq_base, NEP_IRQ_NR);
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 	nep = NULL;