write in 30M

hc

2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/Documentation/trace/events-msr.rst
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 The x86 kernel supports tracing most MSR (Model Specific Register) accesses.
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 To see the definition of the MSRs on Intel systems please see the SDM
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-at http://www.intel.com/sdm (Volume 3)
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+at https://www.intel.com/sdm (Volume 3)
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 Available trace points:
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