write in 30M

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2024-02-20 ea08eeccae9297f7aabd2ef7f0c2517ac4549acc

 kernel/Documentation/core-api/genericirq.rst
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 =========
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 The original implementation of interrupt handling in Linux uses the
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-:c:func:`__do_IRQ` super-handler, which is able to deal with every type of
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+__do_IRQ() super-handler, which is able to deal with every type of
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 interrupt logic.
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 Originally, Russell King identified different types of handlers to build
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 -  Fast EOI type
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-In the SMP world of the :c:func:`__do_IRQ` super-handler another type was
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+In the SMP world of the __do_IRQ() super-handler another type was
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 identified:
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 -  Per CPU type
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 (sub)architecture specific 'edge type' implementation.
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 To make the transition to the new model easier and prevent the breakage
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-of existing implementations, the :c:func:`__do_IRQ` super-handler is still
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+of existing implementations, the __do_IRQ() super-handler is still
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 available. This leads to a kind of duality for the time being. Over time
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 the new model should be used in more and more architectures, as it
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 enables smaller and cleaner IRQ subsystems. It's deprecated for three
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 interrupt chip structure which are assigned to this interrupt.
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 Whenever an interrupt triggers, the low-level architecture code calls
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-into the generic interrupt code by calling :c:func:`desc->handle_irq`. This
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+into the generic interrupt code by calling desc->handle_irq(). This
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 high-level IRQ handling function only uses desc->irq_data.chip
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 primitives referenced by the assigned chip descriptor structure.
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 The high-level Driver API consists of following functions:
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--  :c:func:`request_irq`
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+-  request_irq()
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--  :c:func:`free_irq`
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+-  request_threaded_irq()
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--  :c:func:`disable_irq`
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+-  free_irq()
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--  :c:func:`enable_irq`
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+-  disable_irq()
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--  :c:func:`disable_irq_nosync` (SMP only)
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+-  enable_irq()
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--  :c:func:`synchronize_irq` (SMP only)
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+-  disable_irq_nosync() (SMP only)
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--  :c:func:`irq_set_irq_type`
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+-  synchronize_irq() (SMP only)
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--  :c:func:`irq_set_irq_wake`
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+-  irq_set_irq_type()
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--  :c:func:`irq_set_handler_data`
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+-  irq_set_irq_wake()
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--  :c:func:`irq_set_chip`
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+-  irq_set_handler_data()
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--  :c:func:`irq_set_chip_data`
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+-  irq_set_chip()
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+
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+-  irq_set_chip_data()
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 See the autogenerated function documentation for details.
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 The generic layer provides a set of pre-defined irq-flow methods:
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--  :c:func:`handle_level_irq`
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+-  handle_level_irq()
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--  :c:func:`handle_edge_irq`
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+-  handle_edge_irq()
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--  :c:func:`handle_fasteoi_irq`
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+-  handle_fasteoi_irq()
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--  :c:func:`handle_simple_irq`
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+-  handle_simple_irq()
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--  :c:func:`handle_percpu_irq`
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+-  handle_percpu_irq()
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--  :c:func:`handle_edge_eoi_irq`
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+-  handle_edge_eoi_irq()
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--  :c:func:`handle_bad_irq`
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+-  handle_bad_irq()
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 The interrupt flow handlers (either pre-defined or architecture
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 specific) are assigned to specific interrupts by the architecture either
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 This per interrupt selectable feature, which was introduced by Russell
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 King in the ARM interrupt implementation, does not mask an interrupt at
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-the hardware level when :c:func:`disable_irq` is called. The interrupt is kept
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+the hardware level when disable_irq() is called. The interrupt is kept
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 enabled and is masked in the flow handler when an interrupt event
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 happens. This prevents losing edge interrupts on hardware which does not
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 store an edge interrupt event while the interrupt is disabled at the
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 hardware level. When an interrupt arrives while the IRQ_DISABLED flag
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 is set, then the interrupt is masked at the hardware level and the
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 IRQ_PENDING bit is set. When the interrupt is re-enabled by
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-:c:func:`enable_irq` the pending bit is checked and if it is set, the interrupt
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+enable_irq() the pending bit is checked and if it is set, the interrupt
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 is resent either via hardware or by a software resend mechanism. (It's
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 necessary to enable CONFIG_HARDIRQS_SW_RESEND when you want to use
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 the delayed interrupt disable feature and your hardware is not capable
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 __do_IRQ entry point
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 ====================
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-The original implementation :c:func:`__do_IRQ` was an alternative entry point
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+The original implementation __do_IRQ() was an alternative entry point
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 for all types of interrupts. It no longer exists.
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 This handler turned out to be not suitable for all interrupt hardware
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 .. kernel-doc:: kernel/irq/manage.c
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 .. kernel-doc:: kernel/irq/chip.c
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+   :export:
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 Internal Functions Provided
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 ===========================
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 .. kernel-doc:: kernel/irq/handle.c
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 .. kernel-doc:: kernel/irq/chip.c
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+   :internal:
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 Credits
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 =======