hc
2024-02-20 e636c8d336489bf3eed5878299e6cc045bbad077
kernel/include/uapi/linux/target_core_user.h
....@@ -45,6 +45,7 @@
4545 #define ALIGN_SIZE 64 /* Should be enough for most CPUs */
4646 #define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */
4747 #define TCMU_MAILBOX_FLAG_CAP_READ_LEN (1 << 1) /* Read data length */
48
+#define TCMU_MAILBOX_FLAG_CAP_TMR (1 << 2) /* TMR notifications */
4849
4950 struct tcmu_mailbox {
5051 __u16 version;
....@@ -62,6 +63,7 @@
6263 enum tcmu_opcode {
6364 TCMU_OP_PAD = 0,
6465 TCMU_OP_CMD,
66
+ TCMU_OP_TMR,
6567 };
6668
6769 /*
....@@ -128,6 +130,29 @@
128130
129131 } __packed;
130132
133
+struct tcmu_tmr_entry {
134
+ struct tcmu_cmd_entry_hdr hdr;
135
+
136
+#define TCMU_TMR_UNKNOWN 0
137
+#define TCMU_TMR_ABORT_TASK 1
138
+#define TCMU_TMR_ABORT_TASK_SET 2
139
+#define TCMU_TMR_CLEAR_ACA 3
140
+#define TCMU_TMR_CLEAR_TASK_SET 4
141
+#define TCMU_TMR_LUN_RESET 5
142
+#define TCMU_TMR_TARGET_WARM_RESET 6
143
+#define TCMU_TMR_TARGET_COLD_RESET 7
144
+/* Pseudo reset due to received PR OUT */
145
+#define TCMU_TMR_LUN_RESET_PRO 128
146
+ __u8 tmr_type;
147
+
148
+ __u8 __pad1;
149
+ __u16 __pad2;
150
+ __u32 cmd_cnt;
151
+ __u64 __pad3;
152
+ __u64 __pad4;
153
+ __u16 cmd_ids[0];
154
+} __packed;
155
+
131156 #define TCMU_OP_ALIGN_SIZE sizeof(__u64)
132157
133158 enum tcmu_genl_cmd {