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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * VFIO PCI I/O Port & MMIO access |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2012 Red Hat, Inc. All rights reserved. |
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5 | 6 | * Author: Alex Williamson <alex.williamson@redhat.com> |
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6 | | - * |
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7 | | - * This program is free software; you can redistribute it and/or modify |
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8 | | - * it under the terms of the GNU General Public License version 2 as |
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9 | | - * published by the Free Software Foundation. |
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10 | 7 | * |
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11 | 8 | * Derived from original vfio: |
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12 | 9 | * Copyright 2010 Cisco Systems, Inc. All rights reserved. |
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.. | .. |
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40 | 37 | #define vfio_ioread8 ioread8 |
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41 | 38 | #define vfio_iowrite8 iowrite8 |
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42 | 39 | |
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| 40 | +#define VFIO_IOWRITE(size) \ |
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| 41 | +static int vfio_pci_iowrite##size(struct vfio_pci_device *vdev, \ |
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| 42 | + bool test_mem, u##size val, void __iomem *io) \ |
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| 43 | +{ \ |
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| 44 | + if (test_mem) { \ |
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| 45 | + down_read(&vdev->memory_lock); \ |
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| 46 | + if (!__vfio_pci_memory_enabled(vdev)) { \ |
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| 47 | + up_read(&vdev->memory_lock); \ |
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| 48 | + return -EIO; \ |
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| 49 | + } \ |
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| 50 | + } \ |
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| 51 | + \ |
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| 52 | + vfio_iowrite##size(val, io); \ |
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| 53 | + \ |
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| 54 | + if (test_mem) \ |
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| 55 | + up_read(&vdev->memory_lock); \ |
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| 56 | + \ |
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| 57 | + return 0; \ |
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| 58 | +} |
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| 59 | + |
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| 60 | +VFIO_IOWRITE(8) |
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| 61 | +VFIO_IOWRITE(16) |
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| 62 | +VFIO_IOWRITE(32) |
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| 63 | +#ifdef iowrite64 |
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| 64 | +VFIO_IOWRITE(64) |
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| 65 | +#endif |
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| 66 | + |
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| 67 | +#define VFIO_IOREAD(size) \ |
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| 68 | +static int vfio_pci_ioread##size(struct vfio_pci_device *vdev, \ |
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| 69 | + bool test_mem, u##size *val, void __iomem *io) \ |
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| 70 | +{ \ |
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| 71 | + if (test_mem) { \ |
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| 72 | + down_read(&vdev->memory_lock); \ |
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| 73 | + if (!__vfio_pci_memory_enabled(vdev)) { \ |
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| 74 | + up_read(&vdev->memory_lock); \ |
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| 75 | + return -EIO; \ |
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| 76 | + } \ |
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| 77 | + } \ |
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| 78 | + \ |
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| 79 | + *val = vfio_ioread##size(io); \ |
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| 80 | + \ |
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| 81 | + if (test_mem) \ |
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| 82 | + up_read(&vdev->memory_lock); \ |
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| 83 | + \ |
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| 84 | + return 0; \ |
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| 85 | +} |
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| 86 | + |
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| 87 | +VFIO_IOREAD(8) |
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| 88 | +VFIO_IOREAD(16) |
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| 89 | +VFIO_IOREAD(32) |
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| 90 | + |
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43 | 91 | /* |
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44 | 92 | * Read or write from an __iomem region (MMIO or I/O port) with an excluded |
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45 | 93 | * range which is inaccessible. The excluded range drops writes and fills |
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46 | 94 | * reads with -1. This is intended for handling MSI-X vector tables and |
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47 | 95 | * leftover space for ROM BARs. |
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48 | 96 | */ |
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49 | | -static ssize_t do_io_rw(void __iomem *io, char __user *buf, |
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| 97 | +static ssize_t do_io_rw(struct vfio_pci_device *vdev, bool test_mem, |
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| 98 | + void __iomem *io, char __user *buf, |
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50 | 99 | loff_t off, size_t count, size_t x_start, |
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51 | 100 | size_t x_end, bool iswrite) |
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52 | 101 | { |
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53 | 102 | ssize_t done = 0; |
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| 103 | + int ret; |
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54 | 104 | |
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55 | 105 | while (count) { |
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56 | 106 | size_t fillable, filled; |
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.. | .. |
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69 | 119 | if (copy_from_user(&val, buf, 4)) |
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70 | 120 | return -EFAULT; |
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71 | 121 | |
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72 | | - vfio_iowrite32(val, io + off); |
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| 122 | + ret = vfio_pci_iowrite32(vdev, test_mem, |
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| 123 | + val, io + off); |
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| 124 | + if (ret) |
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| 125 | + return ret; |
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73 | 126 | } else { |
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74 | | - val = vfio_ioread32(io + off); |
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| 127 | + ret = vfio_pci_ioread32(vdev, test_mem, |
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| 128 | + &val, io + off); |
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| 129 | + if (ret) |
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| 130 | + return ret; |
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75 | 131 | |
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76 | 132 | if (copy_to_user(buf, &val, 4)) |
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77 | 133 | return -EFAULT; |
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.. | .. |
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85 | 141 | if (copy_from_user(&val, buf, 2)) |
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86 | 142 | return -EFAULT; |
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87 | 143 | |
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88 | | - vfio_iowrite16(val, io + off); |
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| 144 | + ret = vfio_pci_iowrite16(vdev, test_mem, |
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| 145 | + val, io + off); |
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| 146 | + if (ret) |
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| 147 | + return ret; |
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89 | 148 | } else { |
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90 | | - val = vfio_ioread16(io + off); |
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| 149 | + ret = vfio_pci_ioread16(vdev, test_mem, |
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| 150 | + &val, io + off); |
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| 151 | + if (ret) |
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| 152 | + return ret; |
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91 | 153 | |
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92 | 154 | if (copy_to_user(buf, &val, 2)) |
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93 | 155 | return -EFAULT; |
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.. | .. |
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101 | 163 | if (copy_from_user(&val, buf, 1)) |
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102 | 164 | return -EFAULT; |
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103 | 165 | |
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104 | | - vfio_iowrite8(val, io + off); |
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| 166 | + ret = vfio_pci_iowrite8(vdev, test_mem, |
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| 167 | + val, io + off); |
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| 168 | + if (ret) |
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| 169 | + return ret; |
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105 | 170 | } else { |
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106 | | - val = vfio_ioread8(io + off); |
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| 171 | + ret = vfio_pci_ioread8(vdev, test_mem, |
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| 172 | + &val, io + off); |
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| 173 | + if (ret) |
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| 174 | + return ret; |
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107 | 175 | |
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108 | 176 | if (copy_to_user(buf, &val, 1)) |
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109 | 177 | return -EFAULT; |
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.. | .. |
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181 | 249 | |
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182 | 250 | count = min(count, (size_t)(end - pos)); |
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183 | 251 | |
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184 | | - if (res->flags & IORESOURCE_MEM) { |
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185 | | - down_read(&vdev->memory_lock); |
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186 | | - if (!__vfio_pci_memory_enabled(vdev)) { |
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187 | | - up_read(&vdev->memory_lock); |
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188 | | - return -EIO; |
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189 | | - } |
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190 | | - } |
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191 | | - |
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192 | 252 | if (bar == PCI_ROM_RESOURCE) { |
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193 | 253 | /* |
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194 | 254 | * The ROM can fill less space than the BAR, so we start the |
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.. | .. |
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216 | 276 | x_end = vdev->msix_offset + vdev->msix_size; |
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217 | 277 | } |
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218 | 278 | |
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219 | | - done = do_io_rw(io, buf, pos, count, x_start, x_end, iswrite); |
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| 279 | + done = do_io_rw(vdev, res->flags & IORESOURCE_MEM, io, buf, pos, |
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| 280 | + count, x_start, x_end, iswrite); |
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220 | 281 | |
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221 | 282 | if (done >= 0) |
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222 | 283 | *ppos += done; |
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.. | .. |
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224 | 285 | if (bar == PCI_ROM_RESOURCE) |
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225 | 286 | pci_unmap_rom(pdev, io); |
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226 | 287 | out: |
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227 | | - if (res->flags & IORESOURCE_MEM) |
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228 | | - up_read(&vdev->memory_lock); |
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229 | | - |
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230 | 288 | return done; |
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231 | 289 | } |
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232 | 290 | |
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.. | .. |
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249 | 307 | switch ((u32)pos) { |
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250 | 308 | case 0xa0000 ... 0xbffff: |
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251 | 309 | count = min(count, (size_t)(0xc0000 - pos)); |
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252 | | - iomem = ioremap_nocache(0xa0000, 0xbffff - 0xa0000 + 1); |
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| 310 | + iomem = ioremap(0xa0000, 0xbffff - 0xa0000 + 1); |
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253 | 311 | off = pos - 0xa0000; |
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254 | 312 | rsrc = VGA_RSRC_LEGACY_MEM; |
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255 | 313 | is_ioport = false; |
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.. | .. |
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281 | 339 | return ret; |
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282 | 340 | } |
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283 | 341 | |
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284 | | - done = do_io_rw(iomem, buf, off, count, 0, 0, iswrite); |
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| 342 | + /* |
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| 343 | + * VGA MMIO is a legacy, non-BAR resource that hopefully allows |
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| 344 | + * probing, so we don't currently worry about access in relation |
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| 345 | + * to the memory enable bit in the command register. |
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| 346 | + */ |
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| 347 | + done = do_io_rw(vdev, false, iomem, buf, off, count, 0, 0, iswrite); |
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285 | 348 | |
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286 | 349 | vga_put(vdev->pdev, rsrc); |
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287 | 350 | |
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.. | .. |
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293 | 356 | return done; |
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294 | 357 | } |
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295 | 358 | |
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296 | | -static int vfio_pci_ioeventfd_handler(void *opaque, void *unused) |
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| 359 | +static void vfio_pci_ioeventfd_do_write(struct vfio_pci_ioeventfd *ioeventfd, |
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| 360 | + bool test_mem) |
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297 | 361 | { |
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298 | | - struct vfio_pci_ioeventfd *ioeventfd = opaque; |
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299 | | - |
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300 | 362 | switch (ioeventfd->count) { |
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301 | 363 | case 1: |
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302 | | - vfio_iowrite8(ioeventfd->data, ioeventfd->addr); |
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| 364 | + vfio_pci_iowrite8(ioeventfd->vdev, test_mem, |
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| 365 | + ioeventfd->data, ioeventfd->addr); |
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303 | 366 | break; |
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304 | 367 | case 2: |
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305 | | - vfio_iowrite16(ioeventfd->data, ioeventfd->addr); |
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| 368 | + vfio_pci_iowrite16(ioeventfd->vdev, test_mem, |
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| 369 | + ioeventfd->data, ioeventfd->addr); |
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306 | 370 | break; |
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307 | 371 | case 4: |
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308 | | - vfio_iowrite32(ioeventfd->data, ioeventfd->addr); |
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| 372 | + vfio_pci_iowrite32(ioeventfd->vdev, test_mem, |
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| 373 | + ioeventfd->data, ioeventfd->addr); |
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309 | 374 | break; |
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310 | 375 | #ifdef iowrite64 |
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311 | 376 | case 8: |
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312 | | - vfio_iowrite64(ioeventfd->data, ioeventfd->addr); |
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| 377 | + vfio_pci_iowrite64(ioeventfd->vdev, test_mem, |
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| 378 | + ioeventfd->data, ioeventfd->addr); |
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313 | 379 | break; |
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314 | 380 | #endif |
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315 | 381 | } |
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| 382 | +} |
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| 383 | + |
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| 384 | +static int vfio_pci_ioeventfd_handler(void *opaque, void *unused) |
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| 385 | +{ |
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| 386 | + struct vfio_pci_ioeventfd *ioeventfd = opaque; |
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| 387 | + struct vfio_pci_device *vdev = ioeventfd->vdev; |
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| 388 | + |
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| 389 | + if (ioeventfd->test_mem) { |
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| 390 | + if (!down_read_trylock(&vdev->memory_lock)) |
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| 391 | + return 1; /* Lock contended, use thread */ |
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| 392 | + if (!__vfio_pci_memory_enabled(vdev)) { |
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| 393 | + up_read(&vdev->memory_lock); |
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| 394 | + return 0; |
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| 395 | + } |
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| 396 | + } |
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| 397 | + |
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| 398 | + vfio_pci_ioeventfd_do_write(ioeventfd, false); |
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| 399 | + |
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| 400 | + if (ioeventfd->test_mem) |
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| 401 | + up_read(&vdev->memory_lock); |
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316 | 402 | |
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317 | 403 | return 0; |
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| 404 | +} |
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| 405 | + |
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| 406 | +static void vfio_pci_ioeventfd_thread(void *opaque, void *unused) |
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| 407 | +{ |
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| 408 | + struct vfio_pci_ioeventfd *ioeventfd = opaque; |
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| 409 | + |
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| 410 | + vfio_pci_ioeventfd_do_write(ioeventfd, ioeventfd->test_mem); |
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318 | 411 | } |
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319 | 412 | |
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320 | 413 | long vfio_pci_ioeventfd(struct vfio_pci_device *vdev, loff_t offset, |
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.. | .. |
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381 | 474 | goto out_unlock; |
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382 | 475 | } |
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383 | 476 | |
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| 477 | + ioeventfd->vdev = vdev; |
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384 | 478 | ioeventfd->addr = vdev->barmap[bar] + pos; |
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385 | 479 | ioeventfd->data = data; |
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386 | 480 | ioeventfd->pos = pos; |
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387 | 481 | ioeventfd->bar = bar; |
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388 | 482 | ioeventfd->count = count; |
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| 483 | + ioeventfd->test_mem = vdev->pdev->resource[bar].flags & IORESOURCE_MEM; |
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389 | 484 | |
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390 | 485 | ret = vfio_virqfd_enable(ioeventfd, vfio_pci_ioeventfd_handler, |
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391 | | - NULL, NULL, &ioeventfd->virqfd, fd); |
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| 486 | + vfio_pci_ioeventfd_thread, NULL, |
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| 487 | + &ioeventfd->virqfd, fd); |
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392 | 488 | if (ret) { |
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393 | 489 | kfree(ioeventfd); |
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394 | 490 | goto out_unlock; |
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