forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-02-20 e636c8d336489bf3eed5878299e6cc045bbad077
kernel/drivers/hwtracing/intel_th/gth.h
....@@ -49,6 +49,12 @@
4949 REG_GTH_SCRPD3 = 0xec, /* ScratchPad[3] */
5050 REG_TSCU_TSUCTRL = 0x2000, /* TSCU control register */
5151 REG_TSCU_TSCUSTAT = 0x2004, /* TSCU status register */
52
+
53
+ /* Common Capture Sequencer (CTS) registers */
54
+ REG_CTS_C0S0_EN = 0x30c0, /* clause_event_enable_c0s0 */
55
+ REG_CTS_C0S0_ACT = 0x3180, /* clause_action_control_c0s0 */
56
+ REG_CTS_STAT = 0x32a0, /* cts_status */
57
+ REG_CTS_CTL = 0x32a4, /* cts_control */
5258 };
5359
5460 /* waiting for Pipeline Empty bit(s) to assert for GTH */
....@@ -57,4 +63,17 @@
5763 #define TSUCTRL_CTCRESYNC BIT(0)
5864 #define TSCUSTAT_CTCSYNCING BIT(1)
5965
66
+/* waiting for Trigger status to assert for CTS */
67
+#define CTS_TRIG_WAITLOOP_DEPTH 10000
68
+
69
+#define CTS_EVENT_ENABLE_IF_ANYTHING BIT(31)
70
+#define CTS_ACTION_CONTROL_STATE_OFF 27
71
+#define CTS_ACTION_CONTROL_SET_STATE(x) \
72
+ (((x) & 0x1f) << CTS_ACTION_CONTROL_STATE_OFF)
73
+#define CTS_ACTION_CONTROL_TRIGGER BIT(4)
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+
75
+#define CTS_STATE_IDLE 0x10u
76
+
77
+#define CTS_CTL_SEQUENCER_ENABLE BIT(0)
78
+
6079 #endif /* __INTEL_TH_GTH_H__ */