debug lk

hc

2024-02-20 e636c8d336489bf3eed5878299e6cc045bbad077

 kernel/drivers/clk/socfpga/clk-gate.c
..
..
@@ -174,21 +174,24 @@
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 	u32 div_reg[3];
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 	u32 clk_phase[2];
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 	u32 fixed_div;
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-	struct clk *clk;
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+	struct clk_hw *hw_clk;
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 	struct socfpga_gate_clk *socfpga_clk;
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 	const char *clk_name = node->name;
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 	const char *parent_name[SOCFPGA_MAX_PARENTS];
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 	struct clk_init_data init;
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 	struct clk_ops *ops;
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 	int rc;
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+	int err;
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 	socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL);
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 	if (WARN_ON(!socfpga_clk))
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 		return;
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 	ops = kmemdup(&gateclk_ops, sizeof(gateclk_ops), GFP_KERNEL);
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-	if (WARN_ON(!ops))
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+	if (WARN_ON(!ops)) {
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+		kfree(socfpga_clk);
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 		return;
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+	}
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 	rc = of_property_read_u32_array(node, "clk-gate", clk_gate, 2);
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 	if (rc)
..
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@@ -238,12 +241,15 @@
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 	init.parent_names = parent_name;
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 	socfpga_clk->hw.hw.init = &init;
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-	clk = clk_register(NULL, &socfpga_clk->hw.hw);
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-	if (WARN_ON(IS_ERR(clk))) {
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+	hw_clk = &socfpga_clk->hw.hw;
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+
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+	err = clk_hw_register(NULL, hw_clk);
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+	if (err) {
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+		kfree(ops);
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 		kfree(socfpga_clk);
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 		return;
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 	}
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-	rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
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+	rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk);
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 	if (WARN_ON(rc))
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 		return;
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 }