hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
u-boot/drivers/video/drm/rockchip_display.h
....@@ -7,22 +7,37 @@
77 #ifndef _ROCKCHIP_DISPLAY_H
88 #define _ROCKCHIP_DISPLAY_H
99
10
+#ifdef CONFIG_SPL_BUILD
11
+#include <linux/hdmi.h>
12
+#include <linux/media-bus-format.h>
13
+#else
1014 #include <bmp_layout.h>
11
-#include <drm_modes.h>
1215 #include <edid.h>
16
+#endif
17
+#include <drm_modes.h>
1318 #include <dm/ofnode.h>
1419 #include <drm/drm_dsc.h>
20
+#include <spl_display.h>
21
+#include <clk.h>
1522
1623 /*
17
- * major: IP major vertion, used for IP structure
24
+ * major: IP major version, used for IP structure
1825 * minor: big feature change under same structure
26
+ * build: RTL current SVN number
1927 */
20
-#define VOP_VERSION(major, minor) ((major) << 8 | (minor))
21
-#define VOP_MAJOR(version) ((version) >> 8)
22
-#define VOP_MINOR(version) ((version) & 0xff)
28
+#define VOP_VERSION(major, minor) ((major) << 8 | (minor))
29
+#define VOP_MAJOR(version) ((version) >> 8)
30
+#define VOP_MINOR(version) ((version) & 0xff)
2331
24
-#define VOP_VERSION_RK3568 VOP_VERSION(0x40, 0x15)
25
-#define VOP_VERSION_RK3588 VOP_VERSION(0x40, 0x17)
32
+#define VOP2_VERSION(major, minor, build) ((major) << 24 | (minor) << 16 | (build))
33
+#define VOP2_MAJOR(version) (((version) >> 24) & 0xff)
34
+#define VOP2_MINOR(version) (((version) >> 16) & 0xff)
35
+#define VOP2_BUILD(version) ((version) & 0xffff)
36
+
37
+#define VOP_VERSION_RK3528 VOP2_VERSION(0x50, 0x17, 0x1263)
38
+#define VOP_VERSION_RK3562 VOP2_VERSION(0x50, 0x17, 0x4350)
39
+#define VOP_VERSION_RK3568 VOP2_VERSION(0x40, 0x15, 0x8023)
40
+#define VOP_VERSION_RK3588 VOP2_VERSION(0x40, 0x17, 0x6786)
2641
2742 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE BIT(0)
2843 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE BIT(1)
....@@ -66,6 +81,7 @@
6681 #define ROCKCHIP_OUT_MODE_P565 2
6782 #define ROCKCHIP_OUT_MODE_BT656 5
6883 #define ROCKCHIP_OUT_MODE_S888 8
84
+#define ROCKCHIP_OUT_MODE_YUV422 9
6985 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12
7086 #define ROCKCHIP_OUT_MODE_YUV420 14
7187 /* for use special outface */
....@@ -141,6 +157,7 @@
141157 void *private;
142158 ofnode node;
143159 struct device_node *ports_node; /* if (ports_node) it's vop2; */
160
+ struct clk dclk;
144161 int crtc_id;
145162
146163 int format;
....@@ -160,6 +177,7 @@
160177 bool post_y2r_en;
161178 bool bcsh_en;
162179 bool splice_mode;
180
+ bool soft_te;
163181 u8 splice_crtc_id;
164182 u8 dsc_id;
165183 u8 dsc_enable;
....@@ -198,6 +216,7 @@
198216 struct overscan overscan;
199217 u8 edid[EDID_SIZE * 4];
200218 int bus_format;
219
+ u32 bus_flags;
201220 int output_mode;
202221 int type;
203222 int output_if;
....@@ -223,6 +242,8 @@
223242 u64 dsc_cds_clk;
224243 struct rockchip_dsc_sink_cap dsc_sink_cap;
225244 struct drm_dsc_picture_parameter_set pps;
245
+
246
+ struct gpio_desc *te_gpio;
226247
227248 struct {
228249 u32 *lut;
....@@ -268,7 +289,9 @@
268289 int enable;
269290 int is_init;
270291 int is_enable;
292
+ bool is_klogo_valid;
271293 bool force_output;
294
+ bool enabled_at_spl;
272295 struct drm_display_mode force_mode;
273296 u32 force_bus_format;
274297 };
....@@ -282,11 +305,22 @@
282305 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
283306 struct vop_rect *max_output);
284307 unsigned long get_cubic_lut_buffer(int crtc_id);
285
-int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode);
308
+int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode,
309
+ u32 *bus_flags);
310
+void rockchip_display_make_crc32_table(void);
311
+uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length);
312
+void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags);
286313
287314 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst,
288315 int min_hscale, int max_hscale);
289316 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst,
290317 int min_vscale, int max_vscale);
318
+const struct device_node *
319
+rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint);
291320
321
+#ifdef CONFIG_SPL_BUILD
322
+int rockchip_spl_vop_probe(struct crtc_state *crtc_state);
323
+int rockchip_spl_dw_hdmi_probe(struct connector_state *conn_state);
324
+int inno_spl_hdmi_phy_probe(struct display_state *state);
325
+#endif
292326 #endif