add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 u-boot/drivers/video/drm/rockchip_crtc.c
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@@ -20,6 +20,7 @@
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 #include "rockchip_crtc.h"
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 #include "rockchip_connector.h"
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+#ifndef CONFIG_SPL_BUILD
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 static const struct udevice_id rockchip_vp_ids[] = {
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 	{ .compatible = "rockchip-vp" },
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 	{ }
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@@ -111,6 +112,16 @@
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 	.data = &rk3328_vop,
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 };
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+static const struct rockchip_crtc rk3528_vop_data = {
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+	.funcs = &rockchip_vop2_funcs,
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+	.data = &rk3528_vop,
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+};
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+
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+static const struct rockchip_crtc rk3562_vop_data = {
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+	.funcs = &rockchip_vop2_funcs,
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+	.data = &rk3562_vop,
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+};
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+
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 static const struct rockchip_crtc rk3568_vop_data = {
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 	.funcs = &rockchip_vop2_funcs,
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 	.data = &rk3568_vop,
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@@ -174,6 +185,12 @@
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 		.compatible = "rockchip,rk3328-vop",
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 		.data = (ulong)&rk3328_vop_data,
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 	}, {
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+		.compatible = "rockchip,rk3528-vop",
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+		.data = (ulong)&rk3528_vop_data,
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+	}, {
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+		.compatible = "rockchip,rk3562-vop",
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+		.data = (ulong)&rk3562_vop_data,
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+	}, {
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 		.compatible = "rockchip,rk3568-vop",
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 		.data = (ulong)&rk3568_vop_data,
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 	}, {
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@@ -186,6 +203,13 @@
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 {
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 	struct udevice *child;
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 	int ret;
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+
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+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
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+	ret = clk_set_defaults(dev);
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+	if (ret) {
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+		dev_err(dev, "%s clk_set_defaults failed %d\n", __func__, ret);
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+		return ret;
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+	}
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 	for (device_find_first_child(dev, &child);
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 	     child;
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@@ -237,3 +261,19 @@
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 	.id		= UCLASS_VIDEO_CRTC,
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 	.name		= "CRTC",
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 };
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+
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+#else
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+static struct rockchip_crtc rk3528_vop_data = {
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+	.funcs = &rockchip_vop2_funcs,
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+	.data = &rk3528_vop,
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+};
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+
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+int rockchip_spl_vop_probe(struct crtc_state *crtc_state)
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+{
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+
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+	crtc_state->crtc = &rk3528_vop_data;
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+
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+	return 0;
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+}
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+#endif
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+