add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 u-boot/drivers/video/drm/rockchip_connector.h
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@@ -7,6 +7,17 @@
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 #ifndef _ROCKCHIP_CONNECTOR_H_
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 #define _ROCKCHIP_CONNECTOR_H_
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+#ifdef CONFIG_SPL_BUILD
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+struct rockchip_connector {
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+	struct rockchip_phy *phy;
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+	int id;
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+	int type;
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+	bool hpd;
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+
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+	const struct rockchip_connector_funcs *funcs;
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+	void *data;
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+};
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+#else
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 #include "rockchip_bridge.h"
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 #include "rockchip_panel.h"
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..
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@@ -18,10 +29,123 @@
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 	struct list_head head;
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 	int id;
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 	int type;
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+	bool hpd;
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 	const struct rockchip_connector_funcs *funcs;
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 	void *data;
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 };
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+#endif
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+
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+/**
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+ * enum drm_bus_flags - bus_flags info for &drm_display_info
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+ *
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+ * This enum defines signal polarities and clock edge information for signals on
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+ * a bus as bitmask flags.
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+ *
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+ * The clock edge information is conveyed by two sets of symbols,
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+ * DRM_BUS_FLAGS_*_DRIVE_\* and DRM_BUS_FLAGS_*_SAMPLE_\*. When this enum is
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+ * used to describe a bus from the point of view of the transmitter, the
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+ * \*_DRIVE_\* flags should be used. When used from the point of view of the
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+ * receiver, the \*_SAMPLE_\* flags should be used. The \*_DRIVE_\* and
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+ * \*_SAMPLE_\* flags alias each other, with the \*_SAMPLE_POSEDGE and
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+ * \*_SAMPLE_NEGEDGE flags being equal to \*_DRIVE_NEGEDGE and \*_DRIVE_POSEDGE
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+ * respectively. This simplifies code as signals are usually sampled on the
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+ * opposite edge of the driving edge. Transmitters and receivers may however
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+ * need to take other signal timings into account to convert between driving
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+ * and sample edges.
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+ */
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+enum drm_bus_flags {
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+	/**
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+	 * @DRM_BUS_FLAG_DE_LOW:
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+	 *
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+	 * The Data Enable signal is active low
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+	 */
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+	DRM_BUS_FLAG_DE_LOW = BIT(0),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_DE_HIGH:
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+	 *
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+	 * The Data Enable signal is active high
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+	 */
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+	DRM_BUS_FLAG_DE_HIGH = BIT(1),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE:
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+	 *
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+	 * Data is driven on the rising edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE = BIT(2),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE:
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+	 *
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+	 * Data is driven on the falling edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE = BIT(3),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE:
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+	 *
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+	 * Data is sampled on the rising edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
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+
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+	/**
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+	 * @DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE:
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+	 *
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+	 * Data is sampled on the falling edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
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+
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+	/**
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+	 * @DRM_BUS_FLAG_DATA_MSB_TO_LSB:
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+	 *
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+	 * Data is transmitted MSB to LSB on the bus
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+	 */
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+	DRM_BUS_FLAG_DATA_MSB_TO_LSB = BIT(4),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_DATA_LSB_TO_MSB:
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+	 *
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+	 * Data is transmitted LSB to MSB on the bus
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+	 */
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+	DRM_BUS_FLAG_DATA_LSB_TO_MSB = BIT(5),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE:
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+	 *
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+	 * Sync signals are driven on the rising edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE = BIT(6),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE:
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+	 *
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+	 * Sync signals are driven on the falling edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE = BIT(7),
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+
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+	/**
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+	 * @DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE:
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+	 *
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+	 * Sync signals are sampled on the rising edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE = DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE,
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+
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+	/**
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+	 * @DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE:
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+	 *
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+	 * Sync signals are sampled on the falling edge of the pixel clock
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+	 */
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+	DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE = DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
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+
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+	/**
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+	 * @DRM_BUS_FLAG_SHARP_SIGNALS:
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+	 *
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+	 *  Set if the Sharp-specific signals (SPL, CLS, PS, REV) must be used
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+	 */
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+	DRM_BUS_FLAG_SHARP_SIGNALS = BIT(8),
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+};
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 struct rockchip_connector_funcs {
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 	/*