forked from ~ljy/RK356X_SDK_RELEASE

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hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 u-boot/drivers/video/drm/dw_hdmi_qp.c
....@@ -175,6 +175,9 @@
175175 	case MEDIA_BUS_FMT_UYVY8_1X16:
176176 	case MEDIA_BUS_FMT_UYVY10_1X20:
177177 	case MEDIA_BUS_FMT_UYVY12_1X24:
178
+	case MEDIA_BUS_FMT_YUYV8_1X16:
179
+	case MEDIA_BUS_FMT_YUYV10_1X20:
180
+	case MEDIA_BUS_FMT_YUYV12_1X24:
178181 		return true;
179182 
180183 	default:
....@@ -1047,6 +1050,9 @@
10471050 	/* HDMI Initialization Step B.2 */
10481051 	hdmi->phy.ops->set_pll(conn, hdmi->rk_hdmi, state);
10491052 
1053
+	/* Mark yuv422 10bit */
1054
+	if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_YUYV10_1X20)
1055
+		hdmi_writel(hdmi, BIT(20), VIDEO_INTERFACE_CONFIG0);
10501056 	rk3588_set_grf_cfg(hdmi->rk_hdmi);
10511057 	link_cfg = dw_hdmi_rockchip_get_link_cfg(hdmi->rk_hdmi);
10521058 
....@@ -1094,6 +1100,9 @@
10941100 		hdmi->phy.enabled = true;
10951101 		printf("%s DVI mode\n", __func__);
10961102 	}
1103
+
1104
+	/* Mark uboot hdmi is enabled */
1105
+	hdmi_writel(hdmi, BIT(21), VIDEO_INTERFACE_CONFIG0);
10971106 
10981107 	return 0;
10991108 }
....@@ -1239,9 +1248,23 @@
12391248 	return 0;
12401249 }
12411250 
1242
-int rockchip_dw_hdmi_qp_get_timing(struct rockchip_connector *conn, struct display_state *state)
1251
+static void rockchip_dw_hdmi_qp_mode_valid(struct dw_hdmi_qp *hdmi)
12431252 {
1244
-	int ret, i;
1253
+	struct hdmi_edid_data *edid_data = &hdmi->edid_data;
1254
+	int i;
1255
+
1256
+	for (i = 0; i < edid_data->modes; i++) {
1257
+		if (edid_data->mode_buf[i].invalid)
1258
+			continue;
1259
+		if (edid_data->mode_buf[i].clock <= 25000)
1260
+			edid_data->mode_buf[i].invalid = true;
1261
+	}
1262
+}
1263
+
1264
+static int _rockchip_dw_hdmi_qp_get_timing(struct rockchip_connector *conn,
1265
+					   struct display_state *state, int edid_status)
1266
+{
1267
+	int i;
12451268 	struct connector_state *conn_state = &state->conn_state;
12461269 	struct drm_display_mode *mode = &conn_state->mode;
12471270 	struct dw_hdmi_qp *hdmi = conn->data;
....@@ -1254,14 +1277,13 @@
12541277 	if (!hdmi)
12551278 		return -EFAULT;
12561279 
1257
-	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
1258
-	if (!ret) {
1280
+	if (!edid_status) {
12591281 		hdmi->sink_is_hdmi =
12601282 			drm_detect_hdmi_monitor(edid);
12611283 		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
1262
-		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
1284
+		edid_status = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
12631285 	}
1264
-	if (ret < 0) {
1286
+	if (edid_status < 0) {
12651287 		hdmi->sink_is_hdmi = true;
12661288 		hdmi->sink_has_audio = true;
12671289 		do_cea_modes(&hdmi->edid_data, def_modes_vic,
....@@ -1270,8 +1292,7 @@
12701292 		printf("failed to get edid\n");
12711293 	}
12721294 	drm_rk_filter_whitelist(&hdmi->edid_data);
1273
-	if (hdmi->phy.ops->mode_valid)
1274
-		hdmi->phy.ops->mode_valid(hdmi->rk_hdmi, state);
1295
+	rockchip_dw_hdmi_qp_mode_valid(hdmi);
12751296 	drm_mode_max_resolution_filter(&hdmi->edid_data,
12761297 				       &state->crtc_state.max_output);
12771298 	if (!drm_mode_prune_invalid(&hdmi->edid_data)) {
....@@ -1298,15 +1319,17 @@
12981319 	hdmi->hdmi_data.enc_out_bus_format = bus_format;
12991320 
13001321 	switch (bus_format) {
1301
-	case MEDIA_BUS_FMT_UYVY10_1X20:
1302
-		conn_state->bus_format = MEDIA_BUS_FMT_YUV10_1X30;
1322
+	case MEDIA_BUS_FMT_YUYV10_1X20:
1323
+		conn_state->bus_format = MEDIA_BUS_FMT_YUYV10_1X20;
13031324 		hdmi->hdmi_data.enc_in_bus_format =
1304
-			MEDIA_BUS_FMT_YUV10_1X30;
1325
+			MEDIA_BUS_FMT_YUYV10_1X20;
1326
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_YUV422;
13051327 		break;
1306
-	case MEDIA_BUS_FMT_UYVY8_1X16:
1307
-		conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
1328
+	case MEDIA_BUS_FMT_YUYV8_1X16:
1329
+		conn_state->bus_format = MEDIA_BUS_FMT_YUYV8_1X16;
13081330 		hdmi->hdmi_data.enc_in_bus_format =
1309
-			MEDIA_BUS_FMT_YUV8_1X24;
1331
+			MEDIA_BUS_FMT_YUYV8_1X16;
1332
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_YUV422;
13101333 		break;
13111334 	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
13121335 	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
....@@ -1334,6 +1357,21 @@
13341357 	return 0;
13351358 }
13361359 
1360
+int rockchip_dw_hdmi_qp_get_timing(struct rockchip_connector *conn, struct display_state *state)
1361
+{
1362
+	struct connector_state *conn_state = &state->conn_state;
1363
+	struct dw_hdmi_qp *hdmi = conn->data;
1364
+	int ret;
1365
+
1366
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
1367
+
1368
+	if (conn_state->secondary)
1369
+		_rockchip_dw_hdmi_qp_get_timing(conn_state->secondary, state, ret);
1370
+
1371
+	return _rockchip_dw_hdmi_qp_get_timing(conn, state, ret);
1372
+}
1373
+
1374
+
13371375 int rockchip_dw_hdmi_qp_detect(struct rockchip_connector *conn, struct display_state *state)
13381376 {
13391377 	int ret;