.. | .. |
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15 | 15 | u-boot,spl-boot-order = &sdmmc, &spi_nor, &spi_nand, &emmc; |
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16 | 16 | }; |
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17 | 17 | |
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18 | | - secure_otp: secure_otp@ff3fd8000 { |
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| 18 | + secure-otp@ff3fd8000 { |
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19 | 19 | compatible = "rockchip,rv1106-secure-otp"; |
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20 | 20 | reg = <0xff3d8000 0x4000>; |
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21 | 21 | secure_conf = <0xff07a018>; |
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.. | .. |
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112 | 112 | u-boot,dm-spl; |
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113 | 113 | }; |
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114 | 114 | |
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| 115 | +&gpio0 { |
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| 116 | + u-boot,dm-pre-reloc; |
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| 117 | + status = "okay"; |
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| 118 | +}; |
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| 119 | + |
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| 120 | +&gpio1 { |
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| 121 | + u-boot,dm-pre-reloc; |
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| 122 | + status = "okay"; |
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| 123 | +}; |
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| 124 | + |
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| 125 | +&gpio2 { |
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| 126 | + u-boot,dm-pre-reloc; |
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| 127 | + status = "okay"; |
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| 128 | +}; |
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| 129 | + |
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115 | 130 | &gpio3 { |
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116 | 131 | u-boot,dm-spl; |
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| 132 | + status = "okay"; |
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| 133 | +}; |
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| 134 | + |
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| 135 | +&gpio4 { |
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| 136 | + u-boot,dm-pre-reloc; |
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117 | 137 | status = "okay"; |
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118 | 138 | }; |
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119 | 139 | |
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.. | .. |
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159 | 179 | spi-max-frequency = <100000000>; |
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160 | 180 | }; |
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161 | 181 | }; |
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| 182 | + |
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| 183 | +&u2phy { |
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| 184 | + u-boot,dm-pre-reloc; |
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| 185 | + status = "okay"; |
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| 186 | +}; |
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| 187 | + |
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| 188 | +&u2phy_otg { |
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| 189 | + u-boot,dm-pre-reloc; |
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| 190 | + status = "okay"; |
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| 191 | +}; |
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| 192 | + |
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| 193 | +&usbdrd { |
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| 194 | + u-boot,dm-pre-reloc; |
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| 195 | + status = "okay"; |
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| 196 | +}; |
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| 197 | + |
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| 198 | +&usbdrd_dwc3 { |
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| 199 | + u-boot,dm-pre-reloc; |
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| 200 | + status = "okay"; |
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| 201 | +}; |
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