.. | .. |
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1 | 1 | [ |
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2 | 2 | { |
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3 | | - "EventCode": "0x00", |
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4 | 3 | "UMask": "0x1", |
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5 | 4 | "BriefDescription": "Instructions retired from execution.", |
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6 | 5 | "Counter": "Fixed counter 0", |
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.. | .. |
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11 | 10 | "CounterHTOff": "Fixed counter 0" |
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12 | 11 | }, |
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13 | 12 | { |
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14 | | - "EventCode": "0x00", |
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15 | 13 | "UMask": "0x2", |
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16 | 14 | "BriefDescription": "Core cycles when the thread is not in halt state.", |
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17 | 15 | "Counter": "Fixed counter 1", |
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.. | .. |
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21 | 19 | "CounterHTOff": "Fixed counter 1" |
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22 | 20 | }, |
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23 | 21 | { |
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24 | | - "EventCode": "0x00", |
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25 | 22 | "UMask": "0x2", |
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26 | 23 | "BriefDescription": "Core cycles when at least one thread on the physical core is not in halt state.", |
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27 | 24 | "Counter": "Fixed counter 1", |
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.. | .. |
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31 | 28 | "CounterHTOff": "Fixed counter 1" |
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32 | 29 | }, |
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33 | 30 | { |
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34 | | - "EventCode": "0x00", |
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35 | 31 | "UMask": "0x3", |
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36 | 32 | "BriefDescription": "Reference cycles when the core is not in halt state.", |
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37 | 33 | "Counter": "Fixed counter 2", |
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.. | .. |
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1098 | 1094 | "PEBS": "1", |
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1099 | 1095 | "Counter": "0,1,2,3", |
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1100 | 1096 | "EventName": "UOPS_RETIRED.ALL", |
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| 1097 | + "PublicDescription": "Counts the number of micro-ops retired. Use Cmask=1 and invert to count active cycles or stalled cycles.", |
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1101 | 1098 | "SampleAfterValue": "2000003", |
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1102 | 1099 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
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1103 | 1100 | }, |
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.. | .. |
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1142 | 1139 | "PEBS": "1", |
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1143 | 1140 | "Counter": "0,1,2,3", |
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1144 | 1141 | "EventName": "UOPS_RETIRED.RETIRE_SLOTS", |
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| 1142 | + "PublicDescription": "This event counts the number of retirement slots used each cycle. There are potentially 4 slots that can be used each cycle - meaning, 4 uops or 4 instructions could retire each cycle.", |
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1145 | 1143 | "SampleAfterValue": "2000003", |
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1146 | 1144 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
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1147 | 1145 | }, |
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.. | .. |
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1201 | 1199 | "PEBS": "1", |
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1202 | 1200 | "Counter": "0,1,2,3", |
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1203 | 1201 | "EventName": "BR_INST_RETIRED.CONDITIONAL", |
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| 1202 | + "PublicDescription": "Counts the number of conditional branch instructions retired.", |
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1204 | 1203 | "SampleAfterValue": "400009", |
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1205 | 1204 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
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1206 | 1205 | }, |
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.. | .. |
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1241 | 1240 | "PEBS": "1", |
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1242 | 1241 | "Counter": "0,1,2,3", |
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1243 | 1242 | "EventName": "BR_INST_RETIRED.NEAR_RETURN", |
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| 1243 | + "PublicDescription": "Counts the number of near return instructions retired.", |
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1244 | 1244 | "SampleAfterValue": "100003", |
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1245 | 1245 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
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1246 | 1246 | }, |
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.. | .. |
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1261 | 1261 | "PEBS": "1", |
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1262 | 1262 | "Counter": "0,1,2,3", |
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1263 | 1263 | "EventName": "BR_INST_RETIRED.NEAR_TAKEN", |
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| 1264 | + "PublicDescription": "Number of near taken branches retired.", |
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1264 | 1265 | "SampleAfterValue": "400009", |
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1265 | 1266 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
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1266 | 1267 | }, |
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.. | .. |
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1312 | 1313 | "PEBS": "1", |
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1313 | 1314 | "Counter": "0,1,2,3", |
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1314 | 1315 | "EventName": "BR_MISP_RETIRED.NEAR_TAKEN", |
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| 1316 | + "PublicDescription": "Number of near branch instructions retired that were taken but mispredicted.", |
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1315 | 1317 | "SampleAfterValue": "400009", |
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1316 | 1318 | "CounterHTOff": "0,1,2,3,4,5,6,7" |
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1317 | 1319 | }, |
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