.. | .. |
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45 | 45 | } |
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46 | 46 | |
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47 | 47 | /* Tasklet to handle resend: */ |
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48 | | -static DECLARE_TASKLET(resend_tasklet, resend_irqs, 0); |
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| 48 | +static DECLARE_TASKLET_OLD(resend_tasklet, resend_irqs); |
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49 | 49 | |
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| 50 | +static int irq_sw_resend(struct irq_desc *desc) |
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| 51 | +{ |
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| 52 | + unsigned int irq = irq_desc_get_irq(desc); |
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| 53 | + |
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| 54 | + /* |
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| 55 | + * Validate whether this interrupt can be safely injected from |
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| 56 | + * non interrupt context |
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| 57 | + */ |
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| 58 | + if (handle_enforce_irqctx(&desc->irq_data)) |
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| 59 | + return -EINVAL; |
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| 60 | + |
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| 61 | + /* |
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| 62 | + * If the interrupt is running in the thread context of the parent |
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| 63 | + * irq we need to be careful, because we cannot trigger it |
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| 64 | + * directly. |
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| 65 | + */ |
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| 66 | + if (irq_settings_is_nested_thread(desc)) { |
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| 67 | + /* |
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| 68 | + * If the parent_irq is valid, we retrigger the parent, |
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| 69 | + * otherwise we do nothing. |
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| 70 | + */ |
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| 71 | + if (!desc->parent_irq) |
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| 72 | + return -EINVAL; |
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| 73 | + irq = desc->parent_irq; |
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| 74 | + } |
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| 75 | + |
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| 76 | + /* Set it pending and activate the softirq: */ |
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| 77 | + set_bit(irq, irqs_resend); |
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| 78 | + tasklet_schedule(&resend_tasklet); |
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| 79 | + return 0; |
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| 80 | +} |
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| 81 | + |
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| 82 | +#else |
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| 83 | +static int irq_sw_resend(struct irq_desc *desc) |
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| 84 | +{ |
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| 85 | + return -EINVAL; |
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| 86 | +} |
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50 | 87 | #endif |
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| 88 | + |
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| 89 | +static int try_retrigger(struct irq_desc *desc) |
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| 90 | +{ |
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| 91 | + if (desc->irq_data.chip->irq_retrigger) |
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| 92 | + return desc->irq_data.chip->irq_retrigger(&desc->irq_data); |
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| 93 | + |
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| 94 | +#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
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| 95 | + return irq_chip_retrigger_hierarchy(&desc->irq_data); |
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| 96 | +#else |
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| 97 | + return 0; |
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| 98 | +#endif |
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| 99 | +} |
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51 | 100 | |
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52 | 101 | /* |
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53 | 102 | * IRQ resend |
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54 | 103 | * |
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55 | 104 | * Is called with interrupts disabled and desc->lock held. |
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56 | 105 | */ |
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57 | | -void check_irq_resend(struct irq_desc *desc) |
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| 106 | +int check_irq_resend(struct irq_desc *desc, bool inject) |
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58 | 107 | { |
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| 108 | + int err = 0; |
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| 109 | + |
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59 | 110 | /* |
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60 | | - * We do not resend level type interrupts. Level type |
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61 | | - * interrupts are resent by hardware when they are still |
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62 | | - * active. Clear the pending bit so suspend/resume does not |
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63 | | - * get confused. |
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| 111 | + * We do not resend level type interrupts. Level type interrupts |
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| 112 | + * are resent by hardware when they are still active. Clear the |
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| 113 | + * pending bit so suspend/resume does not get confused. |
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64 | 114 | */ |
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65 | 115 | if (irq_settings_is_level(desc)) { |
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66 | 116 | desc->istate &= ~IRQS_PENDING; |
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67 | | - return; |
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| 117 | + return -EINVAL; |
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68 | 118 | } |
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| 119 | + |
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69 | 120 | if (desc->istate & IRQS_REPLAY) |
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70 | | - return; |
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71 | | - if (desc->istate & IRQS_PENDING) { |
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72 | | - desc->istate &= ~IRQS_PENDING; |
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| 121 | + return -EBUSY; |
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| 122 | + |
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| 123 | + if (!(desc->istate & IRQS_PENDING) && !inject) |
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| 124 | + return 0; |
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| 125 | + |
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| 126 | + desc->istate &= ~IRQS_PENDING; |
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| 127 | + |
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| 128 | + if (!try_retrigger(desc)) |
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| 129 | + err = irq_sw_resend(desc); |
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| 130 | + |
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| 131 | + /* If the retrigger was successfull, mark it with the REPLAY bit */ |
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| 132 | + if (!err) |
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73 | 133 | desc->istate |= IRQS_REPLAY; |
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74 | | - |
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75 | | - if (!desc->irq_data.chip->irq_retrigger || |
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76 | | - !desc->irq_data.chip->irq_retrigger(&desc->irq_data)) { |
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77 | | -#ifdef CONFIG_HARDIRQS_SW_RESEND |
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78 | | - unsigned int irq = irq_desc_get_irq(desc); |
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79 | | - |
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80 | | - /* |
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81 | | - * If the interrupt is running in the thread |
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82 | | - * context of the parent irq we need to be |
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83 | | - * careful, because we cannot trigger it |
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84 | | - * directly. |
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85 | | - */ |
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86 | | - if (irq_settings_is_nested_thread(desc)) { |
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87 | | - /* |
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88 | | - * If the parent_irq is valid, we |
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89 | | - * retrigger the parent, otherwise we |
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90 | | - * do nothing. |
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91 | | - */ |
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92 | | - if (!desc->parent_irq) |
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93 | | - return; |
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94 | | - irq = desc->parent_irq; |
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95 | | - } |
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96 | | - /* Set it pending and activate the softirq: */ |
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97 | | - set_bit(irq, irqs_resend); |
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98 | | - tasklet_schedule(&resend_tasklet); |
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99 | | -#endif |
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100 | | - } |
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101 | | - } |
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| 134 | + return err; |
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102 | 135 | } |
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| 136 | + |
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| 137 | +#ifdef CONFIG_GENERIC_IRQ_INJECTION |
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| 138 | +/** |
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| 139 | + * irq_inject_interrupt - Inject an interrupt for testing/error injection |
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| 140 | + * @irq: The interrupt number |
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| 141 | + * |
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| 142 | + * This function must only be used for debug and testing purposes! |
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| 143 | + * |
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| 144 | + * Especially on x86 this can cause a premature completion of an interrupt |
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| 145 | + * affinity change causing the interrupt line to become stale. Very |
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| 146 | + * unlikely, but possible. |
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| 147 | + * |
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| 148 | + * The injection can fail for various reasons: |
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| 149 | + * - Interrupt is not activated |
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| 150 | + * - Interrupt is NMI type or currently replaying |
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| 151 | + * - Interrupt is level type |
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| 152 | + * - Interrupt does not support hardware retrigger and software resend is |
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| 153 | + * either not enabled or not possible for the interrupt. |
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| 154 | + */ |
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| 155 | +int irq_inject_interrupt(unsigned int irq) |
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| 156 | +{ |
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| 157 | + struct irq_desc *desc; |
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| 158 | + unsigned long flags; |
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| 159 | + int err; |
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| 160 | + |
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| 161 | + /* Try the state injection hardware interface first */ |
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| 162 | + if (!irq_set_irqchip_state(irq, IRQCHIP_STATE_PENDING, true)) |
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| 163 | + return 0; |
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| 164 | + |
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| 165 | + /* That failed, try via the resend mechanism */ |
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| 166 | + desc = irq_get_desc_buslock(irq, &flags, 0); |
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| 167 | + if (!desc) |
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| 168 | + return -EINVAL; |
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| 169 | + |
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| 170 | + /* |
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| 171 | + * Only try to inject when the interrupt is: |
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| 172 | + * - not NMI type |
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| 173 | + * - activated |
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| 174 | + */ |
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| 175 | + if ((desc->istate & IRQS_NMI) || !irqd_is_activated(&desc->irq_data)) |
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| 176 | + err = -EINVAL; |
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| 177 | + else |
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| 178 | + err = check_irq_resend(desc, true); |
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| 179 | + |
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| 180 | + irq_put_desc_busunlock(desc, flags); |
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| 181 | + return err; |
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| 182 | +} |
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| 183 | +EXPORT_SYMBOL_GPL(irq_inject_interrupt); |
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| 184 | +#endif |
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