hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/kernel/irq/ipi.c
....@@ -56,7 +56,7 @@
5656 unsigned int next;
5757
5858 /*
59
- * The IPI requires a seperate HW irq on each CPU. We require
59
+ * The IPI requires a separate HW irq on each CPU. We require
6060 * that the destination mask is consecutive. If an
6161 * implementation needs to support holes, it can reserve
6262 * several IPI ranges.
....@@ -172,7 +172,7 @@
172172
173173 /*
174174 * Get the real hardware irq number if the underlying implementation
175
- * uses a seperate irq per cpu. If the underlying implementation uses
175
+ * uses a separate irq per cpu. If the underlying implementation uses
176176 * a single hardware irq for all cpus then the IPI send mechanism
177177 * needs to take care of the cpu destinations.
178178 */