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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * VIA Chipset Watchdog Driver |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2011 Sigfox |
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5 | | - * License terms: GNU General Public License (GPL) version 2 |
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6 | 6 | * Author: Marc Vertes <marc.vertes@sigfox.com> |
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7 | 7 | * Based on a preliminary version from Harald Welte <HaraldWelte@viatech.com> |
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8 | 8 | * Timer code by Wim Van Sebroeck <wim@iguana.be> |
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.. | .. |
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30 | 30 | #define VIA_WDT_CONF_MMIO 0x02 /* 1: enable watchdog MMIO */ |
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31 | 31 | |
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32 | 32 | /* |
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33 | | - * The MMIO region contains the watchog control register and the |
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| 33 | + * The MMIO region contains the watchdog control register and the |
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34 | 34 | * hardware timer counter. |
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35 | 35 | */ |
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36 | 36 | #define VIA_WDT_MMIO_LEN 8 /* MMIO region length in bytes */ |
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.. | .. |
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82 | 82 | /* |
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83 | 83 | * Timer tick: the timer will make sure that the watchdog timer hardware |
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84 | 84 | * is being reset in time. The conditions to do this are: |
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85 | | - * 1) the watchog timer has been started and /dev/watchdog is open |
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| 85 | + * 1) the watchdog timer has been started and /dev/watchdog is open |
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86 | 86 | * and there is still time left before userspace should send the |
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87 | 87 | * next heartbeat/ping. (note: the internal heartbeat is much smaller |
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88 | 88 | * then the external/userspace heartbeat). |
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