hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/usb/dwc3/Kconfig
....@@ -4,6 +4,7 @@
44 tristate "DesignWare USB3 DRD Core Support"
55 depends on (USB || USB_GADGET) && HAS_DMA
66 select USB_XHCI_PLATFORM if USB_XHCI_HCD
7
+ select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
78 help
89 Say Y or M here if your system has a Dual Role SuperSpeed
910 USB controller based on the DesignWare USB3 IP Core.
....@@ -89,31 +90,32 @@
8990 platform, please say 'Y' or 'M' here.
9091
9192 config USB_DWC3_KEYSTONE
92
- tristate "Texas Instruments Keystone2 Platforms"
93
- depends on ARCH_KEYSTONE || COMPILE_TEST
93
+ tristate "Texas Instruments Keystone2/AM654 Platforms"
94
+ depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
9495 default USB_DWC3
9596 help
96
- Support of USB2/3 functionality in TI Keystone2 platforms.
97
+ Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
9798 Say 'Y' or 'M' here if you have one such device
9899
99
-config USB_DWC3_OF_SIMPLE
100
- tristate "Generic OF Simple Glue Layer"
101
- depends on OF && COMMON_CLK
102
- default USB_DWC3
103
- help
104
- Support USB2/3 functionality in simple SoC integrations.
105
- Currently supports Xilinx and Qualcomm DWC USB3 IP.
106
- Say 'Y' or 'M' if you have one such device.
100
+config USB_DWC3_MESON_G12A
101
+ tristate "Amlogic Meson G12A Platforms"
102
+ depends on OF && COMMON_CLK
103
+ depends on ARCH_MESON || COMPILE_TEST
104
+ default USB_DWC3
105
+ select USB_ROLE_SWITCH
106
+ select REGMAP_MMIO
107
+ help
108
+ Support USB2/3 functionality in Amlogic G12A platforms.
109
+ Say 'Y' or 'M' if you have one such device.
107110
108
-config USB_DWC3_ROCKCHIP_INNO
109
- tristate "Rockchip Platforms with INNO PHY"
110
- depends on OF && COMMON_CLK && (ARCH_ROCKCHIP || COMPILE_TEST)
111
- depends on USB=y || USB=USB_DWC3
111
+config USB_DWC3_OF_SIMPLE
112
+ tristate "Generic OF Simple Glue Layer"
113
+ depends on OF && COMMON_CLK
112114 default USB_DWC3
113115 help
114
- Support of USB2/3 functionality in Rockchip platforms
115
- with INNO USB 3.0 PHY IP inside.
116
- say 'Y' or 'M' if you have one such device.
116
+ Support USB2/3 functionality in simple SoC integrations.
117
+ Currently supports Xilinx and Qualcomm DWC USB3 IP.
118
+ Say 'Y' or 'M' if you have one such device.
117119
118120 config USB_DWC3_ST
119121 tristate "STMicroelectronics Platforms"
....@@ -128,7 +130,7 @@
128130 tristate "Qualcomm Platform"
129131 depends on ARCH_QCOM || COMPILE_TEST
130132 depends on EXTCON || !EXTCON
131
- depends on OF
133
+ depends on (OF || ACPI)
132134 default USB_DWC3
133135 help
134136 Some Qualcomm SoCs use DesignWare Core IP for USB2/3
....@@ -137,4 +139,14 @@
137139 for peripheral mode support.
138140 Say 'Y' or 'M' if you have one such device.
139141
142
+config USB_DWC3_IMX8MP
143
+ tristate "NXP iMX8MP Platform"
144
+ depends on OF && COMMON_CLK
145
+ depends on (ARCH_MXC && ARM64) || COMPILE_TEST
146
+ default USB_DWC3
147
+ help
148
+ NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
149
+ functionality.
150
+ Say 'Y' or 'M' if you have one such device.
151
+
140152 endif