forked from ~ljy/RK356X_SDK_RELEASE

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hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/usb/dwc2/platform.c
....@@ -121,6 +121,13 @@
121121 	return 0;
122122 }
123123 
124
+static void __dwc2_disable_regulators(void *data)
125
+{
126
+	struct dwc2_hsotg *hsotg = data;
127
+
128
+	regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
129
+}
130
+
124131 static int __dwc2_lowlevel_phy_enable(struct dwc2_hsotg *hsotg)
125132 {
126133 	struct platform_device *pdev = to_platform_device(hsotg->dev);
....@@ -131,9 +138,9 @@
131138 	} else if (hsotg->plat && hsotg->plat->phy_init) {
132139 		ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
133140 	} else {
134
-		ret = phy_power_on(hsotg->phy);
141
+		ret = phy_init(hsotg->phy);
135142 		if (ret == 0)
136
-			ret = phy_init(hsotg->phy);
143
+			ret = phy_power_on(hsotg->phy);
137144 	}
138145 
139146 	return ret;
....@@ -165,9 +172,9 @@
165172 	} else if (hsotg->plat && hsotg->plat->phy_exit) {
166173 		ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
167174 	} else {
168
-		ret = phy_exit(hsotg->phy);
175
+		ret = phy_power_off(hsotg->phy);
169176 		if (ret == 0)
170
-			ret = phy_power_off(hsotg->phy);
177
+			ret = phy_exit(hsotg->phy);
171178 	}
172179 
173180 	return ret;
....@@ -191,21 +198,22 @@
191198 
192199 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
193200 {
194
-	int clk, ret;
201
+	struct platform_device *pdev = to_platform_device(hsotg->dev);
202
+	int ret;
195203 
196204 	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
197205 				    hsotg->supplies);
198206 	if (ret)
199207 		return ret;
200208 
201
-	for (clk = 0; clk < DWC2_MAX_CLKS && hsotg->clks[clk]; clk++) {
202
-		ret = clk_prepare_enable(hsotg->clks[clk]);
203
-		if (ret) {
204
-			while (--clk >= 0)
205
-				clk_disable_unprepare(hsotg->clks[clk]);
206
-			return ret;
207
-		}
208
-	}
209
+	ret = devm_add_action_or_reset(&pdev->dev,
210
+				       __dwc2_disable_regulators, hsotg);
211
+	if (ret)
212
+		return ret;
213
+
214
+	ret = clk_bulk_prepare_enable(hsotg->num_clks, hsotg->clks);
215
+	if (ret)
216
+		return ret;
209217 
210218 	if (!hsotg->ll_phy_enabled)
211219 		ret = dwc2_lowlevel_phy_enable(hsotg);
....@@ -231,7 +239,7 @@
231239 
232240 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
233241 {
234
-	int clk, ret = 0;
242
+	int ret = 0;
235243 
236244 	if (hsotg->ll_phy_enabled)
237245 		ret = dwc2_lowlevel_phy_disable(hsotg);
....@@ -239,14 +247,9 @@
239247 	if (ret)
240248 		return ret;
241249 
242
-	for (clk = DWC2_MAX_CLKS - 1; clk >= 0; clk--)
243
-		if (hsotg->clks[clk])
244
-			clk_disable_unprepare(hsotg->clks[clk]);
250
+	clk_bulk_disable_unprepare(hsotg->num_clks, hsotg->clks);
245251 
246
-	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
247
-				     hsotg->supplies);
248
-
249
-	return ret;
252
+	return 0;
250253 }
251254 
252255 /**
....@@ -265,17 +268,9 @@
265268 	return ret;
266269 }
267270 
268
-/* Only used to reset usb phy at interrupter runtime */
269
-static void dwc2_reset_phy_work(struct work_struct *data)
270
-{
271
-	struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg,
272
-			phy_rst_work);
273
-	phy_reset(hsotg->phy);
274
-}
275
-
276271 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
277272 {
278
-	int i, clk, ret;
273
+	int i, ret;
279274 
280275 	hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
281276 	if (IS_ERR(hsotg->reset)) {
....@@ -294,9 +289,6 @@
294289 	}
295290 
296291 	reset_control_deassert(hsotg->reset_ecc);
297
-
298
-	/* Set default UTMI width */
299
-	hsotg->phyif = GUSBCFG_PHYIF16;
300292 
301293 	/*
302294 	 * Attempt to find a generic PHY, then look for an old style
....@@ -317,7 +309,6 @@
317309 			return ret;
318310 		}
319311 	}
320
-	INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work);
321312 
322313 	if (!hsotg->phy) {
323314 		hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
....@@ -340,28 +331,19 @@
340331 
341332 	hsotg->plat = dev_get_platdata(hsotg->dev);
342333 
343
-	if (hsotg->phy) {
334
+	/* Clock */
335
+	if (hsotg->dev->of_node) {
336
+		ret = devm_clk_bulk_get_all(hsotg->dev, &hsotg->clks);
337
+		if (ret == -EPROBE_DEFER)
338
+			return ret;
344339 		/*
345
-		 * If using the generic PHY framework, check if the PHY bus
346
-		 * width is 8-bit and set the phyif appropriately.
340
+		 * Clocks are optional, but new DT platforms should support all
341
+		 * clocks as required by the DT-binding.
347342 		 */
348
-		if (phy_get_bus_width(hsotg->phy) == 8)
349
-			hsotg->phyif = GUSBCFG_PHYIF8;
350
-	}
351
-
352
-	for (clk = 0; clk < DWC2_MAX_CLKS; clk++) {
353
-		hsotg->clks[clk] = of_clk_get(hsotg->dev->of_node, clk);
354
-		if (IS_ERR(hsotg->clks[clk])) {
355
-			ret = PTR_ERR(hsotg->clks[clk]);
356
-			if (ret == -EPROBE_DEFER) {
357
-				while (--clk >= 0)
358
-					clk_put(hsotg->clks[clk]);
359
-				return ret;
360
-			}
361
-
362
-			hsotg->clks[clk] = NULL;
363
-			break;
364
-		}
343
+		if (ret < 0)
344
+			hsotg->num_clks = 0;
345
+		else
346
+			hsotg->num_clks = ret;
365347 	}
366348 
367349 	/* Regulators */
....@@ -371,7 +353,9 @@
371353 	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
372354 				      hsotg->supplies);
373355 	if (ret) {
374
-		dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
356
+		if (ret != -EPROBE_DEFER)
357
+			dev_err(hsotg->dev, "failed to request supplies: %d\n",
358
+				ret);
375359 		return ret;
376360 	}
377361 	return 0;
....@@ -397,6 +381,11 @@
397381 		dwc2_hcd_remove(hsotg);
398382 	if (hsotg->gadget_enabled)
399383 		dwc2_hsotg_remove(hsotg);
384
+
385
+	dwc2_drd_exit(hsotg);
386
+
387
+	if (hsotg->params.activate_stm_id_vb_detection)
388
+		regulator_disable(hsotg->usb33d);
400389 
401390 	pm_runtime_put_sync(hsotg->dev);
402391 	pm_runtime_disable(hsotg->dev);
....@@ -448,6 +437,37 @@
448437 }
449438 
450439 /**
440
+ * Check core version
441
+ *
442
+ * @hsotg: Programming view of the DWC_otg controller
443
+ *
444
+ */
445
+int dwc2_check_core_version(struct dwc2_hsotg *hsotg)
446
+{
447
+	struct dwc2_hw_params *hw = &hsotg->hw_params;
448
+
449
+	/*
450
+	 * Attempt to ensure this device is really a DWC_otg Controller.
451
+	 * Read and verify the GSNPSID register contents. The value should be
452
+	 * 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx
453
+	 */
454
+
455
+	hw->snpsid = dwc2_readl(hsotg, GSNPSID);
456
+	if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID &&
457
+	    (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID &&
458
+	    (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) {
459
+		dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n",
460
+			hw->snpsid);
461
+		return -ENODEV;
462
+	}
463
+
464
+	dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n",
465
+		hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
466
+		hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
467
+	return 0;
468
+}
469
+
470
+/**
451471  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
452472  * driver
453473  *
....@@ -482,8 +502,7 @@
482502 		return retval;
483503 	}
484504 
485
-	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
486
-	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
505
+	hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res);
487506 	if (IS_ERR(hsotg->regs))
488507 		return PTR_ERR(hsotg->regs);
489508 
....@@ -497,10 +516,8 @@
497516 	spin_lock_init(&hsotg->lock);
498517 
499518 	hsotg->irq = platform_get_irq(dev, 0);
500
-	if (hsotg->irq < 0) {
501
-		dev_err(&dev->dev, "missing IRQ resource\n");
519
+	if (hsotg->irq < 0)
502520 		return hsotg->irq;
503
-	}
504521 
505522 	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
506523 		hsotg->irq);
....@@ -509,6 +526,14 @@
509526 				  dev_name(hsotg->dev), hsotg);
510527 	if (retval)
511528 		return retval;
529
+
530
+	hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
531
+	if (IS_ERR(hsotg->vbus_supply)) {
532
+		retval = PTR_ERR(hsotg->vbus_supply);
533
+		hsotg->vbus_supply = NULL;
534
+		if (retval != -ENODEV)
535
+			return retval;
536
+	}
512537 
513538 	retval = dwc2_lowlevel_hw_enable(hsotg);
514539 	if (retval)
....@@ -522,6 +547,18 @@
522547 		goto error;
523548 
524549 	retval = dwc2_get_dr_mode(hsotg);
550
+	if (retval)
551
+		goto error;
552
+
553
+	hsotg->need_phy_for_wake =
554
+		of_property_read_bool(dev->dev.of_node,
555
+				      "snps,need-phy-for-wake");
556
+
557
+	/*
558
+	 * Before performing any core related operations
559
+	 * check core version.
560
+	 */
561
+	retval = dwc2_check_core_version(hsotg);
525562 	if (retval)
526563 		goto error;
527564 
....@@ -549,11 +586,63 @@
549586 	if (retval)
550587 		goto error;
551588 
589
+	if (hsotg->params.activate_stm_id_vb_detection) {
590
+		u32 ggpio;
591
+
592
+		hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d");
593
+		if (IS_ERR(hsotg->usb33d)) {
594
+			retval = PTR_ERR(hsotg->usb33d);
595
+			if (retval != -EPROBE_DEFER)
596
+				dev_err(hsotg->dev,
597
+					"failed to request usb33d supply: %d\n",
598
+					retval);
599
+			goto error;
600
+		}
601
+		retval = regulator_enable(hsotg->usb33d);
602
+		if (retval) {
603
+			dev_err(hsotg->dev,
604
+				"failed to enable usb33d supply: %d\n", retval);
605
+			goto error;
606
+		}
607
+
608
+		ggpio = dwc2_readl(hsotg, GGPIO);
609
+		ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
610
+		ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
611
+		dwc2_writel(hsotg, ggpio, GGPIO);
612
+
613
+		/* ID/VBUS detection startup time */
614
+		usleep_range(5000, 7000);
615
+	}
616
+
617
+	retval = dwc2_drd_init(hsotg);
618
+	if (retval) {
619
+		if (retval != -EPROBE_DEFER)
620
+			dev_err(hsotg->dev, "failed to initialize dual-role\n");
621
+		goto error_init;
622
+	}
623
+
552624 	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
553625 		retval = dwc2_gadget_init(hsotg);
554626 		if (retval)
555
-			goto error;
627
+			goto error_drd;
556628 		hsotg->gadget_enabled = 1;
629
+	}
630
+
631
+	/*
632
+	 * If we need PHY for wakeup we must be wakeup capable.
633
+	 * When we have a device that can wake without the PHY we
634
+	 * can adjust this condition.
635
+	 */
636
+	if (hsotg->need_phy_for_wake)
637
+		device_set_wakeup_capable(&dev->dev, true);
638
+
639
+	hsotg->reset_phy_on_wake =
640
+		of_property_read_bool(dev->dev.of_node,
641
+				      "snps,reset-phy-on-wake");
642
+	if (hsotg->reset_phy_on_wake && !hsotg->phy) {
643
+		dev_warn(hsotg->dev,
644
+			 "Quirk reset-phy-on-wake only supports generic PHYs\n");
645
+		hsotg->reset_phy_on_wake = false;
557646 	}
558647 
559648 	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
....@@ -561,7 +650,7 @@
561650 		if (retval) {
562651 			if (hsotg->gadget_enabled)
563652 				dwc2_hsotg_remove(hsotg);
564
-			goto error;
653
+			goto error_drd;
565654 		}
566655 		hsotg->hcd_enabled = 1;
567656 	}
....@@ -588,12 +677,25 @@
588677 		if (retval) {
589678 			hsotg->gadget.udc = NULL;
590679 			dwc2_hsotg_remove(hsotg);
591
-			goto error;
680
+			goto error_debugfs;
592681 		}
593682 	}
594683 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
595684 	return 0;
596685 
686
+#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
687
+	IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
688
+error_debugfs:
689
+	dwc2_debugfs_exit(hsotg);
690
+	if (hsotg->hcd_enabled)
691
+		dwc2_hcd_remove(hsotg);
692
+#endif
693
+error_drd:
694
+	dwc2_drd_exit(hsotg);
695
+
696
+error_init:
697
+	if (hsotg->params.activate_stm_id_vb_detection)
698
+		regulator_disable(hsotg->usb33d);
597699 error:
598700 	pm_runtime_put_sync(hsotg->dev);
599701 	pm_runtime_disable(hsotg->dev);
....@@ -605,13 +707,50 @@
605707 static int __maybe_unused dwc2_suspend(struct device *dev)
606708 {
607709 	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
710
+	bool is_device_mode = dwc2_is_device_mode(dwc2);
608711 	int ret = 0;
609712 
610
-	if (dwc2_is_device_mode(dwc2))
713
+	if (is_device_mode)
611714 		dwc2_hsotg_suspend(dwc2);
612715 
613
-	if (dwc2->ll_hw_enabled)
716
+	dwc2_drd_suspend(dwc2);
717
+
718
+	if (dwc2->params.activate_stm_id_vb_detection) {
719
+		unsigned long flags;
720
+		u32 ggpio, gotgctl;
721
+
722
+		/*
723
+		 * Need to force the mode to the current mode to avoid Mode
724
+		 * Mismatch Interrupt when ID detection will be disabled.
725
+		 */
726
+		dwc2_force_mode(dwc2, !is_device_mode);
727
+
728
+		spin_lock_irqsave(&dwc2->lock, flags);
729
+		gotgctl = dwc2_readl(dwc2, GOTGCTL);
730
+		/* bypass debounce filter, enable overrides */
731
+		gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
732
+		gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN;
733
+		/* Force A / B session if needed */
734
+		if (gotgctl & GOTGCTL_ASESVLD)
735
+			gotgctl |= GOTGCTL_AVALOVAL;
736
+		if (gotgctl & GOTGCTL_BSESVLD)
737
+			gotgctl |= GOTGCTL_BVALOVAL;
738
+		dwc2_writel(dwc2, gotgctl, GOTGCTL);
739
+		spin_unlock_irqrestore(&dwc2->lock, flags);
740
+
741
+		ggpio = dwc2_readl(dwc2, GGPIO);
742
+		ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN;
743
+		ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN;
744
+		dwc2_writel(dwc2, ggpio, GGPIO);
745
+
746
+		regulator_disable(dwc2->usb33d);
747
+	}
748
+
749
+	if (dwc2->ll_hw_enabled &&
750
+	    (is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) {
614751 		ret = __dwc2_lowlevel_hw_disable(dwc2);
752
+		dwc2->phy_off_for_suspend = true;
753
+	}
615754 
616755 	return ret;
617756 }
....@@ -622,11 +761,42 @@
622761 	unsigned long flags;
623762 	int ret = 0;
624763 
625
-	if (dwc2->ll_hw_enabled) {
764
+	if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
626765 		ret = __dwc2_lowlevel_hw_enable(dwc2);
627766 		if (ret)
628767 			return ret;
629768 	}
769
+	dwc2->phy_off_for_suspend = false;
770
+
771
+	if (dwc2->params.activate_stm_id_vb_detection) {
772
+		unsigned long flags;
773
+		u32 ggpio, gotgctl;
774
+
775
+		ret = regulator_enable(dwc2->usb33d);
776
+		if (ret)
777
+			return ret;
778
+
779
+		ggpio = dwc2_readl(dwc2, GGPIO);
780
+		ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
781
+		ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
782
+		dwc2_writel(dwc2, ggpio, GGPIO);
783
+
784
+		/* ID/VBUS detection startup time */
785
+		usleep_range(5000, 7000);
786
+
787
+		spin_lock_irqsave(&dwc2->lock, flags);
788
+		gotgctl = dwc2_readl(dwc2, GOTGCTL);
789
+		gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS;
790
+		gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN |
791
+			     GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL);
792
+		dwc2_writel(dwc2, gotgctl, GOTGCTL);
793
+		spin_unlock_irqrestore(&dwc2->lock, flags);
794
+	}
795
+
796
+	/* Need to restore FORCEDEVMODE/FORCEHOSTMODE */
797
+	dwc2_force_dr_mode(dwc2);
798
+
799
+	dwc2_drd_resume(dwc2);
630800 
631801 	if (dwc2->dr_mode == USB_DR_MODE_HOST && dwc2_is_device_mode(dwc2)) {
632802 		/* Reinit for Host mode if lost power */