add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/spi/spi-ep93xx.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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2
 /*
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  * Driver for Cirrus Logic EP93xx SPI controller.
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  *
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@@ -9,11 +10,7 @@
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  *
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  * For more information about the SPI controller see documentation on Cirrus
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  * Logic web site:
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- *     http://www.cirrus.com/en/pubs/manual/EP93xx_Users_Guide_UM1.pdf
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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+ *     https://www.cirrus.com/en/pubs/manual/EP93xx_Users_Guide_UM1.pdf
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  */
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15
 
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 #include <linux/io.h>
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@@ -28,14 +25,14 @@
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 #include <linux/platform_device.h>
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 #include <linux/sched.h>
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 #include <linux/scatterlist.h>
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-#include <linux/gpio.h>
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 #include <linux/spi/spi.h>
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29
 
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 #include <linux/platform_data/dma-ep93xx.h>
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 #include <linux/platform_data/spi-ep93xx.h>
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32
 
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 #define SSPCR0			0x0000
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-#define SSPCR0_MODE_SHIFT	6
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+#define SSPCR0_SPO		BIT(6)
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+#define SSPCR0_SPH		BIT(7)
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 #define SSPCR0_SCR_SHIFT	8
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37
 
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 #define SSPCR1			0x0004
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@@ -163,7 +160,10 @@
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 		return err;
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161
 
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 	cr0 = div_scr << SSPCR0_SCR_SHIFT;
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-	cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT;
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+	if (spi->mode & SPI_CPOL)
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+		cr0 |= SSPCR0_SPO;
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+	if (spi->mode & SPI_CPHA)
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+		cr0 |= SSPCR0_SPH;
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 	cr0 |= dss;
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 	dev_dbg(&master->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
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@@ -214,7 +214,7 @@
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214
 
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 /**
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  * ep93xx_spi_read_write() - perform next RX/TX transfer
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- * @espi: ep93xx SPI controller struct
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+ * @master: SPI master
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  *
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  * This function transfers next bytes (or half-words) to/from RX/TX FIFOs. If
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  * called several times, the whole transfer will be completed. Returns
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@@ -652,7 +652,6 @@
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 	struct resource *res;
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 	int irq;
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 	int error;
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-	int i;
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655
 
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 	info = dev_get_platdata(&pdev->dev);
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 	if (!info) {
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@@ -661,10 +660,8 @@
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 	}
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661
 
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 	irq = platform_get_irq(pdev, 0);
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-	if (irq < 0) {
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-		dev_err(&pdev->dev, "failed to get irq resources\n");
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+	if (irq < 0)
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 		return -EBUSY;
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-	}
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665
 
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 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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 	if (!res) {
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@@ -676,6 +673,7 @@
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 	if (!master)
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 		return -ENOMEM;
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675
 
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+	master->use_gpio_descriptors = true;
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 	master->prepare_transfer_hardware = ep93xx_spi_prepare_hardware;
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 	master->unprepare_transfer_hardware = ep93xx_spi_unprepare_hardware;
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 	master->prepare_message = ep93xx_spi_prepare_message;
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@@ -683,31 +681,11 @@
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 	master->bus_num = pdev->id;
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 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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 	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
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-
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-	master->num_chipselect = info->num_chipselect;
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-	master->cs_gpios = devm_kcalloc(&master->dev,
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-					master->num_chipselect, sizeof(int),
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-					GFP_KERNEL);
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-	if (!master->cs_gpios) {
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-		error = -ENOMEM;
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-		goto fail_release_master;
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-	}
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-
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-	for (i = 0; i < master->num_chipselect; i++) {
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-		master->cs_gpios[i] = info->chipselect[i];
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-
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-		if (!gpio_is_valid(master->cs_gpios[i]))
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-			continue;
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-
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-		error = devm_gpio_request_one(&pdev->dev, master->cs_gpios[i],
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-					      GPIOF_OUT_INIT_HIGH,
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-					      "ep93xx-spi");
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-		if (error) {
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-			dev_err(&pdev->dev, "could not request cs gpio %d\n",
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-				master->cs_gpios[i]);
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-			goto fail_release_master;
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-		}
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-	}
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+	/*
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+	 * The SPI core will count the number of GPIO descriptors to figure
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+	 * out the number of chip selects available on the platform.
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+	 */
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+	master->num_chipselect = 0;
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689
 
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 	platform_set_drvdata(pdev, master);
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