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1 | | -// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
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2 | | -// Copyright(c) 2015-17 Intel Corporation. |
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| 1 | +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ |
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| 2 | +/* Copyright(c) 2015-17 Intel Corporation. */ |
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3 | 3 | |
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4 | 4 | #ifndef __SDW_BUS_H |
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5 | 5 | #define __SDW_BUS_H |
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| 6 | + |
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| 7 | +#define DEFAULT_BANK_SWITCH_TIMEOUT 3000 |
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| 8 | +#define DEFAULT_PROBE_TIMEOUT 2000 |
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6 | 9 | |
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7 | 10 | #if IS_ENABLED(CONFIG_ACPI) |
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8 | 11 | int sdw_acpi_find_slaves(struct sdw_bus *bus); |
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.. | .. |
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13 | 16 | } |
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14 | 17 | #endif |
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15 | 18 | |
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| 19 | +int sdw_of_find_slaves(struct sdw_bus *bus); |
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16 | 20 | void sdw_extract_slave_id(struct sdw_bus *bus, |
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17 | | - u64 addr, struct sdw_slave_id *id); |
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| 21 | + u64 addr, struct sdw_slave_id *id); |
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| 22 | +int sdw_slave_add(struct sdw_bus *bus, struct sdw_slave_id *id, |
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| 23 | + struct fwnode_handle *fwnode); |
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| 24 | +int sdw_master_device_add(struct sdw_bus *bus, struct device *parent, |
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| 25 | + struct fwnode_handle *fwnode); |
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| 26 | +int sdw_master_device_del(struct sdw_bus *bus); |
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| 27 | + |
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| 28 | +#ifdef CONFIG_DEBUG_FS |
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| 29 | +void sdw_bus_debugfs_init(struct sdw_bus *bus); |
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| 30 | +void sdw_bus_debugfs_exit(struct sdw_bus *bus); |
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| 31 | +void sdw_slave_debugfs_init(struct sdw_slave *slave); |
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| 32 | +void sdw_slave_debugfs_exit(struct sdw_slave *slave); |
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| 33 | +void sdw_debugfs_init(void); |
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| 34 | +void sdw_debugfs_exit(void); |
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| 35 | +#else |
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| 36 | +static inline void sdw_bus_debugfs_init(struct sdw_bus *bus) {} |
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| 37 | +static inline void sdw_bus_debugfs_exit(struct sdw_bus *bus) {} |
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| 38 | +static inline void sdw_slave_debugfs_init(struct sdw_slave *slave) {} |
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| 39 | +static inline void sdw_slave_debugfs_exit(struct sdw_slave *slave) {} |
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| 40 | +static inline void sdw_debugfs_init(void) {} |
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| 41 | +static inline void sdw_debugfs_exit(void) {} |
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| 42 | +#endif |
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18 | 43 | |
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19 | 44 | enum { |
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20 | 45 | SDW_MSG_FLAG_READ = 0, |
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.. | .. |
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46 | 71 | }; |
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47 | 72 | |
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48 | 73 | #define SDW_DOUBLE_RATE_FACTOR 2 |
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| 74 | +#define SDW_STRM_RATE_GROUPING 1 |
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49 | 75 | |
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50 | | -extern int rows[SDW_FRAME_ROWS]; |
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51 | | -extern int cols[SDW_FRAME_COLS]; |
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| 76 | +extern int sdw_rows[SDW_FRAME_ROWS]; |
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| 77 | +extern int sdw_cols[SDW_FRAME_COLS]; |
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| 78 | + |
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| 79 | +int sdw_find_row_index(int row); |
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| 80 | +int sdw_find_col_index(int col); |
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52 | 81 | |
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53 | 82 | /** |
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54 | 83 | * sdw_port_runtime: Runtime port parameters for Master or Slave |
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.. | .. |
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99 | 128 | * this stream, can be zero. |
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100 | 129 | * @slave_rt_list: Slave runtime list |
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101 | 130 | * @port_list: List of Master Ports configured for this stream, can be zero. |
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| 131 | + * @stream_node: sdw_stream_runtime master_list node |
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102 | 132 | * @bus_node: sdw_bus m_rt_list node |
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103 | 133 | */ |
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104 | 134 | struct sdw_master_runtime { |
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.. | .. |
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108 | 138 | unsigned int ch_count; |
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109 | 139 | struct list_head slave_rt_list; |
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110 | 140 | struct list_head port_list; |
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| 141 | + struct list_head stream_node; |
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111 | 142 | struct list_head bus_node; |
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112 | 143 | }; |
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113 | 144 | |
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114 | 145 | struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave, |
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115 | | - enum sdw_data_direction direction, |
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116 | | - unsigned int port_num); |
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| 146 | + enum sdw_data_direction direction, |
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| 147 | + unsigned int port_num); |
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117 | 148 | int sdw_configure_dpn_intr(struct sdw_slave *slave, int port, |
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118 | | - bool enable, int mask); |
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| 149 | + bool enable, int mask); |
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119 | 150 | |
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120 | 151 | int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg); |
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121 | 152 | int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, |
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122 | | - struct sdw_defer *defer); |
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| 153 | + struct sdw_defer *defer); |
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123 | 154 | |
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124 | 155 | #define SDW_READ_INTR_CLEAR_RETRY 10 |
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125 | 156 | |
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126 | 157 | int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, |
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127 | | - u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf); |
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| 158 | + u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf); |
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| 159 | + |
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| 160 | +/* Retrieve and return channel count from channel mask */ |
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| 161 | +static inline int sdw_ch_mask_to_ch(int ch_mask) |
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| 162 | +{ |
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| 163 | + int c = 0; |
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| 164 | + |
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| 165 | + for (c = 0; ch_mask; ch_mask >>= 1) |
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| 166 | + c += ch_mask & 1; |
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| 167 | + |
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| 168 | + return c; |
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| 169 | +} |
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| 170 | + |
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| 171 | +/* Fill transport parameter data structure */ |
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| 172 | +static inline void sdw_fill_xport_params(struct sdw_transport_params *params, |
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| 173 | + int port_num, bool grp_ctrl_valid, |
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| 174 | + int grp_ctrl, int sample_int, |
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| 175 | + int off1, int off2, |
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| 176 | + int hstart, int hstop, |
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| 177 | + int pack_mode, int lane_ctrl) |
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| 178 | +{ |
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| 179 | + params->port_num = port_num; |
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| 180 | + params->blk_grp_ctrl_valid = grp_ctrl_valid; |
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| 181 | + params->blk_grp_ctrl = grp_ctrl; |
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| 182 | + params->sample_interval = sample_int; |
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| 183 | + params->offset1 = off1; |
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| 184 | + params->offset2 = off2; |
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| 185 | + params->hstart = hstart; |
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| 186 | + params->hstop = hstop; |
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| 187 | + params->blk_pkg_mode = pack_mode; |
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| 188 | + params->lane_ctrl = lane_ctrl; |
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| 189 | +} |
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| 190 | + |
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| 191 | +/* Fill port parameter data structure */ |
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| 192 | +static inline void sdw_fill_port_params(struct sdw_port_params *params, |
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| 193 | + int port_num, int bps, |
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| 194 | + int flow_mode, int data_mode) |
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| 195 | +{ |
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| 196 | + params->num = port_num; |
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| 197 | + params->bps = bps; |
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| 198 | + params->flow_mode = flow_mode; |
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| 199 | + params->data_mode = data_mode; |
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| 200 | +} |
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128 | 201 | |
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129 | 202 | /* Read-Modify-Write Slave register */ |
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130 | | -static inline int |
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131 | | -sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) |
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| 203 | +static inline int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) |
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132 | 204 | { |
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133 | 205 | int tmp; |
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134 | 206 | |
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.. | .. |
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140 | 212 | return sdw_write(slave, addr, tmp); |
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141 | 213 | } |
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142 | 214 | |
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| 215 | +/* broadcast read/write for tests */ |
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| 216 | +int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr); |
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| 217 | +int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value); |
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| 218 | + |
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| 219 | +/* |
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| 220 | + * At the moment we only track Master-initiated hw_reset. |
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| 221 | + * Additional fields can be added as needed |
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| 222 | + */ |
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| 223 | +#define SDW_UNATTACH_REQUEST_MASTER_RESET BIT(0) |
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| 224 | + |
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| 225 | +void sdw_clear_slave_status(struct sdw_bus *bus, u32 request); |
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| 226 | +int sdw_slave_modalias(const struct sdw_slave *slave, char *buf, size_t size); |
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| 227 | + |
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143 | 228 | #endif /* __SDW_BUS_H */ |
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