add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/scsi/ufs/ufs-qcom.h
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@@ -1,18 +1,12 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 and
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- * only version 2 as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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3
  */
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4
 
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 #ifndef UFS_QCOM_H_
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 #define UFS_QCOM_H_
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+
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+#include <linux/reset-controller.h>
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+#include <linux/reset.h>
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10
 
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 #define MAX_UFS_QCOM_HOSTS	1
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 #define MAX_U32                 (~(u32)0)
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@@ -129,11 +123,6 @@
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 	MASK_CLK_NS_REG                     = 0xFFFC00,
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 };
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-enum ufs_qcom_phy_init_type {
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-	UFS_PHY_INIT_FULL,
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-	UFS_PHY_INIT_CFG_RESTORE,
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-};
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-
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 /* QCOM UFS debug print bit mask */
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 #define UFS_QCOM_DBG_PRINT_REGS_EN	BIT(0)
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 #define UFS_QCOM_DBG_PRINT_ICE_REGS_EN	BIT(1)
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@@ -185,16 +174,6 @@
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 	mb();
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 }
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-struct ufs_qcom_bus_vote {
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-	uint32_t client_handle;
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-	uint32_t curr_vote;
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-	int min_bw_vote;
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-	int max_bw_vote;
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-	int saved_vote;
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-	bool is_max_bw_needed;
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-	struct device_attribute max_bus_bw;
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-};
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-
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 /* Host controller hardware version: major.minor.step */
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 struct ufs_hw_version {
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 	u16 step;
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@@ -206,6 +185,8 @@
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 	u8 select_major;
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 	u8 select_minor;
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 };
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+
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+struct gpio_desc;
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 struct ufs_qcom_host {
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 	/*
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@@ -225,7 +206,6 @@
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 	struct phy *generic_phy;
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 	struct ufs_hba *hba;
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-	struct ufs_qcom_bus_vote bus_vote;
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 	struct ufs_pa_layer_attr dev_req_params;
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 	struct clk *rx_l0_sync_clk;
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 	struct clk *tx_l0_sync_clk;
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@@ -236,12 +216,21 @@
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 	void __iomem *dev_ref_clk_ctrl_mmio;
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 	bool is_dev_ref_clk_enabled;
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 	struct ufs_hw_version hw_ver;
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+#ifdef CONFIG_SCSI_UFS_CRYPTO
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+	void __iomem *ice_mmio;
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+#endif
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 	u32 dev_ref_clk_en_mask;
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 	/* Bitmask for enabling debug prints */
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 	u32 dbg_print_en;
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 	struct ufs_qcom_testbus testbus;
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+
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+	/* Reset control of HCI */
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+	struct reset_control *core_reset;
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+	struct reset_controller_dev rcdev;
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+
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+	struct gpio_desc *device_reset;
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 };
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 static inline u32
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@@ -267,4 +256,28 @@
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 		return false;
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 }
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+/* ufs-qcom-ice.c */
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+
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+#ifdef CONFIG_SCSI_UFS_CRYPTO
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+int ufs_qcom_ice_init(struct ufs_qcom_host *host);
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+int ufs_qcom_ice_enable(struct ufs_qcom_host *host);
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+int ufs_qcom_ice_resume(struct ufs_qcom_host *host);
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+int ufs_qcom_ice_program_key(struct ufs_hba *hba,
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+			     const union ufs_crypto_cfg_entry *cfg, int slot);
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+#else
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+static inline int ufs_qcom_ice_init(struct ufs_qcom_host *host)
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+{
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+	return 0;
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+}
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+static inline int ufs_qcom_ice_enable(struct ufs_qcom_host *host)
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+{
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+	return 0;
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+}
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+static inline int ufs_qcom_ice_resume(struct ufs_qcom_host *host)
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+{
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+	return 0;
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+}
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+#define ufs_qcom_ice_program_key NULL
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+#endif /* !CONFIG_SCSI_UFS_CRYPTO */
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+
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 #endif /* UFS_QCOM_H_ */