hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/scsi/pm8001/pm8001_init.c
....@@ -41,10 +41,24 @@
4141 #include <linux/slab.h>
4242 #include "pm8001_sas.h"
4343 #include "pm8001_chips.h"
44
+#include "pm80xx_hwi.h"
45
+
46
+static ulong logging_level = PM8001_FAIL_LOGGING | PM8001_IOERR_LOGGING;
47
+module_param(logging_level, ulong, 0644);
48
+MODULE_PARM_DESC(logging_level, " bits for enabling logging info.");
49
+
50
+static ulong link_rate = LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | LINKRATE_120;
51
+module_param(link_rate, ulong, 0644);
52
+MODULE_PARM_DESC(link_rate, "Enable link rate.\n"
53
+ " 1: Link rate 1.5G\n"
54
+ " 2: Link rate 3.0G\n"
55
+ " 4: Link rate 6.0G\n"
56
+ " 8: Link rate 12.0G\n");
4457
4558 static struct scsi_transport_template *pm8001_stt;
59
+static int pm8001_init_ccb_tag(struct pm8001_hba_info *, struct Scsi_Host *, struct pci_dev *);
4660
47
-/**
61
+/*
4862 * chip info structure to identify chip key functionality as
4963 * encryption available/not, no of ports, hw specific function ref
5064 */
....@@ -67,13 +81,14 @@
6781
6882 struct workqueue_struct *pm8001_wq;
6983
70
-/**
84
+/*
7185 * The main structure which LLDD must register for scsi core.
7286 */
7387 static struct scsi_host_template pm8001_sht = {
7488 .module = THIS_MODULE,
7589 .name = DRV_NAME,
7690 .queuecommand = sas_queuecommand,
91
+ .dma_need_drain = ata_scsi_dma_need_drain,
7792 .target_alloc = sas_target_alloc,
7893 .slave_configure = sas_slave_configure,
7994 .scan_finished = pm8001_scan_finished,
....@@ -82,19 +97,21 @@
8297 .bios_param = sas_bios_param,
8398 .can_queue = 1,
8499 .this_id = -1,
85
- .sg_tablesize = SG_ALL,
100
+ .sg_tablesize = PM8001_MAX_DMA_SG,
86101 .max_sectors = SCSI_DEFAULT_MAX_SECTORS,
87
- .use_clustering = ENABLE_CLUSTERING,
88102 .eh_device_reset_handler = sas_eh_device_reset_handler,
89103 .eh_target_reset_handler = sas_eh_target_reset_handler,
90104 .slave_alloc = sas_slave_alloc,
91105 .target_destroy = sas_target_destroy,
92106 .ioctl = sas_ioctl,
107
+#ifdef CONFIG_COMPAT
108
+ .compat_ioctl = sas_ioctl,
109
+#endif
93110 .shost_attrs = pm8001_host_attrs,
94111 .track_queue_depth = 1,
95112 };
96113
97
-/**
114
+/*
98115 * Sas layer call this function to execute specific task.
99116 */
100117 static struct sas_domain_function_template pm8001_transport_ops = {
....@@ -114,15 +131,15 @@
114131 };
115132
116133 /**
117
- *pm8001_phy_init - initiate our adapter phys
118
- *@pm8001_ha: our hba structure.
119
- *@phy_id: phy id.
134
+ * pm8001_phy_init - initiate our adapter phys
135
+ * @pm8001_ha: our hba structure.
136
+ * @phy_id: phy id.
120137 */
121138 static void pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, int phy_id)
122139 {
123140 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
124141 struct asd_sas_phy *sas_phy = &phy->sas_phy;
125
- phy->phy_state = 0;
142
+ phy->phy_state = PHY_LINK_DISABLE;
126143 phy->pm8001_ha = pm8001_ha;
127144 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0;
128145 sas_phy->class = SAS;
....@@ -140,9 +157,8 @@
140157 }
141158
142159 /**
143
- *pm8001_free - free hba
144
- *@pm8001_ha: our hba structure.
145
- *
160
+ * pm8001_free - free hba
161
+ * @pm8001_ha: our hba structure.
146162 */
147163 static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
148164 {
....@@ -153,7 +169,7 @@
153169
154170 for (i = 0; i < USI_MAX_MEMCNT; i++) {
155171 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) {
156
- pci_free_consistent(pm8001_ha->pdev,
172
+ dma_free_coherent(&pm8001_ha->pdev->dev,
157173 (pm8001_ha->memoryMap.region[i].total_len +
158174 pm8001_ha->memoryMap.region[i].alignment),
159175 pm8001_ha->memoryMap.region[i].virt_ptr,
....@@ -190,6 +206,7 @@
190206 * pm8001_interrupt_handler_msix - main MSIX interrupt handler.
191207 * It obtains the vector number and calls the equivalent bottom
192208 * half or services directly.
209
+ * @irq: interrupt number
193210 * @opaque: the passed outbound queue/vector. Host structure is
194211 * retrieved from the same.
195212 */
....@@ -203,7 +220,7 @@
203220
204221 if (unlikely(!pm8001_ha))
205222 return IRQ_NONE;
206
- if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
223
+ if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha))
207224 return IRQ_NONE;
208225 #ifdef PM8001_USE_TASKLET
209226 tasklet_schedule(&pm8001_ha->tasklet[irq_vector->irq_id]);
....@@ -215,6 +232,7 @@
215232
216233 /**
217234 * pm8001_interrupt_handler_intx - main INTx interrupt handler.
235
+ * @irq: interrupt number
218236 * @dev_id: sas_ha structure. The HBA is retrieved from sas_has structure.
219237 */
220238
....@@ -226,7 +244,7 @@
226244 pm8001_ha = sha->lldd_ha;
227245 if (unlikely(!pm8001_ha))
228246 return IRQ_NONE;
229
- if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
247
+ if (!PM8001_CHIP_DISP->is_our_interrupt(pm8001_ha))
230248 return IRQ_NONE;
231249
232250 #ifdef PM8001_USE_TASKLET
....@@ -237,20 +255,46 @@
237255 return ret;
238256 }
239257
258
+static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha);
259
+static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha);
260
+
240261 /**
241262 * pm8001_alloc - initiate our hba structure and 6 DMAs area.
242
- * @pm8001_ha:our hba structure.
243
- *
263
+ * @pm8001_ha: our hba structure.
264
+ * @ent: PCI device ID structure to match on
244265 */
245266 static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
246267 const struct pci_device_id *ent)
247268 {
248
- int i;
269
+ int i, count = 0, rc = 0;
270
+ u32 ci_offset, ib_offset, ob_offset, pi_offset;
271
+ struct inbound_queue_table *circularQ;
272
+
249273 spin_lock_init(&pm8001_ha->lock);
250274 spin_lock_init(&pm8001_ha->bitmap_lock);
251
- PM8001_INIT_DBG(pm8001_ha,
252
- pm8001_printk("pm8001_alloc: PHY:%x\n",
253
- pm8001_ha->chip->n_phy));
275
+ pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n",
276
+ pm8001_ha->chip->n_phy);
277
+
278
+ /* Setup Interrupt */
279
+ rc = pm8001_setup_irq(pm8001_ha);
280
+ if (rc) {
281
+ pm8001_dbg(pm8001_ha, FAIL,
282
+ "pm8001_setup_irq failed [ret: %d]\n", rc);
283
+ goto err_out;
284
+ }
285
+ /* Request Interrupt */
286
+ rc = pm8001_request_irq(pm8001_ha);
287
+ if (rc)
288
+ goto err_out;
289
+
290
+ count = pm8001_ha->max_q_num;
291
+ /* Queues are chosen based on the number of cores/msix availability */
292
+ ib_offset = pm8001_ha->ib_offset = USI_MAX_MEMCNT_BASE;
293
+ ci_offset = pm8001_ha->ci_offset = ib_offset + count;
294
+ ob_offset = pm8001_ha->ob_offset = ci_offset + count;
295
+ pi_offset = pm8001_ha->pi_offset = ob_offset + count;
296
+ pm8001_ha->max_memcnt = pi_offset + count;
297
+
254298 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
255299 pm8001_phy_init(pm8001_ha, i);
256300 pm8001_ha->port[i].wide_port_phymap = 0;
....@@ -259,9 +303,6 @@
259303 INIT_LIST_HEAD(&pm8001_ha->port[i].list);
260304 }
261305
262
- pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL);
263
- if (!pm8001_ha->tags)
264
- goto err_out;
265306 /* MPI Memory region 1 for AAP Event Log for fw */
266307 pm8001_ha->memoryMap.region[AAP1].num_elements = 1;
267308 pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE;
....@@ -274,54 +315,62 @@
274315 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE;
275316 pm8001_ha->memoryMap.region[IOP].alignment = 32;
276317
277
- for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {
318
+ for (i = 0; i < count; i++) {
319
+ circularQ = &pm8001_ha->inbnd_q_tbl[i];
320
+ spin_lock_init(&circularQ->iq_lock);
278321 /* MPI Memory region 3 for consumer Index of inbound queues */
279
- pm8001_ha->memoryMap.region[CI+i].num_elements = 1;
280
- pm8001_ha->memoryMap.region[CI+i].element_size = 4;
281
- pm8001_ha->memoryMap.region[CI+i].total_len = 4;
282
- pm8001_ha->memoryMap.region[CI+i].alignment = 4;
322
+ pm8001_ha->memoryMap.region[ci_offset+i].num_elements = 1;
323
+ pm8001_ha->memoryMap.region[ci_offset+i].element_size = 4;
324
+ pm8001_ha->memoryMap.region[ci_offset+i].total_len = 4;
325
+ pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4;
283326
284327 if ((ent->driver_data) != chip_8001) {
285328 /* MPI Memory region 5 inbound queues */
286
- pm8001_ha->memoryMap.region[IB+i].num_elements =
329
+ pm8001_ha->memoryMap.region[ib_offset+i].num_elements =
287330 PM8001_MPI_QUEUE;
288
- pm8001_ha->memoryMap.region[IB+i].element_size = 128;
289
- pm8001_ha->memoryMap.region[IB+i].total_len =
331
+ pm8001_ha->memoryMap.region[ib_offset+i].element_size
332
+ = 128;
333
+ pm8001_ha->memoryMap.region[ib_offset+i].total_len =
290334 PM8001_MPI_QUEUE * 128;
291
- pm8001_ha->memoryMap.region[IB+i].alignment = 128;
335
+ pm8001_ha->memoryMap.region[ib_offset+i].alignment
336
+ = 128;
292337 } else {
293
- pm8001_ha->memoryMap.region[IB+i].num_elements =
338
+ pm8001_ha->memoryMap.region[ib_offset+i].num_elements =
294339 PM8001_MPI_QUEUE;
295
- pm8001_ha->memoryMap.region[IB+i].element_size = 64;
296
- pm8001_ha->memoryMap.region[IB+i].total_len =
340
+ pm8001_ha->memoryMap.region[ib_offset+i].element_size
341
+ = 64;
342
+ pm8001_ha->memoryMap.region[ib_offset+i].total_len =
297343 PM8001_MPI_QUEUE * 64;
298
- pm8001_ha->memoryMap.region[IB+i].alignment = 64;
344
+ pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64;
299345 }
300346 }
301347
302
- for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {
348
+ for (i = 0; i < count; i++) {
303349 /* MPI Memory region 4 for producer Index of outbound queues */
304
- pm8001_ha->memoryMap.region[PI+i].num_elements = 1;
305
- pm8001_ha->memoryMap.region[PI+i].element_size = 4;
306
- pm8001_ha->memoryMap.region[PI+i].total_len = 4;
307
- pm8001_ha->memoryMap.region[PI+i].alignment = 4;
350
+ pm8001_ha->memoryMap.region[pi_offset+i].num_elements = 1;
351
+ pm8001_ha->memoryMap.region[pi_offset+i].element_size = 4;
352
+ pm8001_ha->memoryMap.region[pi_offset+i].total_len = 4;
353
+ pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4;
308354
309355 if (ent->driver_data != chip_8001) {
310356 /* MPI Memory region 6 Outbound queues */
311
- pm8001_ha->memoryMap.region[OB+i].num_elements =
357
+ pm8001_ha->memoryMap.region[ob_offset+i].num_elements =
312358 PM8001_MPI_QUEUE;
313
- pm8001_ha->memoryMap.region[OB+i].element_size = 128;
314
- pm8001_ha->memoryMap.region[OB+i].total_len =
359
+ pm8001_ha->memoryMap.region[ob_offset+i].element_size
360
+ = 128;
361
+ pm8001_ha->memoryMap.region[ob_offset+i].total_len =
315362 PM8001_MPI_QUEUE * 128;
316
- pm8001_ha->memoryMap.region[OB+i].alignment = 128;
363
+ pm8001_ha->memoryMap.region[ob_offset+i].alignment
364
+ = 128;
317365 } else {
318366 /* MPI Memory region 6 Outbound queues */
319
- pm8001_ha->memoryMap.region[OB+i].num_elements =
367
+ pm8001_ha->memoryMap.region[ob_offset+i].num_elements =
320368 PM8001_MPI_QUEUE;
321
- pm8001_ha->memoryMap.region[OB+i].element_size = 64;
322
- pm8001_ha->memoryMap.region[OB+i].total_len =
369
+ pm8001_ha->memoryMap.region[ob_offset+i].element_size
370
+ = 64;
371
+ pm8001_ha->memoryMap.region[ob_offset+i].total_len =
323372 PM8001_MPI_QUEUE * 64;
324
- pm8001_ha->memoryMap.region[OB+i].alignment = 64;
373
+ pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64;
325374 }
326375
327376 }
....@@ -329,19 +378,6 @@
329378 pm8001_ha->memoryMap.region[NVMD].num_elements = 1;
330379 pm8001_ha->memoryMap.region[NVMD].element_size = 4096;
331380 pm8001_ha->memoryMap.region[NVMD].total_len = 4096;
332
- /* Memory region for devices*/
333
- pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1;
334
- pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES *
335
- sizeof(struct pm8001_device);
336
- pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES *
337
- sizeof(struct pm8001_device);
338
-
339
- /* Memory region for ccb_info*/
340
- pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1;
341
- pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB *
342
- sizeof(struct pm8001_ccb_info);
343
- pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB *
344
- sizeof(struct pm8001_ccb_info);
345381
346382 /* Memory region for fw flash */
347383 pm8001_ha->memoryMap.region[FW_FLASH].total_len = 4096;
....@@ -350,7 +386,7 @@
350386 pm8001_ha->memoryMap.region[FORENSIC_MEM].total_len = 0x10000;
351387 pm8001_ha->memoryMap.region[FORENSIC_MEM].element_size = 0x10000;
352388 pm8001_ha->memoryMap.region[FORENSIC_MEM].alignment = 0x10000;
353
- for (i = 0; i < USI_MAX_MEMCNT; i++) {
389
+ for (i = 0; i < pm8001_ha->max_memcnt; i++) {
354390 if (pm8001_mem_alloc(pm8001_ha->pdev,
355391 &pm8001_ha->memoryMap.region[i].virt_ptr,
356392 &pm8001_ha->memoryMap.region[i].phys_addr,
....@@ -358,34 +394,41 @@
358394 &pm8001_ha->memoryMap.region[i].phys_addr_lo,
359395 pm8001_ha->memoryMap.region[i].total_len,
360396 pm8001_ha->memoryMap.region[i].alignment) != 0) {
361
- PM8001_FAIL_DBG(pm8001_ha,
362
- pm8001_printk("Mem%d alloc failed\n",
363
- i));
397
+ pm8001_dbg(pm8001_ha, FAIL,
398
+ "Mem%d alloc failed\n",
399
+ i);
364400 goto err_out;
365401 }
366402 }
367403
368
- pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr;
404
+ /* Memory region for devices*/
405
+ pm8001_ha->devices = kzalloc(PM8001_MAX_DEVICES
406
+ * sizeof(struct pm8001_device), GFP_KERNEL);
407
+ if (!pm8001_ha->devices) {
408
+ rc = -ENOMEM;
409
+ goto err_out_nodev;
410
+ }
369411 for (i = 0; i < PM8001_MAX_DEVICES; i++) {
370412 pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED;
371413 pm8001_ha->devices[i].id = i;
372414 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES;
373
- pm8001_ha->devices[i].running_req = 0;
374
- }
375
- pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr;
376
- for (i = 0; i < PM8001_MAX_CCB; i++) {
377
- pm8001_ha->ccb_info[i].ccb_dma_handle =
378
- pm8001_ha->memoryMap.region[CCB_MEM].phys_addr +
379
- i * sizeof(struct pm8001_ccb_info);
380
- pm8001_ha->ccb_info[i].task = NULL;
381
- pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff;
382
- pm8001_ha->ccb_info[i].device = NULL;
383
- ++pm8001_ha->tags_num;
415
+ atomic_set(&pm8001_ha->devices[i].running_req, 0);
384416 }
385417 pm8001_ha->flags = PM8001F_INIT_TIME;
386418 /* Initialize tags */
387419 pm8001_tag_init(pm8001_ha);
388420 return 0;
421
+
422
+err_out_nodev:
423
+ for (i = 0; i < pm8001_ha->max_memcnt; i++) {
424
+ if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) {
425
+ pci_free_consistent(pm8001_ha->pdev,
426
+ (pm8001_ha->memoryMap.region[i].total_len +
427
+ pm8001_ha->memoryMap.region[i].alignment),
428
+ pm8001_ha->memoryMap.region[i].virt_ptr,
429
+ pm8001_ha->memoryMap.region[i].phys_addr);
430
+ }
431
+ }
389432 err_out:
390433 return 1;
391434 }
....@@ -403,7 +446,7 @@
403446
404447 pdev = pm8001_ha->pdev;
405448 /* map pci mem (PMC pci base 0-3)*/
406
- for (bar = 0; bar < 6; bar++) {
449
+ for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
407450 /*
408451 ** logical BARs for SPC:
409452 ** bar 0 and 1 - logical BAR0
....@@ -422,19 +465,19 @@
422465 pm8001_ha->io_mem[logicalBar].memvirtaddr =
423466 ioremap(pm8001_ha->io_mem[logicalBar].membase,
424467 pm8001_ha->io_mem[logicalBar].memsize);
425
- PM8001_INIT_DBG(pm8001_ha,
426
- pm8001_printk("PCI: bar %d, logicalBar %d ",
427
- bar, logicalBar));
428
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
429
- "base addr %llx virt_addr=%llx len=%d\n",
430
- (u64)pm8001_ha->io_mem[logicalBar].membase,
431
- (u64)(unsigned long)
432
- pm8001_ha->io_mem[logicalBar].memvirtaddr,
433
- pm8001_ha->io_mem[logicalBar].memsize));
468
+ pm8001_dbg(pm8001_ha, INIT,
469
+ "PCI: bar %d, logicalBar %d\n",
470
+ bar, logicalBar);
471
+ pm8001_dbg(pm8001_ha, INIT,
472
+ "base addr %llx virt_addr=%llx len=%d\n",
473
+ (u64)pm8001_ha->io_mem[logicalBar].membase,
474
+ (u64)(unsigned long)
475
+ pm8001_ha->io_mem[logicalBar].memvirtaddr,
476
+ pm8001_ha->io_mem[logicalBar].memsize);
434477 } else {
435478 pm8001_ha->io_mem[logicalBar].membase = 0;
436479 pm8001_ha->io_mem[logicalBar].memsize = 0;
437
- pm8001_ha->io_mem[logicalBar].memvirtaddr = 0;
480
+ pm8001_ha->io_mem[logicalBar].memvirtaddr = NULL;
438481 }
439482 logicalBar++;
440483 }
....@@ -468,7 +511,16 @@
468511 pm8001_ha->sas = sha;
469512 pm8001_ha->shost = shost;
470513 pm8001_ha->id = pm8001_id++;
471
- pm8001_ha->logging_level = 0x01;
514
+ pm8001_ha->logging_level = logging_level;
515
+ pm8001_ha->non_fatal_count = 0;
516
+ if (link_rate >= 1 && link_rate <= 15)
517
+ pm8001_ha->link_rate = (link_rate << 8);
518
+ else {
519
+ pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 |
520
+ LINKRATE_60 | LINKRATE_120;
521
+ pm8001_dbg(pm8001_ha, FAIL,
522
+ "Setting link rate to default value\n");
523
+ }
472524 sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id);
473525 /* IOMB size is 128 for 8088/89 controllers */
474526 if (pm8001_ha->chip_id != chip_8001)
....@@ -502,30 +554,12 @@
502554 {
503555 int rc;
504556
505
- if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) {
506
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44));
507
- if (rc) {
508
- rc = pci_set_consistent_dma_mask(pdev,
509
- DMA_BIT_MASK(32));
510
- if (rc) {
511
- dev_printk(KERN_ERR, &pdev->dev,
512
- "44-bit DMA enable failed\n");
513
- return rc;
514
- }
515
- }
516
- } else {
517
- rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
518
- if (rc) {
557
+ rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44));
558
+ if (rc) {
559
+ rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
560
+ if (rc)
519561 dev_printk(KERN_ERR, &pdev->dev,
520562 "32-bit DMA enable failed\n");
521
- return rc;
522
- }
523
- rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
524
- if (rc) {
525
- dev_printk(KERN_ERR, &pdev->dev,
526
- "32-bit consistent DMA enable failed\n");
527
- return rc;
528
- }
529563 }
530564 return rc;
531565 }
....@@ -606,7 +640,7 @@
606640
607641 /**
608642 * pm8001_init_sas_add - initialize sas address
609
- * @chip_info: our ha struct.
643
+ * @pm8001_ha: our ha struct.
610644 *
611645 * Currently we just set the fixed SAS address to our HBA,for manufacture,
612646 * it should read from the EEPROM
....@@ -631,30 +665,30 @@
631665 if (pm8001_ha->chip_id == chip_8001) {
632666 if (deviceid == 0x8081 || deviceid == 0x0042) {
633667 payload.minor_function = 4;
634
- payload.length = 4096;
668
+ payload.rd_length = 4096;
635669 } else {
636670 payload.minor_function = 0;
637
- payload.length = 128;
671
+ payload.rd_length = 128;
638672 }
639673 } else if ((pm8001_ha->chip_id == chip_8070 ||
640674 pm8001_ha->chip_id == chip_8072) &&
641675 pm8001_ha->pdev->subsystem_vendor == PCI_VENDOR_ID_ATTO) {
642676 payload.minor_function = 4;
643
- payload.length = 4096;
677
+ payload.rd_length = 4096;
644678 } else {
645679 payload.minor_function = 1;
646
- payload.length = 4096;
680
+ payload.rd_length = 4096;
647681 }
648682 payload.offset = 0;
649
- payload.func_specific = kzalloc(payload.length, GFP_KERNEL);
683
+ payload.func_specific = kzalloc(payload.rd_length, GFP_KERNEL);
650684 if (!payload.func_specific) {
651
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk("mem alloc fail\n"));
685
+ pm8001_dbg(pm8001_ha, INIT, "mem alloc fail\n");
652686 return;
653687 }
654688 rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
655689 if (rc) {
656690 kfree(payload.func_specific);
657
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk("nvmd failed\n"));
691
+ pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n");
658692 return;
659693 }
660694 wait_for_completion(&completion);
....@@ -682,9 +716,8 @@
682716 sas_add[7] = sas_add[7] + 4;
683717 memcpy(&pm8001_ha->phy[i].dev_sas_addr,
684718 sas_add, SAS_ADDR_SIZE);
685
- PM8001_INIT_DBG(pm8001_ha,
686
- pm8001_printk("phy %d sas_addr = %016llx\n", i,
687
- pm8001_ha->phy[i].dev_sas_addr));
719
+ pm8001_dbg(pm8001_ha, INIT, "phy %d sas_addr = %016llx\n", i,
720
+ pm8001_ha->phy[i].dev_sas_addr);
688721 }
689722 kfree(payload.func_specific);
690723 #else
....@@ -716,7 +749,7 @@
716749 /* SAS ADDRESS read from flash / EEPROM */
717750 payload.minor_function = 6;
718751 payload.offset = 0;
719
- payload.length = 4096;
752
+ payload.rd_length = 4096;
720753 payload.func_specific = kzalloc(4096, GFP_KERNEL);
721754 if (!payload.func_specific)
722755 return -ENOMEM;
....@@ -724,7 +757,7 @@
724757 rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
725758 if (rc) {
726759 kfree(payload.func_specific);
727
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk("nvmd failed\n"));
760
+ pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n");
728761 return -ENOMEM;
729762 }
730763 wait_for_completion(&completion);
....@@ -818,9 +851,9 @@
818851 break;
819852
820853 default:
821
- PM8001_INIT_DBG(pm8001_ha,
822
- pm8001_printk("Unknown subsystem device=0x%.04x",
823
- pm8001_ha->pdev->subsystem_device));
854
+ pm8001_dbg(pm8001_ha, INIT,
855
+ "Unknown subsystem device=0x%.04x\n",
856
+ pm8001_ha->pdev->subsystem_device);
824857 }
825858 }
826859
....@@ -884,44 +917,65 @@
884917 #ifdef PM8001_USE_MSIX
885918 /**
886919 * pm8001_setup_msix - enable MSI-X interrupt
887
- * @chip_info: our ha struct.
888
- * @irq_handler: irq_handler
920
+ * @pm8001_ha: our ha struct.
889921 */
890922 static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
891923 {
892
- u32 i = 0, j = 0;
893924 u32 number_of_intr;
894
- int flag = 0;
895
- int rc;
896
- static char intr_drvname[PM8001_MAX_MSIX_VEC][sizeof(DRV_NAME)+3];
925
+ int rc, cpu_online_count;
926
+ unsigned int allocated_irq_vectors;
897927
898928 /* SPCv controllers supports 64 msi-x */
899929 if (pm8001_ha->chip_id == chip_8001) {
900930 number_of_intr = 1;
901931 } else {
902932 number_of_intr = PM8001_MAX_MSIX_VEC;
903
- flag &= ~IRQF_SHARED;
904933 }
905934
935
+ cpu_online_count = num_online_cpus();
936
+ number_of_intr = min_t(int, cpu_online_count, number_of_intr);
906937 rc = pci_alloc_irq_vectors(pm8001_ha->pdev, number_of_intr,
907938 number_of_intr, PCI_IRQ_MSIX);
939
+ allocated_irq_vectors = rc;
908940 if (rc < 0)
909941 return rc;
942
+
943
+ /* Assigns the number of interrupts */
944
+ number_of_intr = min_t(int, allocated_irq_vectors, number_of_intr);
910945 pm8001_ha->number_of_intr = number_of_intr;
911946
912
- PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
913
- "pci_alloc_irq_vectors request ret:%d no of intr %d\n",
914
- rc, pm8001_ha->number_of_intr));
947
+ /* Maximum queue number updating in HBA structure */
948
+ pm8001_ha->max_q_num = number_of_intr;
915949
916
- for (i = 0; i < number_of_intr; i++) {
917
- snprintf(intr_drvname[i], sizeof(intr_drvname[0]),
918
- DRV_NAME"%d", i);
950
+ pm8001_dbg(pm8001_ha, INIT,
951
+ "pci_alloc_irq_vectors request ret:%d no of intr %d\n",
952
+ rc, pm8001_ha->number_of_intr);
953
+ return 0;
954
+}
955
+
956
+static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha)
957
+{
958
+ u32 i = 0, j = 0;
959
+ int flag = 0, rc = 0;
960
+
961
+ if (pm8001_ha->chip_id != chip_8001)
962
+ flag &= ~IRQF_SHARED;
963
+
964
+ pm8001_dbg(pm8001_ha, INIT,
965
+ "pci_enable_msix request number of intr %d\n",
966
+ pm8001_ha->number_of_intr);
967
+
968
+ for (i = 0; i < pm8001_ha->number_of_intr; i++) {
969
+ snprintf(pm8001_ha->intr_drvname[i],
970
+ sizeof(pm8001_ha->intr_drvname[0]),
971
+ "%s-%d", pm8001_ha->name, i);
919972 pm8001_ha->irq_vector[i].irq_id = i;
920973 pm8001_ha->irq_vector[i].drv_inst = pm8001_ha;
921974
922975 rc = request_irq(pci_irq_vector(pm8001_ha->pdev, i),
923976 pm8001_interrupt_handler_msix, flag,
924
- intr_drvname[i], &(pm8001_ha->irq_vector[i]));
977
+ pm8001_ha->intr_drvname[i],
978
+ &(pm8001_ha->irq_vector[i]));
925979 if (rc) {
926980 for (j = 0; j < i; j++) {
927981 free_irq(pci_irq_vector(pm8001_ha->pdev, i),
....@@ -936,9 +990,23 @@
936990 }
937991 #endif
938992
993
+static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha)
994
+{
995
+ struct pci_dev *pdev;
996
+
997
+ pdev = pm8001_ha->pdev;
998
+
999
+#ifdef PM8001_USE_MSIX
1000
+ if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
1001
+ return pm8001_setup_msix(pm8001_ha);
1002
+ pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
1003
+#endif
1004
+ return 0;
1005
+}
1006
+
9391007 /**
9401008 * pm8001_request_irq - register interrupt
941
- * @chip_info: our ha struct.
1009
+ * @pm8001_ha: our ha struct.
9421010 */
9431011 static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
9441012 {
....@@ -949,10 +1017,9 @@
9491017
9501018 #ifdef PM8001_USE_MSIX
9511019 if (pdev->msix_cap && pci_msi_enabled())
952
- return pm8001_setup_msix(pm8001_ha);
1020
+ return pm8001_request_msix(pm8001_ha);
9531021 else {
954
- PM8001_INIT_DBG(pm8001_ha,
955
- pm8001_printk("MSIX not supported!!!\n"));
1022
+ pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
9561023 goto intx;
9571024 }
9581025 #endif
....@@ -962,7 +1029,7 @@
9621029 pm8001_ha->irq_vector[0].irq_id = 0;
9631030 pm8001_ha->irq_vector[0].drv_inst = pm8001_ha;
9641031 rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED,
965
- DRV_NAME, SHOST_TO_SAS_HA(pm8001_ha->shost));
1032
+ pm8001_ha->name, SHOST_TO_SAS_HA(pm8001_ha->shost));
9661033 return rc;
9671034 }
9681035
....@@ -984,6 +1051,7 @@
9841051 struct pm8001_hba_info *pm8001_ha;
9851052 struct Scsi_Host *shost = NULL;
9861053 const struct pm8001_chip_info *chip;
1054
+ struct sas_ha_struct *sha;
9871055
9881056 dev_printk(KERN_INFO, &pdev->dev,
9891057 "pm80xx: driver version %s\n", DRV_VERSION);
....@@ -1012,12 +1080,12 @@
10121080 goto err_out_regions;
10131081 }
10141082 chip = &pm8001_chips[ent->driver_data];
1015
- SHOST_TO_SAS_HA(shost) =
1016
- kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL);
1017
- if (!SHOST_TO_SAS_HA(shost)) {
1083
+ sha = kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL);
1084
+ if (!sha) {
10181085 rc = -ENOMEM;
10191086 goto err_out_free_host;
10201087 }
1088
+ SHOST_TO_SAS_HA(shost) = sha;
10211089
10221090 rc = pm8001_prep_sas_ha_init(shost, chip);
10231091 if (rc) {
....@@ -1031,24 +1099,22 @@
10311099 rc = -ENOMEM;
10321100 goto err_out_free;
10331101 }
1034
- list_add_tail(&pm8001_ha->list, &hba_list);
1102
+
10351103 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
10361104 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
10371105 if (rc) {
1038
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
1039
- "chip_init failed [ret: %d]\n", rc));
1106
+ pm8001_dbg(pm8001_ha, FAIL,
1107
+ "chip_init failed [ret: %d]\n", rc);
10401108 goto err_out_ha_free;
10411109 }
1110
+
1111
+ rc = pm8001_init_ccb_tag(pm8001_ha, shost, pdev);
1112
+ if (rc)
1113
+ goto err_out_enable;
10421114
10431115 rc = scsi_add_host(shost, &pdev->dev);
10441116 if (rc)
10451117 goto err_out_ha_free;
1046
- rc = pm8001_request_irq(pm8001_ha);
1047
- if (rc) {
1048
- PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
1049
- "pm8001_request_irq failed [ret: %d]\n", rc));
1050
- goto err_out_shost;
1051
- }
10521118
10531119 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
10541120 if (pm8001_ha->chip_id != chip_8001) {
....@@ -1066,8 +1132,13 @@
10661132
10671133 pm8001_post_sas_ha_init(shost, chip);
10681134 rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
1069
- if (rc)
1135
+ if (rc) {
1136
+ pm8001_dbg(pm8001_ha, FAIL,
1137
+ "sas_register_ha failed [ret: %d]\n", rc);
10701138 goto err_out_shost;
1139
+ }
1140
+ list_add_tail(&pm8001_ha->list, &hba_list);
1141
+ pm8001_ha->flags = PM8001F_RUN_TIME;
10711142 scsi_scan_host(pm8001_ha->shost);
10721143 return 0;
10731144
....@@ -1076,7 +1147,7 @@
10761147 err_out_ha_free:
10771148 pm8001_free(pm8001_ha);
10781149 err_out_free:
1079
- kfree(SHOST_TO_SAS_HA(shost));
1150
+ kfree(sha);
10801151 err_out_free_host:
10811152 scsi_host_put(shost);
10821153 err_out_regions:
....@@ -1085,6 +1156,60 @@
10851156 pci_disable_device(pdev);
10861157 err_out_enable:
10871158 return rc;
1159
+}
1160
+
1161
+/*
1162
+ * pm8001_init_ccb_tag - allocate memory to CCB and tag.
1163
+ * @pm8001_ha: our hba card information.
1164
+ * @shost: scsi host which has been allocated outside.
1165
+ */
1166
+static int
1167
+pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
1168
+ struct pci_dev *pdev)
1169
+{
1170
+ int i = 0;
1171
+ u32 max_out_io, ccb_count;
1172
+ u32 can_queue;
1173
+
1174
+ max_out_io = pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io;
1175
+ ccb_count = min_t(int, PM8001_MAX_CCB, max_out_io);
1176
+
1177
+ /* Update to the scsi host*/
1178
+ can_queue = ccb_count - PM8001_RESERVE_SLOT;
1179
+ shost->can_queue = can_queue;
1180
+
1181
+ pm8001_ha->tags = kzalloc(ccb_count, GFP_KERNEL);
1182
+ if (!pm8001_ha->tags)
1183
+ goto err_out;
1184
+
1185
+ /* Memory region for ccb_info*/
1186
+ pm8001_ha->ccb_info = (struct pm8001_ccb_info *)
1187
+ kcalloc(ccb_count, sizeof(struct pm8001_ccb_info), GFP_KERNEL);
1188
+ if (!pm8001_ha->ccb_info) {
1189
+ pm8001_dbg(pm8001_ha, FAIL,
1190
+ "Unable to allocate memory for ccb\n");
1191
+ goto err_out_noccb;
1192
+ }
1193
+ for (i = 0; i < ccb_count; i++) {
1194
+ pm8001_ha->ccb_info[i].buf_prd = pci_alloc_consistent(pdev,
1195
+ sizeof(struct pm8001_prd) * PM8001_MAX_DMA_SG,
1196
+ &pm8001_ha->ccb_info[i].ccb_dma_handle);
1197
+ if (!pm8001_ha->ccb_info[i].buf_prd) {
1198
+ pm8001_dbg(pm8001_ha, FAIL,
1199
+ "pm80xx: ccb prd memory allocation error\n");
1200
+ goto err_out;
1201
+ }
1202
+ pm8001_ha->ccb_info[i].task = NULL;
1203
+ pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff;
1204
+ pm8001_ha->ccb_info[i].device = NULL;
1205
+ ++pm8001_ha->tags_num;
1206
+ }
1207
+ return 0;
1208
+
1209
+err_out_noccb:
1210
+ kfree(pm8001_ha->devices);
1211
+err_out:
1212
+ return -ENOMEM;
10881213 }
10891214
10901215 static void pm8001_pci_remove(struct pci_dev *pdev)
....@@ -1215,8 +1340,7 @@
12151340 /* chip soft rst only for spc */
12161341 if (pm8001_ha->chip_id == chip_8001) {
12171342 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
1218
- PM8001_INIT_DBG(pm8001_ha,
1219
- pm8001_printk("chip soft reset successful\n"));
1343
+ pm8001_dbg(pm8001_ha, INIT, "chip soft reset successful\n");
12201344 }
12211345 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
12221346 if (rc)