hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/scsi/fnic/vnic_dev.c
....@@ -27,6 +27,24 @@
2727 #include "vnic_devcmd.h"
2828 #include "vnic_dev.h"
2929 #include "vnic_stats.h"
30
+#include "vnic_wq.h"
31
+
32
+struct devcmd2_controller {
33
+ struct vnic_wq_ctrl *wq_ctrl;
34
+ struct vnic_dev_ring results_ring;
35
+ struct vnic_wq wq;
36
+ struct vnic_devcmd2 *cmd_ring;
37
+ struct devcmd2_result *result;
38
+ u16 next_result;
39
+ u16 result_size;
40
+ int color;
41
+};
42
+
43
+enum vnic_proxy_type {
44
+ PROXY_NONE,
45
+ PROXY_BY_BDF,
46
+ PROXY_BY_INDEX,
47
+};
3048
3149 struct vnic_res {
3250 void __iomem *vaddr;
....@@ -48,6 +66,12 @@
4866 dma_addr_t stats_pa;
4967 struct vnic_devcmd_fw_info *fw_info;
5068 dma_addr_t fw_info_pa;
69
+ enum vnic_proxy_type proxy;
70
+ u32 proxy_index;
71
+ u64 args[VNIC_DEVCMD_NARGS];
72
+ struct devcmd2_controller *devcmd2;
73
+ int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
74
+ int wait);
5175 };
5276
5377 #define VNIC_MAX_RES_HDR_SIZE \
....@@ -119,6 +143,7 @@
119143 }
120144 break;
121145 case RES_TYPE_INTR_PBA_LEGACY:
146
+ case RES_TYPE_DEVCMD2:
122147 case RES_TYPE_DEVCMD:
123148 len = count;
124149 break;
....@@ -195,9 +220,9 @@
195220 {
196221 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
197222
198
- ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
223
+ ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
199224 ring->size_unaligned,
200
- &ring->base_addr_unaligned);
225
+ &ring->base_addr_unaligned, GFP_KERNEL);
201226
202227 if (!ring->descs_unaligned) {
203228 printk(KERN_ERR
....@@ -221,7 +246,7 @@
221246 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
222247 {
223248 if (ring->descs) {
224
- pci_free_consistent(vdev->pdev,
249
+ dma_free_coherent(&vdev->pdev->dev,
225250 ring->size_unaligned,
226251 ring->descs_unaligned,
227252 ring->base_addr_unaligned);
....@@ -229,13 +254,12 @@
229254 }
230255 }
231256
232
-int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
233
- u64 *a0, u64 *a1, int wait)
257
+static int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
234258 {
235259 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
236260 int delay;
237261 u32 status;
238
- int dev_cmd_err[] = {
262
+ static const int dev_cmd_err[] = {
239263 /* convert from fw's version of error.h to host's version */
240264 0, /* ERR_SUCCESS */
241265 EINVAL, /* ERR_EINVAL */
....@@ -244,6 +268,8 @@
244268 EBUSY, /* ERR_EBUSY */
245269 };
246270 int err;
271
+ u64 *a0 = &vdev->args[0];
272
+ u64 *a1 = &vdev->args[1];
247273
248274 status = ioread32(&devcmd->status);
249275 if (status & STAT_BUSY) {
....@@ -290,6 +316,225 @@
290316 return -ETIMEDOUT;
291317 }
292318
319
+static int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
320
+ int wait)
321
+{
322
+ struct devcmd2_controller *dc2c = vdev->devcmd2;
323
+ struct devcmd2_result *result;
324
+ u8 color;
325
+ unsigned int i;
326
+ int delay;
327
+ int err;
328
+ u32 fetch_index;
329
+ u32 posted;
330
+ u32 new_posted;
331
+
332
+ posted = ioread32(&dc2c->wq_ctrl->posted_index);
333
+ fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
334
+
335
+ if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
336
+ /* Hardware surprise removal: return error */
337
+ pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
338
+ pci_name(vdev->pdev), _CMD_N(cmd));
339
+ pr_err("%s: fetch index: %u, posted index: %u\n",
340
+ pci_name(vdev->pdev), fetch_index, posted);
341
+
342
+ return -ENODEV;
343
+
344
+ }
345
+
346
+ new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
347
+
348
+ if (new_posted == fetch_index) {
349
+ pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
350
+ pci_name(vdev->pdev), _CMD_N(cmd));
351
+ pr_err("%s: fetch index: %u, posted index: %u\n",
352
+ pci_name(vdev->pdev), fetch_index, posted);
353
+ return -EBUSY;
354
+
355
+ }
356
+ dc2c->cmd_ring[posted].cmd = cmd;
357
+ dc2c->cmd_ring[posted].flags = 0;
358
+
359
+ if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
360
+ dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
361
+ if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
362
+ for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
363
+ dc2c->cmd_ring[posted].args[i] = vdev->args[i];
364
+
365
+ }
366
+
367
+ /* Adding write memory barrier prevents compiler and/or CPU
368
+ * reordering, thus avoiding descriptor posting before
369
+ * descriptor is initialized. Otherwise, hardware can read
370
+ * stale descriptor fields.
371
+ */
372
+ wmb();
373
+ iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
374
+
375
+ if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
376
+ return 0;
377
+
378
+ result = dc2c->result + dc2c->next_result;
379
+ color = dc2c->color;
380
+
381
+ dc2c->next_result++;
382
+ if (dc2c->next_result == dc2c->result_size) {
383
+ dc2c->next_result = 0;
384
+ dc2c->color = dc2c->color ? 0 : 1;
385
+ }
386
+
387
+ for (delay = 0; delay < wait; delay++) {
388
+ udelay(100);
389
+ if (result->color == color) {
390
+ if (result->error) {
391
+ err = -(int) result->error;
392
+ if (err != ERR_ECMDUNKNOWN ||
393
+ cmd != CMD_CAPABILITY)
394
+ pr_err("%s:Error %d devcmd %d\n",
395
+ pci_name(vdev->pdev),
396
+ err, _CMD_N(cmd));
397
+ return err;
398
+ }
399
+ if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
400
+ rmb(); /*prevent reorder while reding result*/
401
+ for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
402
+ vdev->args[i] = result->results[i];
403
+ }
404
+ return 0;
405
+ }
406
+ }
407
+
408
+ pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
409
+
410
+ return -ETIMEDOUT;
411
+}
412
+
413
+
414
+static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
415
+{
416
+ vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
417
+ if (!vdev->devcmd)
418
+ return -ENODEV;
419
+
420
+ vdev->devcmd_rtn = &vnic_dev_cmd1;
421
+ return 0;
422
+}
423
+
424
+
425
+static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
426
+{
427
+ int err;
428
+ unsigned int fetch_index;
429
+
430
+ if (vdev->devcmd2)
431
+ return 0;
432
+
433
+ vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_ATOMIC);
434
+ if (!vdev->devcmd2)
435
+ return -ENOMEM;
436
+
437
+ vdev->devcmd2->color = 1;
438
+ vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
439
+ err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
440
+ DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
441
+ if (err)
442
+ goto err_free_devcmd2;
443
+
444
+ fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
445
+ if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
446
+ pr_err("error in devcmd2 init");
447
+ err = -ENODEV;
448
+ goto err_free_wq;
449
+ }
450
+
451
+ /*
452
+ * Don't change fetch_index ever and
453
+ * set posted_index same as fetch_index
454
+ * when setting up the WQ for devcmd2.
455
+ */
456
+ vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
457
+ fetch_index, 0, 0);
458
+
459
+ vnic_wq_enable(&vdev->devcmd2->wq);
460
+
461
+ err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
462
+ DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
463
+ if (err)
464
+ goto err_disable_wq;
465
+
466
+ vdev->devcmd2->result =
467
+ (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
468
+ vdev->devcmd2->cmd_ring =
469
+ (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
470
+ vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
471
+ vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
472
+ VNIC_PADDR_TARGET;
473
+ vdev->args[1] = DEVCMD2_RING_SIZE;
474
+
475
+ err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
476
+ if (err)
477
+ goto err_free_desc_ring;
478
+
479
+ vdev->devcmd_rtn = &vnic_dev_cmd2;
480
+
481
+ return 0;
482
+
483
+err_free_desc_ring:
484
+ vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
485
+err_disable_wq:
486
+ vnic_wq_disable(&vdev->devcmd2->wq);
487
+err_free_wq:
488
+ vnic_wq_free(&vdev->devcmd2->wq);
489
+err_free_devcmd2:
490
+ kfree(vdev->devcmd2);
491
+ vdev->devcmd2 = NULL;
492
+
493
+ return err;
494
+}
495
+
496
+
497
+static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
498
+{
499
+ vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
500
+ vnic_wq_disable(&vdev->devcmd2->wq);
501
+ vnic_wq_free(&vdev->devcmd2->wq);
502
+ kfree(vdev->devcmd2);
503
+ vdev->devcmd2 = NULL;
504
+ vdev->devcmd_rtn = &vnic_dev_cmd1;
505
+}
506
+
507
+
508
+static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
509
+ enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
510
+{
511
+ int err;
512
+
513
+ vdev->args[0] = *a0;
514
+ vdev->args[1] = *a1;
515
+
516
+ err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
517
+
518
+ *a0 = vdev->args[0];
519
+ *a1 = vdev->args[1];
520
+
521
+ return err;
522
+}
523
+
524
+
525
+int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
526
+ u64 *a0, u64 *a1, int wait)
527
+{
528
+ memset(vdev->args, 0, sizeof(vdev->args));
529
+
530
+ switch (vdev->proxy) {
531
+ case PROXY_NONE:
532
+ default:
533
+ return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
534
+ }
535
+}
536
+
537
+
293538 int vnic_dev_fw_info(struct vnic_dev *vdev,
294539 struct vnic_devcmd_fw_info **fw_info)
295540 {
....@@ -298,9 +543,9 @@
298543 int err = 0;
299544
300545 if (!vdev->fw_info) {
301
- vdev->fw_info = pci_alloc_consistent(vdev->pdev,
546
+ vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
302547 sizeof(struct vnic_devcmd_fw_info),
303
- &vdev->fw_info_pa);
548
+ &vdev->fw_info_pa, GFP_KERNEL);
304549 if (!vdev->fw_info)
305550 return -ENOMEM;
306551
....@@ -361,8 +606,8 @@
361606 int wait = 1000;
362607
363608 if (!vdev->stats) {
364
- vdev->stats = pci_alloc_consistent(vdev->pdev,
365
- sizeof(struct vnic_stats), &vdev->stats_pa);
609
+ vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
610
+ sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
366611 if (!vdev->stats)
367612 return -ENOMEM;
368613 }
....@@ -523,9 +768,9 @@
523768 int wait = 1000;
524769
525770 if (!vdev->notify) {
526
- vdev->notify = pci_alloc_consistent(vdev->pdev,
771
+ vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
527772 sizeof(struct vnic_devcmd_notify),
528
- &vdev->notify_pa);
773
+ &vdev->notify_pa, GFP_KERNEL);
529774 if (!vdev->notify)
530775 return -ENOMEM;
531776 }
....@@ -647,23 +892,25 @@
647892 {
648893 if (vdev) {
649894 if (vdev->notify)
650
- pci_free_consistent(vdev->pdev,
895
+ dma_free_coherent(&vdev->pdev->dev,
651896 sizeof(struct vnic_devcmd_notify),
652897 vdev->notify,
653898 vdev->notify_pa);
654899 if (vdev->linkstatus)
655
- pci_free_consistent(vdev->pdev,
900
+ dma_free_coherent(&vdev->pdev->dev,
656901 sizeof(u32),
657902 vdev->linkstatus,
658903 vdev->linkstatus_pa);
659904 if (vdev->stats)
660
- pci_free_consistent(vdev->pdev,
905
+ dma_free_coherent(&vdev->pdev->dev,
661906 sizeof(struct vnic_stats),
662907 vdev->stats, vdev->stats_pa);
663908 if (vdev->fw_info)
664
- pci_free_consistent(vdev->pdev,
909
+ dma_free_coherent(&vdev->pdev->dev,
665910 sizeof(struct vnic_devcmd_fw_info),
666911 vdev->fw_info, vdev->fw_info_pa);
912
+ if (vdev->devcmd2)
913
+ vnic_dev_deinit_devcmd2(vdev);
667914 kfree(vdev);
668915 }
669916 }
....@@ -683,13 +930,26 @@
683930 if (vnic_dev_discover_res(vdev, bar))
684931 goto err_out;
685932
686
- vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
687
- if (!vdev->devcmd)
688
- goto err_out;
689
-
690933 return vdev;
691934
692935 err_out:
693936 vnic_dev_unregister(vdev);
694937 return NULL;
695938 }
939
+
940
+int vnic_dev_cmd_init(struct vnic_dev *vdev)
941
+{
942
+ int err;
943
+ void *p;
944
+
945
+ p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
946
+ if (p) {
947
+ pr_err("fnic: DEVCMD2 resource found!\n");
948
+ err = vnic_dev_init_devcmd2(vdev);
949
+ } else {
950
+ pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
951
+ err = vnic_dev_init_devcmd1(vdev);
952
+ }
953
+
954
+ return err;
955
+}