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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * Adaptec AAC series RAID controller driver |
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3 | 4 | * (c) Copyright 2001 Red Hat Inc. |
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.. | .. |
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9 | 10 | * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) |
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10 | 11 | * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) |
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11 | 12 | * |
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12 | | - * This program is free software; you can redistribute it and/or modify |
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13 | | - * it under the terms of the GNU General Public License as published by |
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14 | | - * the Free Software Foundation; either version 2, or (at your option) |
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15 | | - * any later version. |
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16 | | - * |
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17 | | - * This program is distributed in the hope that it will be useful, |
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18 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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19 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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20 | | - * GNU General Public License for more details. |
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21 | | - * |
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22 | | - * You should have received a copy of the GNU General Public License |
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23 | | - * along with this program; see the file COPYING. If not, write to |
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24 | | - * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
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25 | | - * |
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26 | 13 | * Module Name: |
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27 | 14 | * dpcsup.c |
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28 | 15 | * |
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29 | 16 | * Abstract: All DPC processing routines for the cyclone board occur here. |
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30 | | - * |
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31 | | - * |
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32 | 17 | */ |
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33 | 18 | |
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34 | 19 | #include <linux/kernel.h> |
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.. | .. |
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38 | 23 | #include <linux/slab.h> |
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39 | 24 | #include <linux/completion.h> |
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40 | 25 | #include <linux/blkdev.h> |
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41 | | -#include <linux/semaphore.h> |
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42 | 26 | |
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43 | 27 | #include "aacraid.h" |
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44 | 28 | |
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.. | .. |
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115 | 99 | } |
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116 | 100 | if (hwfib->header.XferState & cpu_to_le32(NoResponseExpected | Async)) |
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117 | 101 | { |
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118 | | - if (hwfib->header.XferState & cpu_to_le32(NoResponseExpected)) |
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| 102 | + if (hwfib->header.XferState & cpu_to_le32(NoResponseExpected)) { |
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119 | 103 | FIB_COUNTER_INCREMENT(aac_config.NoResponseRecved); |
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120 | | - else |
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| 104 | + } else { |
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121 | 105 | FIB_COUNTER_INCREMENT(aac_config.AsyncRecved); |
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| 106 | + } |
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122 | 107 | /* |
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123 | 108 | * NOTE: we cannot touch the fib after this |
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124 | 109 | * call, because it may have been deallocated. |
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.. | .. |
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129 | 114 | spin_lock_irqsave(&fib->event_lock, flagv); |
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130 | 115 | if (!fib->done) { |
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131 | 116 | fib->done = 1; |
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132 | | - up(&fib->event_wait); |
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| 117 | + complete(&fib->event_wait); |
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133 | 118 | } |
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134 | 119 | spin_unlock_irqrestore(&fib->event_lock, flagv); |
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135 | 120 | |
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.. | .. |
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245 | 230 | struct fib *fibctx; |
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246 | 231 | struct aac_dev *dev; |
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247 | 232 | struct aac_aifcmd *cmd; |
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248 | | - int status; |
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249 | 233 | |
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250 | 234 | fibctx = (struct fib *)context; |
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251 | 235 | BUG_ON(fibptr == NULL); |
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.. | .. |
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265 | 249 | cmd = (struct aac_aifcmd *) fib_data(fibctx); |
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266 | 250 | cmd->command = cpu_to_le32(AifReqEvent); |
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267 | 251 | |
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268 | | - status = aac_fib_send(AifRequest, |
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| 252 | + aac_fib_send(AifRequest, |
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269 | 253 | fibctx, |
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270 | 254 | sizeof(struct hw_fib)-sizeof(struct aac_fibhdr), |
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271 | 255 | FsaNormal, |
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.. | .. |
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274 | 258 | } |
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275 | 259 | |
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276 | 260 | |
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277 | | -/** |
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| 261 | +/* |
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278 | 262 | * aac_intr_normal - Handle command replies |
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279 | 263 | * @dev: Device |
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280 | 264 | * @index: completion reference |
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.. | .. |
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376 | 360 | start_callback = 1; |
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377 | 361 | } else { |
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378 | 362 | unsigned long flagv; |
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379 | | - int complete = 0; |
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| 363 | + int completed = 0; |
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380 | 364 | |
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381 | 365 | dprintk((KERN_INFO "event_wait up\n")); |
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382 | 366 | spin_lock_irqsave(&fib->event_lock, flagv); |
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383 | 367 | if (fib->done == 2) { |
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384 | 368 | fib->done = 1; |
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385 | | - complete = 1; |
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| 369 | + completed = 1; |
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386 | 370 | } else { |
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387 | 371 | fib->done = 1; |
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388 | | - up(&fib->event_wait); |
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| 372 | + complete(&fib->event_wait); |
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389 | 373 | } |
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390 | 374 | spin_unlock_irqrestore(&fib->event_lock, flagv); |
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391 | 375 | |
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.. | .. |
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395 | 379 | mflags); |
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396 | 380 | |
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397 | 381 | FIB_COUNTER_INCREMENT(aac_config.NativeRecved); |
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398 | | - if (complete) |
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| 382 | + if (completed) |
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399 | 383 | aac_fib_complete(fib); |
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400 | 384 | } |
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401 | 385 | } else { |
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.. | .. |
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419 | 403 | if (hwfib->header.XferState & |
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420 | 404 | cpu_to_le32(NoResponseExpected | Async)) { |
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421 | 405 | if (hwfib->header.XferState & cpu_to_le32( |
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422 | | - NoResponseExpected)) |
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| 406 | + NoResponseExpected)) { |
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423 | 407 | FIB_COUNTER_INCREMENT( |
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424 | 408 | aac_config.NoResponseRecved); |
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425 | | - else |
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| 409 | + } else { |
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426 | 410 | FIB_COUNTER_INCREMENT( |
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427 | 411 | aac_config.AsyncRecved); |
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| 412 | + } |
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428 | 413 | start_callback = 1; |
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429 | 414 | } else { |
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430 | 415 | unsigned long flagv; |
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431 | | - int complete = 0; |
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| 416 | + int completed = 0; |
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432 | 417 | |
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433 | 418 | dprintk((KERN_INFO "event_wait up\n")); |
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434 | 419 | spin_lock_irqsave(&fib->event_lock, flagv); |
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435 | 420 | if (fib->done == 2) { |
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436 | 421 | fib->done = 1; |
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437 | | - complete = 1; |
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| 422 | + completed = 1; |
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438 | 423 | } else { |
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439 | 424 | fib->done = 1; |
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440 | | - up(&fib->event_wait); |
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| 425 | + complete(&fib->event_wait); |
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441 | 426 | } |
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442 | 427 | spin_unlock_irqrestore(&fib->event_lock, flagv); |
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443 | 428 | |
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.. | .. |
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447 | 432 | mflags); |
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448 | 433 | |
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449 | 434 | FIB_COUNTER_INCREMENT(aac_config.NormalRecved); |
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450 | | - if (complete) |
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| 435 | + if (completed) |
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451 | 436 | aac_fib_complete(fib); |
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452 | 437 | } |
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453 | 438 | } |
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