hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/rtc/rtc-au1xxx.c
....@@ -34,7 +34,7 @@
3434
3535 t = alchemy_rdsys(AU1000_SYS_TOYREAD);
3636
37
- rtc_time_to_tm(t, tm);
37
+ rtc_time64_to_tm(t, tm);
3838
3939 return 0;
4040 }
....@@ -43,7 +43,7 @@
4343 {
4444 unsigned long t;
4545
46
- rtc_tm_to_time(tm, &t);
46
+ t = rtc_tm_to_time64(tm);
4747
4848 alchemy_wrsys(t, AU1000_SYS_TOYWRITE);
4949
....@@ -65,16 +65,12 @@
6565 {
6666 struct rtc_device *rtcdev;
6767 unsigned long t;
68
- int ret;
6968
7069 t = alchemy_rdsys(AU1000_SYS_CNTRCTRL);
7170 if (!(t & CNTR_OK)) {
7271 dev_err(&pdev->dev, "counters not working; aborting.\n");
73
- ret = -ENODEV;
74
- goto out_err;
72
+ return -ENODEV;
7573 }
76
-
77
- ret = -ETIMEDOUT;
7874
7975 /* set counter0 tickrate to 1Hz if necessary */
8076 if (alchemy_rdsys(AU1000_SYS_TOYTRIM) != 32767) {
....@@ -88,7 +84,7 @@
8884 * counters are unusable.
8985 */
9086 dev_err(&pdev->dev, "timeout waiting for access\n");
91
- goto out_err;
87
+ return -ETIMEDOUT;
9288 }
9389
9490 /* set 1Hz TOY tick rate */
....@@ -99,19 +95,16 @@
9995 while (alchemy_rdsys(AU1000_SYS_CNTRCTRL) & SYS_CNTRL_C0S)
10096 msleep(1);
10197
102
- rtcdev = devm_rtc_device_register(&pdev->dev, "rtc-au1xxx",
103
- &au1xtoy_rtc_ops, THIS_MODULE);
104
- if (IS_ERR(rtcdev)) {
105
- ret = PTR_ERR(rtcdev);
106
- goto out_err;
107
- }
98
+ rtcdev = devm_rtc_allocate_device(&pdev->dev);
99
+ if (IS_ERR(rtcdev))
100
+ return PTR_ERR(rtcdev);
101
+
102
+ rtcdev->ops = &au1xtoy_rtc_ops;
103
+ rtcdev->range_max = U32_MAX;
108104
109105 platform_set_drvdata(pdev, rtcdev);
110106
111
- return 0;
112
-
113
-out_err:
114
- return ret;
107
+ return rtc_register_device(rtcdev);
115108 }
116109
117110 static struct platform_driver au1xrtc_driver = {