hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/rk_nand/rk_zftl_arm32.S
....@@ -5,12 +5,11 @@
55 * it under the terms of the GNU General Public License as published by
66 * the Free Software Foundation; either version 2 of the License, or
77 * (at your option) any later version.
8
- * date: 2021-03-15
8
+ * date: 2021-07-26
99 * function: rk ftl v6 for rockchip soc base on arm v7 to support 3D/2D
1010 * TLC and MLC.
1111 */
1212 .arch armv7-a
13
- .fpu softvfp
1413 .eabi_attribute 20, 1
1514 .eabi_attribute 21, 1
1615 .eabi_attribute 23, 3
....@@ -19,73 +18,139 @@
1918 .eabi_attribute 26, 2
2019 .eabi_attribute 30, 4
2120 .eabi_attribute 34, 1
22
- .eabi_attribute 18, 4
23
- .file "rk_zftl_arm_v7.S"
24
-#APP
21
+ .file "rk_zftl_arm_v7.c"
2522 .syntax unified
26
- .global __aeabi_uidiv
2723 .text
2824 .align 2
25
+ .fpu softvfp
26
+ .type flash_mem_cmp8, %function
27
+flash_mem_cmp8:
28
+ .fnstart
29
+ @ args = 0, pretend = 0, frame = 0
30
+ @ frame_needed = 0, uses_anonymous_args = 0
31
+ mov r3, #0
32
+ cmp r3, r2
33
+ bne .L10
34
+ mov r0, #0
35
+ bx lr
36
+.L2:
37
+ cmp r3, r2
38
+ bne .L5
39
+ mov r0, #0
40
+ ldr pc, [sp], #4
41
+.L10:
42
+ str lr, [sp, #-4]!
43
+ .save {lr}
44
+.L5:
45
+ ldrb lr, [r0, r3] @ zero_extendqisi2
46
+ ldrb ip, [r1, r3] @ zero_extendqisi2
47
+ add r3, r3, #1
48
+ cmp lr, ip
49
+ beq .L2
50
+ mov r0, r3
51
+ ldr pc, [sp], #4
52
+ .fnend
53
+ .size flash_mem_cmp8, .-flash_mem_cmp8
54
+ .global __aeabi_uidiv
55
+ .global __aeabi_uidivmod
56
+ .align 2
57
+ .syntax unified
58
+ .arm
59
+ .fpu softvfp
2960 .type slc_phy_page_address_calc, %function
3061 slc_phy_page_address_calc:
3162 .fnstart
3263 @ args = 0, pretend = 0, frame = 0
3364 @ frame_needed = 0, uses_anonymous_args = 0
34
- stmfd sp!, {r4, r5, r6, lr}
35
- .save {r4, r5, r6, lr}
65
+ push {r4, r5, r6, r7, r8, lr}
66
+ .save {r4, r5, r6, r7, r8, lr}
3667 mov r4, r0
37
- ldr r6, .L14
38
- ldrb r3, [r6] @ zero_extendqisi2
68
+ ldr r5, .L22
69
+ ldrb r3, [r5] @ zero_extendqisi2
3970 cmp r3, #0
40
- beq .L2
41
- ldrb r3, [r6, #1] @ zero_extendqisi2
71
+ beq .L12
72
+ ldrb r3, [r5, #1] @ zero_extendqisi2
4273 cmp r3, #0
43
- beq .L3
44
-.L2:
45
- ldrh r5, [r6, #2]
74
+ beq .L13
75
+.L12:
76
+ ldrh r6, [r5, #2]
4677 mov r0, r4
47
- mov r1, r5
78
+ mov r1, r6
4879 bl __aeabi_uidiv
49
- ldrb r3, [r6, #1] @ zero_extendqisi2
50
- cmp r3, #0
51
- ldreq r3, .L14
52
- mul r0, r5, r0
53
- rsb r4, r0, r4
54
- mov r4, r4, asl #1
55
- addeq r4, r3, r4
56
- ldreqh r4, [r4, #4]
57
- add r4, r4, r0
58
-.L3:
80
+ mov r1, r6
81
+ mul r7, r6, r0
5982 mov r0, r4
60
- ldmfd sp!, {r4, r5, r6, pc}
61
-.L15:
83
+ bl __aeabi_uidivmod
84
+ ldrb r3, [r5, #1] @ zero_extendqisi2
85
+ lsl r1, r1, #1
86
+ cmp r3, #0
87
+ addeq r1, r5, r1
88
+ addne r4, r1, r7
89
+ ldrheq r4, [r1, #4]
90
+ addeq r4, r4, r7
91
+.L13:
92
+ mov r0, r4
93
+ pop {r4, r5, r6, r7, r8, pc}
94
+.L23:
6295 .align 2
63
-.L14:
96
+.L22:
6497 .word .LANCHOR0
6598 .fnend
6699 .size slc_phy_page_address_calc, .-slc_phy_page_address_calc
67100 .align 2
68101 .global zftl_nandc_get_irq_status
102
+ .syntax unified
103
+ .arm
104
+ .fpu softvfp
69105 .type zftl_nandc_get_irq_status, %function
70106 zftl_nandc_get_irq_status:
71107 .fnstart
72108 @ args = 0, pretend = 0, frame = 0
73109 @ frame_needed = 0, uses_anonymous_args = 0
74110 @ link register save eliminated.
75
- ldr r3, .L19
111
+ ldr r3, .L27
76112 ldrb r3, [r3, #1028] @ zero_extendqisi2
77113 cmp r3, #9
78114 ldreq r0, [r0, #296]
79115 ldrne r0, [r0, #372]
80116 bx lr
81
-.L20:
117
+.L28:
82118 .align 2
83
-.L19:
119
+.L27:
84120 .word .LANCHOR0
85121 .fnend
86122 .size zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
123
+ .section .text.unlikely,"ax",%progbits
124
+ .align 2
125
+ .syntax unified
126
+ .arm
127
+ .fpu softvfp
128
+ .type isxdigit, %function
129
+isxdigit:
130
+ .fnstart
131
+ @ args = 0, pretend = 0, frame = 0
132
+ @ frame_needed = 0, uses_anonymous_args = 0
133
+ @ link register save eliminated.
134
+ bic r3, r0, #32
135
+ sub r3, r3, #65
136
+ cmp r3, #25
137
+ bls .L31
138
+ sub r0, r0, #48
139
+ cmp r0, #9
140
+ movhi r0, #0
141
+ movls r0, #1
142
+ bx lr
143
+.L31:
144
+ mov r0, #1
145
+ bx lr
146
+ .fnend
147
+ .size isxdigit, .-isxdigit
148
+ .text
87149 .align 2
88150 .global zftl_get_density
151
+ .syntax unified
152
+ .arm
153
+ .fpu softvfp
89154 .type zftl_get_density, %function
90155 zftl_get_density:
91156 .fnstart
....@@ -93,63 +158,66 @@
93158 @ frame_needed = 0, uses_anonymous_args = 0
94159 @ link register save eliminated.
95160 cmp r0, #0
96
- bne .L22
97
- ldr r3, .L25
161
+ bne .L33
162
+ ldr r3, .L36
98163 ldr r0, [r3, #1032]
99164 bx lr
100
-.L22:
165
+.L33:
101166 cmp r0, #4
102167 movcc r0, #8192
103168 movcs r0, #0
104169 bx lr
105
-.L26:
170
+.L37:
106171 .align 2
107
-.L25:
172
+.L36:
108173 .word .LANCHOR0
109174 .fnend
110175 .size zftl_get_density, .-zftl_get_density
111176 .align 2
177
+ .syntax unified
178
+ .arm
179
+ .fpu softvfp
112180 .type _list_remove_node, %function
113181 _list_remove_node:
114182 .fnstart
115183 @ args = 0, pretend = 0, frame = 0
116184 @ frame_needed = 0, uses_anonymous_args = 0
117
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
118
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
185
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
186
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
119187 mov r5, #6
188
+ ldr r6, .L47
120189 mul r5, r5, r1
121
- ldr r6, .L36
122
- mov r7, r0
123190 movw r3, #65535
124191 ldr r8, [r6, #1036]
192
+ ldrh ip, [r8, r5]
125193 add r4, r8, r5
126
- ldrh r0, [r8, r5]
127194 ldrh r1, [r4, #2]
128
- cmp r0, r3
129
- ldr r3, [r7]
130
- bne .L28
131
- cmp r1, r0
132
- bne .L28
195
+ cmp ip, r3
196
+ ldr r3, [r0]
197
+ bne .L39
198
+ cmp r1, ip
199
+ bne .L39
133200 cmp r4, r3
134
- ldmnefd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
135
-.L28:
201
+ popne {r4, r5, r6, r7, r8, r9, r10, pc}
202
+.L39:
136203 mov r9, r2
137204 movw r2, #65535
138205 cmp r1, r2
139
- bne .L30
206
+ mov r7, r0
207
+ bne .L41
140208 cmp r4, r3
141
- beq .L30
142
- ldr r1, .L36+4
209
+ beq .L41
143210 mov r2, #202
144
- ldr r0, .L36+8
211
+ ldr r1, .L47+4
212
+ ldr r0, .L47+8
145213 bl printk
146214 bl dump_stack
147
-.L30:
215
+.L41:
148216 ldr r3, [r7]
149217 movw r2, #65535
150218 cmp r4, r3
151219 ldrh r3, [r8, r5]
152
- bne .L31
220
+ bne .L42
153221 cmp r3, r2
154222 ldrne r2, [r6, #1036]
155223 movne r1, #6
....@@ -158,20 +226,27 @@
158226 mlane r3, r1, r3, r2
159227 mvnne r2, #0
160228 strne r3, [r7]
161
- strneh r2, [r3, #2] @ movhi
162
- b .L33
163
-.L31:
229
+ strhne r2, [r3, #2] @ movhi
230
+.L44:
231
+ mvn r3, #0
232
+ strh r3, [r8, r5] @ movhi
233
+ strh r3, [r4, #2] @ movhi
234
+ ldrh r3, [r9]
235
+ sub r3, r3, #1
236
+ strh r3, [r9] @ movhi
237
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
238
+.L42:
164239 cmp r3, r2
165240 ldrh r1, [r4, #2]
166
- bne .L34
241
+ bne .L45
167242 cmp r1, r3
168243 movne r3, #6
169244 ldrne r2, [r6, #1036]
170245 mulne r1, r3, r1
171246 mvnne r3, #0
172
- strneh r3, [r2, r1] @ movhi
173
- b .L33
174
-.L34:
247
+ strhne r3, [r2, r1] @ movhi
248
+ b .L44
249
+.L45:
175250 ldr r0, [r6, #1036]
176251 mov r2, #6
177252 mla r3, r2, r3, r0
....@@ -181,65 +256,142 @@
181256 ldr r3, [r6, #1036]
182257 mul r2, r2, r0
183258 strh r1, [r3, r2] @ movhi
184
-.L33:
185
- mvn r3, #0
186
- strh r3, [r8, r5] @ movhi
187
- strh r3, [r4, #2] @ movhi
188
- ldrh r3, [r9]
189
- sub r3, r3, #1
190
- strh r3, [r9] @ movhi
191
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
192
-.L37:
259
+ b .L44
260
+.L48:
193261 .align 2
194
-.L36:
262
+.L47:
195263 .word .LANCHOR0
196264 .word .LANCHOR1
197265 .word .LC0
198266 .fnend
199267 .size _list_remove_node, .-_list_remove_node
200268 .align 2
269
+ .syntax unified
270
+ .arm
271
+ .fpu softvfp
272
+ .type ndelay, %function
273
+ndelay:
274
+ .fnstart
275
+ @ args = 0, pretend = 0, frame = 0
276
+ @ frame_needed = 0, uses_anonymous_args = 0
277
+ @ link register save eliminated.
278
+ ldr r3, .L50
279
+ add r0, r0, #996
280
+ add r0, r0, #3
281
+ umull r0, r1, r0, r3
282
+ ldr r3, .L50+4
283
+ ldr r3, [r3, #8]
284
+ lsr r0, r1, #6
285
+ bx r3 @ indirect register sibling call
286
+.L51:
287
+ .align 2
288
+.L50:
289
+ .word 274877907
290
+ .word arm_delay_ops
291
+ .fnend
292
+ .size ndelay, .-ndelay
293
+ .align 2
294
+ .syntax unified
295
+ .arm
296
+ .fpu softvfp
297
+ .type hynix_set_rr_para, %function
298
+hynix_set_rr_para:
299
+ .fnstart
300
+ @ args = 0, pretend = 0, frame = 0
301
+ @ frame_needed = 0, uses_anonymous_args = 0
302
+ ldr r2, .L58
303
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
304
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
305
+ lsl r9, r0, #8
306
+ ldr r3, [r2, #1040]
307
+ ldr r6, [r2, #1044]
308
+ ldrb ip, [r3, #113] @ zero_extendqisi2
309
+ add r4, r3, #112
310
+ ldrb r2, [r3, #112] @ zero_extendqisi2
311
+ add r5, r6, r9
312
+ add r7, r3, #128
313
+ add r8, r3, #127
314
+ mul r1, r1, ip
315
+ cmp r2, #8
316
+ movne r2, #160
317
+ add r1, r1, #32
318
+ smlabbne r1, r2, r0, r1
319
+ mov r2, #54
320
+ str r2, [r5, #2056]
321
+ sub r2, ip, #1
322
+ add r4, r4, r1
323
+ add r7, r7, r2
324
+ sub r4, r4, #1
325
+.L55:
326
+ cmp r8, r7
327
+ bne .L56
328
+ add r6, r6, r9
329
+ mov r3, #22
330
+ str r3, [r6, #2056]
331
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
332
+.L56:
333
+ ldrb r3, [r8, #1]! @ zero_extendqisi2
334
+ mov r0, #120
335
+ str r3, [r5, #2052]
336
+ bl ndelay
337
+ ldrsb r3, [r4, #1]!
338
+ str r3, [r5, #2048]
339
+ b .L55
340
+.L59:
341
+ .align 2
342
+.L58:
343
+ .word .LANCHOR0
344
+ .fnend
345
+ .size hynix_set_rr_para, .-hynix_set_rr_para
346
+ .align 2
347
+ .syntax unified
348
+ .arm
349
+ .fpu softvfp
201350 .type zftl_debug_proc_open, %function
202351 zftl_debug_proc_open:
203352 .fnstart
204353 @ args = 0, pretend = 0, frame = 0
205354 @ frame_needed = 0, uses_anonymous_args = 0
206
- stmfd sp!, {r4, lr}
355
+ push {r4, lr}
207356 .save {r4, lr}
208357 mov r4, r1
209358 bl PDE_DATA
210
- ldr r1, .L40
211359 mov r2, r0
212360 mov r0, r4
213
- ldmfd sp!, {r4, lr}
361
+ ldr r1, .L62
362
+ pop {r4, lr}
214363 b single_open
215
-.L41:
364
+.L63:
216365 .align 2
217
-.L40:
366
+.L62:
218367 .word zftl_debug_proc_show
219368 .fnend
220369 .size zftl_debug_proc_open, .-zftl_debug_proc_open
221370 .align 2
371
+ .syntax unified
372
+ .arm
373
+ .fpu softvfp
222374 .type zftl_debug_proc_show, %function
223375 zftl_debug_proc_show:
224376 .fnstart
225377 @ args = 0, pretend = 0, frame = 0
226378 @ frame_needed = 0, uses_anonymous_args = 0
227
- stmfd sp!, {r4, lr}
379
+ push {r4, lr}
228380 .save {r4, lr}
229381 mov r4, r0
230
- ldr r1, .L44
231
- ldr r2, .L44+4
382
+ ldr r2, .L66
383
+ ldr r1, .L66+4
232384 bl seq_printf
233
- ldr r3, .L44+8
385
+ ldr r3, .L66+8
234386 mov r0, r4
235
- ldr r1, .L44+12
387
+ ldr r1, .L66+12
236388 ldr r2, [r3]
237389 bl seq_printf
238390 mov r0, #0
239
- ldmfd sp!, {r4, pc}
240
-.L45:
391
+ pop {r4, pc}
392
+.L67:
241393 .align 2
242
-.L44:
394
+.L66:
243395 .word .LC1
244396 .word .LC2
245397 .word .LANCHOR2
....@@ -248,66 +400,110 @@
248400 .size zftl_debug_proc_show, .-zftl_debug_proc_show
249401 .align 2
250402 .global zftl_flash_suspend
403
+ .syntax unified
404
+ .arm
405
+ .fpu softvfp
251406 .type zftl_flash_suspend, %function
252407 zftl_flash_suspend:
253408 .fnstart
254409 @ args = 0, pretend = 0, frame = 0
255410 @ frame_needed = 0, uses_anonymous_args = 0
256411 @ link register save eliminated.
257
- ldr r3, .L50
412
+ ldr r3, .L72
258413 ldrb r2, [r3, #1028] @ zero_extendqisi2
259414 cmp r2, #9
260
- ldr r2, [r3, #1040]
415
+ ldr r2, [r3, #1044]
261416 ldr r1, [r2]
262
- str r1, [r3, #1044]
263
- ldr r1, [r2, #4]
264417 str r1, [r3, #1048]
265
- bne .L47
266
- ldr r1, [r2, #16]
418
+ ldr r1, [r2, #4]
267419 str r1, [r3, #1052]
268
- ldr r1, [r2, #32]
420
+ bne .L69
421
+ ldr r1, [r2, #16]
269422 str r1, [r3, #1056]
270
- ldr r1, [r2, #80]
423
+ ldr r1, [r2, #32]
271424 str r1, [r3, #1060]
272
- ldr r1, [r2, #84]
425
+ ldr r1, [r2, #80]
273426 str r1, [r3, #1064]
427
+ ldr r1, [r2, #84]
428
+ str r1, [r3, #1068]
274429 ldr r1, [r2, #520]
275430 ldr r2, [r2, #8]
276
- str r1, [r3, #1068]
277
- b .L49
278
-.L47:
431
+ str r1, [r3, #1072]
432
+.L71:
433
+ str r2, [r3, #1076]
434
+ bx lr
435
+.L69:
279436 ldr r1, [r2, #8]
280
- str r1, [r3, #1052]
281
- ldr r1, [r2, #12]
282437 str r1, [r3, #1056]
283
- ldr r1, [r2, #304]
438
+ ldr r1, [r2, #12]
284439 str r1, [r3, #1060]
285
- ldr r1, [r2, #308]
440
+ ldr r1, [r2, #304]
286441 str r1, [r3, #1064]
442
+ ldr r1, [r2, #308]
443
+ str r1, [r3, #1068]
287444 ldr r1, [r2, #336]
288445 ldr r2, [r2, #344]
289
- str r1, [r3, #1068]
290
-.L49:
291
- str r2, [r3, #1072]
292
- bx lr
293
-.L51:
446
+ str r1, [r3, #1072]
447
+ b .L71
448
+.L73:
294449 .align 2
295
-.L50:
450
+.L72:
296451 .word .LANCHOR0
297452 .fnend
298453 .size zftl_flash_suspend, .-zftl_flash_suspend
299454 .align 2
455
+ .syntax unified
456
+ .arm
457
+ .fpu softvfp
458
+ .type nandc_irq_disable, %function
459
+nandc_irq_disable:
460
+ .fnstart
461
+ @ args = 0, pretend = 0, frame = 0
462
+ @ frame_needed = 0, uses_anonymous_args = 0
463
+ @ link register save eliminated.
464
+ ldr r3, .L77
465
+ ldrb r3, [r3, #1028] @ zero_extendqisi2
466
+ cmp r3, #9
467
+ mov r3, #1
468
+ bne .L75
469
+ ldr r2, [r0, #292]
470
+ lsl r1, r3, r1
471
+ orr r3, r2, r1
472
+ str r3, [r0, #292]
473
+ ldr r3, [r0, #288]
474
+ bic r1, r3, r1
475
+ str r1, [r0, #288]
476
+ bx lr
477
+.L75:
478
+ ldr r2, [r0, #368]
479
+ lsl r1, r3, r1
480
+ orr r3, r2, r1
481
+ str r3, [r0, #368]
482
+ ldr r3, [r0, #364]
483
+ bic r1, r3, r1
484
+ str r1, [r0, #364]
485
+ bx lr
486
+.L78:
487
+ .align 2
488
+.L77:
489
+ .word .LANCHOR0
490
+ .fnend
491
+ .size nandc_irq_disable, .-nandc_irq_disable
492
+ .align 2
493
+ .syntax unified
494
+ .arm
495
+ .fpu softvfp
300496 .type _insert_free_list, %function
301497 _insert_free_list:
302498 .fnstart
303499 @ args = 0, pretend = 0, frame = 8
304500 @ frame_needed = 0, uses_anonymous_args = 0
305
- ldr r3, .L62
306
- movw ip, #1076
501
+ ldr r3, .L91
502
+ movw ip, #1080
307503 ldrh ip, [r3, ip]
308504 cmp ip, r1
309505 bxls lr
310
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
506
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
311507 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
312508 .pad #12
313509 mov r4, r3
....@@ -315,681 +511,825 @@
315511 add ip, ip, #1
316512 strh ip, [r2] @ movhi
317513 mov ip, #6
318
- ldr r7, [r3, #1036]
319514 mul r6, ip, r1
515
+ ldr r7, [r3, #1036]
320516 mvn r3, #0
321517 add lr, r7, r6
322518 strh r3, [lr, #2] @ movhi
323519 strh r3, [r7, r6] @ movhi
324520 ldr r3, [r0]
325521 cmp r3, #0
326
- beq .L61
327
- ldr r5, [r4, #1080]
328
- movw r8, #1084
329
- ldrh r10, [r4, r8]
330
- mov r2, r1, asl #2
522
+ bne .L81
523
+.L90:
524
+ str lr, [r0]
525
+ b .L79
526
+.L81:
527
+ ldr r5, [r4, #1084]
528
+ add r2, r4, #1088
529
+ ldrh r10, [r2]
530
+ lsl r8, r1, #2
331531 ldr r9, [r4, #1036]
332532 movw fp, #65535
333
- ldr r8, [r5, r1, asl #2]
334
- ldrh r2, [r5, r2]
335
- ubfx r8, r8, #11, #8
533
+ ldr r2, [r5, r1, lsl #2]
534
+ ldrh r8, [r5, r8]
336535 str ip, [sp, #4]
337
- ubfx r2, r2, #0, #11
338
- smulbb r8, r8, r10
339
- add r2, r8, r2
340
- rsb r8, r9, r3
536
+ ubfx r2, r2, #11, #8
537
+ smulbb r2, r2, r10
538
+ ubfx r8, r8, #0, #11
539
+ add r2, r2, r8
341540 uxth r2, r2
342541 str r2, [sp]
343
- ldr r2, .L62+4
344
- mov r8, r8, asr #1
542
+ sub r2, r3, r9
543
+ asr r8, r2, #1
544
+ ldr r2, .L91+4
345545 mul r2, r2, r8
346546 uxth r2, r2
347
-.L57:
348
- ldr ip, [r5, r2, asl #2]
349
- mov r8, r2, asl #2
350
- ubfx ip, ip, #11, #8
547
+.L84:
548
+ ldr ip, [r5, r2, lsl #2]
549
+ lsl r8, r2, #2
351550 ldrh r8, [r5, r8]
551
+ ubfx ip, ip, #11, #8
352552 smulbb ip, ip, r10
353553 ubfx r8, r8, #0, #11
354
- add r8, ip, r8
355
- ldr ip, [sp]
356
- uxth r8, r8
554
+ add ip, ip, r8
555
+ ldr r8, [sp]
556
+ uxth ip, ip
357557 cmp r8, ip
358
- bcs .L55
558
+ bls .L82
359559 ldrh ip, [r3]
360560 cmp ip, fp
361
- streqh r2, [lr, #2] @ movhi
362
- streqh r1, [r3] @ movhi
363
- beq .L52
364
-.L56:
561
+ bne .L83
562
+ strh r2, [lr, #2] @ movhi
563
+ strh r1, [r3] @ movhi
564
+.L79:
565
+ add sp, sp, #12
566
+ @ sp needed
567
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
568
+.L83:
365569 ldr r3, [sp, #4]
366570 mov r2, ip
367571 mla r3, r3, ip, r9
368
- b .L57
369
-.L55:
572
+ b .L84
573
+.L82:
370574 ldrh ip, [r3, #2]
371575 strh ip, [lr, #2] @ movhi
372576 strh r2, [r7, r6] @ movhi
373577 ldr r2, [r0]
374578 cmp r3, r2
375
- bne .L58
376
- strh r1, [r3, #2] @ movhi
377
-.L61:
378
- str lr, [r0]
379
- b .L52
380
-.L58:
579
+ strheq r1, [r3, #2] @ movhi
580
+ beq .L90
581
+.L85:
381582 ldrh ip, [r3, #2]
382583 mov r2, #6
383584 ldr r0, [r4, #1036]
384585 mul r2, r2, ip
385586 strh r1, [r0, r2] @ movhi
386587 strh r1, [r3, #2] @ movhi
387
-.L52:
388
- add sp, sp, #12
389
- @ sp needed
390
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
391
-.L63:
588
+ b .L79
589
+.L92:
392590 .align 2
393
-.L62:
591
+.L91:
394592 .word .LANCHOR0
395593 .word -1431655765
396594 .fnend
397595 .size _insert_free_list, .-_insert_free_list
398596 .align 2
597
+ .syntax unified
598
+ .arm
599
+ .fpu softvfp
399600 .type _insert_data_list, %function
400601 _insert_data_list:
401602 .fnstart
402603 @ args = 0, pretend = 0, frame = 24
403604 @ frame_needed = 0, uses_anonymous_args = 0
404
- ldr ip, .L85
405
- movw r3, #1076
406
- ldrh r3, [ip, r3]
407
- cmp r3, r1
605
+ ldr r3, .L116
606
+ movw ip, #1080
607
+ ldrh ip, [r3, ip]
608
+ cmp ip, r1
408609 bxls lr
409
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
610
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
410611 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
411612 mov r5, #6
412
- ldrh r3, [r2]
613
+ ldrh ip, [r2]
614
+ mul r5, r5, r1
615
+ mov r4, r3
413616 .pad #28
414617 sub sp, sp, #28
415
- mul r5, r5, r1
416
- add r3, r3, #1
417
- strh r3, [r2] @ movhi
618
+ add ip, ip, #1
619
+ strh ip, [r2] @ movhi
620
+ ldr r10, [r3, #1036]
418621 mvn r3, #0
419
- ldr r10, [ip, #1036]
420622 add lr, r10, r5
421623 strh r3, [lr, #2] @ movhi
422624 strh r3, [r10, r5] @ movhi
423625 ldr r3, [r0]
424626 cmp r3, #0
425
- beq .L84
426
- ldr r2, [ip, #1088]
427
- movw r8, #1084
428
- ldr r9, [ip, #1080]
429
- ldrh ip, [ip, r8]
627
+ bne .L96
628
+.L115:
629
+ str lr, [r0]
630
+ b .L93
631
+.L96:
632
+ ldr r2, [r4, #1092]
633
+ add r8, r4, #1088
634
+ ldr r9, [r4, #1084]
635
+ ldrh r8, [r8]
430636 str r2, [sp, #4]
431
- mov r2, r1, asl #1
432
- ldr r6, [sp, #4]
433
- ldrh r4, [lr, #4]
434
- str ip, [sp, #8]
435
- ldrh r7, [r6, r2]
436
- muls ip, r4, r7
437
- ldr r6, [r9, r1, asl #2]
438
- mov r2, r1, asl #2
439
- ldrneh r7, [sp, #8]
440
- ubfx r6, r6, #11, #8
637
+ lsl r2, r1, #1
638
+ ldr ip, [sp, #4]
639
+ ldrh r6, [lr, #4]
640
+ ldr r7, [r9, r1, lsl #2]
641
+ ldrh ip, [ip, r2]
642
+ muls ip, r6, ip
643
+ str r8, [sp, #8]
644
+ lsl r2, r1, #2
645
+ ldrhne r8, [sp, #8]
646
+ ubfx r7, r7, #11, #8
441647 ldrh r2, [r9, r2]
442
- smulbbne r6, r6, r7
648
+ smulbbne r7, r7, r8
443649 ubfx r2, r2, #0, #11
444
- addne r2, r2, r6
650
+ addne r2, r2, r7
445651 uxtahne ip, ip, r2
446
- cmp r4, #0
447
- ldr r4, .L85
448
- mvneq ip, #0
449652 ldr r2, [r4, #1036]
450
- rsb r6, r2, r3
653
+ cmp r6, #0
654
+ mvneq ip, #0
451655 str r2, [sp, #12]
452
- ldr r2, .L85+4
453
- mov r6, r6, asr #1
656
+ sub r2, r3, r2
657
+ asr r6, r2, #1
658
+ ldr r2, .L116+4
454659 mul r2, r2, r6
455
- movw r6, #1076
660
+ movw r6, #1080
456661 ldrh r4, [r4, r6]
457662 mov r6, #0
458
- str r4, [sp, #16]
459663 uxth r2, r2
460
-.L74:
664
+ str r4, [sp, #16]
665
+.L103:
666
+ sub r4, r1, r2
667
+ ldr r7, [sp, #16]
461668 add r6, r6, #1
462
- ldr r4, [sp, #16]
669
+ clz r4, r4
463670 uxth r6, r6
464
- cmp r6, r4
465
- movls r4, #0
466
- movhi r4, #1
467
- cmp r1, r2
468
- orreq r4, r4, #1
671
+ lsr r4, r4, #5
672
+ cmp r6, r7
673
+ orrhi r4, r4, #1
469674 cmp r4, #0
470
- bne .L64
675
+ bne .L93
471676 ldr r7, [sp, #4]
472
- mov r4, r2, asl #1
473
- ldr r8, [r9, r2, asl #2]
677
+ lsl r4, r2, #1
474678 ldrh fp, [r3, #4]
679
+ ldr r8, [r9, r2, lsl #2]
475680 ldrh r4, [r7, r4]
476
- mov r7, r2, asl #2
681
+ lsl r7, r2, #2
477682 muls r4, fp, r4
478
- ubfx r8, r8, #11, #8
479683 ldrh r7, [r9, r7]
684
+ ubfx r8, r8, #11, #8
480685 ubfx r7, r7, #0, #11
481686 str r7, [sp, #20]
482
- ldrneh r7, [sp, #8]
687
+ ldrhne r7, [sp, #8]
483688 smulbbne r8, r8, r7
484689 ldrne r7, [sp, #20]
485
- addne r8, r7, r8
486
- uxtahne r4, r4, r8
690
+ addne r7, r7, r8
691
+ uxtahne r4, r4, r7
487692 cmp fp, #0
488
- cmpne r4, ip
489
- bcs .L72
693
+ cmpne ip, r4
694
+ bls .L101
490695 ldrh r4, [r3]
491696 movw r7, #65535
492697 cmp r4, r7
493
- streqh r2, [lr, #2] @ movhi
494
- streqh r1, [r3] @ movhi
495
- beq .L64
496
-.L73:
698
+ bne .L102
699
+ strh r2, [lr, #2] @ movhi
700
+ strh r1, [r3] @ movhi
701
+.L93:
702
+ add sp, sp, #28
703
+ @ sp needed
704
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
705
+.L102:
497706 ldr r2, [sp, #12]
498707 mov r3, #6
499708 mla r3, r3, r4, r2
500709 mov r2, r4
501
- b .L74
502
-.L72:
710
+ b .L103
711
+.L101:
503712 ldrh ip, [r3, #2]
504713 strh ip, [lr, #2] @ movhi
505714 strh r2, [r10, r5] @ movhi
506715 ldr r2, [r0]
507716 cmp r3, r2
508
- bne .L75
509
- strh r1, [r3, #2] @ movhi
510
-.L84:
511
- str lr, [r0]
512
- b .L64
513
-.L75:
514
- ldr r2, .L85
717
+ strheq r1, [r3, #2] @ movhi
718
+ beq .L115
719
+.L104:
515720 ldrh ip, [r3, #2]
721
+ ldr r2, .L116
516722 ldr r0, [r2, #1036]
517723 mov r2, #6
518724 mul r2, r2, ip
519725 strh r1, [r0, r2] @ movhi
520726 strh r1, [r3, #2] @ movhi
521
-.L64:
522
- add sp, sp, #28
523
- @ sp needed
524
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
525
-.L86:
727
+ b .L93
728
+.L117:
526729 .align 2
527
-.L85:
730
+.L116:
528731 .word .LANCHOR0
529732 .word -1431655765
530733 .fnend
531734 .size _insert_data_list, .-_insert_data_list
532735 .align 2
736
+ .syntax unified
737
+ .arm
738
+ .fpu softvfp
533739 .type _list_update_data_list, %function
534740 _list_update_data_list:
535741 .fnstart
536742 @ args = 0, pretend = 0, frame = 0
537743 @ frame_needed = 0, uses_anonymous_args = 0
538
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
744
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
539745 .save {r4, r5, r6, r7, r8, r9, r10, lr}
540
- mov r4, r1
541
- ldr r1, .L98
542
- mov r6, r0
543
- ldr r3, [r1, #1092]
544
- ldrh r0, [r3, #16]
545
- cmp r0, r4
546
- ldmeqfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
547
- mov r5, r1
548
- ldrh r1, [r3, #48]
549
- cmp r1, r4
550
- ldmeqfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
746
+ ldr r5, .L129
747
+ ldr r3, [r5, #1096]
748
+ ldrh ip, [r3, #16]
749
+ cmp ip, r1
750
+ popeq {r4, r5, r6, r7, r8, r9, r10, pc}
751
+ ldrh ip, [r3, #48]
752
+ cmp ip, r1
753
+ popeq {r4, r5, r6, r7, r8, r9, r10, pc}
551754 ldrh r3, [r3, #80]
552
- cmp r3, r4
553
- ldmeqfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
755
+ cmp r3, r1
756
+ popeq {r4, r5, r6, r7, r8, r9, r10, pc}
554757 mov r8, #6
555758 ldr r10, [r5, #1036]
556
- mul r8, r8, r4
557
- ldr r3, [r6]
759
+ mul r8, r8, r1
760
+ ldr r3, [r0]
558761 add r9, r10, r8
559762 cmp r9, r3
560
- ldmeqfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
763
+ popeq {r4, r5, r6, r7, r8, r9, r10, pc}
561764 ldrh r3, [r9, #2]
562765 mov r7, r2
563766 movw r2, #65535
767
+ mov r4, r1
768
+ mov r6, r0
564769 cmp r3, r2
565
- bne .L91
770
+ bne .L122
566771 ldrh r2, [r10, r8]
567772 cmp r2, r3
568
- bne .L91
569
- ldr r1, .L98+4
773
+ bne .L122
570774 movw r2, #273
571
- ldr r0, .L98+8
775
+ ldr r1, .L129+4
776
+ ldr r0, .L129+8
572777 bl printk
573778 bl dump_stack
574
-.L91:
575
- ldrh r2, [r9, #2]
576
- movw r3, #65535
577
- cmp r2, r3
578
- bne .L92
579
- ldrh r3, [r10, r8]
779
+.L122:
780
+ ldrh r3, [r9, #2]
781
+ movw r2, #65535
580782 cmp r3, r2
581
- ldmeqfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
582
-.L92:
583
- ldr r0, [r5, #1088]
584
- mov r3, r4, asl #1
585
- ldrh r1, [r0, r3]
586
- ldrh r3, [r9, #4]
587
- cmp r3, #0
588
- mulne r1, r3, r1
589
- mov r3, #6
590
- mul r2, r3, r2
591
- ldr r3, .L98+12
783
+ bne .L123
784
+ ldrh r2, [r10, r8]
785
+ cmp r2, r3
786
+ popeq {r4, r5, r6, r7, r8, r9, r10, pc}
787
+.L123:
788
+ ldr r0, [r5, #1092]
789
+ lsl r2, r4, #1
790
+ ldrh r1, [r9, #4]
791
+ ldrh r2, [r0, r2]
792
+ cmp r1, #0
592793 mvneq r1, #0
593
- mov ip, r2, asr #1
794
+ mulne r1, r1, r2
795
+ mov r2, #6
796
+ mul r2, r2, r3
797
+ ldr r3, .L129+12
798
+ asr ip, r2, #1
594799 mul r3, r3, ip
595
- mov r3, r3, asl #1
596
- ldrh r0, [r0, r3]
597
- ldr r3, [r5, #1036]
598
- add r2, r3, r2
800
+ lsl r3, r3, #1
801
+ ldrh ip, [r0, r3]
802
+ ldr r0, [r5, #1036]
803
+ add r2, r0, r2
599804 ldrh r3, [r2, #4]
600805 cmp r3, #0
601
- mulne r3, r3, r0
806
+ mulne r3, r3, ip
602807 mvneq r3, #0
603808 cmp r1, r3
604
- ldmcsfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
605
- mov r0, r6
606
- mov r1, r4
809
+ popcs {r4, r5, r6, r7, r8, r9, r10, pc}
607810 mov r2, r7
811
+ mov r1, r4
812
+ mov r0, r6
608813 bl _list_remove_node
609
- mov r0, r6
610
- mov r1, r4
611814 mov r2, r7
612
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
815
+ mov r1, r4
816
+ mov r0, r6
817
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
613818 b _insert_data_list
614
-.L99:
819
+.L130:
615820 .align 2
616
-.L98:
821
+.L129:
617822 .word .LANCHOR0
618
- .word .LANCHOR1+20
823
+ .word .LANCHOR1+18
619824 .word .LC0
620825 .word -1431655765
621826 .fnend
622827 .size _list_update_data_list, .-_list_update_data_list
623
- .section .text.unlikely,"ax",%progbits
828
+ .section .text.unlikely
624829 .align 2
625
- .type rk_simple_strtoull.constprop.34, %function
626
-rk_simple_strtoull.constprop.34:
830
+ .syntax unified
831
+ .arm
832
+ .fpu softvfp
833
+ .type rk_simple_strtoull.constprop.33, %function
834
+rk_simple_strtoull.constprop.33:
627835 .fnstart
628836 @ args = 0, pretend = 0, frame = 0
629837 @ frame_needed = 0, uses_anonymous_args = 0
630
- stmfd sp!, {r4, lr}
631
- .save {r4, lr}
838
+ push {r4, r5, r6, r7, r8, lr}
839
+ .save {r4, r5, r6, r7, r8, lr}
840
+ mov r4, r0
632841 ldrb r3, [r0] @ zero_extendqisi2
633842 cmp r3, #48
634843 movne r2, r0
635
- movne lr, #10
636
- bne .L101
844
+ movne r5, #10
845
+ bne .L132
637846 ldrb r3, [r0, #1] @ zero_extendqisi2
638847 add r2, r0, #1
639848 orr r3, r3, #32
640849 cmp r3, #120
641
- bne .L112
642
- ldrb r3, [r0, #2] @ zero_extendqisi2
643
- bic ip, r3, #32
644
- sub ip, ip, #65
645
- cmp ip, #25
646
- bls .L102
647
- sub r3, r3, #48
648
- cmp r3, #9
649
- bls .L102
650
-.L112:
651
- mov lr, #8
652
-.L101:
653
- mov r0, #0
654
-.L103:
655
- mov r4, r2
656
- ldrb ip, [r2], #1 @ zero_extendqisi2
657
- bic r3, ip, #32
658
- sub r3, r3, #65
659
- cmp r3, #25
660
- sub r3, ip, #48
661
- bls .L104
662
- cmp r3, #9
663
- bls .L104
664
-.L108:
850
+ bne .L144
851
+ ldrb r0, [r0, #2] @ zero_extendqisi2
852
+ bl isxdigit
853
+ cmp r0, #0
854
+ addne r2, r4, #2
855
+ movne r5, #16
856
+ bne .L132
857
+.L144:
858
+ mov r5, #8
859
+.L132:
860
+ mov r6, #0
861
+.L133:
862
+ mov r7, r2
863
+ ldrb r4, [r2], #1 @ zero_extendqisi2
864
+ mov r0, r4
865
+ bl isxdigit
866
+ cmp r0, #0
867
+ bne .L134
868
+.L140:
665869 cmp r1, #0
666
- bne .L105
667
- ldmfd sp!, {r4, pc}
668
-.L105:
669
- str r4, [r1]
670
- ldmfd sp!, {r4, pc}
671
-.L102:
672
- add r2, r0, #2
673
- mov lr, #16
674
- b .L101
675
-.L104:
676
- cmp r3, #9
677
- orrhi ip, ip, #32
678
- subhi r3, ip, #87
679
- cmp r3, lr
680
- bcs .L108
681
- mla r0, lr, r0, r3
682
- b .L103
870
+ mov r0, r6
871
+ strne r7, [r1]
872
+ pop {r4, r5, r6, r7, r8, pc}
873
+.L134:
874
+ sub r0, r4, #48
875
+ cmp r0, #9
876
+ orrhi r0, r4, #32
877
+ subhi r0, r0, #87
878
+ cmp r0, r5
879
+ bcs .L140
880
+ mla r6, r5, r6, r0
881
+ b .L133
683882 .fnend
684
- .size rk_simple_strtoull.constprop.34, .-rk_simple_strtoull.constprop.34
883
+ .size rk_simple_strtoull.constprop.33, .-rk_simple_strtoull.constprop.33
685884 .text
686885 .align 2
886
+ .syntax unified
887
+ .arm
888
+ .fpu softvfp
889
+ .type nandc_de_cs.constprop.35, %function
890
+nandc_de_cs.constprop.35:
891
+ .fnstart
892
+ @ args = 0, pretend = 0, frame = 0
893
+ @ frame_needed = 0, uses_anonymous_args = 0
894
+ @ link register save eliminated.
895
+ ldr r3, .L148
896
+ ldr r2, [r3, #1044]
897
+ ldr r3, [r2]
898
+ bfc r3, #0, #8
899
+ bfc r3, #17, #1
900
+ str r3, [r2]
901
+ bx lr
902
+.L149:
903
+ .align 2
904
+.L148:
905
+ .word .LANCHOR0
906
+ .fnend
907
+ .size nandc_de_cs.constprop.35, .-nandc_de_cs.constprop.35
908
+ .align 2
909
+ .global flash_read_status
910
+ .syntax unified
911
+ .arm
912
+ .fpu softvfp
913
+ .type flash_read_status, %function
914
+flash_read_status:
915
+ .fnstart
916
+ @ args = 0, pretend = 0, frame = 0
917
+ @ frame_needed = 0, uses_anonymous_args = 0
918
+ mov r3, #112
919
+ push {r4, lr}
920
+ .save {r4, lr}
921
+ mov r4, r0
922
+ str r3, [r0, #8]
923
+ mov r0, #120
924
+ bl ndelay
925
+ ldr r0, [r4]
926
+ uxtb r0, r0
927
+ pop {r4, pc}
928
+ .fnend
929
+ .size flash_read_status, .-flash_read_status
930
+ .align 2
931
+ .global toshiba_set_rr_para
932
+ .syntax unified
933
+ .arm
934
+ .fpu softvfp
935
+ .type toshiba_set_rr_para, %function
936
+toshiba_set_rr_para:
937
+ .fnstart
938
+ @ args = 0, pretend = 0, frame = 0
939
+ @ frame_needed = 0, uses_anonymous_args = 0
940
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
941
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
942
+ add r8, r1, r1, lsl #2
943
+ ldr r9, .L161
944
+ mov r5, r0
945
+ mov r6, r1
946
+ mov r4, #0
947
+ ldr r7, .L161+4
948
+ add r10, r9, #41
949
+.L153:
950
+ ldrb r3, [r7, #1101] @ zero_extendqisi2
951
+ cmp r4, r3
952
+ bcc .L157
953
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
954
+.L157:
955
+ mov r3, #85
956
+ mov r0, #200
957
+ str r3, [r5, #8]
958
+ ldrsb r3, [r4, r10]
959
+ str r3, [r5, #4]
960
+ bl ndelay
961
+ ldrb r3, [r7, #1100] @ zero_extendqisi2
962
+ cmp r3, #34
963
+ addeq r3, r4, r8
964
+ addeq r3, r10, r3
965
+ beq .L160
966
+ cmp r3, #35
967
+ addne r3, r9, r6
968
+ ldrsbne r3, [r3, #181]
969
+ bne .L159
970
+ ldr r2, .L161+8
971
+ add r3, r4, r8
972
+ add r3, r2, r3
973
+.L160:
974
+ ldrsb r3, [r3, #5]
975
+.L159:
976
+ str r3, [r5]
977
+ add r4, r4, #1
978
+ b .L153
979
+.L162:
980
+ .align 2
981
+.L161:
982
+ .word .LANCHOR1
983
+ .word .LANCHOR0
984
+ .word .LANCHOR1+86
985
+ .fnend
986
+ .size toshiba_set_rr_para, .-toshiba_set_rr_para
987
+ .align 2
988
+ .global hynix_reconfig_rr_para
989
+ .syntax unified
990
+ .arm
991
+ .fpu softvfp
992
+ .type hynix_reconfig_rr_para, %function
993
+hynix_reconfig_rr_para:
994
+ .fnstart
995
+ @ args = 0, pretend = 0, frame = 0
996
+ @ frame_needed = 0, uses_anonymous_args = 0
997
+ push {r4, r5, r6, lr}
998
+ .save {r4, r5, r6, lr}
999
+ ldr r5, .L169
1000
+ ldrb r2, [r5, #1100] @ zero_extendqisi2
1001
+ sub r2, r2, #1
1002
+ cmp r2, #7
1003
+ pophi {r4, r5, r6, pc}
1004
+ ldr r2, [r5, #1040]
1005
+ mov r4, r0
1006
+ add r2, r2, r0
1007
+ ldrb r2, [r2, #120] @ zero_extendqisi2
1008
+ cmp r2, #0
1009
+ popeq {r4, r5, r6, pc}
1010
+ mov r1, #0
1011
+ bl hynix_set_rr_para
1012
+ ldr r3, [r5, #1040]
1013
+ mov r2, #0
1014
+ add r3, r3, r4
1015
+ strb r2, [r3, #120]
1016
+ pop {r4, r5, r6, pc}
1017
+.L170:
1018
+ .align 2
1019
+.L169:
1020
+ .word .LANCHOR0
1021
+ .fnend
1022
+ .size hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
1023
+ .align 2
6871024 .global nand_flash_print_info
1025
+ .syntax unified
1026
+ .arm
1027
+ .fpu softvfp
6881028 .type nand_flash_print_info, %function
6891029 nand_flash_print_info:
6901030 .fnstart
6911031 @ args = 0, pretend = 0, frame = 0
6921032 @ frame_needed = 0, uses_anonymous_args = 0
693
- stmfd sp!, {r0, r1, r2, r3, r4, lr}
1033
+ push {r0, r1, r2, r3, r4, lr}
6941034 .save {r4, lr}
6951035 .pad #16
696
- ldr r4, .L234
1036
+ ldr r4, .L290
6971037 ldr r3, [r4]
6981038 tst r3, #4096
699
- beq .L116
700
- ldr r0, .L234+4
701
- ldr r1, .L234+8
1039
+ beq .L172
1040
+ ldr r1, .L290+4
1041
+ ldr r0, .L290+8
7021042 bl printk
703
-.L116:
1043
+.L172:
7041044 ldr r3, [r4]
7051045 tst r3, #4096
706
- beq .L117
707
- ldr r3, .L234+12
708
- ldr r0, [r3, #1096]
709
- ldrb ip, [r0, #4] @ zero_extendqisi2
710
- ldrb r1, [r0, #1] @ zero_extendqisi2
711
- ldrb r2, [r0, #2] @ zero_extendqisi2
1046
+ beq .L173
1047
+ ldr r3, .L290+12
1048
+ ldr r0, [r3, #1104]
1049
+ ldrb ip, [r0, #6] @ zero_extendqisi2
7121050 ldrb r3, [r0, #3] @ zero_extendqisi2
713
- str ip, [sp]
1051
+ ldrb r2, [r0, #2] @ zero_extendqisi2
1052
+ ldrb r1, [r0, #1] @ zero_extendqisi2
1053
+ str ip, [sp, #8]
7141054 ldrb ip, [r0, #5] @ zero_extendqisi2
7151055 str ip, [sp, #4]
716
- ldrb r0, [r0, #6] @ zero_extendqisi2
717
- str r0, [sp, #8]
718
- ldr r0, .L234+16
1056
+ ldrb r0, [r0, #4] @ zero_extendqisi2
1057
+ str r0, [sp]
1058
+ ldr r0, .L290+16
7191059 bl printk
720
-.L117:
1060
+.L173:
7211061 ldr r3, [r4]
7221062 tst r3, #4096
723
- beq .L118
724
- ldr r3, .L234+12
725
- ldr r0, .L234+20
726
- ldr r3, [r3, #1096]
1063
+ beq .L174
1064
+ ldr r3, .L290+12
1065
+ ldr r0, .L290+20
1066
+ ldr r3, [r3, #1104]
7271067 ldrb r1, [r3, #8] @ zero_extendqisi2
7281068 bl printk
729
-.L118:
1069
+.L174:
7301070 ldr r3, [r4]
7311071 tst r3, #4096
732
- beq .L119
733
- ldr r3, .L234+12
734
- ldr r0, .L234+24
735
- ldr r3, [r3, #1096]
1072
+ beq .L175
1073
+ ldr r3, .L290+12
1074
+ ldr r0, .L290+24
1075
+ ldr r3, [r3, #1104]
7361076 ldrb r1, [r3, #9] @ zero_extendqisi2
7371077 bl printk
738
-.L119:
1078
+.L175:
7391079 ldr r3, [r4]
7401080 tst r3, #4096
741
- beq .L120
742
- ldr r3, .L234+12
743
- ldr r0, .L234+28
744
- ldr r3, [r3, #1096]
1081
+ beq .L176
1082
+ ldr r3, .L290+12
1083
+ ldr r0, .L290+28
1084
+ ldr r3, [r3, #1104]
7451085 ldrh r1, [r3, #10]
7461086 bl printk
747
-.L120:
1087
+.L176:
7481088 ldr r3, [r4]
7491089 tst r3, #4096
750
- beq .L121
751
- ldr r3, .L234+12
752
- ldr r0, .L234+32
753
- ldr r3, [r3, #1096]
1090
+ beq .L177
1091
+ ldr r3, .L290+12
1092
+ ldr r0, .L290+32
1093
+ ldr r3, [r3, #1104]
7541094 ldrb r1, [r3, #12] @ zero_extendqisi2
7551095 bl printk
756
-.L121:
1096
+.L177:
7571097 ldr r3, [r4]
7581098 tst r3, #4096
759
- beq .L122
760
- ldr r3, .L234+12
761
- ldr r0, .L234+36
762
- ldr r3, [r3, #1096]
1099
+ beq .L178
1100
+ ldr r3, .L290+12
1101
+ ldr r0, .L290+36
1102
+ ldr r3, [r3, #1104]
7631103 ldrb r1, [r3, #13] @ zero_extendqisi2
7641104 bl printk
765
-.L122:
1105
+.L178:
7661106 ldr r3, [r4]
7671107 tst r3, #4096
768
- beq .L123
769
- ldr r3, .L234+12
770
- ldr r0, .L234+40
771
- ldr r3, [r3, #1096]
1108
+ beq .L179
1109
+ ldr r3, .L290+12
1110
+ ldr r0, .L290+40
1111
+ ldr r3, [r3, #1104]
7721112 ldrh r1, [r3, #14]
7731113 bl printk
774
-.L123:
1114
+.L179:
7751115 ldr r3, [r4]
7761116 tst r3, #4096
777
- beq .L124
778
- ldr r3, .L234+12
779
- ldr r0, .L234+44
780
- ldr r3, [r3, #1096]
1117
+ beq .L180
1118
+ ldr r3, .L290+12
1119
+ ldr r0, .L290+44
1120
+ ldr r3, [r3, #1104]
7811121 ldrb r1, [r3, #23] @ zero_extendqisi2
7821122 bl printk
783
-.L124:
1123
+.L180:
7841124 ldr r3, [r4]
7851125 tst r3, #4096
786
- beq .L125
787
- ldr r3, .L234+12
788
- ldr r0, .L234+48
789
- ldr r3, [r3, #1096]
1126
+ beq .L181
1127
+ ldr r3, .L290+12
1128
+ ldr r0, .L290+48
1129
+ ldr r3, [r3, #1104]
7901130 ldrb r1, [r3, #18] @ zero_extendqisi2
7911131 bl printk
792
-.L125:
1132
+.L181:
7931133 ldr r3, [r4]
7941134 tst r3, #4096
795
- beq .L126
796
- ldr r3, .L234+12
797
- ldr r0, .L234+52
798
- ldr r3, [r3, #1096]
1135
+ beq .L182
1136
+ ldr r3, .L290+12
1137
+ ldr r0, .L290+52
1138
+ ldr r3, [r3, #1104]
7991139 ldrb r1, [r3, #19] @ zero_extendqisi2
8001140 bl printk
801
-.L126:
1141
+.L182:
8021142 ldr r3, [r4]
8031143 tst r3, #4096
804
- beq .L127
805
- ldr r3, .L234+12
806
- ldr r0, .L234+56
807
- ldr r3, [r3, #1096]
1144
+ beq .L183
1145
+ ldr r3, .L290+12
1146
+ ldr r0, .L290+56
1147
+ ldr r3, [r3, #1104]
8081148 ldrb r1, [r3, #20] @ zero_extendqisi2
8091149 bl printk
810
-.L127:
1150
+.L183:
8111151 ldr r3, [r4]
8121152 tst r3, #4096
813
- beq .L128
814
- ldr r3, .L234+12
815
- ldr r0, .L234+60
816
- ldrb r1, [r3, #1100] @ zero_extendqisi2
1153
+ beq .L184
1154
+ ldr r3, .L290+12
1155
+ ldr r0, .L290+60
1156
+ ldrb r1, [r3, #1108] @ zero_extendqisi2
8171157 bl printk
818
-.L128:
1158
+.L184:
8191159 ldr r3, [r4]
8201160 tst r3, #4096
821
- beq .L129
822
- ldr r3, .L234+12
823
- ldr r0, .L234+64
824
- ldr r3, [r3, #1096]
1161
+ beq .L185
1162
+ ldr r3, .L290+12
1163
+ ldr r0, .L290+64
1164
+ ldr r3, [r3, #1104]
8251165 ldrb r1, [r3, #22] @ zero_extendqisi2
8261166 bl printk
827
-.L129:
1167
+.L185:
8281168 ldr r3, [r4]
8291169 tst r3, #4096
830
- beq .L130
831
- ldr r3, .L234+12
832
- ldr r0, .L234+68
833
- ldrb r1, [r3, #1101] @ zero_extendqisi2
1170
+ beq .L186
1171
+ ldr r3, .L290+12
1172
+ ldr r0, .L290+68
1173
+ ldrb r1, [r3, #1109] @ zero_extendqisi2
8341174 bl printk
835
-.L130:
1175
+.L186:
8361176 ldr r3, [r4]
8371177 tst r3, #4096
838
- beq .L131
839
- ldr r3, .L234+12
840
- ldr r0, .L234+72
841
- ldr r3, [r3, #1096]
1178
+ beq .L187
1179
+ ldr r3, .L290+12
1180
+ ldr r0, .L290+72
1181
+ ldr r3, [r3, #1104]
8421182 ldrh r1, [r3, #16]
8431183 and r1, r1, #1
8441184 bl printk
845
-.L131:
1185
+.L187:
8461186 ldr r3, [r4]
8471187 tst r3, #4096
848
- beq .L132
849
- ldr r3, .L234+12
850
- ldr r0, .L234+76
851
- ldr r3, [r3, #1096]
1188
+ beq .L188
1189
+ ldr r3, .L290+12
1190
+ ldr r0, .L290+76
1191
+ ldr r3, [r3, #1104]
8521192 ldrh r1, [r3, #16]
8531193 ubfx r1, r1, #1, #1
8541194 bl printk
855
-.L132:
1195
+.L188:
8561196 ldr r3, [r4]
8571197 tst r3, #4096
858
- beq .L133
859
- ldr r3, .L234+12
860
- ldr r0, .L234+80
861
- ldr r3, [r3, #1096]
1198
+ beq .L189
1199
+ ldr r3, .L290+12
1200
+ ldr r0, .L290+80
1201
+ ldr r3, [r3, #1104]
8621202 ldrh r1, [r3, #16]
8631203 ubfx r1, r1, #2, #1
8641204 bl printk
865
-.L133:
1205
+.L189:
8661206 ldr r3, [r4]
8671207 tst r3, #4096
868
- beq .L134
869
- ldr r3, .L234+12
870
- ldr r0, .L234+84
871
- ldr r3, [r3, #1096]
1208
+ beq .L190
1209
+ ldr r3, .L290+12
1210
+ ldr r0, .L290+84
1211
+ ldr r3, [r3, #1104]
8721212 ldrh r1, [r3, #16]
8731213 ubfx r1, r1, #3, #1
8741214 bl printk
875
-.L134:
1215
+.L190:
8761216 ldr r3, [r4]
8771217 tst r3, #4096
878
- beq .L135
879
- ldr r3, .L234+12
880
- ldr r0, .L234+88
881
- ldr r3, [r3, #1096]
1218
+ beq .L191
1219
+ ldr r3, .L290+12
1220
+ ldr r0, .L290+88
1221
+ ldr r3, [r3, #1104]
8821222 ldrh r1, [r3, #16]
8831223 ubfx r1, r1, #4, #1
8841224 bl printk
885
-.L135:
1225
+.L191:
8861226 ldr r3, [r4]
8871227 tst r3, #4096
888
- beq .L136
889
- ldr r3, .L234+12
890
- ldr r0, .L234+92
891
- ldr r3, [r3, #1096]
1228
+ beq .L192
1229
+ ldr r3, .L290+12
1230
+ ldr r0, .L290+92
1231
+ ldr r3, [r3, #1104]
8921232 ldrh r1, [r3, #16]
8931233 ubfx r1, r1, #5, #1
8941234 bl printk
895
-.L136:
1235
+.L192:
8961236 ldr r3, [r4]
8971237 tst r3, #4096
898
- beq .L137
899
- ldr r3, .L234+12
900
- ldr r0, .L234+96
901
- ldr r3, [r3, #1096]
1238
+ beq .L193
1239
+ ldr r3, .L290+12
1240
+ ldr r0, .L290+96
1241
+ ldr r3, [r3, #1104]
9021242 ldrh r1, [r3, #16]
9031243 ubfx r1, r1, #6, #1
9041244 bl printk
905
-.L137:
1245
+.L193:
9061246 ldr r3, [r4]
9071247 tst r3, #4096
908
- beq .L138
909
- ldr r3, .L234+12
910
- ldr r0, .L234+100
911
- ldr r3, [r3, #1096]
1248
+ beq .L194
1249
+ ldr r3, .L290+12
1250
+ ldr r0, .L290+100
1251
+ ldr r3, [r3, #1104]
9121252 ldrh r1, [r3, #16]
9131253 ubfx r1, r1, #7, #1
9141254 bl printk
915
-.L138:
1255
+.L194:
9161256 ldr r3, [r4]
9171257 tst r3, #4096
918
- beq .L139
919
- ldr r3, .L234+12
920
- ldr r0, .L234+104
921
- ldr r3, [r3, #1096]
1258
+ beq .L195
1259
+ ldr r3, .L290+12
1260
+ ldr r0, .L290+104
1261
+ ldr r3, [r3, #1104]
9221262 ldrh r1, [r3, #16]
9231263 ubfx r1, r1, #8, #1
9241264 bl printk
925
-.L139:
1265
+.L195:
9261266 ldr r3, [r4]
9271267 tst r3, #4096
928
- beq .L140
929
- ldr r3, .L234+12
930
- ldr r0, .L234+108
931
- ldr r3, [r3, #1096]
1268
+ beq .L196
1269
+ ldr r3, .L290+12
1270
+ ldr r0, .L290+108
1271
+ ldr r3, [r3, #1104]
9321272 ldrh r1, [r3, #16]
9331273 ubfx r1, r1, #9, #1
9341274 bl printk
935
-.L140:
1275
+.L196:
9361276 ldr r3, [r4]
9371277 tst r3, #4096
938
- beq .L141
939
- ldr r3, .L234+12
940
- ldr r0, .L234+112
941
- ldr r3, [r3, #1096]
1278
+ beq .L197
1279
+ ldr r3, .L290+12
1280
+ ldr r0, .L290+112
1281
+ ldr r3, [r3, #1104]
9421282 ldrh r1, [r3, #16]
9431283 ubfx r1, r1, #10, #1
9441284 bl printk
945
-.L141:
1285
+.L197:
9461286 ldr r3, [r4]
9471287 tst r3, #4096
948
- beq .L142
949
- ldr r3, .L234+12
950
- ldr r0, .L234+116
1288
+ beq .L198
1289
+ ldr r3, .L290+12
1290
+ ldr r0, .L290+116
1291
+ ldrb r2, [r3, #1110] @ zero_extendqisi2
9511292 ldrb r1, [r3] @ zero_extendqisi2
952
- ldrb r2, [r3, #1102] @ zero_extendqisi2
9531293 bl printk
954
-.L142:
1294
+.L198:
9551295 ldr r3, [r4]
9561296 tst r3, #4096
957
- beq .L143
958
- ldr r3, .L234+12
959
- ldr r0, .L234+120
960
- ldrb r1, [r3, #1113] @ zero_extendqisi2
961
- ldrb r2, [r3, #1114] @ zero_extendqisi2
1297
+ beq .L199
1298
+ ldr r3, .L290+12
1299
+ ldr r0, .L290+120
1300
+ ldrb r2, [r3, #1122] @ zero_extendqisi2
1301
+ ldrb r1, [r3, #1121] @ zero_extendqisi2
9621302 bl printk
963
-.L143:
1303
+.L199:
9641304 ldr r3, [r4]
9651305 tst r3, #4096
966
- beq .L144
967
- ldr r3, .L234+12
968
- ldr r0, .L234+124
969
- ldrb r1, [r3, #1111] @ zero_extendqisi2
970
- ldrb r2, [r3, #1112] @ zero_extendqisi2
1306
+ beq .L200
1307
+ ldr r3, .L290+12
1308
+ ldr r0, .L290+124
1309
+ ldrb r2, [r3, #1120] @ zero_extendqisi2
1310
+ ldrb r1, [r3, #1119] @ zero_extendqisi2
9711311 bl printk
972
-.L144:
1312
+.L200:
9731313 ldr r3, [r4]
9741314 tst r3, #4096
975
- beq .L115
976
- ldr r3, .L234+12
977
- ldr r0, .L234+128
978
- ldrb r1, [r3, #1135] @ zero_extendqisi2
1315
+ beq .L171
1316
+ ldr r3, .L290+12
1317
+ ldr r0, .L290+128
1318
+ ldrb r1, [r3, #1143] @ zero_extendqisi2
9791319 add sp, sp, #16
9801320 @ sp needed
981
- ldmfd sp!, {r4, lr}
1321
+ pop {r4, lr}
9821322 b printk
983
-.L115:
1323
+.L171:
9841324 add sp, sp, #16
9851325 @ sp needed
986
- ldmfd sp!, {r4, pc}
987
-.L235:
1326
+ pop {r4, pc}
1327
+.L291:
9881328 .align 2
989
-.L234:
1329
+.L290:
9901330 .word .LANCHOR2
1331
+ .word .LANCHOR1+189
9911332 .word .LC4
992
- .word .LANCHOR1+44
9931333 .word .LANCHOR0
9941334 .word .LC5
9951335 .word .LC6
....@@ -1023,400 +1363,98 @@
10231363 .fnend
10241364 .size nand_flash_print_info, .-nand_flash_print_info
10251365 .align 2
1026
- .global nandc_init
1027
- .type nandc_init, %function
1028
-nandc_init:
1029
- .fnstart
1030
- @ args = 0, pretend = 0, frame = 8
1031
- @ frame_needed = 0, uses_anonymous_args = 0
1032
- stmfd sp!, {r4, r5, r6, r7, lr}
1033
- .save {r4, r5, r6, r7, lr}
1034
- .pad #20
1035
- sub sp, sp, #20
1036
- ldr r5, .L256
1037
- mov r3, #0
1038
- str r3, [sp, #12]
1039
- mov r7, r0
1040
- ldr r3, [r5]
1041
- tst r3, #4096
1042
- beq .L237
1043
- ldr r0, .L256+4
1044
- mov r2, r7
1045
- ldr r1, .L256+8
1046
- bl printk
1047
-.L237:
1048
- ldr r4, .L256+12
1049
- mov r3, #6
1050
- ldr r2, [r7, #352]
1051
- ldr r6, .L256+12
1052
- strb r3, [r4, #1028]
1053
- ldr r3, .L256+16
1054
- str r7, [r4, #1040]
1055
- cmp r2, r3
1056
- ldr r2, [r7, #128]
1057
- moveq r3, #8
1058
- streqb r3, [r4, #1028]
1059
- ldr r3, .L256+20
1060
- cmp r2, r3
1061
- ldr r2, .L256+24
1062
- moveq r3, #9
1063
- streqb r3, [r4, #1028]
1064
- ldrb r3, [r4, #1028] @ zero_extendqisi2
1065
- cmp r3, #9
1066
- bne .L240
1067
- mov r3, #1
1068
- strb r3, [r6, #1136]
1069
- ldr r3, [sp, #12]
1070
- orr r3, r3, #256
1071
- str r3, [sp, #12]
1072
- ldr r3, [sp, #12]
1073
- bic r3, r3, #1835008
1074
- orr r3, r3, #524288
1075
- str r3, [sp, #12]
1076
- ldr r3, [sp, #12]
1077
- str r3, [r7]
1078
- mov r3, #0
1079
- ldr r0, [r6, #1040]
1080
- str r3, [r0, #520]
1081
- movw r3, #4161
1082
- str r3, [r0, #4]
1083
- movw r3, #8321
1084
- str r3, [r0, #8]
1085
- mov r3, #38
1086
- str r2, [r0, #80]
1087
- str r3, [r0, #84]
1088
- mov r3, #39
1089
- str r3, [r0, #84]
1090
- ldr r3, [r5]
1091
- tst r3, #4096
1092
- beq .L242
1093
- ldr r1, [r0]
1094
- ldr r2, [r0, #8]
1095
- ldr r3, [r0, #80]
1096
- ldr ip, [r0, #84]
1097
- ldr r0, [r0, #88]
1098
- b .L255
1099
-.L240:
1100
- ldr r3, [sp, #12]
1101
- mov r1, #0
1102
- strb r1, [r6, #1136]
1103
- mov r0, #2048
1104
- orr r3, r3, #256
1105
- str r3, [sp, #12]
1106
- ldr r3, [sp, #12]
1107
- bic r3, r3, #117440512
1108
- orr r3, r3, #16777216
1109
- str r3, [sp, #12]
1110
- ldr r3, [sp, #12]
1111
- str r3, [r7]
1112
- ldr r3, [r6, #1040]
1113
- str r1, [r3, #336]
1114
- movw r1, #4193
1115
- str r1, [r3, #4]
1116
- movw r1, #8321
1117
- str r1, [r3, #344]
1118
- str r2, [r3, #304]
1119
- mov r2, #38
1120
- str r2, [r3, #308]
1121
- mov r2, #39
1122
- str r2, [r3, #308]
1123
- bl ftl_malloc
1124
- ldr r3, [r5]
1125
- tst r3, #4096
1126
- str r0, [r6, #1140]
1127
- beq .L242
1128
- ldr r0, [r6, #1040]
1129
- ldr r1, [r0]
1130
- ldr r2, [r0, #344]
1131
- ldr r3, [r0, #304]
1132
- ldr ip, [r0, #308]
1133
- ldr r0, [r0, #312]
1134
-.L255:
1135
- str r0, [sp, #4]
1136
- str ip, [sp]
1137
- ldr r0, .L256+28
1138
- bl printk
1139
-.L242:
1140
- movw r2, #1170
1141
- mov r3, #1
1142
- strb r3, [r4, #1168]
1143
- mov r3, #0
1144
- strh r3, [r4, r2] @ movhi
1145
- strb r3, [r4, #1172]
1146
- ldr r3, [r5]
1147
- tst r3, #4096
1148
- beq .L236
1149
- ldr r3, .L256+12
1150
- ldr r0, .L256+32
1151
- ldrb r1, [r3, #1028] @ zero_extendqisi2
1152
- bl printk
1153
-.L236:
1154
- add sp, sp, #20
1155
- @ sp needed
1156
- ldmfd sp!, {r4, r5, r6, r7, pc}
1157
-.L257:
1158
- .align 2
1159
-.L256:
1160
- .word .LANCHOR2
1161
- .word .LC34
1162
- .word .LANCHOR1+68
1163
- .word .LANCHOR0
1164
- .word 1446522928
1165
- .word 1446588464
1166
- .word 1052675
1167
- .word .LC35
1168
- .word .LC36
1169
- .fnend
1170
- .size nandc_init, .-nandc_init
1171
- .align 2
11721366 .global timer_delay_ns
1367
+ .syntax unified
1368
+ .arm
1369
+ .fpu softvfp
11731370 .type timer_delay_ns, %function
11741371 timer_delay_ns:
11751372 .fnstart
11761373 @ args = 0, pretend = 0, frame = 0
11771374 @ frame_needed = 0, uses_anonymous_args = 0
11781375 @ link register save eliminated.
1179
- ldr r3, .L259
1180
- add r0, r0, #996
1181
- add r0, r0, #3
1182
- umull r0, r1, r0, r3
1183
- ldr r3, .L259+4
1184
- ldr r3, [r3, #8]
1185
- mov r0, r1, lsr #6
1186
- bx r3 @ indirect register sibling call
1187
-.L260:
1188
- .align 2
1189
-.L259:
1190
- .word 274877907
1191
- .word arm_delay_ops
1376
+ b ndelay
11921377 .fnend
11931378 .size timer_delay_ns, .-timer_delay_ns
11941379 .align 2
1195
- .global flash_read_status
1196
- .type flash_read_status, %function
1197
-flash_read_status:
1198
- .fnstart
1199
- @ args = 0, pretend = 0, frame = 0
1200
- @ frame_needed = 0, uses_anonymous_args = 0
1201
- stmfd sp!, {r4, lr}
1202
- .save {r4, lr}
1203
- mov r3, #112
1204
- mov r4, r0
1205
- str r3, [r0, #8]
1206
- mov r0, #120
1207
- bl timer_delay_ns
1208
- ldr r0, [r4]
1209
- uxtb r0, r0
1210
- ldmfd sp!, {r4, pc}
1211
- .fnend
1212
- .size flash_read_status, .-flash_read_status
1213
- .align 2
1214
- .global toshiba_set_rr_para
1215
- .type toshiba_set_rr_para, %function
1216
-toshiba_set_rr_para:
1217
- .fnstart
1218
- @ args = 0, pretend = 0, frame = 0
1219
- @ frame_needed = 0, uses_anonymous_args = 0
1220
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
1221
- .save {r4, r5, r6, r7, r8, r9, r10, lr}
1222
- add r8, r1, r1, asl #2
1223
- ldr r9, .L273
1224
- mov r5, r0
1225
- ldr r7, .L273+4
1226
- mov r6, r1
1227
- add r10, r9, #80
1228
- mov r4, #0
1229
-.L264:
1230
- ldrb r3, [r7, #1174] @ zero_extendqisi2
1231
- cmp r4, r3
1232
- bcs .L272
1233
- mov r3, #85
1234
- str r3, [r5, #8]
1235
- ldrsb r3, [r4, r10]
1236
- mov r0, #200
1237
- str r3, [r5, #4]
1238
- bl timer_delay_ns
1239
- ldrb r3, [r7, #1173] @ zero_extendqisi2
1240
- cmp r3, #34
1241
- addeq r3, r4, r8
1242
- addeq r3, r10, r3
1243
- beq .L271
1244
- cmp r3, #35
1245
- addne r3, r9, r6
1246
- ldrnesb r3, [r3, #224]
1247
- bne .L270
1248
- ldr r3, .L273+8
1249
- add r2, r4, r8
1250
- add r3, r3, r2
1251
-.L271:
1252
- ldrsb r3, [r3, #5]
1253
-.L270:
1254
- str r3, [r5]
1255
- add r4, r4, #1
1256
- b .L264
1257
-.L272:
1258
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
1259
-.L274:
1260
- .align 2
1261
-.L273:
1262
- .word .LANCHOR1
1263
- .word .LANCHOR0
1264
- .word .LANCHOR1+128
1265
- .fnend
1266
- .size toshiba_set_rr_para, .-toshiba_set_rr_para
1267
- .align 2
1268
- .type hynix_set_rr_para, %function
1269
-hynix_set_rr_para:
1270
- .fnstart
1271
- @ args = 0, pretend = 0, frame = 0
1272
- @ frame_needed = 0, uses_anonymous_args = 0
1273
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
1274
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
1275
- mov r5, r0, asl #8
1276
- ldr r3, .L282
1277
- ldr r4, [r3, #1176]
1278
- ldr r7, [r3, #1040]
1279
- add lr, r4, #128
1280
- add r9, r4, #127
1281
- mov r3, r4
1282
- ldrb ip, [r4, #113] @ zero_extendqisi2
1283
- ldrb r2, [r3, #112]! @ zero_extendqisi2
1284
- add r6, r7, r5
1285
- cmp r2, #8
1286
- mul r1, r1, ip
1287
- movne r2, #160
1288
- mlane r1, r2, r0, r1
1289
- sub ip, ip, #1
1290
- add r8, lr, ip
1291
- mov r2, #54
1292
- str r2, [r6, #2056]
1293
- add r1, r1, #32
1294
- add r3, r3, r1
1295
- sub r4, r3, #1
1296
-.L278:
1297
- cmp r9, r8
1298
- beq .L281
1299
- ldrb r3, [r9, #1]! @ zero_extendqisi2
1300
- mov r0, #120
1301
- str r3, [r6, #2052]
1302
- bl timer_delay_ns
1303
- ldrsb r3, [r4, #1]!
1304
- str r3, [r6, #2048]
1305
- b .L278
1306
-.L281:
1307
- add r5, r7, r5
1308
- mov r3, #22
1309
- str r3, [r5, #2056]
1310
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
1311
-.L283:
1312
- .align 2
1313
-.L282:
1314
- .word .LANCHOR0
1315
- .fnend
1316
- .size hynix_set_rr_para, .-hynix_set_rr_para
1317
- .align 2
1318
- .global hynix_reconfig_rr_para
1319
- .type hynix_reconfig_rr_para, %function
1320
-hynix_reconfig_rr_para:
1321
- .fnstart
1322
- @ args = 0, pretend = 0, frame = 0
1323
- @ frame_needed = 0, uses_anonymous_args = 0
1324
- stmfd sp!, {r3, r4, r5, lr}
1325
- .save {r3, r4, r5, lr}
1326
- ldr r5, .L290
1327
- ldrb r2, [r5, #1173] @ zero_extendqisi2
1328
- sub r2, r2, #1
1329
- cmp r2, #7
1330
- ldmhifd sp!, {r3, r4, r5, pc}
1331
- ldr r2, [r5, #1176]
1332
- add r2, r2, r0
1333
- ldrb r2, [r2, #120] @ zero_extendqisi2
1334
- cmp r2, #0
1335
- ldmeqfd sp!, {r3, r4, r5, pc}
1336
- mov r1, #0
1337
- mov r4, r0
1338
- bl hynix_set_rr_para
1339
- ldr r2, [r5, #1176]
1340
- mov r3, #0
1341
- add r4, r2, r4
1342
- strb r3, [r4, #120]
1343
- ldmfd sp!, {r3, r4, r5, pc}
1344
-.L291:
1345
- .align 2
1346
-.L290:
1347
- .word .LANCHOR0
1348
- .fnend
1349
- .size hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
1350
- .align 2
13511380 .global nandc_set_ddr_para
1381
+ .syntax unified
1382
+ .arm
1383
+ .fpu softvfp
13521384 .type nandc_set_ddr_para, %function
13531385 nandc_set_ddr_para:
13541386 .fnstart
13551387 @ args = 0, pretend = 0, frame = 0
13561388 @ frame_needed = 0, uses_anonymous_args = 0
13571389 @ link register save eliminated.
1358
- ldr r3, .L295
1359
- ldrb r2, [r3, #1028] @ zero_extendqisi2
1360
- ldr r3, [r3, #1040]
1361
- cmp r2, #9
1362
- mov r2, r0, asl #16
1363
- mov r0, r0, asl #8
1364
- orr r0, r2, r0
1365
- orr r0, r0, #3
1366
- streq r0, [r3, #80]
1367
- strne r0, [r3, #304]
1390
+ ldr r2, .L296
1391
+ ldrb r3, [r2, #1028] @ zero_extendqisi2
1392
+ ldr r2, [r2, #1044]
1393
+ cmp r3, #9
1394
+ lsl r3, r0, #16
1395
+ lsl r0, r0, #8
1396
+ orr r3, r3, r0
1397
+ orr r3, r3, #3
1398
+ streq r3, [r2, #80]
1399
+ strne r3, [r2, #304]
13681400 bx lr
1369
-.L296:
1401
+.L297:
13701402 .align 2
1371
-.L295:
1403
+.L296:
13721404 .word .LANCHOR0
13731405 .fnend
13741406 .size nandc_set_ddr_para, .-nandc_set_ddr_para
13751407 .align 2
13761408 .global nandc_get_ddr_para
1409
+ .syntax unified
1410
+ .arm
1411
+ .fpu softvfp
13771412 .type nandc_get_ddr_para, %function
13781413 nandc_get_ddr_para:
13791414 .fnstart
13801415 @ args = 0, pretend = 0, frame = 0
13811416 @ frame_needed = 0, uses_anonymous_args = 0
13821417 @ link register save eliminated.
1383
- ldr r3, .L301
1418
+ ldr r3, .L302
13841419 ldrb r2, [r3, #1028] @ zero_extendqisi2
1385
- ldr r3, [r3, #1040]
1420
+ ldr r3, [r3, #1044]
13861421 cmp r2, #9
13871422 ldreq r0, [r3, #80]
13881423 ldrne r0, [r3, #304]
13891424 ubfx r0, r0, #8, #8
13901425 bx lr
1391
-.L302:
1426
+.L303:
13921427 .align 2
1393
-.L301:
1428
+.L302:
13941429 .word .LANCHOR0
13951430 .fnend
13961431 .size nandc_get_ddr_para, .-nandc_get_ddr_para
13971432 .align 2
13981433 .global nandc_set_if_mode
1434
+ .syntax unified
1435
+ .arm
1436
+ .fpu softvfp
13991437 .type nandc_set_if_mode, %function
14001438 nandc_set_if_mode:
14011439 .fnstart
14021440 @ args = 0, pretend = 0, frame = 0
14031441 @ frame_needed = 0, uses_anonymous_args = 0
14041442 @ link register save eliminated.
1405
- ldr r1, .L311
1443
+ ldr r1, .L312
14061444 ands ip, r0, #6
1407
- ldr r3, [r1, #1040]
1445
+ ldr r3, [r1, #1044]
14081446 ldr r2, [r3]
14091447 bfieq r2, ip, #13, #1
1410
- beq .L307
1411
- orr r2, r2, #24576
1448
+ beq .L308
14121449 ldrb r1, [r1, #1028] @ zero_extendqisi2
1450
+ orr r2, r2, #24576
14131451 bfc r2, #15, #1
14141452 tst r0, #4
14151453 orr r2, r2, #196608
14161454 movw r0, #8321
14171455 orrne r2, r2, #32768
14181456 cmp r1, #9
1419
- ldr r1, .L311+4
1457
+ ldr r1, .L312+4
14201458 streq r0, [r3, #8]
14211459 strne r0, [r3, #344]
14221460 streq r1, [r3, #80]
....@@ -1429,217 +1467,228 @@
14291467 movne r1, #39
14301468 streq r1, [r3, #84]
14311469 strne r1, [r3, #308]
1432
-.L307:
1470
+.L308:
14331471 str r2, [r3]
14341472 bx lr
1435
-.L312:
1473
+.L313:
14361474 .align 2
1437
-.L311:
1475
+.L312:
14381476 .word .LANCHOR0
14391477 .word 1052675
14401478 .fnend
14411479 .size nandc_set_if_mode, .-nandc_set_if_mode
14421480 .align 2
14431481 .global nandc_cs
1482
+ .syntax unified
1483
+ .arm
1484
+ .fpu softvfp
14441485 .type nandc_cs, %function
14451486 nandc_cs:
14461487 .fnstart
14471488 @ args = 0, pretend = 0, frame = 0
14481489 @ frame_needed = 0, uses_anonymous_args = 0
14491490 @ link register save eliminated.
1450
- ldr r3, .L314
1491
+ ldr r3, .L315
14511492 mov r2, #1
1452
- mov r0, r2, asl r0
1453
- ldr r1, [r3, #1040]
1493
+ lsl r0, r2, r0
1494
+ ldr r1, [r3, #1044]
14541495 ldr r3, [r1]
14551496 bfi r3, r0, #0, #8
14561497 str r3, [r1]
14571498 bx lr
1458
-.L315:
1499
+.L316:
14591500 .align 2
1460
-.L314:
1501
+.L315:
14611502 .word .LANCHOR0
14621503 .fnend
14631504 .size nandc_cs, .-nandc_cs
14641505 .align 2
1506
+ .global flash_wait_device_ready_raw
1507
+ .syntax unified
1508
+ .arm
1509
+ .fpu softvfp
1510
+ .type flash_wait_device_ready_raw, %function
1511
+flash_wait_device_ready_raw:
1512
+ .fnstart
1513
+ @ args = 0, pretend = 0, frame = 8
1514
+ @ frame_needed = 0, uses_anonymous_args = 0
1515
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1516
+ .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1517
+ .pad #12
1518
+ mov r6, r0
1519
+ ldr r4, .L326
1520
+ mov r5, r1
1521
+ str r2, [sp, #4]
1522
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
1523
+ cmp r3, r0
1524
+ bhi .L318
1525
+ mov r2, #812
1526
+ ldr r1, .L326+4
1527
+ ldr r0, .L326+8
1528
+ bl printk
1529
+ bl dump_stack
1530
+.L318:
1531
+ add r6, r4, r6
1532
+ ldr r3, [r4, #1044]
1533
+ ldrb r6, [r6, #1144] @ zero_extendqisi2
1534
+ lsr r8, r5, #8
1535
+ lsr r9, r5, #16
1536
+ lsr r10, r5, #24
1537
+ mov fp, #120
1538
+ add r7, r3, r6, lsl #8
1539
+.L320:
1540
+ mov r0, r6
1541
+ bl nandc_cs
1542
+ uxtb r2, r5
1543
+ str fp, [r7, #2056]
1544
+ mov r0, #120
1545
+ str r2, [r7, #2052]
1546
+ ldrb r2, [r4, #1152] @ zero_extendqisi2
1547
+ str r8, [r7, #2052]
1548
+ str r9, [r7, #2052]
1549
+ cmp r2, #0
1550
+ strne r10, [r7, #2052]
1551
+ bl ndelay
1552
+ ldr r0, [r7, #2048]
1553
+ uxtb r0, r0
1554
+ bl nandc_de_cs.constprop.35
1555
+ ldr r3, [sp, #4]
1556
+ bics r3, r3, r0
1557
+ movne r2, #1
1558
+ moveq r2, #0
1559
+ cmp r0, #255
1560
+ orreq r2, r2, #1
1561
+ cmp r2, #0
1562
+ bne .L320
1563
+ add sp, sp, #12
1564
+ @ sp needed
1565
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
1566
+.L327:
1567
+ .align 2
1568
+.L326:
1569
+ .word .LANCHOR0
1570
+ .word .LANCHOR1+211
1571
+ .word .LC0
1572
+ .fnend
1573
+ .size flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
1574
+ .align 2
1575
+ .global flash_wait_device_ready
1576
+ .syntax unified
1577
+ .arm
1578
+ .fpu softvfp
1579
+ .type flash_wait_device_ready, %function
1580
+flash_wait_device_ready:
1581
+ .fnstart
1582
+ @ args = 0, pretend = 0, frame = 0
1583
+ @ frame_needed = 0, uses_anonymous_args = 0
1584
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
1585
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
1586
+ mov r3, #1
1587
+ ldr r5, .L339
1588
+ tst r0, #50331648
1589
+ mov r7, r1
1590
+ ldrb r6, [r5, #1153] @ zero_extendqisi2
1591
+ rsb r2, r6, #24
1592
+ lsl r6, r3, r6
1593
+ lsl r4, r3, r2
1594
+ sub r6, r6, #1
1595
+ sub r4, r4, #1
1596
+ and r6, r6, r0, asr r2
1597
+ and r4, r4, r0
1598
+ uxtb r6, r6
1599
+ bne .L329
1600
+ ldrb r3, [r5] @ zero_extendqisi2
1601
+ cmp r3, #0
1602
+ beq .L330
1603
+ ldrb r3, [r5, #1] @ zero_extendqisi2
1604
+ cmp r3, #0
1605
+ beq .L329
1606
+.L330:
1607
+ ldrh r8, [r5, #2]
1608
+ mov r0, r4
1609
+ mov r1, r8
1610
+ bl __aeabi_uidiv
1611
+ mov r1, r8
1612
+ mul r9, r8, r0
1613
+ mov r0, r4
1614
+ bl __aeabi_uidivmod
1615
+ ldrb r3, [r5, #1] @ zero_extendqisi2
1616
+ lsl r1, r1, #1
1617
+ cmp r3, #0
1618
+ addeq r5, r5, r1
1619
+ addne r4, r1, r9
1620
+ ldrheq r4, [r5, #4]
1621
+ addeq r4, r4, r9
1622
+.L329:
1623
+ mov r2, r7
1624
+ mov r1, r4
1625
+ mov r0, r6
1626
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
1627
+ b flash_wait_device_ready_raw
1628
+.L340:
1629
+ .align 2
1630
+.L339:
1631
+ .word .LANCHOR0
1632
+ .fnend
1633
+ .size flash_wait_device_ready, .-flash_wait_device_ready
1634
+ .align 2
14651635 .global nandc_de_cs
1636
+ .syntax unified
1637
+ .arm
1638
+ .fpu softvfp
14661639 .type nandc_de_cs, %function
14671640 nandc_de_cs:
14681641 .fnstart
14691642 @ args = 0, pretend = 0, frame = 0
14701643 @ frame_needed = 0, uses_anonymous_args = 0
14711644 @ link register save eliminated.
1472
- ldr r3, .L317
1473
- ldr r2, [r3, #1040]
1645
+ ldr r3, .L342
1646
+ ldr r2, [r3, #1044]
14741647 ldr r3, [r2]
14751648 bfc r3, #0, #8
14761649 bfc r3, #17, #1
14771650 str r3, [r2]
14781651 bx lr
1479
-.L318:
1480
- .align 2
1481
-.L317:
1482
- .word .LANCHOR0
1483
- .fnend
1484
- .size nandc_de_cs, .-nandc_de_cs
1485
- .align 2
1486
- .global flash_wait_device_ready_raw
1487
- .type flash_wait_device_ready_raw, %function
1488
-flash_wait_device_ready_raw:
1489
- .fnstart
1490
- @ args = 0, pretend = 0, frame = 8
1491
- @ frame_needed = 0, uses_anonymous_args = 0
1492
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1493
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1494
- .pad #12
1495
- mov r6, r0
1496
- ldr r4, .L328
1497
- mov r5, r1
1498
- mov r7, r2
1499
- ldrb r3, [r4, #1101] @ zero_extendqisi2
1500
- cmp r3, r0
1501
- bhi .L320
1502
- ldr r1, .L328+4
1503
- mov r2, #812
1504
- ldr r0, .L328+8
1505
- bl printk
1506
- bl dump_stack
1507
-.L320:
1508
- add r6, r4, r6
1509
- ldr r3, [r4, #1040]
1510
- mov r9, r5, lsr #16
1511
- mov r10, r5, lsr #24
1512
- ldrb r6, [r6, #1180] @ zero_extendqisi2
1513
- mov fp, #120
1514
- mov r2, r5, lsr #8
1515
- str r2, [sp]
1516
- add r8, r3, r6, asl #8
1517
-.L322:
1518
- mov r0, r6
1519
- bl nandc_cs
1520
- str fp, [r8, #2056]
1521
- uxtb r2, r5
1522
- str r2, [r8, #2052]
1523
- ldrb r2, [r4, #1188] @ zero_extendqisi2
1524
- mov r0, #120
1525
- cmp r2, #0
1526
- ldr r3, [sp]
1527
- str r3, [r8, #2052]
1528
- str r9, [r8, #2052]
1529
- strne r10, [r8, #2052]
1530
- bl timer_delay_ns
1531
- ldr r2, [r8, #2048]
1532
- mov r0, r6
1533
- uxtb r2, r2
1534
- str r2, [sp, #4]
1535
- bl nandc_de_cs
1536
- ldr r2, [sp, #4]
1537
- sub r1, r2, #255
1538
- and r0, r7, r2
1539
- clz r1, r1
1540
- mov r1, r1, lsr #5
1541
- cmp r0, r7
1542
- orrne r1, r1, #1
1543
- cmp r1, #0
1544
- bne .L322
1545
- mov r0, r2
1546
- add sp, sp, #12
1547
- @ sp needed
1548
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
1549
-.L329:
1550
- .align 2
1551
-.L328:
1552
- .word .LANCHOR0
1553
- .word .LANCHOR1+232
1554
- .word .LC0
1555
- .fnend
1556
- .size flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
1557
- .align 2
1558
- .global flash_wait_device_ready
1559
- .type flash_wait_device_ready, %function
1560
-flash_wait_device_ready:
1561
- .fnstart
1562
- @ args = 0, pretend = 0, frame = 0
1563
- @ frame_needed = 0, uses_anonymous_args = 0
1564
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
1565
- .save {r4, r5, r6, r7, r8, lr}
1566
- mov r3, #1
1567
- ldr r6, .L342
1568
- tst r0, #50331648
1569
- mov r8, r1
1570
- ldrb r2, [r6, #1189] @ zero_extendqisi2
1571
- rsb r5, r2, #24
1572
- mov r4, r3, asl r5
1573
- mov r3, r3, asl r2
1574
- sub r3, r3, #1
1575
- sub r4, r4, #1
1576
- and r5, r3, r0, asr r5
1577
- and r4, r4, r0
1578
- uxtb r5, r5
1579
- bne .L331
1580
- ldrb r3, [r6] @ zero_extendqisi2
1581
- cmp r3, #0
1582
- beq .L332
1583
- ldrb r3, [r6, #1] @ zero_extendqisi2
1584
- cmp r3, #0
1585
- beq .L331
1586
-.L332:
1587
- ldrh r7, [r6, #2]
1588
- mov r0, r4
1589
- mov r1, r7
1590
- bl __aeabi_uidiv
1591
- ldrb r3, [r6, #1] @ zero_extendqisi2
1592
- cmp r3, #0
1593
- ldreq r3, .L342
1594
- mul r0, r7, r0
1595
- rsb r4, r0, r4
1596
- mov r4, r4, asl #1
1597
- addeq r4, r3, r4
1598
- ldreqh r4, [r4, #4]
1599
- add r4, r4, r0
1600
-.L331:
1601
- mov r0, r5
1602
- mov r1, r4
1603
- mov r2, r8
1604
- ldmfd sp!, {r4, r5, r6, r7, r8, lr}
1605
- b flash_wait_device_ready_raw
16061652 .L343:
16071653 .align 2
16081654 .L342:
16091655 .word .LANCHOR0
16101656 .fnend
1611
- .size flash_wait_device_ready, .-flash_wait_device_ready
1657
+ .size nandc_de_cs, .-nandc_de_cs
16121658 .align 2
16131659 .global nandc_wait_flash_ready_no_delay
1660
+ .syntax unified
1661
+ .arm
1662
+ .fpu softvfp
16141663 .type nandc_wait_flash_ready_no_delay, %function
16151664 nandc_wait_flash_ready_no_delay:
16161665 .fnstart
16171666 @ args = 0, pretend = 0, frame = 8
16181667 @ frame_needed = 0, uses_anonymous_args = 0
1619
- stmfd sp!, {r0, r1, r2, r4, r5, lr}
1668
+ push {r0, r1, r2, r4, r5, lr}
16201669 .save {r4, r5, lr}
16211670 .pad #12
16221671 ldr r4, .L350
16231672 ldr r5, .L350+4
16241673 .L346:
1625
- ldr r3, [r5, #1040]
1674
+ ldr r3, [r5, #1044]
16261675 ldr r3, [r3]
16271676 str r3, [sp, #4]
16281677 ldr r3, [sp, #4]
16291678 tst r3, #512
16301679 bne .L347
16311680 mov r0, #10
1632
- bl timer_delay_ns
1681
+ bl ndelay
16331682 subs r4, r4, #1
16341683 bne .L346
16351684 mvn r0, #0
1636
- b .L345
1637
-.L347:
1638
- mov r0, #0
1639
-.L345:
1685
+.L344:
16401686 add sp, sp, #12
16411687 @ sp needed
1642
- ldmfd sp!, {r4, r5, pc}
1688
+ pop {r4, r5, pc}
1689
+.L347:
1690
+ mov r0, #0
1691
+ b .L344
16431692 .L351:
16441693 .align 2
16451694 .L350:
....@@ -1649,373 +1698,392 @@
16491698 .size nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
16501699 .align 2
16511700 .global zftl_flash_enter_slc_mode
1701
+ .syntax unified
1702
+ .arm
1703
+ .fpu softvfp
16521704 .type zftl_flash_enter_slc_mode, %function
16531705 zftl_flash_enter_slc_mode:
16541706 .fnstart
16551707 @ args = 0, pretend = 0, frame = 0
16561708 @ frame_needed = 0, uses_anonymous_args = 0
1657
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
1658
- .save {r3, r4, r5, r6, r7, lr}
1659
- ldr r3, .L371
1709
+ ldr r3, .L375
16601710 ldrb r2, [r3] @ zero_extendqisi2
16611711 cmp r2, #0
1662
- ldmeqfd sp!, {r3, r4, r5, r6, r7, pc}
1712
+ bxeq lr
16631713 cmp r2, #1
1664
- ldr r5, [r3, #1040]
1714
+ push {r4, r5, r6, r7, r8, lr}
1715
+ .save {r4, r5, r6, r7, r8, lr}
1716
+ ldr r5, [r3, #1044]
16651717 bne .L355
1666
- ldr r3, .L371+4
1718
+ ldr r3, .L375+4
16671719 ldrb r3, [r3, #33] @ zero_extendqisi2
16681720 cmp r3, #0
1669
- addne r0, r5, r0, asl #8
1670
- strne r3, [r0, #2056]
1671
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
1721
+ addne r4, r5, r0, lsl #8
1722
+ bne .L374
1723
+ pop {r4, r5, r6, r7, r8, pc}
16721724 .L355:
16731725 cmp r2, #2
16741726 mov r4, r0
16751727 bne .L357
16761728 add r3, r3, r0
1677
- ldrb r2, [r3, #1192] @ zero_extendqisi2
1729
+ ldrb r2, [r3, #1154] @ zero_extendqisi2
16781730 cmp r2, #0
1679
- ldmeqfd sp!, {r3, r4, r5, r6, r7, pc}
1680
- ldr r6, .L371+4
1731
+ popeq {r4, r5, r6, r7, r8, pc}
1732
+ ldr r6, .L375+4
16811733 mov r2, #0
1682
- strb r2, [r3, #1192]
1734
+ strb r2, [r3, #1154]
16831735 ldrb r3, [r6, #33] @ zero_extendqisi2
16841736 cmp r3, r2
1685
- ldmeqfd sp!, {r3, r4, r5, r6, r7, pc}
1737
+ popeq {r4, r5, r6, r7, r8, pc}
16861738 bl nandc_wait_flash_ready_no_delay
16871739 ldrb r3, [r6, #33] @ zero_extendqisi2
1688
- add r4, r5, r4, asl #8
1740
+ add r4, r5, r4, lsl #8
1741
+.L374:
16891742 str r3, [r4, #2056]
1690
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
1743
+ pop {r4, r5, r6, r7, r8, pc}
16911744 .L357:
16921745 cmp r2, #3
1693
- ldmnefd sp!, {r3, r4, r5, r6, r7, pc}
1746
+ popne {r4, r5, r6, r7, r8, pc}
16941747 add r6, r3, r0
1695
- ldrb r3, [r6, #1192] @ zero_extendqisi2
1748
+ ldrb r3, [r6, #1154] @ zero_extendqisi2
16961749 cmp r3, #0
1697
- ldmeqfd sp!, {r3, r4, r5, r6, r7, pc}
1698
- add r4, r5, r4, asl #8
1750
+ popeq {r4, r5, r6, r7, r8, pc}
1751
+ add r4, r5, r4, lsl #8
1752
+ mov r7, #0
16991753 bl nandc_wait_flash_ready_no_delay
17001754 mov r3, #239
17011755 mov r0, #100
17021756 str r3, [r4, #2056]
17031757 mov r3, #145
17041758 str r3, [r4, #2052]
1705
- mov r7, #0
1706
- strb r7, [r6, #1192]
1707
- bl timer_delay_ns
1708
- str r7, [r4, #2048]
1759
+ strb r7, [r6, #1154]
1760
+ bl ndelay
17091761 mov r3, #1
1762
+ str r7, [r4, #2048]
17101763 mov r0, #150
17111764 str r3, [r4, #2048]
17121765 str r7, [r4, #2048]
17131766 str r7, [r4, #2048]
1714
- bl timer_delay_ns
1767
+ bl ndelay
17151768 bl nandc_wait_flash_ready_no_delay
17161769 mov r3, #218
17171770 mov r0, #50
17181771 str r3, [r4, #2056]
1719
- ldmfd sp!, {r3, r4, r5, r6, r7, lr}
1720
- b timer_delay_ns
1721
-.L372:
1772
+ pop {r4, r5, r6, r7, r8, lr}
1773
+ b ndelay
1774
+.L376:
17221775 .align 2
1723
-.L371:
1776
+.L375:
17241777 .word .LANCHOR0
17251778 .word .LANCHOR2
17261779 .fnend
17271780 .size zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
17281781 .align 2
17291782 .global zftl_flash_exit_slc_mode
1783
+ .syntax unified
1784
+ .arm
1785
+ .fpu softvfp
17301786 .type zftl_flash_exit_slc_mode, %function
17311787 zftl_flash_exit_slc_mode:
17321788 .fnstart
17331789 @ args = 0, pretend = 0, frame = 0
17341790 @ frame_needed = 0, uses_anonymous_args = 0
1735
- ldr r3, .L394
1736
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
1791
+ ldr r3, .L402
1792
+ ldrb r2, [r3] @ zero_extendqisi2
1793
+ cmp r2, #0
1794
+ bxeq lr
1795
+ cmp r2, #1
1796
+ push {r4, r5, r6, r7, r8, lr}
17371797 .save {r4, r5, r6, r7, r8, lr}
1738
- ldrb r4, [r3] @ zero_extendqisi2
1739
- cmp r4, #0
1740
- ldmeqfd sp!, {r4, r5, r6, r7, r8, pc}
1741
- cmp r4, #1
1742
- ldr r7, [r3, #1040]
1743
- bne .L376
1744
- ldr r3, .L394+4
1798
+ ldr r7, [r3, #1044]
1799
+ bne .L380
1800
+ ldr r3, .L402+4
17451801 ldrb r3, [r3, #34] @ zero_extendqisi2
17461802 cmp r3, #0
1747
- addne r0, r7, r0, asl #8
1748
- strne r3, [r0, #2056]
1749
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
1750
-.L376:
1751
- cmp r4, #2
1752
- mov r5, r0
1753
- bne .L378
1803
+ addne r4, r7, r0, lsl #8
1804
+ bne .L401
1805
+ pop {r4, r5, r6, r7, r8, pc}
1806
+.L380:
1807
+ cmp r2, #2
1808
+ mov r4, r0
1809
+ bne .L382
17541810 add r3, r3, r0
1755
- ldrb r2, [r3, #1192] @ zero_extendqisi2
1811
+ ldrb r2, [r3, #1154] @ zero_extendqisi2
17561812 cmp r2, #0
1757
- ldmnefd sp!, {r4, r5, r6, r7, r8, pc}
1758
- ldr r4, .L394+4
1759
- ldrb r2, [r4, #16] @ zero_extendqisi2
1813
+ popne {r4, r5, r6, r7, r8, pc}
1814
+ ldr r5, .L402+4
1815
+ ldrb r2, [r5, #16] @ zero_extendqisi2
17601816 cmp r2, #2
17611817 movne r2, #4
1762
- strb r2, [r3, #1192]
1763
- ldrb r3, [r4, #34] @ zero_extendqisi2
1818
+ strb r2, [r3, #1154]
1819
+ ldrb r3, [r5, #34] @ zero_extendqisi2
17641820 cmp r3, #0
1765
- ldmeqfd sp!, {r4, r5, r6, r7, r8, pc}
1821
+ popeq {r4, r5, r6, r7, r8, pc}
17661822 bl nandc_wait_flash_ready_no_delay
1767
- ldrb r3, [r4, #34] @ zero_extendqisi2
1768
- add r5, r7, r5, asl #8
1769
- str r3, [r5, #2056]
1770
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
1771
-.L378:
1772
- cmp r4, #3
1773
- ldmnefd sp!, {r4, r5, r6, r7, r8, pc}
1774
- add r4, r3, r0
1775
- ldrb r3, [r4, #1192] @ zero_extendqisi2
1823
+ ldrb r3, [r5, #34] @ zero_extendqisi2
1824
+ add r4, r7, r4, lsl #8
1825
+.L401:
1826
+ str r3, [r4, #2056]
1827
+ pop {r4, r5, r6, r7, r8, pc}
1828
+.L382:
1829
+ cmp r2, #3
1830
+ popne {r4, r5, r6, r7, r8, pc}
1831
+ add r6, r3, r0
1832
+ ldrb r3, [r6, #1154] @ zero_extendqisi2
17761833 cmp r3, #0
1777
- ldmnefd sp!, {r4, r5, r6, r7, r8, pc}
1778
- ldr r8, .L394+4
1834
+ popne {r4, r5, r6, r7, r8, pc}
1835
+ ldr r8, .L402+4
1836
+ lsl r4, r4, #8
17791837 bl nandc_wait_flash_ready_no_delay
1780
- mov r5, r5, asl #8
1781
- mov r0, #100
1782
- add r6, r7, r5
1783
- add r5, r7, r5
17841838 ldrb r3, [r8, #16] @ zero_extendqisi2
1839
+ add r5, r7, r4
1840
+ mov r0, #100
1841
+ add r4, r7, r4
17851842 cmp r3, #2
17861843 movne r3, #4
1787
- strb r3, [r4, #1192]
1844
+ strb r3, [r6, #1154]
17881845 mov r3, #239
1789
- str r3, [r6, #2056]
1846
+ str r3, [r5, #2056]
17901847 mov r3, #145
1791
- str r3, [r6, #2052]
1792
- bl timer_delay_ns
1848
+ str r3, [r5, #2052]
1849
+ bl ndelay
17931850 ldrb r3, [r8, #11] @ zero_extendqisi2
17941851 mov r0, #150
17951852 cmp r3, #9
17961853 mov r3, #1
1797
- streq r3, [r6, #2048]
1798
- ldrneb r2, [r4, #1192] @ zero_extendqisi2
1799
- strne r2, [r6, #2048]
1800
- str r3, [r6, #2048]
1854
+ ldrbne r2, [r6, #1154] @ zero_extendqisi2
1855
+ streq r3, [r5, #2048]
1856
+ strne r2, [r5, #2048]
1857
+ str r3, [r5, #2048]
18011858 mov r3, #0
1802
- str r3, [r6, #2048]
1803
- str r3, [r6, #2048]
1804
- bl timer_delay_ns
1859
+ str r3, [r5, #2048]
1860
+ str r3, [r5, #2048]
1861
+ bl ndelay
18051862 bl nandc_wait_flash_ready_no_delay
18061863 mov r3, #223
18071864 mov r0, #50
1808
- str r3, [r5, #2056]
1809
- ldmfd sp!, {r4, r5, r6, r7, r8, lr}
1810
- b timer_delay_ns
1811
-.L395:
1865
+ str r3, [r4, #2056]
1866
+ pop {r4, r5, r6, r7, r8, lr}
1867
+ b ndelay
1868
+.L403:
18121869 .align 2
1813
-.L394:
1870
+.L402:
18141871 .word .LANCHOR0
18151872 .word .LANCHOR2
18161873 .fnend
18171874 .size zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
18181875 .align 2
18191876 .global flash_start_page_read
1877
+ .syntax unified
1878
+ .arm
1879
+ .fpu softvfp
18201880 .type flash_start_page_read, %function
18211881 flash_start_page_read:
18221882 .fnstart
18231883 @ args = 0, pretend = 0, frame = 0
18241884 @ frame_needed = 0, uses_anonymous_args = 0
1825
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1826
- .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1885
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
1886
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
18271887 mvn r2, #0
1828
- ldr r7, .L411
1829
- mov r5, r0
1830
- mov r8, r1
1831
- ldrb r3, [r7, #1189] @ zero_extendqisi2
1832
- rsb r6, r3, #24
1833
- mvn r2, r2, asl r3
1834
- and r2, r2, r1, lsr r6
1835
- ldrb r3, [r7, #1101] @ zero_extendqisi2
1836
- uxtb r4, r2
1837
- cmp r3, r4
1838
- bhi .L397
1839
- ldr r1, .L411+4
1888
+ ldr r4, .L419
1889
+ mov r7, r0
1890
+ mov r10, r1
1891
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
1892
+ rsb r5, r3, #24
1893
+ lsr r6, r1, r5
1894
+ bic r6, r6, r2, lsl r3
1895
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
1896
+ uxtb r6, r6
1897
+ cmp r3, r6
1898
+ bhi .L405
18401899 movw r2, #1013
1841
- ldr r0, .L411+8
1900
+ ldr r1, .L419+4
1901
+ ldr r0, .L419+8
18421902 bl printk
18431903 bl dump_stack
1844
-.L397:
1845
- ldrb r3, [r7, #1101] @ zero_extendqisi2
1846
- ldr r9, .L411
1847
- cmp r3, r4
1848
- ldmlsfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
1849
- add r4, r9, r4
1904
+.L405:
1905
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
1906
+ cmp r3, r6
1907
+ popls {r4, r5, r6, r7, r8, r9, r10, pc}
1908
+ add r6, r4, r6
18501909 mvn r3, #0
1851
- bic r6, r8, r3, asl r6
1852
- ubfx r8, r8, #24, #2
1853
- ldrb fp, [r4, #1180] @ zero_extendqisi2
1854
- ldr r4, [r9, #1040]
1855
- mov r0, fp
1856
- mov r10, fp, asl #8
1910
+ ldrb r9, [r6, #1144] @ zero_extendqisi2
1911
+ bic r5, r10, r3, lsl r5
1912
+ ubfx r10, r10, #24, #2
1913
+ ldr r6, [r4, #1044]
1914
+ mov r0, r9
18571915 bl nandc_cs
1858
- cmp r8, #0
1859
- bne .L399
1860
- mov r0, r6
1916
+ cmp r10, #0
1917
+ lsl r8, r9, #8
1918
+ bne .L407
1919
+ mov r0, r5
18611920 bl slc_phy_page_address_calc
1862
- ldrb r3, [r9] @ zero_extendqisi2
1921
+ ldrb r3, [r4] @ zero_extendqisi2
1922
+ mov r5, r0
18631923 cmp r3, #0
1864
- mov r6, r0
1865
- beq .L400
1866
- mov r0, fp
1924
+ beq .L408
1925
+ mov r0, r9
18671926 bl zftl_flash_enter_slc_mode
1868
- b .L400
1869
-.L399:
1870
- ldr r3, [r9, #1096]
1871
- ldrb r3, [r3, #12] @ zero_extendqisi2
1872
- cmp r3, #3
1873
- bne .L401
1874
- ldrb r3, [r9, #1196] @ zero_extendqisi2
1875
- cmp r3, #0
1876
- bne .L401
1877
- ldrb r3, [r9, #1197] @ zero_extendqisi2
1878
- cmp r3, #0
1879
- addeq r3, r4, r10
1880
- streq r8, [r3, #2056]
1881
- beq .L400
1882
-.L401:
1883
- mov r0, fp
1884
- bl zftl_flash_exit_slc_mode
1885
-.L400:
1886
- ldr r3, [r7, #1096]
1927
+.L408:
1928
+ ldr r3, [r4, #1104]
18871929 ldrb r2, [r3, #7] @ zero_extendqisi2
18881930 cmp r2, #1
1889
- bne .L402
1931
+ bne .L410
18901932 ldrb r3, [r3, #12] @ zero_extendqisi2
18911933 cmp r3, #2
1892
- addeq r3, r4, r10
1934
+ addeq r3, r6, r8
18931935 moveq r2, #38
18941936 streq r2, [r3, #2056]
1895
-.L402:
1896
- add r2, r4, r10
1897
- mov r3, #0
1898
- str r3, [r2, #2056]
1899
- str r3, [r2, #2052]
1900
- str r3, [r2, #2052]
1901
- uxtb r3, r6
1902
- str r3, [r2, #2052]
1903
- mov r3, r6, lsr #8
1904
- str r3, [r2, #2052]
1905
- mov r3, r6, lsr #16
1906
- str r3, [r2, #2052]
1907
- ldrb r3, [r7, #1188] @ zero_extendqisi2
1937
+.L410:
1938
+ add r3, r6, r8
1939
+ mov r2, #0
1940
+ str r2, [r3, #2056]
1941
+ str r2, [r3, #2052]
1942
+ str r2, [r3, #2052]
1943
+ uxtb r2, r5
1944
+ str r2, [r3, #2052]
1945
+ lsr r2, r5, #8
1946
+ str r2, [r3, #2052]
1947
+ lsr r2, r5, #16
1948
+ str r2, [r3, #2052]
1949
+ ldrb r2, [r4, #1152] @ zero_extendqisi2
1950
+ cmp r2, #0
1951
+ lsrne r5, r5, #24
1952
+ strne r5, [r3, #2052]
1953
+ add r3, r6, r8
1954
+ str r7, [r3, #2056]
1955
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
1956
+.L407:
1957
+ ldr r3, [r4, #1104]
1958
+ ldrb r3, [r3, #12] @ zero_extendqisi2
1959
+ cmp r3, #3
1960
+ bne .L409
1961
+ ldrb r3, [r4, #1158] @ zero_extendqisi2
19081962 cmp r3, #0
1909
- movne r3, r6, lsr #24
1910
- strne r3, [r2, #2052]
1911
- add r3, r4, r10
1912
- str r5, [r3, #2056]
1913
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
1914
-.L412:
1963
+ bne .L409
1964
+ ldrb r3, [r4, #1159] @ zero_extendqisi2
1965
+ cmp r3, #0
1966
+ addeq r3, r6, r8
1967
+ streq r10, [r3, #2056]
1968
+ beq .L408
1969
+.L409:
1970
+ mov r0, r9
1971
+ bl zftl_flash_exit_slc_mode
1972
+ b .L408
1973
+.L420:
19151974 .align 2
1916
-.L411:
1975
+.L419:
19171976 .word .LANCHOR0
1918
- .word .LANCHOR1+260
1977
+ .word .LANCHOR1+239
19191978 .word .LC0
19201979 .fnend
19211980 .size flash_start_page_read, .-flash_start_page_read
19221981 .align 2
19231982 .global nandc_wait_flash_ready
1983
+ .syntax unified
1984
+ .arm
1985
+ .fpu softvfp
19241986 .type nandc_wait_flash_ready, %function
19251987 nandc_wait_flash_ready:
19261988 .fnstart
19271989 @ args = 0, pretend = 0, frame = 8
19281990 @ frame_needed = 0, uses_anonymous_args = 0
1929
- stmfd sp!, {r0, r1, r2, r4, r5, lr}
1991
+ push {r0, r1, r2, r4, r5, lr}
19301992 .save {r4, r5, lr}
19311993 .pad #12
19321994 mov r0, #150
1933
- bl timer_delay_ns
1934
- ldr r4, .L419
1935
- ldr r5, .L419+4
1936
-.L415:
1937
- ldr r3, [r5, #1040]
1995
+ ldr r4, .L427
1996
+ ldr r5, .L427+4
1997
+ bl ndelay
1998
+.L423:
1999
+ ldr r3, [r5, #1044]
19382000 ldr r3, [r3]
19392001 str r3, [sp, #4]
19402002 ldr r3, [sp, #4]
19412003 tst r3, #512
1942
- bne .L416
2004
+ bne .L424
19432005 mov r0, #10
1944
- bl timer_delay_ns
2006
+ bl ndelay
19452007 subs r4, r4, #1
1946
- bne .L415
2008
+ bne .L423
19472009 mvn r0, #0
1948
- b .L414
1949
-.L416:
1950
- mov r0, #0
1951
-.L414:
2010
+.L421:
19522011 add sp, sp, #12
19532012 @ sp needed
1954
- ldmfd sp!, {r4, r5, pc}
1955
-.L420:
2013
+ pop {r4, r5, pc}
2014
+.L424:
2015
+ mov r0, #0
2016
+ b .L421
2017
+.L428:
19562018 .align 2
1957
-.L419:
2019
+.L427:
19582020 .word 100000
19592021 .word .LANCHOR0
19602022 .fnend
19612023 .size nandc_wait_flash_ready, .-nandc_wait_flash_ready
19622024 .align 2
19632025 .global sandisk_set_rr_para
2026
+ .syntax unified
2027
+ .arm
2028
+ .fpu softvfp
19642029 .type sandisk_set_rr_para, %function
19652030 sandisk_set_rr_para:
19662031 .fnstart
19672032 @ args = 0, pretend = 0, frame = 0
19682033 @ frame_needed = 0, uses_anonymous_args = 0
1969
- stmfd sp!, {r3, r4, r5, lr}
1970
- .save {r3, r4, r5, lr}
19712034 mov r3, #239
1972
- mov r5, r0
2035
+ push {r4, r5, r6, lr}
2036
+ .save {r4, r5, r6, lr}
19732037 str r3, [r0, #8]
19742038 mov r3, #17
2039
+ mov r5, r0
2040
+ mov r4, r1
19752041 str r3, [r0, #4]
19762042 mov r0, #200
1977
- mov r4, r1
1978
- bl timer_delay_ns
1979
- ldr r0, .L429
1980
- ldr r1, .L429+4
1981
- add r4, r4, r4, asl #2
1982
- sub ip, r0, #48
2043
+ bl ndelay
2044
+ ldr r0, .L436
2045
+ add r4, r4, r4, lsl #2
2046
+ ldr r1, .L436+4
19832047 mov r2, #0
1984
-.L422:
1985
- ldrb r3, [r1, #1174] @ zero_extendqisi2
2048
+ sub ip, r0, #45
2049
+.L430:
2050
+ ldrb r3, [r1, #1101] @ zero_extendqisi2
19862051 cmp r2, r3
1987
- bcs .L428
1988
- ldrb r3, [r1, #1173] @ zero_extendqisi2
2052
+ bcc .L433
2053
+ pop {r4, r5, r6, lr}
2054
+ b nandc_wait_flash_ready
2055
+.L433:
2056
+ ldrb r3, [r1, #1100] @ zero_extendqisi2
19892057 cmp r3, #67
19902058 add r3, r2, r4
19912059 addeq r3, ip, r3
19922060 addne r3, r0, r3
1993
- add r2, r2, #1
19942061 ldrsb r3, [r3, #5]
2062
+ add r2, r2, #1
19952063 str r3, [r5]
1996
- b .L422
1997
-.L428:
1998
- ldmfd sp!, {r3, r4, r5, lr}
1999
- b nandc_wait_flash_ready
2000
-.L430:
2064
+ b .L430
2065
+.L437:
20012066 .align 2
2002
-.L429:
2003
- .word .LANCHOR1+128
2067
+.L436:
2068
+ .word .LANCHOR1+86
20042069 .word .LANCHOR0
20052070 .fnend
20062071 .size sandisk_set_rr_para, .-sandisk_set_rr_para
20072072 .align 2
20082073 .global toshiba_3d_set_tlc_rr_para
2074
+ .syntax unified
2075
+ .arm
2076
+ .fpu softvfp
20092077 .type toshiba_3d_set_tlc_rr_para, %function
20102078 toshiba_3d_set_tlc_rr_para:
20112079 .fnstart
20122080 @ args = 0, pretend = 0, frame = 0
20132081 @ frame_needed = 0, uses_anonymous_args = 0
2082
+ push {r4, r5, r6, r7, r8, lr}
2083
+ .save {r4, r5, r6, r7, r8, lr}
20142084 add r1, r1, #1
2015
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
2016
- .save {r3, r4, r5, r6, r7, lr}
2017
- rsb r1, r1, r1, asl #3
2018
- ldr r5, .L433
2085
+ ldr r5, .L440
2086
+ rsb r1, r1, r1, lsl #3
20192087 mov r6, #0
20202088 mov r7, #213
20212089 mvn r3, #118
....@@ -2024,43 +2092,46 @@
20242092 str r6, [r0, #4]
20252093 mov r4, r0
20262094 str r3, [r0, #4]
2027
- add r3, r5, #284
2095
+ movw r3, #261
2096
+ ldrsb r3, [r5, r3]
2097
+ str r3, [r0]
2098
+ movw r3, #262
2099
+ ldrsb r3, [r5, r3]
2100
+ str r3, [r0]
2101
+ movw r3, #263
2102
+ ldrsb r3, [r5, r3]
2103
+ str r3, [r0]
2104
+ add r3, r5, #264
20282105 ldrsb r3, [r3]
2029
- str r3, [r0]
2030
- movw r3, #285
2031
- ldrsb r3, [r5, r3]
2032
- str r3, [r0]
2033
- movw r3, #286
2034
- ldrsb r3, [r5, r3]
2035
- str r3, [r0]
2036
- movw r3, #287
2037
- ldrsb r3, [r5, r3]
20382106 str r3, [r0]
20392107 bl nandc_wait_flash_ready
2040
- str r7, [r4, #8]
20412108 mvn r3, #117
2109
+ str r7, [r4, #8]
20422110 str r6, [r4, #4]
20432111 str r3, [r4, #4]
2044
- add r3, r5, #288
2045
- ldrsb r3, [r3]
2046
- str r3, [r4]
2047
- movw r3, #289
2112
+ movw r3, #265
20482113 ldrsb r3, [r5, r3]
20492114 str r3, [r4]
2050
- movw r3, #290
2115
+ movw r3, #266
2116
+ ldrsb r3, [r5, r3]
2117
+ str r3, [r4]
2118
+ movw r3, #267
20512119 ldrsb r3, [r5, r3]
20522120 str r3, [r4]
20532121 str r6, [r4]
2054
- ldmfd sp!, {r3, r4, r5, r6, r7, lr}
2122
+ pop {r4, r5, r6, r7, r8, lr}
20552123 b nandc_wait_flash_ready
2056
-.L434:
2124
+.L441:
20572125 .align 2
2058
-.L433:
2126
+.L440:
20592127 .word .LANCHOR1
20602128 .fnend
20612129 .size toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
20622130 .align 2
20632131 .global toshiba_3d_set_slc_rr_para
2132
+ .syntax unified
2133
+ .arm
2134
+ .fpu softvfp
20642135 .type toshiba_3d_set_slc_rr_para, %function
20652136 toshiba_3d_set_slc_rr_para:
20662137 .fnstart
....@@ -2073,39 +2144,42 @@
20732144 mov r3, #0
20742145 str r3, [r0, #4]
20752146 str r2, [r0, #4]
2076
- ldr r2, .L436
2077
- add r2, r2, r1
2078
- movw r1, #685
2079
- ldrsb r2, [r2, r1]
2147
+ ldr r2, .L443
2148
+ add r1, r2, r1
2149
+ movw r2, #661
2150
+ ldrsb r2, [r1, r2]
20802151 str r2, [r0]
20812152 str r3, [r0]
20822153 str r3, [r0]
20832154 str r3, [r0]
20842155 b nandc_wait_flash_ready
2085
-.L437:
2156
+.L444:
20862157 .align 2
2087
-.L436:
2158
+.L443:
20882159 .word .LANCHOR1
20892160 .fnend
20902161 .size toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
20912162 .align 2
20922163 .global toshiba_tlc_set_rr_para
2164
+ .syntax unified
2165
+ .arm
2166
+ .fpu softvfp
20932167 .type toshiba_tlc_set_rr_para, %function
20942168 toshiba_tlc_set_rr_para:
20952169 .fnstart
20962170 @ args = 0, pretend = 0, frame = 0
20972171 @ frame_needed = 0, uses_anonymous_args = 0
20982172 cmp r2, #0
2099
- ldr r3, .L442
2100
- stmfd sp!, {r4, r5, r6, lr}
2173
+ push {r4, r5, r6, lr}
21012174 .save {r4, r5, r6, lr}
2175
+ ldr r3, .L449
21022176 mov r6, #239
2103
- mov r4, r0
2104
- str r6, [r0, #8]
2105
- beq .L439
2106
- rsb r1, r1, r1, asl #3
2177
+ beq .L446
2178
+ rsb r5, r1, r1, lsl #3
21072179 mov r2, #18
2108
- add r5, r3, r1
2180
+ str r6, [r0, #8]
2181
+ mov r4, r0
2182
+ add r5, r3, r5
21092183 str r2, [r0, #4]
21102184 ldrb r3, [r5, #36] @ zero_extendqisi2
21112185 str r3, [r0]
....@@ -2116,8 +2190,8 @@
21162190 ldrb r3, [r5, #39] @ zero_extendqisi2
21172191 str r3, [r0]
21182192 bl nandc_wait_flash_ready
2119
- str r6, [r4, #8]
21202193 mov r3, #19
2194
+ str r6, [r4, #8]
21212195 str r3, [r4, #4]
21222196 ldrb r3, [r5, #40] @ zero_extendqisi2
21232197 str r3, [r4]
....@@ -2127,87 +2201,94 @@
21272201 str r3, [r4]
21282202 mov r3, #0
21292203 str r3, [r4]
2130
- b .L440
2131
-.L439:
2132
- add r3, r3, r1
2133
- mov r0, #20
2134
- str r0, [r4, #4]
2135
- ldrb r3, [r3, #368] @ zero_extendqisi2
2136
- str r3, [r4]
2137
- str r2, [r4]
2138
- str r2, [r4]
2139
- str r2, [r4]
2140
-.L440:
2141
- ldmfd sp!, {r4, r5, r6, lr}
2204
+.L447:
2205
+ pop {r4, r5, r6, lr}
21422206 b nandc_wait_flash_ready
2143
-.L443:
2207
+.L446:
2208
+ mov ip, #20
2209
+ add r5, r3, r1
2210
+ str r6, [r0, #8]
2211
+ str ip, [r0, #4]
2212
+ ldrb r3, [r5, #365] @ zero_extendqisi2
2213
+ str r3, [r0]
2214
+ str r2, [r0]
2215
+ str r2, [r0]
2216
+ str r2, [r0]
2217
+ b .L447
2218
+.L450:
21442219 .align 2
2145
-.L442:
2220
+.L449:
21462221 .word .LANCHOR2
21472222 .fnend
21482223 .size toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
21492224 .align 2
21502225 .global ymtc_3d_set_tlc_rr_para
2226
+ .syntax unified
2227
+ .arm
2228
+ .fpu softvfp
21512229 .type ymtc_3d_set_tlc_rr_para, %function
21522230 ymtc_3d_set_tlc_rr_para:
21532231 .fnstart
21542232 @ args = 0, pretend = 0, frame = 0
21552233 @ frame_needed = 0, uses_anonymous_args = 0
2156
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
2157
- .save {r3, r4, r5, r6, r7, lr}
2158
- rsb r1, r1, r1, asl #3
2159
- ldr r5, .L446
2234
+ push {r4, r5, r6, r7, r8, lr}
2235
+ .save {r4, r5, r6, r7, r8, lr}
2236
+ rsb r1, r1, r1, lsl #3
2237
+ ldr r5, .L453
21602238 mov r7, #239
21612239 mov r3, #160
2240
+ mov r6, #0
21622241 str r7, [r0, #8]
2242
+ mov r4, r0
21632243 add r5, r5, r1
21642244 str r3, [r0, #4]
2165
- add r3, r5, #696
2166
- mov r4, r0
2167
- mov r6, #0
2168
- ldrsb r3, [r3]
2245
+ movw r3, #671
2246
+ ldrsb r3, [r5, r3]
21692247 str r3, [r0]
2170
- add r3, r5, #700
2171
- ldrsb r3, [r3]
2248
+ movw r3, #675
2249
+ ldrsb r3, [r5, r3]
21722250 str r3, [r0]
21732251 str r6, [r0]
21742252 str r6, [r0]
21752253 bl nandc_wait_flash_ready
2176
- str r7, [r4, #8]
21772254 mov r3, #161
2255
+ str r7, [r4, #8]
21782256 str r3, [r4, #4]
2179
- movw r3, #697
2257
+ add r3, r5, #672
2258
+ ldrsb r3, [r3]
2259
+ str r3, [r4]
2260
+ movw r3, #674
21802261 ldrsb r3, [r5, r3]
21812262 str r3, [r4]
2182
- movw r3, #699
2183
- ldrsb r3, [r5, r3]
2184
- str r3, [r4]
2185
- movw r3, #701
2186
- ldrsb r3, [r5, r3]
2263
+ add r3, r5, #676
2264
+ ldrsb r3, [r3]
21872265 str r3, [r4]
21882266 str r6, [r4]
21892267 bl nandc_wait_flash_ready
2190
- str r7, [r4, #8]
21912268 mov r3, #162
2269
+ str r7, [r4, #8]
21922270 str r3, [r4, #4]
2193
- movw r3, #698
2271
+ movw r3, #673
21942272 ldrsb r3, [r5, r3]
21952273 str r3, [r4]
2196
- movw r3, #702
2274
+ movw r3, #677
21972275 ldrsb r3, [r5, r3]
21982276 str r3, [r4]
21992277 str r6, [r4]
22002278 str r6, [r4]
2201
- ldmfd sp!, {r3, r4, r5, r6, r7, lr}
2279
+ pop {r4, r5, r6, r7, r8, lr}
22022280 b nandc_wait_flash_ready
2203
-.L447:
2281
+.L454:
22042282 .align 2
2205
-.L446:
2283
+.L453:
22062284 .word .LANCHOR1
22072285 .fnend
22082286 .size ymtc_3d_set_tlc_rr_para, .-ymtc_3d_set_tlc_rr_para
22092287 .align 2
22102288 .global ymtc_3d_set_slc_rr_para
2289
+ .syntax unified
2290
+ .arm
2291
+ .fpu softvfp
22112292 .type ymtc_3d_set_slc_rr_para, %function
22122293 ymtc_3d_set_slc_rr_para:
22132294 .fnstart
....@@ -2218,339 +2299,394 @@
22182299 str r3, [r0, #8]
22192300 mov r3, #163
22202301 str r3, [r0, #4]
2221
- ldr r3, .L449
2222
- ldrsb r3, [r3, r1]
2302
+ ldr r3, .L456
2303
+ add r1, r3, r1
2304
+ movw r3, #1028
2305
+ ldrsb r3, [r1, r3]
22232306 str r3, [r0]
22242307 mov r3, #0
22252308 str r3, [r0]
22262309 str r3, [r0]
22272310 str r3, [r0]
22282311 b nandc_wait_flash_ready
2229
-.L450:
2312
+.L457:
22302313 .align 2
2231
-.L449:
2232
- .word .LANCHOR1+1056
2314
+.L456:
2315
+ .word .LANCHOR1
22332316 .fnend
22342317 .size ymtc_3d_set_slc_rr_para, .-ymtc_3d_set_slc_rr_para
22352318 .align 2
22362319 .global flash_start_plane_read
2320
+ .syntax unified
2321
+ .arm
2322
+ .fpu softvfp
22372323 .type flash_start_plane_read, %function
22382324 flash_start_plane_read:
22392325 .fnstart
22402326 @ args = 0, pretend = 0, frame = 0
22412327 @ frame_needed = 0, uses_anonymous_args = 0
2242
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2243
- .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2328
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
2329
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
22442330 mov r3, #1
2245
- ldr r7, .L479
2331
+ ldr r4, .L487
22462332 ubfx r9, r0, #24, #2
2247
- ldrb r2, [r7, #1189] @ zero_extendqisi2
2248
- rsb r5, r2, #24
2249
- mov r4, r3, asl r5
2250
- mov r3, r3, asl r2
2251
- sub r3, r3, #1
2252
- sub r4, r4, #1
2253
- and r5, r3, r0, lsr r5
2254
- ldrb r3, [r7, #1101] @ zero_extendqisi2
2255
- and r6, r4, r0
2256
- and r4, r4, r1
2257
- uxtb r5, r5
2258
- cmp r3, r5
2259
- bhi .L452
2260
- ldr r1, .L479+4
2333
+ ldrb r6, [r4, #1153] @ zero_extendqisi2
2334
+ rsb r2, r6, #24
2335
+ lsl r6, r3, r6
2336
+ lsl r5, r3, r2
2337
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
2338
+ sub r6, r6, #1
2339
+ sub r5, r5, #1
2340
+ and r6, r6, r0, lsr r2
2341
+ and r7, r5, r0
2342
+ and r5, r5, r1
2343
+ uxtb r6, r6
2344
+ cmp r3, r6
2345
+ bhi .L459
22612346 movw r2, #1148
2262
- ldr r0, .L479+8
2347
+ ldr r1, .L487+4
2348
+ ldr r0, .L487+8
22632349 bl printk
22642350 bl dump_stack
2265
-.L452:
2266
- add r5, r7, r5
2267
- ldr r8, [r7, #1040]
2268
- ldr fp, .L479
2269
- ldrb r5, [r5, #1180] @ zero_extendqisi2
2270
- mov r0, r5
2271
- mov r10, r5, asl #8
2351
+.L459:
2352
+ add r6, r4, r6
2353
+ ldr r8, [r4, #1044]
2354
+ ldrb r6, [r6, #1144] @ zero_extendqisi2
2355
+ mov r0, r6
22722356 bl nandc_cs
22732357 cmp r9, #0
2274
- bne .L453
2275
- mov r0, r6
2358
+ lsl r10, r6, #8
2359
+ bne .L460
2360
+ mov r0, r7
22762361 bl slc_phy_page_address_calc
2277
- mov r6, r0
2278
- mov r0, r4
2279
- bl slc_phy_page_address_calc
2280
- ldrb r3, [fp] @ zero_extendqisi2
2281
- cmp r3, #0
2282
- mov r4, r0
2283
- beq .L454
2362
+ mov r7, r0
22842363 mov r0, r5
2364
+ bl slc_phy_page_address_calc
2365
+ ldrb r3, [r4] @ zero_extendqisi2
2366
+ mov r5, r0
2367
+ cmp r3, #0
2368
+ beq .L461
2369
+ mov r0, r6
22852370 bl zftl_flash_enter_slc_mode
2286
- b .L454
2287
-.L453:
2288
- ldr r3, [fp, #1096]
2371
+.L461:
2372
+ ldrb r3, [r4, #1127] @ zero_extendqisi2
2373
+ uxtb ip, r7
2374
+ lsr r0, r7, #8
2375
+ lsr r1, r7, #16
2376
+ cmp r3, #1
2377
+ bne .L463
2378
+ ldrb r3, [r4, #1119] @ zero_extendqisi2
2379
+ add r6, r8, r10
2380
+ str r3, [r6, #2056]
2381
+ mov r3, #0
2382
+ str r3, [r6, #2052]
2383
+ str r3, [r6, #2052]
2384
+ ldrb r3, [r4, #1152] @ zero_extendqisi2
2385
+ str ip, [r6, #2052]
2386
+ str r0, [r6, #2052]
2387
+ cmp r3, #0
2388
+ ldrb r3, [r4, #1120] @ zero_extendqisi2
2389
+ lsrne r7, r7, #24
2390
+ str r1, [r6, #2052]
2391
+ strne r7, [r6, #2052]
2392
+ add r7, r8, r10
2393
+ str r3, [r7, #2056]
2394
+ bl nandc_wait_flash_ready
2395
+ ldr r3, [r4, #1104]
2396
+ cmp r9, #0
2397
+ add r2, r8, r10
2398
+ add r8, r8, r10
2399
+ ldrb r3, [r3, #12] @ zero_extendqisi2
2400
+ sub r3, r3, #3
2401
+ clz r3, r3
2402
+ lsr r3, r3, #5
2403
+ moveq r3, #0
2404
+ cmp r3, #0
2405
+ mov r3, #0
2406
+ strne r9, [r7, #2056]
2407
+ str r3, [r2, #2056]
2408
+ str r3, [r6, #2052]
2409
+ str r3, [r6, #2052]
2410
+ uxtb r3, r5
2411
+ str r3, [r6, #2052]
2412
+ lsr r3, r5, #8
2413
+ str r3, [r6, #2052]
2414
+ lsr r3, r5, #16
2415
+ str r3, [r6, #2052]
2416
+ ldrb r3, [r4, #1152] @ zero_extendqisi2
2417
+ cmp r3, #0
2418
+ lsrne r5, r5, #24
2419
+ strne r5, [r6, #2052]
2420
+.L486:
2421
+ mov r3, #48
2422
+ str r3, [r8, #2056]
2423
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
2424
+.L460:
2425
+ ldr r3, [r4, #1104]
22892426 ldrb r3, [r3, #12] @ zero_extendqisi2
22902427 cmp r3, #3
2291
- bne .L455
2292
- ldrb r3, [fp, #1196] @ zero_extendqisi2
2428
+ bne .L462
2429
+ ldrb r3, [r4, #1158] @ zero_extendqisi2
22932430 cmp r3, #0
2294
- bne .L455
2295
- ldrb r3, [fp, #1197] @ zero_extendqisi2
2431
+ bne .L462
2432
+ ldrb r3, [r4, #1159] @ zero_extendqisi2
22962433 cmp r3, #0
22972434 addeq r3, r8, r10
22982435 streq r9, [r3, #2056]
2299
- beq .L454
2300
-.L455:
2301
- mov r0, r5
2436
+ beq .L461
2437
+.L462:
2438
+ mov r0, r6
23022439 bl zftl_flash_exit_slc_mode
2303
-.L454:
2304
- ldrb r2, [r7, #1119] @ zero_extendqisi2
2305
- uxtb ip, r6
2306
- ldr r3, .L479
2307
- mov r0, r6, lsr #8
2308
- cmp r2, #1
2309
- mov r1, r6, lsr #16
2310
- bne .L456
2311
- ldrb r2, [r3, #1111] @ zero_extendqisi2
2312
- add r5, r8, r10
2313
- ldrb r3, [r3, #1188] @ zero_extendqisi2
2314
- str r2, [r5, #2056]
2315
- mov r2, #0
2316
- cmp r3, r2
2317
- ldrb r3, [r7, #1112] @ zero_extendqisi2
2318
- str r2, [r5, #2052]
2319
- movne r6, r6, lsr #24
2320
- str r2, [r5, #2052]
2321
- str ip, [r5, #2052]
2322
- str r0, [r5, #2052]
2323
- str r1, [r5, #2052]
2324
- strne r6, [r5, #2052]
2325
- add r6, r8, r10
2326
- str r3, [r6, #2056]
2327
- bl nandc_wait_flash_ready
2328
- ldr r3, [r7, #1096]
2329
- ldrb r2, [r3, #12] @ zero_extendqisi2
2330
- adds r3, r9, #0
2331
- movne r3, #1
2332
- cmp r2, #3
2333
- add r2, r8, r10
2334
- add r10, r8, r10
2335
- movne r3, #0
2336
- cmp r3, #0
2337
- mov r3, #0
2338
- strne r9, [r6, #2056]
2339
- str r3, [r2, #2056]
2340
- str r3, [r5, #2052]
2341
- str r3, [r5, #2052]
2342
- uxtb r3, r4
2343
- str r3, [r5, #2052]
2344
- mov r3, r4, lsr #8
2345
- str r3, [r5, #2052]
2346
- mov r3, r4, lsr #16
2347
- str r3, [r5, #2052]
2348
- ldrb r3, [r7, #1188] @ zero_extendqisi2
2349
- cmp r3, #0
2350
- mov r3, #48
2351
- movne r4, r4, lsr #24
2352
- strne r4, [r5, #2052]
2353
- str r3, [r10, #2056]
2354
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
2355
-.L456:
2356
- ldr r2, [r3, #1096]
2440
+ b .L461
2441
+.L463:
2442
+ ldr r2, [r4, #1104]
23572443 ldrb r3, [r2, #7] @ zero_extendqisi2
23582444 cmp r3, #1
2359
- bne .L461
2445
+ bne .L468
23602446 ldrb r3, [r2, #12] @ zero_extendqisi2
23612447 cmp r3, #2
23622448 addeq r3, r8, r10
23632449 moveq lr, #38
23642450 streq lr, [r3, #2056]
2365
-.L461:
2366
- ldrb lr, [r7, #1111] @ zero_extendqisi2
2451
+.L468:
2452
+ ldrb lr, [r4, #1119] @ zero_extendqisi2
23672453 add r3, r8, r10
2454
+ cmp r9, #0
23682455 add r8, r8, r10
23692456 str lr, [r3, #2056]
23702457 str ip, [r3, #2052]
23712458 str r0, [r3, #2052]
23722459 str r1, [r3, #2052]
2373
- ldrb r1, [r2, #12] @ zero_extendqisi2
2374
- adds r2, r9, #0
2375
- movne r2, #1
2376
- cmp r1, #3
2377
- movne r2, #0
2460
+ ldrb r2, [r2, #12] @ zero_extendqisi2
2461
+ sub r2, r2, #3
2462
+ clz r2, r2
2463
+ lsr r2, r2, #5
2464
+ moveq r2, #0
23782465 cmp r2, #0
2379
- ldrb r2, [r7, #1112] @ zero_extendqisi2
2466
+ ldrb r2, [r4, #1120] @ zero_extendqisi2
23802467 strne r9, [r3, #2056]
23812468 str r2, [r8, #2056]
2382
- uxtb r2, r4
2469
+ uxtb r2, r5
23832470 str r2, [r3, #2052]
2384
- mov r2, r4, lsr #8
2385
- mov r4, r4, lsr #16
2471
+ lsr r2, r5, #8
2472
+ lsr r5, r5, #16
23862473 str r2, [r3, #2052]
2387
- str r4, [r3, #2052]
2388
- mov r3, #48
2389
- str r3, [r8, #2056]
2390
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
2391
-.L480:
2474
+ str r5, [r3, #2052]
2475
+ b .L486
2476
+.L488:
23922477 .align 2
2393
-.L479:
2478
+.L487:
23942479 .word .LANCHOR0
2395
- .word .LANCHOR1+1068
2480
+ .word .LANCHOR1+1038
23962481 .word .LC0
23972482 .fnend
23982483 .size flash_start_plane_read, .-flash_start_plane_read
23992484 .align 2
24002485 .global flash_set_interface_mode
2486
+ .syntax unified
2487
+ .arm
2488
+ .fpu softvfp
24012489 .type flash_set_interface_mode, %function
24022490 flash_set_interface_mode:
24032491 .fnstart
24042492 @ args = 0, pretend = 0, frame = 0
24052493 @ frame_needed = 0, uses_anonymous_args = 0
2406
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
2494
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
24072495 .save {r4, r5, r6, r7, r8, r9, r10, lr}
24082496 mov r8, r0
2409
- ldr r6, .L515
2410
- mov r9, #0
2411
- ldr r10, .L515+4
2497
+ ldr r6, .L528
2498
+ mov r10, #0
2499
+ ldr r9, .L528+4
24122500 mov r7, r6
2413
-.L493:
2414
- ldr r3, .L515+8
2415
- ldr r5, [r6, #1040]
2416
- ldrb r4, [r3, r9, asl #3] @ zero_extendqisi2
2501
+.L502:
2502
+ ldrb r4, [r9, r10, lsl #3] @ zero_extendqisi2
2503
+ ldr r5, [r6, #1044]
24172504 cmp r4, #69
2418
- cmpne r4, #152
2419
- beq .L482
2505
+ beq .L490
2506
+ add r3, r4, #119
2507
+ sub r1, r4, #44
2508
+ uxtb r2, r3
2509
+ clz r1, r1
2510
+ lsr r1, r1, #5
2511
+ cmp r2, #18
2512
+ ldrls r3, .L528+8
2513
+ movhi r3, #1
2514
+ mvnls r3, r3, lsr r2
2515
+ and r3, r3, #1
2516
+ eor r3, r3, #1
2517
+ orrs r3, r1, r3
2518
+ beq .L492
2519
+.L490:
2520
+ cmp r8, #1
2521
+ ldrb r1, [r7, #1192] @ zero_extendqisi2
2522
+ bne .L493
2523
+ tst r1, #1
2524
+ beq .L492
2525
+ ldr r3, .L528+12
2526
+ ldr r3, [r3]
2527
+ tst r3, #4096
2528
+ beq .L494
2529
+ ldr r0, .L528+16
2530
+ bl printk
2531
+.L494:
2532
+ lsl r2, r10, #8
24202533 cmp r4, #137
24212534 cmpne r4, #44
2422
- moveq r3, #1
2423
- movne r3, #0
2424
- cmp r4, #155
2425
- orreq r3, r3, #1
2426
- cmp r3, #0
2427
- beq .L483
2428
-.L482:
2429
- cmp r8, #1
2430
- ldrb r1, [r7, #1232] @ zero_extendqisi2
2431
- bne .L484
2432
- tst r1, #1
2433
- beq .L483
2434
- ldr r3, [r10]
2435
- tst r3, #4096
2436
- beq .L485
2437
- ldr r0, .L515+12
2438
- bl printk
2439
-.L485:
2440
- mov r2, r9, asl #8
2441
- cmp r4, #44
2442
- cmpne r4, #137
2443
- add r3, r5, r2
24442535 mov r1, #239
2536
+ add r3, r5, r2
24452537 str r1, [r3, #2056]
2446
- beq .L514
2538
+ bne .L495
2539
+.L527:
2540
+ mov r1, #1
2541
+ str r1, [r3, #2052]
2542
+ mov r1, #5
2543
+ b .L525
2544
+.L495:
24472545 cmp r4, #155
24482546 movne r1, #128
24492547 strne r1, [r3, #2052]
24502548 movne r1, #1
2451
- bne .L512
2452
-.L514:
2453
- mov r1, #1
2454
- str r1, [r3, #2052]
2455
- mov r1, #5
2456
- b .L512
2457
-.L484:
2458
- tst r1, #4
2459
- beq .L483
2460
- ldr r3, [r10]
2461
- tst r3, #4096
2462
- beq .L489
2463
- ldr r0, .L515+16
2464
- bl printk
2465
-.L489:
2466
- mov r2, r9, asl #8
2467
- cmp r4, #44
2468
- cmpne r4, #137
2469
- add r3, r5, r2
2470
- mov r1, #239
2471
- str r1, [r3, #2056]
2472
- moveq r1, #1
2473
- movne r1, #0
2474
- moveq r1, #1
2475
- streq r1, [r3, #2052]
2476
- moveq r1, #35
2477
- beq .L512
2478
- cmp r4, #155
2479
- moveq r1, #1
2480
- streq r1, [r3, #2052]
2481
- moveq r1, #37
2482
- movne r0, #128
2483
- strne r0, [r3, #2052]
2484
-.L512:
2485
- add r5, r5, r2
2549
+ beq .L527
2550
+.L525:
24862551 str r1, [r3, #2048]
2552
+ add r5, r5, r2
24872553 mov r3, #0
24882554 str r3, [r5, #2048]
24892555 str r3, [r5, #2048]
24902556 str r3, [r5, #2048]
2491
-.L483:
2492
- add r9, r9, #1
2493
- cmp r9, #4
2494
- bne .L493
2557
+.L492:
2558
+ add r10, r10, #1
2559
+ cmp r10, #4
2560
+ bne .L502
24952561 bl nandc_wait_flash_ready
24962562 mov r0, #0
2497
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
2498
-.L516:
2563
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
2564
+.L493:
2565
+ tst r1, #4
2566
+ beq .L492
2567
+ ldr r3, .L528+12
2568
+ ldr r3, [r3]
2569
+ tst r3, #4096
2570
+ beq .L498
2571
+ ldr r0, .L528+20
2572
+ bl printk
2573
+.L498:
2574
+ lsl r2, r10, #8
2575
+ mov r1, #239
2576
+ cmp r4, #137
2577
+ cmpne r4, #44
2578
+ add r3, r5, r2
2579
+ str r1, [r3, #2056]
2580
+ moveq r1, #1
2581
+ moveq r1, #1
2582
+ movne r1, #0
2583
+ streq r1, [r3, #2052]
2584
+ moveq r1, #35
2585
+ beq .L525
2586
+ cmp r4, #155
2587
+ moveq r1, #1
2588
+ movne r0, #128
2589
+ streq r1, [r3, #2052]
2590
+ moveq r1, #37
2591
+ strne r0, [r3, #2052]
2592
+ b .L525
2593
+.L529:
24992594 .align 2
2500
-.L515:
2595
+.L528:
25012596 .word .LANCHOR0
2597
+ .word .LANCHOR0+1160
2598
+ .word 294913
25022599 .word .LANCHOR2
2503
- .word .LANCHOR0+1200
2504
- .word .LC37
2505
- .word .LC38
2600
+ .word .LC34
2601
+ .word .LC35
25062602 .fnend
25072603 .size flash_set_interface_mode, .-flash_set_interface_mode
25082604 .align 2
2605
+ .syntax unified
2606
+ .arm
2607
+ .fpu softvfp
2608
+ .type mt_auto_read_calibration_config, %function
2609
+mt_auto_read_calibration_config:
2610
+ .fnstart
2611
+ @ args = 0, pretend = 0, frame = 0
2612
+ @ frame_needed = 0, uses_anonymous_args = 0
2613
+ push {r4, r5, r6, lr}
2614
+ .save {r4, r5, r6, lr}
2615
+ mov r5, r1
2616
+ mov r6, r0
2617
+ bl nandc_wait_flash_ready
2618
+ ldr r3, .L532
2619
+ mov r0, #200
2620
+ ldr r4, [r3, #1044]
2621
+ mov r3, #239
2622
+ add r4, r4, r6, lsl #8
2623
+ str r3, [r4, #2056]
2624
+ mov r3, #150
2625
+ str r3, [r4, #2052]
2626
+ bl ndelay
2627
+ mov r3, #0
2628
+ str r5, [r4, #2048]
2629
+ str r3, [r4, #2048]
2630
+ str r3, [r4, #2048]
2631
+ str r3, [r4, #2048]
2632
+ pop {r4, r5, r6, pc}
2633
+.L533:
2634
+ .align 2
2635
+.L532:
2636
+ .word .LANCHOR0
2637
+ .fnend
2638
+ .size mt_auto_read_calibration_config, .-mt_auto_read_calibration_config
2639
+ .align 2
25092640 .global flash_reset
2641
+ .syntax unified
2642
+ .arm
2643
+ .fpu softvfp
25102644 .type flash_reset, %function
25112645 flash_reset:
25122646 .fnstart
25132647 @ args = 0, pretend = 0, frame = 0
25142648 @ frame_needed = 0, uses_anonymous_args = 0
25152649 @ link register save eliminated.
2516
- ldr r3, .L518
2517
- mov r2, #255
2518
- ldr r3, [r3, #1040]
2519
- add r0, r3, r0, asl #8
2520
- str r2, [r0, #2056]
2650
+ ldr r3, .L535
2651
+ ldr r3, [r3, #1044]
2652
+ add r0, r3, r0, lsl #8
2653
+ mov r3, #255
2654
+ str r3, [r0, #2056]
25212655 b nandc_wait_flash_ready
2522
-.L519:
2656
+.L536:
25232657 .align 2
2524
-.L518:
2658
+.L535:
25252659 .word .LANCHOR0
25262660 .fnend
25272661 .size flash_reset, .-flash_reset
25282662 .align 2
25292663 .global flash_read_id
2664
+ .syntax unified
2665
+ .arm
2666
+ .fpu softvfp
25302667 .type flash_read_id, %function
25312668 flash_read_id:
25322669 .fnstart
25332670 @ args = 0, pretend = 0, frame = 0
25342671 @ frame_needed = 0, uses_anonymous_args = 0
2535
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, lr}
2672
+ push {r0, r1, r2, r3, r4, r5, r6, lr}
25362673 .save {r4, r5, r6, lr}
25372674 .pad #16
25382675 mov r6, r0
2539
- ldr r3, .L523
2676
+ ldr r3, .L540
25402677 mov r4, r1
2541
- ldr r5, [r3, #1040]
2678
+ ldr r5, [r3, #1044]
25422679 bl flash_reset
25432680 mov r0, r6
2544
- add r5, r5, r6, asl #8
25452681 bl nandc_cs
2682
+ add r5, r5, r6, lsl #8
25462683 mov r3, #144
25472684 mov r0, #200
25482685 str r3, [r5, #2056]
25492686 mov r3, #0
25502687 str r3, [r5, #2052]
2551
- bl timer_delay_ns
2688
+ bl ndelay
25522689 ldr r3, [r5, #2048]
2553
- mov r0, r6
25542690 strb r3, [r4]
25552691 ldr r3, [r5, #2048]
25562692 strb r3, [r4, #1]
....@@ -2566,60 +2702,63 @@
25662702 strb r3, [r4, #6]
25672703 ldr r3, [r5, #2048]
25682704 strb r3, [r4, #7]
2569
- bl nandc_de_cs
2705
+ bl nandc_de_cs.constprop.35
25702706 ldrb r2, [r4] @ zero_extendqisi2
25712707 sub r3, r2, #1
25722708 uxtb r3, r3
25732709 cmp r3, #253
2574
- bhi .L520
2575
- ldrb r1, [r4, #2] @ zero_extendqisi2
2710
+ bhi .L537
2711
+ ldrb r1, [r4, #5] @ zero_extendqisi2
25762712 ldrb r3, [r4, #1] @ zero_extendqisi2
2577
- ldr r0, .L523+4
2578
- str r1, [sp]
2579
- ldrb r1, [r4, #3] @ zero_extendqisi2
2580
- str r1, [sp, #4]
2713
+ ldr r0, .L540+4
2714
+ str r1, [sp, #12]
25812715 ldrb r1, [r4, #4] @ zero_extendqisi2
25822716 str r1, [sp, #8]
2583
- ldrb r1, [r4, #5] @ zero_extendqisi2
2584
- str r1, [sp, #12]
2717
+ ldrb r1, [r4, #3] @ zero_extendqisi2
2718
+ str r1, [sp, #4]
2719
+ ldrb r1, [r4, #2] @ zero_extendqisi2
2720
+ str r1, [sp]
25852721 add r1, r6, #1
25862722 bl printk
2587
-.L520:
2723
+.L537:
25882724 add sp, sp, #16
25892725 @ sp needed
2590
- ldmfd sp!, {r4, r5, r6, pc}
2591
-.L524:
2726
+ pop {r4, r5, r6, pc}
2727
+.L541:
25922728 .align 2
2593
-.L523:
2729
+.L540:
25942730 .word .LANCHOR0
2595
- .word .LC39
2731
+ .word .LC36
25962732 .fnend
25972733 .size flash_read_id, .-flash_read_id
25982734 .align 2
25992735 .global flash_read_spare
2736
+ .syntax unified
2737
+ .arm
2738
+ .fpu softvfp
26002739 .type flash_read_spare, %function
26012740 flash_read_spare:
26022741 .fnstart
26032742 @ args = 0, pretend = 0, frame = 0
26042743 @ frame_needed = 0, uses_anonymous_args = 0
2605
- stmfd sp!, {r3, r4, r5, lr}
2606
- .save {r3, r4, r5, lr}
2744
+ push {r4, r5, r6, lr}
2745
+ .save {r4, r5, r6, lr}
26072746 mov r5, r2
2608
- ldr r3, .L527
2609
- ldr r2, .L527+4
2747
+ ldr r3, .L544
2748
+ ldr r2, .L544+4
26102749 ldrb r3, [r3, #13] @ zero_extendqisi2
2611
- ldr r4, [r2, #1040]
2750
+ ldr r4, [r2, #1044]
26122751 mov r2, #0
2613
- add r4, r4, r0, asl #8
2614
- mov r3, r3, asl #9
2752
+ lsl r3, r3, #9
2753
+ add r4, r4, r0, lsl #8
26152754 str r2, [r4, #2056]
26162755 str r3, [r4, #2052]
2617
- mov r3, r3, lsr #8
2756
+ lsr r3, r3, #8
26182757 str r3, [r4, #2052]
26192758 uxtb r3, r1
26202759 str r3, [r4, #2052]
2621
- mov r3, r1, lsr #8
2622
- mov r1, r1, lsr #16
2760
+ lsr r3, r1, #8
2761
+ lsr r1, r1, #16
26232762 str r3, [r4, #2052]
26242763 mov r3, #48
26252764 str r1, [r4, #2052]
....@@ -2627,118 +2766,125 @@
26272766 bl nandc_wait_flash_ready
26282767 ldr r3, [r4, #2048]
26292768 strb r3, [r5]
2630
- ldmfd sp!, {r3, r4, r5, pc}
2631
-.L528:
2769
+ pop {r4, r5, r6, pc}
2770
+.L545:
26322771 .align 2
2633
-.L527:
2772
+.L544:
26342773 .word .LANCHOR2
26352774 .word .LANCHOR0
26362775 .fnend
26372776 .size flash_read_spare, .-flash_read_spare
26382777 .align 2
26392778 .global flash_read_otp_data
2779
+ .syntax unified
2780
+ .arm
2781
+ .fpu softvfp
26402782 .type flash_read_otp_data, %function
26412783 flash_read_otp_data:
26422784 .fnstart
26432785 @ args = 0, pretend = 0, frame = 0
26442786 @ frame_needed = 0, uses_anonymous_args = 0
2645
- ldr r3, .L533
2646
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2647
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2648
- .pad #12
2649
- mov r8, r0
2650
- ldr r7, [r3, #1040]
2651
- mov r10, r8, asl #8
2652
- mov r5, r1
2653
- mov r9, r2
2654
- add r4, r7, r10
2787
+ ldr r3, .L550
2788
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
2789
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
2790
+ .pad #8
2791
+ mov r9, r0
2792
+ lsl r9, r9, #8
2793
+ mov r6, r1
2794
+ mov r5, r2
2795
+ ldr r8, [r3, #1044]
2796
+ mov r10, #144
26552797 bl nandc_cs
2656
- mov fp, #144
26572798 mov r3, #239
26582799 mov r0, #50
2800
+ add r4, r8, r9
2801
+ mov r7, #0
26592802 str r3, [r4, #2056]
2660
- str fp, [r4, #2052]
2661
- mov r6, #0
2662
- bl timer_delay_ns
2803
+ str r10, [r4, #2052]
2804
+ bl ndelay
26632805 mov r3, #1
26642806 str r3, [r4, #2048]
2665
- str r6, [r4, #2048]
2666
- str r6, [r4, #2048]
2667
- str r6, [r4, #2048]
2807
+ str r7, [r4, #2048]
2808
+ str r7, [r4, #2048]
2809
+ str r7, [r4, #2048]
26682810 bl nandc_wait_flash_ready
26692811 mov r3, #238
2812
+ ldr r0, .L550+4
26702813 str r3, [r4, #2056]
2671
- str fp, [r4, #2052]
2814
+ str r10, [r4, #2052]
26722815 ldr r2, [r4, #2048]
26732816 ldr r3, [r4, #2048]
26742817 ldr r1, [r4, #2048]
2675
- ldr r0, .L533+4
26762818 str r1, [sp]
2677
- mov r1, r5
2819
+ mov r1, r6
26782820 bl printk
26792821 bl nandc_wait_flash_ready
2680
- str r6, [r4, #2056]
2681
- uxtb r3, r5
2682
- str r6, [r4, #2052]
2683
- str r6, [r4, #2052]
2822
+ uxtb r3, r6
2823
+ str r7, [r4, #2056]
2824
+ str r7, [r4, #2052]
2825
+ str r7, [r4, #2052]
26842826 str r3, [r4, #2052]
2685
- mov r3, r5, lsr #8
2686
- mov r5, r5, lsr #16
2827
+ lsr r3, r6, #8
2828
+ lsr r6, r6, #16
26872829 str r3, [r4, #2052]
26882830 mov r3, #48
2689
- str r5, [r4, #2052]
2831
+ str r6, [r4, #2052]
26902832 str r3, [r4, #2056]
26912833 bl nandc_wait_flash_ready
2692
- add r3, r9, #16384
2693
-.L530:
2694
- ldr r2, [r4, #2048]
2695
- strb r2, [r9], #1
2696
- cmp r9, r3
2697
- bne .L530
2698
- add r7, r7, r10
2834
+ add r3, r5, #16384
2835
+ mov r2, r5
2836
+.L547:
2837
+ ldr r1, [r4, #2048]
2838
+ strb r1, [r2], #1
2839
+ cmp r2, r3
2840
+ bne .L547
2841
+ add r8, r8, r9
26992842 mov r3, #239
2700
- mov r0, #50
2701
- str r3, [r7, #2056]
2843
+ str r3, [r8, #2056]
27022844 mov r3, #144
27032845 str r3, [r4, #2052]
2704
- bl timer_delay_ns
2846
+ mov r0, #50
2847
+ bl ndelay
27052848 mov r3, #0
2706
- mov r0, r8
27072849 str r3, [r4, #2048]
27082850 str r3, [r4, #2048]
27092851 str r3, [r4, #2048]
27102852 str r3, [r4, #2048]
2711
- add sp, sp, #12
2853
+ add sp, sp, #8
27122854 @ sp needed
2713
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2714
- b nandc_de_cs
2715
-.L534:
2855
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
2856
+ b nandc_de_cs.constprop.35
2857
+.L551:
27162858 .align 2
2717
-.L533:
2859
+.L550:
27182860 .word .LANCHOR0
2719
- .word .LC40
2861
+ .word .LC37
27202862 .fnend
27212863 .size flash_read_otp_data, .-flash_read_otp_data
27222864 .align 2
27232865 .global sandisk_prog_test_bad_block
2866
+ .syntax unified
2867
+ .arm
2868
+ .fpu softvfp
27242869 .type sandisk_prog_test_bad_block, %function
27252870 sandisk_prog_test_bad_block:
27262871 .fnstart
27272872 @ args = 0, pretend = 0, frame = 0
27282873 @ frame_needed = 0, uses_anonymous_args = 0
2729
- ldr r3, .L551
2730
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
2874
+ push {r4, r5, r6, r7, r8, lr}
27312875 .save {r4, r5, r6, r7, r8, lr}
2732
- mov r7, r0, asl #8
2733
- ldr r6, .L551+4
2876
+ lsl r7, r0, #8
2877
+ ldr r3, .L568
27342878 mov r8, r1
2735
- ldr r5, [r3, #1040]
2736
- ldrb r4, [r6, #33] @ zero_extendqisi2
2737
- add r3, r5, r7
2738
- cmp r4, #0
2739
- strne r4, [r3, #2056]
2879
+ ldr r6, .L568+4
2880
+ ldr r5, [r3, #1044]
2881
+ ldrb r3, [r6, #33] @ zero_extendqisi2
27402882 add r4, r5, r7
2883
+ cmp r3, #0
2884
+ addne r2, r5, r7
2885
+ addeq r3, r5, r7
27412886 moveq r2, #162
2887
+ strne r3, [r2, #2056]
27422888 streq r2, [r3, #2056]
27432889 mov r3, #128
27442890 str r3, [r4, #2056]
....@@ -2747,9 +2893,9 @@
27472893 str r3, [r4, #2052]
27482894 uxtb r3, r1
27492895 str r3, [r4, #2052]
2750
- mov r3, r1, lsr #8
2896
+ lsr r3, r1, #8
27512897 str r3, [r4, #2052]
2752
- mov r3, r1, lsr #16
2898
+ lsr r3, r1, #16
27532899 str r3, [r4, #2052]
27542900 mov r3, #16
27552901 str r3, [r4, #2056]
....@@ -2757,45 +2903,48 @@
27572903 mov r3, #112
27582904 mov r0, #200
27592905 str r3, [r4, #2056]
2760
- bl timer_delay_ns
2906
+ bl ndelay
27612907 ldr r2, [r4, #2048]
27622908 cmp r2, #255
27632909 ldreq r2, [r4, #2048]
27642910 ands r4, r2, #5
2765
- beq .L539
2911
+ beq .L556
27662912 ldr r3, [r6]
27672913 tst r3, #4096
2768
- beq .L539
2769
- ldr r0, .L551+8
2914
+ beq .L556
27702915 mov r1, r8
2916
+ ldr r0, .L568+8
27712917 bl printk
2772
-.L539:
2918
+.L556:
27732919 ldrb r3, [r6, #34] @ zero_extendqisi2
27742920 mov r0, r4
27752921 cmp r3, #0
27762922 addne r5, r5, r7
27772923 strne r3, [r5, #2056]
2778
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
2779
-.L552:
2924
+ pop {r4, r5, r6, r7, r8, pc}
2925
+.L569:
27802926 .align 2
2781
-.L551:
2927
+.L568:
27822928 .word .LANCHOR0
27832929 .word .LANCHOR2
2784
- .word .LC41
2930
+ .word .LC38
27852931 .fnend
27862932 .size sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
27872933 .align 2
27882934 .global nandc_rdy_status
2935
+ .syntax unified
2936
+ .arm
2937
+ .fpu softvfp
27892938 .type nandc_rdy_status, %function
27902939 nandc_rdy_status:
27912940 .fnstart
27922941 @ args = 0, pretend = 0, frame = 8
27932942 @ frame_needed = 0, uses_anonymous_args = 0
27942943 @ link register save eliminated.
2795
- ldr r3, .L555
2944
+ ldr r3, .L572
27962945 .pad #8
27972946 sub sp, sp, #8
2798
- ldr r3, [r3, #1040]
2947
+ ldr r3, [r3, #1044]
27992948 ldr r3, [r3]
28002949 str r3, [sp, #4]
28012950 ldr r0, [sp, #4]
....@@ -2803,14 +2952,17 @@
28032952 add sp, sp, #8
28042953 @ sp needed
28052954 bx lr
2806
-.L556:
2955
+.L573:
28072956 .align 2
2808
-.L555:
2957
+.L572:
28092958 .word .LANCHOR0
28102959 .fnend
28112960 .size nandc_rdy_status, .-nandc_rdy_status
28122961 .align 2
28132962 .global nandc_bch_sel
2963
+ .syntax unified
2964
+ .arm
2965
+ .fpu softvfp
28142966 .type nandc_bch_sel, %function
28152967 nandc_bch_sel:
28162968 .fnstart
....@@ -2824,215 +2976,207 @@
28242976 ldr r2, [sp, #4]
28252977 orr r2, r2, #1
28262978 str r2, [sp, #4]
2827
- ldr r2, .L570
2979
+ ldr r2, .L586
28282980 ldrb r1, [r2, #1028] @ zero_extendqisi2
2829
- strb r0, [r2, #1172]
2981
+ strb r0, [r2, #1193]
28302982 cmp r1, #9
2831
- bne .L558
2832
- ldr r1, [r2, #1040]
2983
+ bne .L575
2984
+ ldr r2, [r2, #1044]
28332985 cmp r0, #70
2834
- ldr r2, [sp, #4]
2835
- str r2, [r1, #16]
2836
- beq .L559
2986
+ ldr r1, [sp, #4]
2987
+ str r1, [r2, #16]
2988
+ beq .L576
28372989 cmp r0, #60
28382990 moveq r3, #3
2839
- beq .L559
2991
+ beq .L576
28402992 cmp r0, #40
28412993 moveq r3, #2
28422994 movne r3, #1
2843
-.L559:
2844
- mov r2, #0
2845
- str r2, [sp]
2846
- ldr r2, [sp]
2847
- bic r2, r2, #234881024
2848
- orr r3, r2, r3, asl #25
2849
- str r3, [sp]
2995
+.L576:
2996
+ mov r1, #0
2997
+ str r1, [sp]
2998
+ ldr r1, [sp]
2999
+ bfi r1, r3, #25, #3
3000
+ str r1, [sp]
28503001 ldr r3, [sp]
28513002 orr r3, r3, #1
28523003 str r3, [sp]
28533004 ldr r3, [sp]
2854
- str r3, [r1, #32]
2855
- b .L557
2856
-.L558:
2857
- ldr r1, [sp, #4]
2858
- cmp r0, #16
2859
- ldr r2, [r2, #1040]
2860
- str r1, [r2, #8]
2861
- str r3, [sp]
2862
- ldr r3, [sp]
2863
- bic r3, r3, #65280
2864
- orr r3, r3, #4096
2865
- str r3, [sp]
2866
- ldr r3, [sp]
2867
- bic r3, r3, #262144
2868
- str r3, [sp]
2869
- beq .L568
2870
- ldr r3, [sp]
2871
- cmp r0, #24
2872
- orreq r3, r3, #16
2873
- beq .L569
2874
- orr r3, r3, #262144
2875
- str r3, [sp]
2876
- ldr r3, [sp]
2877
- cmp r0, #40
2878
- orr r3, r3, #16
2879
- str r3, [sp]
2880
- bne .L562
2881
-.L568:
2882
- ldr r3, [sp]
2883
- bic r3, r3, #16
2884
-.L569:
2885
- str r3, [sp]
2886
-.L562:
2887
- ldr r3, [sp]
2888
- orr r3, r3, #1
2889
- str r3, [sp]
2890
- ldr r3, [sp]
2891
- str r3, [r2, #12]
2892
-.L557:
3005
+ str r3, [r2, #32]
3006
+.L574:
28933007 add sp, sp, #8
28943008 @ sp needed
28953009 bx lr
2896
-.L571:
3010
+.L575:
3011
+ ldr r1, [r2, #1044]
3012
+ mov ip, #16
3013
+ ldr r2, [sp, #4]
3014
+ cmp r0, ip
3015
+ str r2, [r1, #8]
3016
+ str r3, [sp]
3017
+ ldr r2, [sp]
3018
+ bfi r2, ip, #8, #8
3019
+ str r2, [sp]
3020
+ ldr r2, [sp]
3021
+ bfi r2, r3, #18, #1
3022
+ str r2, [sp]
3023
+ bne .L578
3024
+.L585:
3025
+ ldr r2, [sp]
3026
+ bfi r2, r3, #4, #1
3027
+ str r2, [sp]
3028
+ b .L579
3029
+.L578:
3030
+ cmp r0, #24
3031
+ ldreq r3, [sp]
3032
+ orreq r3, r3, #16
3033
+ streq r3, [sp]
3034
+ beq .L579
3035
+ ldr r2, [sp]
3036
+ cmp r0, #40
3037
+ orr r2, r2, #262144
3038
+ str r2, [sp]
3039
+ ldr r2, [sp]
3040
+ orr r2, r2, #16
3041
+ str r2, [sp]
3042
+ beq .L585
3043
+.L579:
3044
+ ldr r3, [sp]
3045
+ orr r3, r3, #1
3046
+ str r3, [sp]
3047
+ ldr r3, [sp]
3048
+ str r3, [r1, #12]
3049
+ b .L574
3050
+.L587:
28973051 .align 2
2898
-.L570:
3052
+.L586:
28993053 .word .LANCHOR0
29003054 .fnend
29013055 .size nandc_bch_sel, .-nandc_bch_sel
29023056 .align 2
29033057 .global zftl_flash_resume
3058
+ .syntax unified
3059
+ .arm
3060
+ .fpu softvfp
29043061 .type zftl_flash_resume, %function
29053062 zftl_flash_resume:
29063063 .fnstart
29073064 @ args = 0, pretend = 0, frame = 0
29083065 @ frame_needed = 0, uses_anonymous_args = 0
2909
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
2910
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
2911
- ldr r4, .L583
3066
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
3067
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
3068
+ ldr r4, .L599
29123069 ldrb r3, [r4, #1028] @ zero_extendqisi2
2913
- ldr r2, [r4, #1044]
2914
- cmp r3, #9
2915
- ldr r3, [r4, #1040]
2916
- str r2, [r3]
29173070 ldr r2, [r4, #1048]
2918
- ldr r3, [r4, #1040]
2919
- str r2, [r3, #4]
3071
+ cmp r3, #9
3072
+ ldr r3, [r4, #1044]
3073
+ str r2, [r3]
29203074 ldr r2, [r4, #1052]
2921
- bne .L573
3075
+ ldr r3, [r4, #1044]
3076
+ str r2, [r3, #4]
3077
+ ldr r2, [r4, #1056]
3078
+ bne .L589
29223079 str r2, [r3, #16]
2923
- ldr r2, [r4, #1056]
3080
+ ldr r2, [r4, #1060]
29243081 str r2, [r3, #32]
2925
- ldr r2, [r4, #1060]
3082
+ ldr r2, [r4, #1064]
29263083 str r2, [r3, #80]
2927
- ldr r2, [r4, #1064]
3084
+ ldr r2, [r4, #1068]
29283085 str r2, [r3, #84]
2929
- ldr r2, [r4, #1068]
3086
+ ldr r2, [r4, #1072]
29303087 str r2, [r3, #520]
2931
- ldr r2, [r4, #1072]
3088
+ ldr r2, [r4, #1076]
29323089 str r2, [r3, #8]
2933
- b .L574
2934
-.L573:
2935
- str r2, [r3, #8]
2936
- ldr r2, [r4, #1056]
2937
- str r2, [r3, #12]
2938
- ldr r2, [r4, #1060]
2939
- str r2, [r3, #304]
2940
- ldr r2, [r4, #1064]
2941
- str r2, [r3, #308]
2942
- ldr r2, [r4, #1068]
2943
- str r2, [r3, #336]
2944
- ldr r2, [r4, #1072]
2945
- str r2, [r3, #344]
2946
-.L574:
2947
- ldr r6, .L583+4
3090
+.L591:
3091
+ ldr r6, .L599+4
29483092 mov r5, #0
29493093 mov r8, #2
2950
- sub r7, r6, #8
2951
-.L576:
2952
- ldrb r3, [r6, r5, asl #3] @ zero_extendqisi2
3094
+ sub r7, r6, #6
3095
+.L590:
3096
+ ldrb r3, [r6, r5, lsl #3] @ zero_extendqisi2
29533097 sub r3, r3, #1
29543098 uxtb r3, r3
29553099 cmp r3, #253
2956
- bhi .L575
3100
+ bhi .L592
29573101 uxtb r9, r5
29583102 mov r0, r9
29593103 bl flash_reset
29603104 strb r8, [r5, r7]
29613105 mov r0, r9
29623106 bl zftl_flash_enter_slc_mode
2963
-.L575:
3107
+.L592:
29643108 add r5, r5, #1
29653109 cmp r5, #4
2966
- bne .L576
2967
- ldrb r3, [r4, #1135] @ zero_extendqisi2
3110
+ bne .L590
3111
+ ldrb r3, [r4, #1143] @ zero_extendqisi2
29683112 cmp r3, #0
2969
- beq .L577
3113
+ beq .L593
29703114 mov r0, #1
29713115 bl nandc_set_if_mode
29723116 mov r0, r5
29733117 bl flash_set_interface_mode
29743118 mov r0, r5
29753119 bl nandc_set_if_mode
2976
- ldr r3, .L583
2977
- ldrb r0, [r3, #1061] @ zero_extendqisi2
3120
+ ldrb r0, [r4, #1065] @ zero_extendqisi2
29783121 bl nandc_set_ddr_para
2979
-.L577:
2980
- ldr r3, .L583+8
3122
+.L593:
3123
+ ldr r3, .L599+8
3124
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
29813125 ldrb r0, [r3, #24] @ zero_extendqisi2
2982
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
29833126 b nandc_bch_sel
2984
-.L584:
3127
+.L589:
3128
+ str r2, [r3, #8]
3129
+ ldr r2, [r4, #1060]
3130
+ str r2, [r3, #12]
3131
+ ldr r2, [r4, #1064]
3132
+ str r2, [r3, #304]
3133
+ ldr r2, [r4, #1068]
3134
+ str r2, [r3, #308]
3135
+ ldr r2, [r4, #1072]
3136
+ str r2, [r3, #336]
3137
+ ldr r2, [r4, #1076]
3138
+ str r2, [r3, #344]
3139
+ b .L591
3140
+.L600:
29853141 .align 2
2986
-.L583:
3142
+.L599:
29873143 .word .LANCHOR0
2988
- .word .LANCHOR0+1200
3144
+ .word .LANCHOR0+1160
29893145 .word .LANCHOR2
29903146 .fnend
29913147 .size zftl_flash_resume, .-zftl_flash_resume
29923148 .align 2
29933149 .global rk_nandc_flash_ready
3150
+ .syntax unified
3151
+ .arm
3152
+ .fpu softvfp
29943153 .type rk_nandc_flash_ready, %function
29953154 rk_nandc_flash_ready:
29963155 .fnstart
29973156 @ args = 0, pretend = 0, frame = 0
29983157 @ frame_needed = 0, uses_anonymous_args = 0
29993158 @ link register save eliminated.
3000
- ldr r3, .L588
3001
- ldrb r3, [r3, #1028] @ zero_extendqisi2
3002
- cmp r3, #9
3003
- ldreq r3, [r0, #292]
3004
- ldrne r3, [r0, #368]
3005
- orreq r3, r3, #2
3006
- orrne r3, r3, #2
3007
- streq r3, [r0, #292]
3008
- strne r3, [r0, #368]
3009
- ldreq r3, [r0, #288]
3010
- ldrne r3, [r0, #364]
3011
- biceq r3, r3, #2
3012
- bicne r3, r3, #2
3013
- streq r3, [r0, #288]
3014
- strne r3, [r0, #364]
3015
- bx lr
3016
-.L589:
3017
- .align 2
3018
-.L588:
3019
- .word .LANCHOR0
3159
+ mov r1, #1
3160
+ b nandc_irq_disable
30203161 .fnend
30213162 .size rk_nandc_flash_ready, .-rk_nandc_flash_ready
30223163 .align 2
30233164 .global nandc_iqr_wait_flash_ready
3165
+ .syntax unified
3166
+ .arm
3167
+ .fpu softvfp
30243168 .type nandc_iqr_wait_flash_ready, %function
30253169 nandc_iqr_wait_flash_ready:
30263170 .fnstart
30273171 @ args = 0, pretend = 0, frame = 0
30283172 @ frame_needed = 0, uses_anonymous_args = 0
3029
- stmfd sp!, {r4, lr}
3173
+ push {r4, lr}
30303174 .save {r4, lr}
3031
- ldr r4, .L597
3032
- ldr r0, [r4, #1040]
3175
+ ldr r4, .L607
3176
+ ldr r0, [r4, #1044]
30333177 bl rk_nandc_rb_irq_flag_init
30343178 ldrb r3, [r4, #1028] @ zero_extendqisi2
3035
- ldr r0, [r4, #1040]
3179
+ ldr r0, [r4, #1044]
30363180 cmp r3, #9
30373181 ldreq r3, [r0, #292]
30383182 ldrne r3, [r0, #368]
....@@ -3048,271 +3192,258 @@
30483192 strne r3, [r0, #364]
30493193 ldr r3, [r0]
30503194 tst r3, #512
3051
- bne .L593
3052
- ldmfd sp!, {r4, lr}
3195
+ bne .L605
3196
+ pop {r4, lr}
30533197 b wait_for_nand_flash_ready
3054
-.L593:
3055
- ldrb r3, [r4, #1028] @ zero_extendqisi2
3056
- cmp r3, #9
3057
- ldreq r3, [r0, #292]
3058
- ldrne r3, [r0, #368]
3059
- orreq r3, r3, #2
3060
- orrne r3, r3, #2
3061
- streq r3, [r0, #292]
3062
- strne r3, [r0, #368]
3063
- ldreq r3, [r0, #288]
3064
- ldrne r3, [r0, #364]
3065
- biceq r3, r3, #2
3066
- bicne r3, r3, #2
3067
- streq r3, [r0, #288]
3068
- strne r3, [r0, #364]
3069
- ldmfd sp!, {r4, pc}
3070
-.L598:
3198
+.L605:
3199
+ mov r1, #1
3200
+ pop {r4, lr}
3201
+ b nandc_irq_disable
3202
+.L608:
30713203 .align 2
3072
-.L597:
3204
+.L607:
30733205 .word .LANCHOR0
30743206 .fnend
30753207 .size nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready
30763208 .align 2
30773209 .global flash_erase_duplane_block
3210
+ .syntax unified
3211
+ .arm
3212
+ .fpu softvfp
30783213 .type flash_erase_duplane_block, %function
30793214 flash_erase_duplane_block:
30803215 .fnstart
3081
- @ args = 0, pretend = 0, frame = 8
3216
+ @ args = 0, pretend = 0, frame = 0
30823217 @ frame_needed = 0, uses_anonymous_args = 0
3083
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
3084
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
3085
- .pad #12
3086
- mov r8, r3
3087
- ldr fp, .L624
3218
+ push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
3219
+ .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
3220
+ mov r10, r3
3221
+ ldr r7, .L634
30883222 mov r4, r0
30893223 mov r5, r1
3090
- mov r9, r2
3091
- ldrb r3, [fp, #1101] @ zero_extendqisi2
3224
+ mov r6, r2
3225
+ ldrb r3, [r7, #1109] @ zero_extendqisi2
30923226 cmp r3, r0
3093
- bhi .L600
3094
- ldr r1, .L624+4
3227
+ bhi .L610
30953228 movw r2, #695
3096
- ldr r0, .L624+8
3229
+ ldr r1, .L634+4
3230
+ ldr r0, .L634+8
30973231 bl printk
30983232 bl dump_stack
3099
-.L600:
3100
- ldrb r2, [fp, #1101] @ zero_extendqisi2
3101
- ldr r3, .L624
3102
- cmp r2, r4
3103
- mvnls r0, #0
3104
- bls .L601
3105
- add r4, r3, r4
3106
- ldr r7, [r3, #1040]
3107
- ldr r3, .L624+12
3108
- ldrb r6, [r4, #1180] @ zero_extendqisi2
3233
+.L610:
3234
+ ldrb r3, [r7, #1109] @ zero_extendqisi2
3235
+ cmp r3, r4
3236
+ bls .L619
3237
+ ldr r3, .L634+12
3238
+ add r4, r7, r4
3239
+ ldrb r4, [r4, #1144] @ zero_extendqisi2
3240
+ ldr r9, [r7, #1044]
31093241 ldr r3, [r3]
3110
- add r10, r6, #8
3242
+ add r8, r4, #8
31113243 tst r3, #16
3112
- add r10, r7, r10, asl #8
3113
- beq .L602
3114
- ldr r0, .L624+16
3115
- mov r1, r6
3116
- mov r2, r9
3117
- mov r3, r8
3244
+ add r8, r9, r8, lsl #8
3245
+ beq .L612
3246
+ mov r3, r10
3247
+ mov r2, r6
3248
+ mov r1, r4
3249
+ ldr r0, .L634+16
31183250 bl printk
3119
-.L602:
3251
+.L612:
31203252 bl nandc_wait_flash_ready
3121
- mov r0, r6
3253
+ mov r0, r4
31223254 bl nandc_cs
31233255 cmp r5, #0
3124
- mov r0, r6
3125
- bne .L603
3256
+ mov r0, r4
3257
+ bne .L613
31263258 bl zftl_flash_enter_slc_mode
3127
- b .L604
3128
-.L603:
3129
- bl zftl_flash_exit_slc_mode
3130
-.L604:
3131
- mov r3, r6, asl #8
3132
- mov r2, #96
3133
- add r4, r7, r3
3134
- str r2, [r4, #2056]
3135
- uxtb r2, r9
3136
- str r2, [r4, #2052]
3137
- mov r2, r9, lsr #8
3138
- str r2, [r4, #2052]
3139
- mov r2, r9, lsr #16
3140
- str r2, [r4, #2052]
3141
- ldrb r2, [fp, #1188] @ zero_extendqisi2
3142
- cmp r2, #0
3143
- movne r2, r9, lsr #24
3144
- strne r2, [r4, #2052]
3145
- ldrb r2, [fp, #1233] @ zero_extendqisi2
3146
- cmp r2, #0
3147
- movne r5, #0
3148
- bne .L606
3149
- add r2, r7, r3
3150
- mov r1, #208
3151
- str r3, [sp, #4]
3152
- str r1, [r2, #2056]
3259
+.L614:
3260
+ lsl r4, r4, #8
3261
+ mov r3, #96
3262
+ add r5, r9, r4
3263
+ str r3, [r5, #2056]
3264
+ uxtb r3, r6
3265
+ str r3, [r5, #2052]
3266
+ lsr r3, r6, #8
3267
+ str r3, [r5, #2052]
3268
+ lsr r3, r6, #16
3269
+ str r3, [r5, #2052]
3270
+ ldrb r3, [r7, #1152] @ zero_extendqisi2
3271
+ cmp r3, #0
3272
+ lsrne r3, r6, #24
3273
+ strne r3, [r5, #2052]
3274
+ ldrb r3, [r7, #1194] @ zero_extendqisi2
3275
+ cmp r3, #0
3276
+ movne fp, #0
3277
+ bne .L616
3278
+ add r3, r9, r4
3279
+ mov r2, #208
3280
+ str r2, [r3, #2056]
31533281 bl nandc_wait_flash_ready
3154
- mov r0, r10
3282
+ mov r0, r8
31553283 bl flash_read_status
3156
- ldr r3, [sp, #4]
3157
- and r5, r0, #5
3158
-.L606:
3159
- add r2, r7, r3
3160
- mov r1, #96
3161
- add r7, r7, r3
3284
+ and fp, r0, #5
3285
+.L616:
3286
+ mov r2, #96
3287
+ add r3, r9, r4
3288
+ str r2, [r3, #2056]
3289
+ uxtb r3, r10
3290
+ add r0, r9, r4
3291
+ str r3, [r5, #2052]
3292
+ lsr r3, r10, #8
3293
+ str r3, [r5, #2052]
3294
+ lsr r3, r10, #16
3295
+ str r3, [r5, #2052]
3296
+ ldrb r3, [r7, #1152] @ zero_extendqisi2
3297
+ cmp r3, #0
31623298 mov r3, #208
3163
- str r1, [r2, #2056]
3164
- uxtb r2, r8
3165
- str r2, [r4, #2052]
3166
- mov r2, r8, lsr #8
3167
- str r2, [r4, #2052]
3168
- mov r2, r8, lsr #16
3169
- str r2, [r4, #2052]
3170
- ldrb r2, [fp, #1188] @ zero_extendqisi2
3171
- cmp r2, #0
3172
- movne r8, r8, lsr #24
3173
- strne r8, [r4, #2052]
3174
- str r3, [r7, #2056]
3299
+ lsrne r2, r10, #24
3300
+ strne r2, [r5, #2052]
3301
+ str r3, [r0, #2056]
31753302 bl nandc_iqr_wait_flash_ready
31763303 bl nandc_wait_flash_ready
3177
- mov r0, r10
3304
+ mov r0, r8
31783305 bl flash_read_status
3179
- mov r4, r0
3180
- mov r0, r6
3181
- bl nandc_de_cs
3182
- and r3, r4, #5
3183
- orrs r5, r3, r5
3184
- beq .L608
3185
- ldr r0, .L624+20
3186
- mov r1, r9
3187
- mov r2, r4
3306
+ bl nandc_de_cs.constprop.35
3307
+ and r3, r0, #5
3308
+ orrs fp, r3, fp
3309
+ beq .L618
3310
+ mov r2, r0
3311
+ mov r1, r6
3312
+ ldr r0, .L634+20
31883313 bl printk
3189
-.L608:
3190
- mov r0, r5
3191
-.L601:
3192
- add sp, sp, #12
3193
- @ sp needed
3194
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
3195
-.L625:
3314
+.L618:
3315
+ mov r0, fp
3316
+ pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
3317
+.L613:
3318
+ bl zftl_flash_exit_slc_mode
3319
+ b .L614
3320
+.L619:
3321
+ mvn r0, #0
3322
+ pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
3323
+.L635:
31963324 .align 2
3197
-.L624:
3325
+.L634:
31983326 .word .LANCHOR0
3199
- .word .LANCHOR1+1092
3327
+ .word .LANCHOR1+1061
32003328 .word .LC0
32013329 .word .LANCHOR2
3202
- .word .LC42
3203
- .word .LC43
3330
+ .word .LC39
3331
+ .word .LC40
32043332 .fnend
32053333 .size flash_erase_duplane_block, .-flash_erase_duplane_block
32063334 .align 2
32073335 .global flash_erase_block_en
3336
+ .syntax unified
3337
+ .arm
3338
+ .fpu softvfp
32083339 .type flash_erase_block_en, %function
32093340 flash_erase_block_en:
32103341 .fnstart
32113342 @ args = 0, pretend = 0, frame = 0
32123343 @ frame_needed = 0, uses_anonymous_args = 0
3213
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
3344
+ push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
32143345 .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
3215
- mvn r4, #0
3216
- ldr r5, .L645
32173346 mov r7, r0
3347
+ ldr r5, .L655
32183348 mov fp, r1
32193349 mov r8, r2
3220
- ldrb r3, [r5, #1189] @ zero_extendqisi2
3221
- rsb r3, r3, #24
3222
- bic r4, r2, r4, asl r3
3223
- ldrb r3, [r5, #1101] @ zero_extendqisi2
3350
+ ldrb r6, [r5, #1153] @ zero_extendqisi2
3351
+ rsb r3, r6, #24
3352
+ mvn r6, #0
3353
+ bic r6, r2, r6, lsl r3
3354
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
32243355 cmp r3, r0
3225
- bhi .L627
3226
- ldr r1, .L645+4
3356
+ bhi .L637
32273357 movw r2, #757
3228
- ldr r0, .L645+8
3358
+ ldr r1, .L655+4
3359
+ ldr r0, .L655+8
32293360 bl printk
32303361 bl dump_stack
3231
-.L627:
3232
- ldrb r2, [r5, #1101] @ zero_extendqisi2
3233
- ldr r3, .L645
3234
- cmp r2, r7
3235
- bls .L634
3236
- add r2, r3, r7
3237
- ldr r9, [r3, #1040]
3238
- ldr r3, .L645+12
3239
- ldrb r6, [r2, #1180] @ zero_extendqisi2
3362
+.L637:
3363
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
3364
+ cmp r3, r7
3365
+ bls .L644
3366
+ add r3, r5, r7
3367
+ ldr r9, [r5, #1044]
3368
+ ldrb r4, [r3, #1144] @ zero_extendqisi2
3369
+ ldr r3, .L655+12
3370
+ add r10, r4, #8
32403371 ldr r3, [r3]
3241
- add r10, r6, #8
3372
+ add r10, r9, r10, lsl #8
32423373 tst r3, #16
3243
- add r10, r9, r10, asl #8
3244
- beq .L629
3245
- ldr r0, .L645+16
3246
- mov r1, r6
3247
- mov r2, r8
3374
+ beq .L639
32483375 mov r3, fp
3376
+ mov r2, r8
3377
+ mov r1, r4
3378
+ ldr r0, .L655+16
32493379 bl printk
3250
-.L629:
3380
+.L639:
32513381 bl nandc_wait_flash_ready
3252
- mov r0, r6
3382
+ mov r0, r4
32533383 bl nandc_cs
32543384 cmp fp, #0
3255
- mov r0, r6
3256
- bne .L630
3385
+ mov r0, r4
3386
+ bne .L640
32573387 bl zftl_flash_enter_slc_mode
3258
- b .L631
3259
-.L630:
3260
- bl zftl_flash_exit_slc_mode
3261
-.L631:
3262
- mov r2, r6, asl #8
3263
- mov r1, #96
3264
- add r3, r9, r2
3265
- add r9, r9, r2
3266
- str r1, [r3, #2056]
3267
- uxtb r1, r4
3268
- str r1, [r3, #2052]
3269
- mov r1, r4, lsr #8
3270
- str r1, [r3, #2052]
3271
- mov r1, r4, lsr #16
3272
- str r1, [r3, #2052]
3273
- ldrb r1, [r5, #1188] @ zero_extendqisi2
3274
- cmp r1, #0
3275
- movne r4, r4, lsr #24
3276
- strne r4, [r3, #2052]
3388
+.L641:
3389
+ lsl r4, r4, #8
3390
+ mov r2, #96
3391
+ add r3, r9, r4
3392
+ add r4, r9, r4
3393
+ str r2, [r3, #2056]
3394
+ uxtb r2, r6
3395
+ str r2, [r3, #2052]
3396
+ lsr r2, r6, #8
3397
+ str r2, [r3, #2052]
3398
+ lsr r2, r6, #16
3399
+ str r2, [r3, #2052]
3400
+ ldrb r2, [r5, #1152] @ zero_extendqisi2
3401
+ cmp r2, #0
3402
+ lsrne r6, r6, #24
3403
+ strne r6, [r3, #2052]
32773404 mov r3, #208
3278
- str r3, [r9, #2056]
3405
+ str r3, [r4, #2056]
32793406 bl nandc_iqr_wait_flash_ready
32803407 bl nandc_wait_flash_ready
32813408 mov r0, r10
32823409 bl flash_read_status
3283
- mov r4, r0
3284
- mov r0, r6
3285
- bl nandc_de_cs
3286
- ands r4, r4, #5
3287
- beq .L633
3410
+ bl nandc_de_cs.constprop.35
3411
+ ands r4, r0, #5
3412
+ beq .L643
32883413 ldrh r1, [r5, #2]
32893414 mov r0, r8
32903415 bl __aeabi_uidiv
32913416 mov r3, r4
3292
- mov r1, r7
32933417 mvn r4, #0
32943418 mov r2, r0
3295
- ldr r0, .L645+20
3419
+ mov r1, r7
3420
+ ldr r0, .L655+20
32963421 bl printk
3297
-.L633:
3422
+.L643:
32983423 mov r0, r4
3299
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
3300
-.L634:
3424
+ pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
3425
+.L640:
3426
+ bl zftl_flash_exit_slc_mode
3427
+ b .L641
3428
+.L644:
33013429 mvn r0, #0
3302
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
3303
-.L646:
3430
+ pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
3431
+.L656:
33043432 .align 2
3305
-.L645:
3433
+.L655:
33063434 .word .LANCHOR0
3307
- .word .LANCHOR1+1120
3435
+ .word .LANCHOR1+1087
33083436 .word .LC0
33093437 .word .LANCHOR2
3310
- .word .LC44
3311
- .word .LC45
3438
+ .word .LC41
3439
+ .word .LC42
33123440 .fnend
33133441 .size flash_erase_block_en, .-flash_erase_block_en
33143442 .align 2
33153443 .global flash_erase_block
3444
+ .syntax unified
3445
+ .arm
3446
+ .fpu softvfp
33163447 .type flash_erase_block, %function
33173448 flash_erase_block:
33183449 .fnstart
....@@ -3326,117 +3457,105 @@
33263457 .size flash_erase_block, .-flash_erase_block
33273458 .align 2
33283459 .global flash_erase_all
3460
+ .syntax unified
3461
+ .arm
3462
+ .fpu softvfp
33293463 .type flash_erase_all, %function
33303464 flash_erase_all:
33313465 .fnstart
33323466 @ args = 0, pretend = 0, frame = 0
33333467 @ frame_needed = 0, uses_anonymous_args = 0
3334
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
3335
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
3336
- mov r6, #0
3337
- ldr r3, .L656
3338
- ldr r7, .L656+4
3468
+ ldr r3, .L664
3469
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
3470
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
3471
+ mov r5, #0
3472
+ ldr r7, .L664+4
33393473 ldrb r4, [r3, #17] @ zero_extendqisi2
33403474 ldrh r3, [r3, #18]
33413475 mov r8, r7
33423476 smulbb r4, r4, r3
33433477 uxth r4, r4
3344
-.L649:
3345
- ldrb r2, [r7, #1101] @ zero_extendqisi2
3346
- uxth r3, r6
3347
- cmp r2, r3
3348
- bls .L654
3349
- add r3, r7, r3
3350
- mov r5, #0
3351
- ldrb r9, [r3, #1180] @ zero_extendqisi2
3352
-.L650:
3478
+.L659:
3479
+ ldrb r2, [r7, #1109] @ zero_extendqisi2
33533480 uxth r3, r5
3354
- cmp r3, r4
3355
- bcs .L655
3481
+ cmp r2, r3
3482
+ bhi .L662
3483
+ mov r1, #0
3484
+ ldr r0, .L664+8
3485
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
3486
+ b printk
3487
+.L662:
3488
+ uxtah r3, r7, r5
3489
+ mov r6, #0
3490
+ ldrb r9, [r3, #1144] @ zero_extendqisi2
3491
+.L660:
3492
+ uxth r3, r6
3493
+ cmp r4, r3
3494
+ addls r5, r5, #1
3495
+ bls .L659
3496
+.L661:
33563497 ldrh r1, [r8, #2]
33573498 mov r0, r9
3358
- mul r1, r1, r5
3359
- bl flash_erase_block
3360
- add r5, r5, #1
3361
- b .L650
3362
-.L655:
3499
+ mul r1, r6, r1
33633500 add r6, r6, #1
3364
- b .L649
3365
-.L654:
3366
- ldr r0, .L656+8
3367
- mov r1, #0
3368
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
3369
- b printk
3370
-.L657:
3501
+ bl flash_erase_block
3502
+ b .L660
3503
+.L665:
33713504 .align 2
3372
-.L656:
3505
+.L664:
33733506 .word .LANCHOR2
33743507 .word .LANCHOR0
3375
- .word .LC46
3508
+ .word .LC43
33763509 .fnend
33773510 .size flash_erase_all, .-flash_erase_all
33783511 .align 2
33793512 .global rk_nandc_flash_xfer_completed
3513
+ .syntax unified
3514
+ .arm
3515
+ .fpu softvfp
33803516 .type rk_nandc_flash_xfer_completed, %function
33813517 rk_nandc_flash_xfer_completed:
33823518 .fnstart
33833519 @ args = 0, pretend = 0, frame = 0
33843520 @ frame_needed = 0, uses_anonymous_args = 0
33853521 @ link register save eliminated.
3386
- ldr r3, .L661
3387
- ldrb r3, [r3, #1028] @ zero_extendqisi2
3388
- cmp r3, #9
3389
- ldreq r3, [r0, #292]
3390
- ldrne r3, [r0, #368]
3391
- orreq r3, r3, #1
3392
- orrne r3, r3, #1
3393
- streq r3, [r0, #292]
3394
- strne r3, [r0, #368]
3395
- ldreq r3, [r0, #288]
3396
- ldrne r3, [r0, #364]
3397
- biceq r3, r3, #1
3398
- bicne r3, r3, #1
3399
- streq r3, [r0, #288]
3400
- strne r3, [r0, #364]
3401
- bx lr
3402
-.L662:
3403
- .align 2
3404
-.L661:
3405
- .word .LANCHOR0
3522
+ mov r1, #0
3523
+ b nandc_irq_disable
34063524 .fnend
34073525 .size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
34083526 .align 2
34093527 .global nandc_xfer_start
3528
+ .syntax unified
3529
+ .arm
3530
+ .fpu softvfp
34103531 .type nandc_xfer_start, %function
34113532 nandc_xfer_start:
34123533 .fnstart
34133534 @ args = 0, pretend = 0, frame = 16
34143535 @ frame_needed = 0, uses_anonymous_args = 0
3415
- stmfd sp!, {r4, r5, r6, r7, r8, r9, lr}
3416
- .save {r4, r5, r6, r7, r8, r9, lr}
3536
+ push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
3537
+ .save {r4, r5, r6, r7, r8, lr}
3538
+ .pad #16
34173539 mov r5, r0
3418
- ldr r4, .L680
3540
+ ldr r4, .L684
34193541 mov r0, r2
3420
- .pad #20
3421
- sub sp, sp, #20
34223542 and r6, r5, #1
3423
- add lr, r1, #1
3543
+ add ip, r1, #1
34243544 ldrb r2, [r4, #1028] @ zero_extendqisi2
34253545 cmp r2, #9
3426
- bne .L664
3427
- mov r2, #0
3428
- str r2, [sp, #4]
3546
+ bne .L668
3547
+ mov r1, #0
3548
+ mov lr, #1
3549
+ str r1, [sp, #4]
3550
+ ubfx ip, ip, #1, #6
34293551 ldr r2, [sp, #4]
3430
- ubfx lr, lr, #1, #6
3431
- bic r2, r2, #2
3432
- orr r2, r2, r6, asl #1
3552
+ bfi r2, r6, #1, #1
34333553 str r2, [sp, #4]
34343554 ldr r2, [sp, #4]
34353555 orr r2, r2, #8
34363556 str r2, [sp, #4]
34373557 ldr r2, [sp, #4]
3438
- bic r2, r2, #96
3439
- orr r2, r2, #32
3558
+ bfi r2, lr, #5, #2
34403559 str r2, [sp, #4]
34413560 ldr r2, [sp, #4]
34423561 orr r2, r2, #536870912
....@@ -3445,199 +3564,184 @@
34453564 orr r2, r2, #1024
34463565 str r2, [sp, #4]
34473566 ldr r2, [sp, #4]
3448
- bic r2, r2, #16
3567
+ bfi r2, r1, #4, #1
34493568 str r2, [sp, #4]
3450
- ldr ip, [sp, #4]
3451
- bic ip, ip, #264241152
3452
- orr lr, ip, lr, asl #22
3453
- str lr, [sp, #4]
3569
+ ldr r2, [sp, #4]
3570
+ bfi r2, ip, #22, #6
3571
+ str r2, [sp, #4]
34543572 ldr r2, [sp, #4]
34553573 orr r2, r2, #128
34563574 str r2, [sp, #4]
3457
- ldrb r2, [r4, #1136] @ zero_extendqisi2
3458
- cmp r2, #0
3459
- beq .L665
3460
- ldrb r2, [r4, #1168] @ zero_extendqisi2
3461
- cmp r2, #0
3575
+ ldrb r2, [r4, #1195] @ zero_extendqisi2
3576
+ cmp r2, r1
3577
+ beq .L669
3578
+ ldrb r2, [r4, #1196] @ zero_extendqisi2
3579
+ cmp r2, r1
34623580 ldrne r2, [sp, #4]
34633581 orrne r2, r2, #512
34643582 strne r2, [sp, #4]
3465
-.L665:
3466
- ldr r1, [sp, #4]
3467
- mov r2, r5
3468
- str r3, [r4, #1148]
3469
- ubfx r1, r1, #22, #6
3470
- str r0, [r4, #1144]
3471
- mov r1, r1, asl #10
3472
- bl rknand_dma_map_single
3473
- mov r2, r5
3474
- clz r5, r5
3475
- mov r5, r5, lsr #5
3476
- ldr r1, [sp, #4]
3477
- str r0, [r4, #1152]
3478
- ubfx r1, r1, #22, #6
3479
- ldr r0, [r4, #1148]
3480
- mov r1, r1, asl #2
3481
- bl rknand_dma_map_single
3482
- ldr r2, [r4, #1040]
3483
- mov r3, #1
3484
- str r3, [r4, #1160]
3485
- ldr r3, [r4, #1152]
3486
- str r3, [r2, #52]
3487
- str r0, [r2, #56]
3488
- ldr r3, [r2, #48]
3489
- str r0, [r4, #1156]
3490
- str r3, [sp, #8]
3491
- ldr r3, [sp, #8]
3492
- bic r3, r3, #15872
3493
- orr r3, r3, #8192
3494
- str r3, [sp, #8]
3495
- ldr r3, [sp, #8]
3496
- orr r3, r3, #448
3497
- str r3, [sp, #8]
3498
- ldr r3, [sp, #8]
3499
- bic r3, r3, #56
3500
- orr r3, r3, #16
3501
- str r3, [sp, #8]
3502
- ldr r3, [sp, #8]
3503
- orr r3, r3, #4
3504
- str r3, [sp, #8]
3505
- ldr r3, [sp, #8]
3506
- bic r3, r3, #2
3507
- orr r5, r3, r5, asl #1
3508
- str r5, [sp, #8]
3509
- ldr r3, [sp, #8]
3510
- orr r3, r3, #1
3511
- str r3, [sp, #8]
3512
- movw r3, #1170
3513
- ldrh r1, [r4, r3]
3514
- ldr r3, [sp, #8]
3515
- ubfx r1, r1, #0, #11
3516
- bic r3, r3, #133169152
3517
- bic r3, r3, #983040
3518
- orr r3, r3, r1, asl #16
3519
- str r3, [sp, #8]
3520
- ldr r3, [sp, #8]
3521
- str r3, [r2, #48]
3522
- ldr r3, [sp, #4]
3523
- str r3, [r2, #16]
3524
- ldr r3, [sp, #4]
3525
- orr r3, r3, #4
3526
- str r3, [sp, #4]
3527
- ldr r3, [sp, #4]
3528
- str r3, [r2, #16]
3529
- b .L663
3530
-.L664:
3531
- ldr r2, [r4, #1040]
3532
- mov ip, #0
3533
- cmp r5, ip
3534
- ubfx lr, lr, #1, #6
3535
- ldr r2, [r2, #12]
3536
- ldreq r3, [r4, #1140]
3537
- str r2, [sp, #12]
3538
- ldr r2, [sp, #12]
3539
- bic r2, r2, #65280
3540
- orr r2, r2, #4096
3541
- str r2, [sp, #12]
3542
- ldr r2, [sp, #12]
3543
- bic r2, r2, #8
3544
- str r2, [sp, #12]
3545
- ldr r2, [sp, #12]
3546
- bic r2, r2, #224
3547
- str r2, [sp, #12]
3548
- str ip, [sp, #4]
3549
- ldr r2, [sp, #4]
3550
- bic r2, r2, #2
3551
- orr r2, r2, r6, asl #1
3552
- str r2, [sp, #4]
3553
- ldr r2, [sp, #4]
3554
- orr r2, r2, #8
3555
- str r2, [sp, #4]
3556
- ldr r6, [sp, #4]
3557
- bic r6, r6, #96
3558
- orr r6, r6, #32
3559
- str r6, [sp, #4]
3560
- ldr r2, [sp, #4]
3561
- orr r2, r2, #536870912
3562
- str r2, [sp, #4]
3563
- ldr r2, [sp, #4]
3564
- orr r2, r2, #1024
3565
- str r2, [sp, #4]
3566
- ldr r2, [sp, #4]
3567
- bic r2, r2, #16
3568
- str r2, [sp, #4]
3569
- ldr r6, [sp, #4]
3570
- moveq r2, #1
3571
- bic r6, r6, #264241152
3572
- orr lr, r6, lr, asl #22
3573
- str lr, [sp, #4]
3574
- streq r2, [r3]
3575
- beq .L671
3576
- ldrb r2, [r4, #1172] @ zero_extendqisi2
3577
- mov r1, r1, lsr #1
3578
- mov r6, ip
3579
- cmp r2, #25
3580
- movcc r7, #64
3581
- movcs r7, #128
35823583 .L669:
3583
- cmp r6, r1
3584
- add r3, r3, #4
3585
- add r8, ip, r7
3586
- bge .L671
3587
- ldrh lr, [r3, #-2]
3588
- mov ip, ip, lsr #2
3589
- ldr r9, [r4, #1140]
3590
- add r6, r6, #1
3591
- ldrh r2, [r3, #-4]
3592
- orr lr, r2, lr, asl #16
3593
- str lr, [r9, ip, asl #2]
3594
- mov ip, r8
3595
- b .L669
3596
-.L671:
35973584 ldr r1, [sp, #4]
35983585 mov r2, r5
3599
- ldr r3, [r4, #1140]
3586
+ str r3, [r4, #1208]
3587
+ str r0, [r4, #1204]
36003588 ubfx r1, r1, #22, #6
3601
- str r0, [r4, #1144]
3602
- mov r1, r1, asl #10
3603
- str r3, [r4, #1148]
3589
+ lsl r1, r1, #10
36043590 bl rknand_dma_map_single
3591
+ ldr r1, [sp, #4]
36053592 mov r2, r5
3593
+ str r0, [r4, #1212]
36063594 clz r5, r5
3607
- mov r5, r5, lsr #5
3608
- ldr r1, [sp, #4]
3609
- str r0, [r4, #1152]
3595
+ ldr r0, [r4, #1208]
3596
+ lsr r5, r5, #5
36103597 ubfx r1, r1, #22, #6
3611
- ldr r0, [r4, #1148]
3612
- mov r1, r1, asl #7
3598
+ lsl r1, r1, #2
36133599 bl rknand_dma_map_single
3614
- ldr r2, [r4, #1152]
36153600 mov r3, #1
3616
- str r3, [r4, #1160]
3617
- ldr r3, [r4, #1040]
3618
- str r2, [r3, #20]
3619
- mov r2, #0
3620
- str r0, [r3, #24]
3601
+ ldr r2, [r4, #1212]
3602
+ str r3, [r4, #1220]
3603
+ mov r1, #16
3604
+ ldr r3, [r4, #1044]
3605
+ str r0, [r4, #1216]
3606
+ str r2, [r3, #52]
3607
+ str r0, [r3, #56]
3608
+ ldr r2, [r3, #48]
36213609 str r2, [sp, #8]
36223610 ldr r2, [sp, #8]
3623
- str r0, [r4, #1156]
3624
- bic r2, r2, #15872
3625
- orr r2, r2, #8192
3611
+ bfi r2, r1, #9, #5
3612
+ mov r1, #2
36263613 str r2, [sp, #8]
36273614 ldr r2, [sp, #8]
36283615 orr r2, r2, #448
36293616 str r2, [sp, #8]
36303617 ldr r2, [sp, #8]
3631
- bic r2, r2, #56
3632
- orr r2, r2, #16
3618
+ bfi r2, r1, #3, #3
36333619 str r2, [sp, #8]
36343620 ldr r2, [sp, #8]
36353621 orr r2, r2, #4
36363622 str r2, [sp, #8]
36373623 ldr r2, [sp, #8]
3638
- bic r2, r2, #2
3639
- orr r5, r2, r5, asl #1
3640
- str r5, [sp, #8]
3624
+ bfi r2, r5, #1, #1
3625
+ str r2, [sp, #8]
3626
+ ldr r2, [sp, #8]
3627
+ orr r2, r2, #1
3628
+ str r2, [sp, #8]
3629
+ movw r2, #1228
3630
+ ldrh r1, [r4, r2]
3631
+ ldr r2, [sp, #8]
3632
+ bfi r2, r1, #16, #11
3633
+ str r2, [sp, #8]
3634
+ ldr r2, [sp, #8]
3635
+ str r2, [r3, #48]
3636
+ ldr r2, [sp, #4]
3637
+ str r2, [r3, #16]
3638
+ ldr r2, [sp, #4]
3639
+ orr r2, r2, #4
3640
+ str r2, [sp, #4]
3641
+ ldr r2, [sp, #4]
3642
+ str r2, [r3, #16]
3643
+.L667:
3644
+ add sp, sp, #16
3645
+ @ sp needed
3646
+ pop {r4, r5, r6, r7, r8, pc}
3647
+.L668:
3648
+ ldr r2, [r4, #1044]
3649
+ mov lr, #16
3650
+ ubfx ip, ip, #1, #6
3651
+ ldr r2, [r2, #12]
3652
+ str r2, [sp, #12]
3653
+ ldr r2, [sp, #12]
3654
+ bfi r2, lr, #8, #8
3655
+ str r2, [sp, #12]
3656
+ ldr r2, [sp, #12]
3657
+ bfc r2, #3, #1
3658
+ str r2, [sp, #12]
3659
+ ldr r2, [sp, #12]
3660
+ bfc r2, #5, #3
3661
+ str r2, [sp, #12]
3662
+ mov r2, #0
3663
+ str r2, [sp, #4]
3664
+ cmp r5, r2
3665
+ ldr lr, [sp, #4]
3666
+ ldreq r3, [r4, #1200]
3667
+ bfi lr, r6, #1, #1
3668
+ mov r6, #1
3669
+ str lr, [sp, #4]
3670
+ ldr lr, [sp, #4]
3671
+ orr lr, lr, #8
3672
+ str lr, [sp, #4]
3673
+ ldr lr, [sp, #4]
3674
+ bfi lr, r6, #5, #2
3675
+ str lr, [sp, #4]
3676
+ ldr lr, [sp, #4]
3677
+ orr lr, lr, #536870912
3678
+ str lr, [sp, #4]
3679
+ ldr lr, [sp, #4]
3680
+ orr lr, lr, #1024
3681
+ str lr, [sp, #4]
3682
+ ldr lr, [sp, #4]
3683
+ bfi lr, r2, #4, #1
3684
+ str lr, [sp, #4]
3685
+ ldr lr, [sp, #4]
3686
+ bfi lr, ip, #22, #6
3687
+ str lr, [sp, #4]
3688
+ streq r6, [r3]
3689
+ beq .L675
3690
+ ldrb ip, [r4, #1193] @ zero_extendqisi2
3691
+ lsr r1, r1, #1
3692
+ cmp ip, #25
3693
+ mov ip, r2
3694
+ movcc r6, #64
3695
+ movcs r6, #128
3696
+.L673:
3697
+ cmp ip, r1
3698
+ add r7, r3, ip, lsl #2
3699
+ add lr, r6, r2
3700
+ blt .L674
3701
+.L675:
3702
+ ldr r1, [sp, #4]
3703
+ mov r2, r5
3704
+ ldr r3, [r4, #1200]
3705
+ str r0, [r4, #1204]
3706
+ ubfx r1, r1, #22, #6
3707
+ lsl r1, r1, #10
3708
+ str r3, [r4, #1208]
3709
+ bl rknand_dma_map_single
3710
+ ldr r1, [sp, #4]
3711
+ mov r2, r5
3712
+ str r0, [r4, #1212]
3713
+ clz r5, r5
3714
+ ldr r0, [r4, #1208]
3715
+ lsr r5, r5, #5
3716
+ ubfx r1, r1, #22, #6
3717
+ lsl r1, r1, #7
3718
+ bl rknand_dma_map_single
3719
+ mov r3, #1
3720
+ ldr r2, [r4, #1212]
3721
+ str r3, [r4, #1220]
3722
+ mov r1, #16
3723
+ ldr r3, [r4, #1044]
3724
+ str r0, [r4, #1216]
3725
+ str r2, [r3, #20]
3726
+ mov r2, #0
3727
+ str r0, [r3, #24]
3728
+ str r2, [sp, #8]
3729
+ ldr r2, [sp, #8]
3730
+ bfi r2, r1, #9, #5
3731
+ mov r1, #2
3732
+ str r2, [sp, #8]
3733
+ ldr r2, [sp, #8]
3734
+ orr r2, r2, #448
3735
+ str r2, [sp, #8]
3736
+ ldr r2, [sp, #8]
3737
+ bfi r2, r1, #3, #3
3738
+ str r2, [sp, #8]
3739
+ ldr r2, [sp, #8]
3740
+ orr r2, r2, #4
3741
+ str r2, [sp, #8]
3742
+ ldr r2, [sp, #8]
3743
+ bfi r2, r5, #1, #1
3744
+ str r2, [sp, #8]
36413745 ldr r2, [sp, #8]
36423746 orr r2, r2, #1
36433747 str r2, [sp, #8]
....@@ -3652,417 +3756,402 @@
36523756 str r2, [sp, #4]
36533757 ldr r2, [sp, #4]
36543758 str r2, [r3, #8]
3655
-.L663:
3656
- add sp, sp, #20
3657
- @ sp needed
3658
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
3659
-.L681:
3759
+ b .L667
3760
+.L674:
3761
+ ldr r8, [r7] @ unaligned
3762
+ bic r2, r2, #3
3763
+ ldr r7, [r4, #1200]
3764
+ add ip, ip, #1
3765
+ str r8, [r7, r2]
3766
+ mov r2, lr
3767
+ b .L673
3768
+.L685:
36603769 .align 2
3661
-.L680:
3770
+.L684:
36623771 .word .LANCHOR0
36633772 .fnend
36643773 .size nandc_xfer_start, .-nandc_xfer_start
36653774 .align 2
36663775 .global nandc_set_seed
3776
+ .syntax unified
3777
+ .arm
3778
+ .fpu softvfp
36673779 .type nandc_set_seed, %function
36683780 nandc_set_seed:
36693781 .fnstart
36703782 @ args = 0, pretend = 0, frame = 0
36713783 @ frame_needed = 0, uses_anonymous_args = 0
36723784 @ link register save eliminated.
3673
- ldr r2, .L689
3785
+ ldr r3, .L693
36743786 and r0, r0, #127
3675
- ldr r3, .L689+4
3676
- mov r0, r0, asl #1
3677
- ldrb r1, [r2, #1168] @ zero_extendqisi2
3678
- ldrh r3, [r3, r0]
3787
+ lsl r0, r0, #1
3788
+ ldrh r2, [r3, r0]
3789
+ ldr r3, .L693+4
3790
+ ldrb r1, [r3, #1196] @ zero_extendqisi2
36793791 cmp r1, #0
3680
- ldr r1, .L689
3681
- ldrb r2, [r2, #1028] @ zero_extendqisi2
3682
- orrne r3, r3, #-1073741824
3683
- cmp r2, #9
3684
- ldr r2, [r1, #1040]
3685
- streq r3, [r2, #520]
3686
- strne r3, [r2, #336]
3792
+ ldrb r1, [r3, #1028] @ zero_extendqisi2
3793
+ ldr r3, [r3, #1044]
3794
+ orrne r2, r2, #-1073741824
3795
+ cmp r1, #9
3796
+ streq r2, [r3, #520]
3797
+ strne r2, [r3, #336]
36873798 bx lr
3688
-.L690:
3799
+.L694:
36893800 .align 2
3690
-.L689:
3801
+.L693:
3802
+ .word .LANCHOR1+1108
36913803 .word .LANCHOR0
3692
- .word .LANCHOR1+1144
36933804 .fnend
36943805 .size nandc_set_seed, .-nandc_set_seed
36953806 .align 2
36963807 .global zftl_flash_de_init
3808
+ .syntax unified
3809
+ .arm
3810
+ .fpu softvfp
36973811 .type zftl_flash_de_init, %function
36983812 zftl_flash_de_init:
36993813 .fnstart
37003814 @ args = 0, pretend = 0, frame = 0
37013815 @ frame_needed = 0, uses_anonymous_args = 0
3702
- stmfd sp!, {r3, r4, r5, lr}
3703
- .save {r3, r4, r5, lr}
3816
+ push {r4, lr}
3817
+ .save {r4, lr}
3818
+ ldr r4, .L715
37043819 bl nandc_wait_flash_ready
3705
- ldr r4, .L711
37063820 ldrb r3, [r4] @ zero_extendqisi2
37073821 cmp r3, #0
3708
- beq .L692
3709
- ldrb r0, [r4, #1102] @ zero_extendqisi2
3822
+ beq .L696
3823
+ ldrb r0, [r4, #1110] @ zero_extendqisi2
37103824 cmp r0, #0
3711
- bne .L692
3825
+ bne .L696
37123826 ldrb r3, [r4, #1028] @ zero_extendqisi2
37133827 cmp r3, #9
3714
- beq .L692
3828
+ beq .L696
37153829 bl zftl_flash_exit_slc_mode
3716
-.L692:
3830
+.L696:
37173831 mov r0, #0
3718
- ldr r5, .L711
37193832 bl hynix_reconfig_rr_para
3720
- ldrb r3, [r4, #1135] @ zero_extendqisi2
3833
+ ldrb r3, [r4, #1143] @ zero_extendqisi2
37213834 cmp r3, #0
3722
- beq .L693
3723
- ldrb r3, [r5, #1232] @ zero_extendqisi2
3835
+ beq .L697
3836
+ ldrb r3, [r4, #1192] @ zero_extendqisi2
37243837 tst r3, #1
3725
- beq .L693
3838
+ beq .L697
37263839 mov r0, #1
37273840 bl flash_set_interface_mode
37283841 mov r0, #1
37293842 bl nandc_set_if_mode
37303843 mov r3, #0
3731
- strb r3, [r5, #1135]
3732
-.L693:
3733
- ldrb r3, [r4, #1168] @ zero_extendqisi2
3734
- ldr r5, .L711
3844
+ strb r3, [r4, #1143]
3845
+.L697:
3846
+ ldrb r3, [r4, #1196] @ zero_extendqisi2
37353847 cmp r3, #0
3736
- beq .L694
3848
+ beq .L698
37373849 mov r0, #0
3738
- strb r0, [r5, #1168]
3850
+ strb r0, [r4, #1196]
37393851 bl nandc_set_seed
37403852 mov r3, #1
3741
- strb r3, [r5, #1168]
3742
-.L694:
3853
+ strb r3, [r4, #1196]
3854
+.L698:
37433855 mov r0, #0
3744
- ldmfd sp!, {r3, r4, r5, pc}
3745
-.L712:
3856
+ pop {r4, pc}
3857
+.L716:
37463858 .align 2
3747
-.L711:
3859
+.L715:
37483860 .word .LANCHOR0
37493861 .fnend
37503862 .size zftl_flash_de_init, .-zftl_flash_de_init
37513863 .align 2
37523864 .global nandc_randomizer_enable
3865
+ .syntax unified
3866
+ .arm
3867
+ .fpu softvfp
37533868 .type nandc_randomizer_enable, %function
37543869 nandc_randomizer_enable:
37553870 .fnstart
37563871 @ args = 0, pretend = 0, frame = 0
37573872 @ frame_needed = 0, uses_anonymous_args = 0
37583873 @ link register save eliminated.
3759
- ldr r3, .L714
3760
- strb r0, [r3, #1168]
3874
+ ldr r3, .L718
3875
+ strb r0, [r3, #1196]
37613876 bx lr
3762
-.L715:
3877
+.L719:
37633878 .align 2
3764
-.L714:
3879
+.L718:
37653880 .word .LANCHOR0
37663881 .fnend
37673882 .size nandc_randomizer_enable, .-nandc_randomizer_enable
37683883 .align 2
37693884 .global nandc_get_chip_if
3885
+ .syntax unified
3886
+ .arm
3887
+ .fpu softvfp
37703888 .type nandc_get_chip_if, %function
37713889 nandc_get_chip_if:
37723890 .fnstart
37733891 @ args = 0, pretend = 0, frame = 0
37743892 @ frame_needed = 0, uses_anonymous_args = 0
37753893 @ link register save eliminated.
3776
- ldr r3, .L717
3894
+ ldr r3, .L721
37773895 add r0, r0, #8
3778
- ldr r3, [r3, #1040]
3779
- add r0, r3, r0, asl #8
3896
+ ldr r3, [r3, #1044]
3897
+ add r0, r3, r0, lsl #8
37803898 bx lr
3781
-.L718:
3899
+.L722:
37823900 .align 2
3783
-.L717:
3901
+.L721:
37843902 .word .LANCHOR0
37853903 .fnend
37863904 .size nandc_get_chip_if, .-nandc_get_chip_if
37873905 .align 2
3788
- .global zbuf_init
3789
- .type zbuf_init, %function
3790
-zbuf_init:
3791
- .fnstart
3792
- @ args = 0, pretend = 0, frame = 0
3793
- @ frame_needed = 0, uses_anonymous_args = 0
3794
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
3795
- .save {r4, r5, r6, r7, r8, lr}
3796
- mov r5, #0
3797
- ldr r4, .L723
3798
- mov r7, r5
3799
- ldr r8, .L723+4
3800
-.L720:
3801
- ldrb r0, [r8, #2772] @ zero_extendqisi2
3802
- uxtb r3, r5
3803
- add r2, r3, #1
3804
- strb r3, [r4, #1]
3805
- strb r2, [r4]
3806
- add r5, r5, #1
3807
- mov r0, r0, asl #9
3808
- strb r7, [r4, #2]
3809
- str r7, [r4, #8]
3810
- bl ftl_malloc
3811
- ldr r6, .L723+4
3812
- add r4, r4, #48
3813
- str r0, [r4, #-44]
3814
- mov r0, #64
3815
- bl ftl_malloc
3816
- cmp r5, #32
3817
- str r0, [r4, #-36]
3818
- bne .L720
3819
- mvn r3, #0
3820
- strb r5, [r6, #2774]
3821
- strb r3, [r6, #2724]
3822
- mov r3, #0
3823
- strb r3, [r6, #2773]
3824
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
3825
-.L724:
3826
- .align 2
3827
-.L723:
3828
- .word .LANCHOR0+1236
3829
- .word .LANCHOR0
3830
- .fnend
3831
- .size zbuf_init, .-zbuf_init
3832
- .align 2
38333906 .global buf_reinit
3907
+ .syntax unified
3908
+ .arm
3909
+ .fpu softvfp
38343910 .type buf_reinit, %function
38353911 buf_reinit:
38363912 .fnstart
38373913 @ args = 0, pretend = 0, frame = 0
38383914 @ frame_needed = 0, uses_anonymous_args = 0
38393915 @ link register save eliminated.
3840
- ldr r2, .L728
3916
+ ldr r2, .L726
38413917 mov r3, #0
38423918 mov r1, r3
3843
-.L726:
3919
+.L724:
38443920 uxtb r0, r3
38453921 add r3, r3, #1
38463922 cmp r3, #32
3923
+ strb r1, [r2, #2]
38473924 add ip, r0, #1
38483925 strb r0, [r2, #1]
3926
+ strb ip, [r2]
38493927 add r2, r2, #48
3850
- strb ip, [r2, #-48]
3851
- strb r1, [r2, #-46]
38523928 str r1, [r2, #-40]
3853
- bne .L726
3854
- ldr r2, .L728+4
3855
- mvn r1, #0
3856
- strb r3, [r2, #2774]
3857
- strb r1, [r2, #2724]
3858
- mov r1, #0
3859
- strb r1, [r2, #2773]
3929
+ bne .L724
3930
+ ldr r2, .L726+4
3931
+ mvn r0, #0
3932
+ strb r0, [r2, #2720]
3933
+ strb r1, [r2, #2768]
3934
+ strb r3, [r2, #2769]
38603935 bx lr
3861
-.L729:
3936
+.L727:
38623937 .align 2
3863
-.L728:
3864
- .word .LANCHOR0+1236
3938
+.L726:
3939
+ .word .LANCHOR0+1232
38653940 .word .LANCHOR0
38663941 .fnend
38673942 .size buf_reinit, .-buf_reinit
38683943 .align 2
38693944 .global buf_add_tail
3945
+ .syntax unified
3946
+ .arm
3947
+ .fpu softvfp
38703948 .type buf_add_tail, %function
38713949 buf_add_tail:
38723950 .fnstart
38733951 @ args = 0, pretend = 0, frame = 0
38743952 @ frame_needed = 0, uses_anonymous_args = 0
3875
- stmfd sp!, {r3, r4, r5, lr}
3876
- .save {r3, r4, r5, lr}
38773953 mvn r3, #0
3954
+ push {r4, r5, r6, lr}
3955
+ .save {r4, r5, r6, lr}
38783956 strb r3, [r1]
38793957 mov r4, r1
38803958 ldrb r3, [r0] @ zero_extendqisi2
3959
+ cmp r3, #255
3960
+ bne .L729
3961
+ ldrb r3, [r1, #1] @ zero_extendqisi2
38813962 mov r5, r0
38823963 cmp r3, #255
3883
- ldrne r2, .L738
3884
- movne r1, #48
3885
- bne .L736
3964
+ bne .L730
3965
+ mov r2, #74
3966
+ ldr r1, .L736
3967
+ ldr r0, .L736+4
3968
+ bl printk
3969
+ bl dump_stack
3970
+.L730:
3971
+ ldrb r3, [r4, #1] @ zero_extendqisi2
3972
+ strb r3, [r5]
3973
+ pop {r4, r5, r6, pc}
3974
+.L729:
3975
+ ldr r2, .L736+8
3976
+ mov r1, #48
3977
+ mov r6, r2
3978
+.L734:
3979
+ mov r5, r3
3980
+ mla r3, r1, r3, r2
3981
+ ldrb r3, [r3, #1232] @ zero_extendqisi2
3982
+ cmp r3, #255
3983
+ bne .L734
38863984 ldrb r3, [r4, #1] @ zero_extendqisi2
38873985 cmp r3, #255
38883986 bne .L732
3889
- ldr r1, .L738+4
3890
- mov r2, #74
3891
- ldr r0, .L738+8
3987
+ mov r2, #81
3988
+ ldr r1, .L736
3989
+ ldr r0, .L736+4
38923990 bl printk
38933991 bl dump_stack
38943992 .L732:
3895
- ldrb r3, [r4, #1] @ zero_extendqisi2
3896
- strb r3, [r5]
3897
- ldmfd sp!, {r3, r4, r5, pc}
3898
-.L736:
3899
- mov r5, r3
3900
- mla r3, r1, r3, r2
3901
- ldrb r3, [r3, #1236] @ zero_extendqisi2
3902
- cmp r3, #255
3903
- bne .L736
3904
- ldrb r3, [r4, #1] @ zero_extendqisi2
3905
- cmp r3, #255
3906
- bne .L734
3907
- ldr r1, .L738+4
3908
- mov r2, #81
3909
- ldr r0, .L738+8
3910
- bl printk
3911
- bl dump_stack
3912
-.L734:
3913
- ldr r2, .L738
3914
- mov r1, #48
3915
- ldrb r3, [r4, #1] @ zero_extendqisi2
3916
- mla r5, r1, r5, r2
3917
- strb r3, [r5, #1236]
3918
- ldmfd sp!, {r3, r4, r5, pc}
3919
-.L739:
3993
+ mov r3, #48
3994
+ ldrb r2, [r4, #1] @ zero_extendqisi2
3995
+ mla r3, r3, r5, r6
3996
+ strb r2, [r3, #1232]
3997
+ pop {r4, r5, r6, pc}
3998
+.L737:
39203999 .align 2
3921
-.L738:
3922
- .word .LANCHOR0
3923
- .word .LANCHOR1+1400
4000
+.L736:
4001
+ .word .LANCHOR1+1364
39244002 .word .LC0
4003
+ .word .LANCHOR0
39254004 .fnend
39264005 .size buf_add_tail, .-buf_add_tail
39274006 .align 2
4007
+ .syntax unified
4008
+ .arm
4009
+ .fpu softvfp
39284010 .type queue_read_cmd, %function
39294011 queue_read_cmd:
39304012 .fnstart
39314013 @ args = 0, pretend = 0, frame = 0
39324014 @ frame_needed = 0, uses_anonymous_args = 0
3933
- stmfd sp!, {r4, lr}
4015
+ push {r4, lr}
39344016 .save {r4, lr}
39354017 mov r4, r0
3936
- ldr r1, [r4, #24]
4018
+ ldr r1, [r0, #24]
39374019 mov r0, #48
39384020 bl flash_start_page_read
39394021 mov r3, #1
39404022 mov r1, r4
39414023 strb r3, [r4, #42]
3942
- ldr r0, .L742
39434024 mov r3, #0
39444025 strb r3, [r4, #43]
39454026 mvn r3, #0
39464027 strb r3, [r4]
3947
- ldmfd sp!, {r4, lr}
4028
+ ldr r0, .L740
4029
+ pop {r4, lr}
39484030 b buf_add_tail
3949
-.L743:
4031
+.L741:
39504032 .align 2
3951
-.L742:
3952
- .word .LANCHOR0+2775
4033
+.L740:
4034
+ .word .LANCHOR0+2770
39534035 .fnend
39544036 .size queue_read_cmd, .-queue_read_cmd
39554037 .align 2
39564038 .global zbuf_free
4039
+ .syntax unified
4040
+ .arm
4041
+ .fpu softvfp
39574042 .type zbuf_free, %function
39584043 zbuf_free:
39594044 .fnstart
39604045 @ args = 0, pretend = 0, frame = 0
39614046 @ frame_needed = 0, uses_anonymous_args = 0
3962
- stmfd sp!, {r4, lr}
4047
+ push {r4, lr}
39634048 .save {r4, lr}
39644049 ldrb r3, [r0, #2] @ zero_extendqisi2
3965
- ldr r4, .L754
4050
+ ldr r4, .L752
39664051 and r3, r3, #8
3967
- uxtb r3, r3
3968
- strb r3, [r0, #2]
39694052 cmp r3, #0
3970
- beq .L745
4053
+ strb r3, [r0, #2]
4054
+ beq .L743
39714055 ldr r3, [r0, #20]
39724056 cmn r3, #1
3973
- beq .L745
4057
+ beq .L743
39744058 mov r1, r0
3975
- ldr r0, .L754+4
4059
+ add r0, r4, #2768
39764060 bl buf_add_tail
3977
- b .L746
3978
-.L745:
3979
- ldrb r3, [r4, #2773] @ zero_extendqisi2
4061
+.L744:
4062
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
4063
+ add r3, r3, #1
4064
+ strb r3, [r4, #2769]
4065
+ pop {r4, pc}
4066
+.L743:
4067
+ ldrb r3, [r4, #2768] @ zero_extendqisi2
39804068 strb r3, [r0]
39814069 ldrb r3, [r0, #1] @ zero_extendqisi2
3982
- strb r3, [r4, #2773]
3983
-.L746:
3984
- ldrb r3, [r4, #2774] @ zero_extendqisi2
3985
- add r3, r3, #1
3986
- strb r3, [r4, #2774]
3987
- ldmfd sp!, {r4, pc}
3988
-.L755:
4070
+ strb r3, [r4, #2768]
4071
+ b .L744
4072
+.L753:
39894073 .align 2
3990
-.L754:
4074
+.L752:
39914075 .word .LANCHOR0
3992
- .word .LANCHOR0+2773
39934076 .fnend
39944077 .size zbuf_free, .-zbuf_free
39954078 .align 2
39964079 .global buf_alloc
4080
+ .syntax unified
4081
+ .arm
4082
+ .fpu softvfp
39974083 .type buf_alloc, %function
39984084 buf_alloc:
39994085 .fnstart
40004086 @ args = 0, pretend = 0, frame = 0
40014087 @ frame_needed = 0, uses_anonymous_args = 0
4002
- stmfd sp!, {r3, r4, r5, lr}
4003
- .save {r3, r4, r5, lr}
4088
+ push {r4, r5, r6, lr}
4089
+ .save {r4, r5, r6, lr}
40044090 mov r5, r0
4005
- ldr r4, .L767
4006
- ldrb r3, [r4, #2774] @ zero_extendqisi2
4091
+ ldr r4, .L765
4092
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
40074093 cmp r3, #0
4008
- beq .L757
4009
-.L760:
4010
- ldrb r1, [r4, #2773] @ zero_extendqisi2
4094
+ beq .L755
4095
+.L758:
4096
+ ldrb ip, [r4, #2768] @ zero_extendqisi2
40114097 cmp r5, #0
4012
- ldr r3, .L767+4
4013
- mov r0, #48
4014
- mla r0, r0, r1, r3
4015
- beq .L758
4016
- b .L759
4098
+ ldr r3, .L765+4
4099
+ add r0, ip, ip, lsl #1
4100
+ mov r2, r3
4101
+ add r0, r3, r0, lsl #4
4102
+ beq .L756
40174103 .L757:
4018
- ldr r1, .L767+8
4104
+ mov r1, #48
4105
+ mul r1, r1, ip
4106
+ add r3, r4, r1
4107
+ add r2, r2, r1
4108
+ ldrb ip, [r3, #1232] @ zero_extendqisi2
4109
+ mov r1, #0
4110
+ strh r1, [r2, #34] @ movhi
4111
+ str r1, [r3, #1240]
4112
+ strb ip, [r4, #2768]
4113
+ ldrb ip, [r4, #2769] @ zero_extendqisi2
4114
+ strb r1, [r3, #1272]
4115
+ strb r1, [r3, #1273]
4116
+ sub ip, ip, #1
4117
+ strb ip, [r4, #2769]
4118
+ mov ip, #1
4119
+ strb ip, [r3, #1234]
4120
+ mvn ip, #0
4121
+ strb ip, [r3, #1232]
4122
+ str ip, [r3, #1252]
4123
+ pop {r4, r5, r6, pc}
4124
+.L755:
40194125 mov r2, #121
4020
- ldr r0, .L767+12
4126
+ ldr r1, .L765+8
4127
+ ldr r0, .L765+12
40214128 bl printk
40224129 bl dump_stack
4023
- ldrb r3, [r4, #2774] @ zero_extendqisi2
4130
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
40244131 cmp r3, #0
4025
- bne .L760
4026
-.L762:
4132
+ bne .L758
4133
+.L760:
40274134 mov r0, #0
4028
- ldmfd sp!, {r3, r4, r5, pc}
4029
-.L758:
4030
- ldr r2, .L767
4031
- ldrb r2, [r2, #2774] @ zero_extendqisi2
4032
- cmp r2, #1
4033
- beq .L762
4034
-.L759:
4035
- mov r2, #48
4036
- mul r1, r2, r1
4037
- add r2, r4, r1
4038
- add r3, r3, r1
4039
- mov r1, #0
4040
- ldrb ip, [r2, #1236] @ zero_extendqisi2
4041
- strh r1, [r3, #34] @ movhi
4042
- str r1, [r2, #1244]
4043
- strb ip, [r4, #2773]
4044
- ldrb ip, [r4, #2774] @ zero_extendqisi2
4045
- strb r1, [r2, #1276]
4046
- sub ip, ip, #1
4047
- strb r1, [r2, #1277]
4048
- strb ip, [r4, #2774]
4049
- mov ip, #1
4050
- strb ip, [r2, #1238]
4051
- mvn ip, #0
4052
- strb ip, [r2, #1236]
4053
- str ip, [r2, #1256]
4054
- ldmfd sp!, {r3, r4, r5, pc}
4055
-.L768:
4135
+ pop {r4, r5, r6, pc}
4136
+.L756:
4137
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
4138
+ cmp r3, #1
4139
+ bne .L757
4140
+ b .L760
4141
+.L766:
40564142 .align 2
4057
-.L767:
4143
+.L765:
40584144 .word .LANCHOR0
4059
- .word .LANCHOR0+1236
4060
- .word .LANCHOR1+1416
4145
+ .word .LANCHOR0+1232
4146
+ .word .LANCHOR1+1377
40614147 .word .LC0
40624148 .fnend
40634149 .size buf_alloc, .-buf_alloc
40644150 .align 2
40654151 .global buf_remove_buf
4152
+ .syntax unified
4153
+ .arm
4154
+ .fpu softvfp
40664155 .type buf_remove_buf, %function
40674156 buf_remove_buf:
40684157 .fnstart
....@@ -4071,236 +4160,246 @@
40714160 ldrb ip, [r1, #1] @ zero_extendqisi2
40724161 ldrb r3, [r0] @ zero_extendqisi2
40734162 cmp ip, r3
4074
- bne .L770
4163
+ bne .L768
40754164 ldrb r3, [r1] @ zero_extendqisi2
40764165 strb r3, [r0]
40774166 mov r0, #1
40784167 bx lr
4079
-.L770:
4080
- ldr r0, .L777
4081
- str lr, [sp, #-4]!
4082
- .save {lr}
4083
- mov lr, #48
4084
-.L772:
4085
- cmp r3, #255
4086
- beq .L776
4168
+.L771:
40874169 mov r2, r3
40884170 mla r3, lr, r3, r0
4089
- ldrb r3, [r3, #1236] @ zero_extendqisi2
4090
- cmp r3, ip
4091
- bne .L772
4092
- ldr r0, .L777
4093
- mov ip, #48
4171
+ ldrb r3, [r3, #1232] @ zero_extendqisi2
4172
+ cmp ip, r3
4173
+ bne .L770
4174
+ mla r2, lr, r2, r0
40944175 ldrb r3, [r1] @ zero_extendqisi2
4095
- mla r2, ip, r2, r0
40964176 mov r0, #1
4097
- strb r3, [r2, #1236]
4177
+ strb r3, [r2, #1232]
40984178 mvn r3, #0
40994179 strb r3, [r1]
41004180 ldr pc, [sp], #4
4101
-.L776:
4181
+.L768:
4182
+ ldr r0, .L776
4183
+ str lr, [sp, #-4]!
4184
+ .save {lr}
4185
+ mov lr, #48
4186
+.L770:
4187
+ cmp r3, #255
4188
+ bne .L771
41024189 mov r0, #0
41034190 ldr pc, [sp], #4
4104
-.L778:
4105
- .align 2
41064191 .L777:
4192
+ .align 2
4193
+.L776:
41074194 .word .LANCHOR0
41084195 .fnend
41094196 .size buf_remove_buf, .-buf_remove_buf
41104197 .align 2
41114198 .global buf_remove_free
4199
+ .syntax unified
4200
+ .arm
4201
+ .fpu softvfp
41124202 .type buf_remove_free, %function
41134203 buf_remove_free:
41144204 .fnstart
41154205 @ args = 0, pretend = 0, frame = 0
41164206 @ frame_needed = 0, uses_anonymous_args = 0
4117
- ldr r3, .L785
4118
- stmfd sp!, {r4, r5, r6, lr}
4207
+ push {r4, r5, r6, lr}
41194208 .save {r4, r5, r6, lr}
41204209 mov r5, r0
4121
- ldrb r2, [r3, #2774] @ zero_extendqisi2
4122
- mov r4, r3
4123
- cmp r2, #0
4124
- bne .L780
4125
- ldr r1, .L785+4
4210
+ ldr r4, .L784
4211
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
4212
+ cmp r3, #0
4213
+ bne .L779
41264214 mov r2, #172
4127
- ldr r0, .L785+8
4215
+ ldr r1, .L784+4
4216
+ ldr r0, .L784+8
41284217 bl printk
41294218 bl dump_stack
4130
-.L780:
4131
- ldrb r3, [r4, #2774] @ zero_extendqisi2
4132
- ldr r6, .L785
4219
+.L779:
4220
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
41334221 cmp r3, #0
4134
- ldmeqfd sp!, {r4, r5, r6, pc}
4135
- ldr r0, .L785+12
4222
+ popeq {r4, r5, r6, pc}
41364223 mov r1, r5
4224
+ ldr r0, .L784+12
41374225 bl buf_remove_buf
41384226 cmp r0, #1
4139
- ldreqb r3, [r6, #2774] @ zero_extendqisi2
4227
+ ldrbeq r3, [r4, #2769] @ zero_extendqisi2
41404228 subeq r3, r3, #1
4141
- streqb r3, [r6, #2774]
4142
- ldreqb r3, [r5, #2] @ zero_extendqisi2
4229
+ strbeq r3, [r4, #2769]
4230
+ ldrbeq r3, [r5, #2] @ zero_extendqisi2
41434231 orreq r3, r3, #1
4144
- streqb r3, [r5, #2]
4145
- ldmfd sp!, {r4, r5, r6, pc}
4146
-.L786:
4147
- .align 2
4232
+ strbeq r3, [r5, #2]
4233
+ pop {r4, r5, r6, pc}
41484234 .L785:
4235
+ .align 2
4236
+.L784:
41494237 .word .LANCHOR0
4150
- .word .LANCHOR1+1428
4238
+ .word .LANCHOR1+1387
41514239 .word .LC0
4152
- .word .LANCHOR0+2773
4240
+ .word .LANCHOR0+2768
41534241 .fnend
41544242 .size buf_remove_free, .-buf_remove_free
41554243 .align 2
41564244 .global dump_buf_info
4245
+ .syntax unified
4246
+ .arm
4247
+ .fpu softvfp
41574248 .type dump_buf_info, %function
41584249 dump_buf_info:
41594250 .fnstart
41604251 @ args = 0, pretend = 0, frame = 0
41614252 @ frame_needed = 0, uses_anonymous_args = 0
4162
- stmfd sp!, {r4, r5, lr}
4163
- .save {r4, r5, lr}
4164
- .pad #28
4165
- sub sp, sp, #28
4166
- ldr r4, .L791
4167
- ldr r0, .L791+4
4168
- ldrb r1, [r4, #2775] @ zero_extendqisi2
4253
+ push {r4, r5, r6, lr}
4254
+ .save {r4, r5, r6, lr}
4255
+ .pad #24
4256
+ sub sp, sp, #24
4257
+ ldr r5, .L790
4258
+ ldr r0, .L790+4
4259
+ ldrb r1, [r5, #2770] @ zero_extendqisi2
4260
+ add r4, r5, #1232
41694261 bl printk
4170
- ldrb r1, [r4, #2776] @ zero_extendqisi2
4171
- ldr r0, .L791+8
4262
+ ldrb r1, [r5, #2771] @ zero_extendqisi2
4263
+ add r5, r5, #2768
4264
+ ldr r0, .L790+8
41724265 bl printk
4173
- ldrb r1, [r4, #2777] @ zero_extendqisi2
4174
- ldr r0, .L791+12
4266
+ ldrb r1, [r5, #4] @ zero_extendqisi2
4267
+ ldr r0, .L790+12
41754268 bl printk
4176
- ldrb r1, [r4, #2778] @ zero_extendqisi2
4177
- ldr r0, .L791+16
4269
+ ldr r6, .L790+16
4270
+ ldrb r1, [r5, #5] @ zero_extendqisi2
4271
+ ldr r0, .L790+20
41784272 bl printk
4179
- ldrb r1, [r4, #2773] @ zero_extendqisi2
4180
- ldr r0, .L791+20
4273
+ ldrb r1, [r5] @ zero_extendqisi2
4274
+ ldr r0, .L790+24
41814275 bl printk
4182
- ldrb r1, [r4, #2774] @ zero_extendqisi2
4183
- ldr r0, .L791+24
4276
+ ldrb r1, [r5, #1] @ zero_extendqisi2
4277
+ ldr r0, .L790+28
41844278 bl printk
4185
- ldr r4, .L791+28
4186
- add r5, r4, #1536
4187
-.L788:
4188
- ldrh r0, [r4, #34]
4279
+.L787:
4280
+ ldr r0, [r4, #24]
41894281 add r4, r4, #48
4190
- ldrb r1, [r4, #-47] @ zero_extendqisi2
4191
- ldrb r2, [r4, #-48] @ zero_extendqisi2
4192
- str r0, [sp]
4193
- ldrb r0, [r4, #-6] @ zero_extendqisi2
41944282 ldrb r3, [r4, #-46] @ zero_extendqisi2
4195
- str r0, [sp, #4]
4196
- ldr r0, [r4, #-12]
4197
- str r0, [sp, #8]
4283
+ ldrb r2, [r4, #-48] @ zero_extendqisi2
4284
+ ldrb r1, [r4, #-47] @ zero_extendqisi2
4285
+ str r0, [sp, #16]
41984286 ldr r0, [r4, #-28]
41994287 str r0, [sp, #12]
4200
- ldr r0, [r4, #-24]
4201
- str r0, [sp, #16]
4202
- ldr r0, .L791+32
4288
+ ldr r0, [r4, #-12]
4289
+ str r0, [sp, #8]
4290
+ ldrb r0, [r4, #-6] @ zero_extendqisi2
4291
+ str r0, [sp, #4]
4292
+ ldrh r0, [r4, #-14]
4293
+ str r0, [sp]
4294
+ mov r0, r6
42034295 bl printk
42044296 cmp r4, r5
4205
- bne .L788
4206
- add sp, sp, #28
4297
+ bne .L787
4298
+ add sp, sp, #24
42074299 @ sp needed
4208
- ldmfd sp!, {r4, r5, pc}
4209
-.L792:
4210
- .align 2
4300
+ pop {r4, r5, r6, pc}
42114301 .L791:
4302
+ .align 2
4303
+.L790:
42124304 .word .LANCHOR0
4305
+ .word .LC44
4306
+ .word .LC45
4307
+ .word .LC46
4308
+ .word .LC50
42134309 .word .LC47
42144310 .word .LC48
42154311 .word .LC49
4216
- .word .LC50
4217
- .word .LC51
4218
- .word .LC52
4219
- .word .LANCHOR0+1236
4220
- .word .LC53
42214312 .fnend
42224313 .size dump_buf_info, .-dump_buf_info
42234314 .align 2
42244315 .global flash_check_bad_block
4316
+ .syntax unified
4317
+ .arm
4318
+ .fpu softvfp
42254319 .type flash_check_bad_block, %function
42264320 flash_check_bad_block:
42274321 .fnstart
42284322 @ args = 0, pretend = 0, frame = 0
42294323 @ frame_needed = 0, uses_anonymous_args = 0
42304324 @ link register save eliminated.
4231
- ldr r3, .L794
4232
- ldrb r2, [r3, #17] @ zero_extendqisi2
4233
- ldrh r3, [r3, #18]
4234
- smulbb r3, r2, r3
4235
- ldr r2, .L794+4
4236
- ldr r2, [r2, #1176]
4237
- uxth r3, r3
4238
- add r3, r3, #31
4239
- mov r3, r3, asr #5
4240
- mov r3, r3, asl #2
4241
- uxth r3, r3
4242
- mul r0, r3, r0
4243
- add r3, r0, #912
4244
- mov r0, r1, lsr #5
4325
+ ldr r2, .L793
4326
+ lsr ip, r1, #5
42454327 and r1, r1, #31
4246
- add r2, r2, r0, asl #2
4247
- ldr r0, [r2, r3]
4248
- mov r0, r0, lsr r1
4328
+ ldrb r3, [r2, #17] @ zero_extendqisi2
4329
+ ldrh r2, [r2, #18]
4330
+ smulbb r3, r3, r2
4331
+ ldr r2, .L793+4
4332
+ uxth r3, r3
4333
+ ldr r2, [r2, #1040]
4334
+ add r3, r3, #31
4335
+ asr r3, r3, #5
4336
+ add r2, r2, ip, lsl #2
4337
+ lsl r3, r3, #2
4338
+ uxth r3, r3
4339
+ mla r0, r0, r3, r2
4340
+ ldr r0, [r0, #912]
4341
+ lsr r0, r0, r1
42494342 and r0, r0, #1
42504343 bx lr
4251
-.L795:
4252
- .align 2
42534344 .L794:
4345
+ .align 2
4346
+.L793:
42544347 .word .LANCHOR2
42554348 .word .LANCHOR0
42564349 .fnend
42574350 .size flash_check_bad_block, .-flash_check_bad_block
42584351 .align 2
42594352 .global flash_mask_bad_block
4353
+ .syntax unified
4354
+ .arm
4355
+ .fpu softvfp
42604356 .type flash_mask_bad_block, %function
42614357 flash_mask_bad_block:
42624358 .fnstart
42634359 @ args = 0, pretend = 0, frame = 0
42644360 @ frame_needed = 0, uses_anonymous_args = 0
4265
- ldr r3, .L798
4266
- stmfd sp!, {r4, r5, r6, lr}
4361
+ ldr r3, .L797
4362
+ mov r2, r1
4363
+ push {r4, r5, r6, lr}
42674364 .save {r4, r5, r6, lr}
4268
- mov r5, r1
4269
- ldrb r2, [r3, #17] @ zero_extendqisi2
4270
- mov r6, r0
4271
- ldrh r4, [r3, #18]
4272
- mov r1, r6
4273
- ldr r0, .L798+4
4274
- smulbb r4, r2, r4
4275
- mov r2, r5
4365
+ mov r5, r0
4366
+ mov r6, r1
4367
+ mov r1, r0
4368
+ ldrb r4, [r3, #17] @ zero_extendqisi2
4369
+ ldrh r3, [r3, #18]
4370
+ ldr r0, .L797+4
4371
+ smulbb r4, r4, r3
42764372 bl printk
4277
- ldr r3, .L798+8
4278
- mov r2, r5, lsr #5
4373
+ uxth r4, r4
4374
+ ldr r3, .L797+8
42794375 mov r1, #1
4280
- and r5, r5, #31
4281
- ldr r3, [r3, #1176]
4282
- uxth r4, r4
4283
- add r4, r4, #31
4284
- mov r4, r4, asr #5
4285
- mov r4, r4, asl #2
4286
- uxth r4, r4
4287
- mul r4, r4, r6
4288
- add r4, r4, #912
4289
- add r4, r3, r4
4290
- ldr r3, [r4, r2, asl #2]
4291
- orr r5, r3, r1, asl r5
4292
- str r5, [r4, r2, asl #2]
4293
- ldmfd sp!, {r4, r5, r6, pc}
4294
-.L799:
4295
- .align 2
4376
+ add r0, r4, #31
4377
+ asr r0, r0, #5
4378
+ ldr r2, [r3, #1040]
4379
+ lsl r0, r0, #2
4380
+ uxth r0, r0
4381
+ mul r0, r5, r0
4382
+ lsr r5, r6, #5
4383
+ and r6, r6, #31
4384
+ add r0, r0, #912
4385
+ add r0, r0, r5, lsl #2
4386
+ ldr r3, [r2, r0]
4387
+ orr r6, r3, r1, lsl r6
4388
+ str r6, [r2, r0]
4389
+ pop {r4, r5, r6, pc}
42964390 .L798:
4391
+ .align 2
4392
+.L797:
42974393 .word .LANCHOR2
4298
- .word .LC54
4394
+ .word .LC51
42994395 .word .LANCHOR0
43004396 .fnend
43014397 .size flash_mask_bad_block, .-flash_mask_bad_block
43024398 .align 2
43034399 .global str2hex
4400
+ .syntax unified
4401
+ .arm
4402
+ .fpu softvfp
43044403 .type str2hex, %function
43054404 str2hex:
43064405 .fnstart
....@@ -4309,385 +4408,394 @@
43094408 @ link register save eliminated.
43104409 ldrb r3, [r0] @ zero_extendqisi2
43114410 cmp r3, #48
4312
- bne .L801
4411
+ bne .L800
43134412 ldrb r3, [r0, #1] @ zero_extendqisi2
43144413 and r3, r3, #223
43154414 cmp r3, #88
43164415 addeq r0, r0, #2
4317
-.L801:
4416
+.L800:
43184417 ldrb r3, [r0] @ zero_extendqisi2
43194418 and r3, r3, #223
43204419 cmp r3, #88
43214420 addeq r0, r0, #1
43224421 sub r3, r0, #1
43234422 mov r0, #0
4324
-.L803:
4423
+.L802:
43254424 ldrb r2, [r3, #1]! @ zero_extendqisi2
43264425 cmp r2, #0
4327
- beq .L812
4426
+ bne .L807
4427
+ bx lr
4428
+.L807:
43284429 sub r1, r2, #48
43294430 uxtb ip, r1
43304431 cmp ip, #9
4331
- addls r0, r1, r0, asl #4
4332
- bls .L803
4432
+ addls r0, r1, r0, lsl #4
4433
+ bls .L802
43334434 sub r1, r2, #97
43344435 cmp r1, #5
43354436 subls r2, r2, #87
4336
- bls .L811
4437
+ bls .L809
43374438 sub r1, r2, #65
43384439 cmp r1, #5
43394440 bxhi lr
43404441 sub r2, r2, #55
4341
-.L811:
4342
- add r0, r2, r0, asl #4
4343
- b .L803
4344
-.L812:
4345
- bx lr
4442
+.L809:
4443
+ add r0, r2, r0, lsl #4
4444
+ b .L802
43464445 .fnend
43474446 .size str2hex, .-str2hex
43484447 .align 2
43494448 .global zftl_proc_debug_init
4449
+ .syntax unified
4450
+ .arm
4451
+ .fpu softvfp
43504452 .type zftl_proc_debug_init, %function
43514453 zftl_proc_debug_init:
43524454 .fnstart
43534455 @ args = 0, pretend = 0, frame = 0
43544456 @ frame_needed = 0, uses_anonymous_args = 0
4355
- stmfd sp!, {r0, r1, r2, lr}
4457
+ push {r0, r1, r2, lr}
43564458 .save {lr}
43574459 .pad #12
43584460 mov r2, #0
4359
- mov r1, #292
43604461 str r2, [sp]
4361
- ldr r3, .L815
4362
- ldr r0, .L815+4
4462
+ mov r1, #292
4463
+ ldr r3, .L812
4464
+ ldr r0, .L812+4
43634465 bl proc_create_data
43644466 add sp, sp, #12
43654467 @ sp needed
43664468 ldr pc, [sp], #4
4367
-.L816:
4469
+.L813:
43684470 .align 2
4369
-.L815:
4370
- .word .LANCHOR1+1448
4371
- .word .LC55
4471
+.L812:
4472
+ .word .LANCHOR1+1404
4473
+ .word .LC52
43724474 .fnend
43734475 .size zftl_proc_debug_init, .-zftl_proc_debug_init
43744476 .align 2
43754477 .global ftl_print_info_to_buf
4478
+ .syntax unified
4479
+ .arm
4480
+ .fpu softvfp
43764481 .type ftl_print_info_to_buf, %function
43774482 ftl_print_info_to_buf:
43784483 .fnstart
43794484 @ args = 0, pretend = 0, frame = 0
43804485 @ frame_needed = 0, uses_anonymous_args = 0
4381
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, lr}
4486
+ push {r0, r1, r2, r3, r4, r5, r6, lr}
43824487 .save {r4, r5, r6, lr}
43834488 .pad #16
4384
- mov r5, r0
4385
- ldr r1, .L819
4386
- ldr r2, .L819+4
4489
+ mov r6, r0
4490
+ ldr r2, .L816
4491
+ ldr r1, .L816+4
43874492 bl sprintf
4388
- ldr r1, .L819+8
4389
- ldr r6, .L819+12
4493
+ ldr r1, .L816+8
4494
+ add r4, r6, r0
4495
+ ldr r5, .L816+12
4496
+ ldrb r0, [r1, #10] @ zero_extendqisi2
43904497 ldrb r3, [r1, #6] @ zero_extendqisi2
43914498 ldrb r2, [r1, #5] @ zero_extendqisi2
4392
- add r4, r5, r0
4393
- ldrb r0, [r1, #7] @ zero_extendqisi2
4394
- str r0, [sp]
4395
- ldrb r0, [r1, #8] @ zero_extendqisi2
4396
- str r0, [sp, #4]
4499
+ str r0, [sp, #12]
43974500 ldrb r0, [r1, #9] @ zero_extendqisi2
43984501 str r0, [sp, #8]
4502
+ ldrb r0, [r1, #8] @ zero_extendqisi2
4503
+ str r0, [sp, #4]
43994504 mov r0, r4
4400
- ldrb r1, [r1, #10] @ zero_extendqisi2
4401
- str r1, [sp, #12]
4402
- ldr r1, .L819+16
4505
+ ldrb r1, [r1, #7] @ zero_extendqisi2
4506
+ str r1, [sp]
4507
+ ldr r1, .L816+16
44034508 bl sprintf
4404
- ldr r2, [r6, #1032]
4405
- ldr r1, .L819+20
4406
- mov r2, r2, lsr #11
4509
+ ldr r2, [r5, #1032]
44074510 add r4, r4, r0
4511
+ ldr r1, .L816+20
44084512 mov r0, r4
4513
+ lsr r2, r2, #11
44094514 bl sprintf
4410
- ldr r2, [r6, #2780]
4411
- ldr r1, .L819+24
4412
- mov r2, r2, lsr #11
4515
+ ldr r2, [r5, #2776]
44134516 add r4, r4, r0
4517
+ ldr r1, .L816+24
44144518 mov r0, r4
4519
+ lsr r2, r2, #11
44154520 bl sprintf
4416
- ldr r1, .L819+28
44174521 add r4, r4, r0
4522
+ ldr r1, .L816+28
44184523 mov r0, r4
44194524 add r4, r4, #10
44204525 bl strcpy
4421
- ldr r2, [r6, #2784]
4526
+ ldr r2, [r5, #2780]
44224527 mov r0, r4
4423
- ldr r1, .L819+32
4528
+ ldr r1, .L816+32
44244529 bl sprintf
4425
- ldr r2, [r6, #1032]
4426
- ldr r1, .L819+36
44274530 add r4, r4, r0
4531
+ ldr r2, [r5, #1032]
4532
+ ldr r1, .L816+36
44284533 mov r0, r4
44294534 bl sprintf
4430
- ldr r3, [r6, #1092]
4431
- ldr r1, .L819+40
4535
+ ldr r3, [r5, #1096]
4536
+ add r4, r4, r0
4537
+ ldr r1, .L816+40
4538
+ mov r0, r4
44324539 ldr r2, [r3, #524]
4433
- add r4, r4, r0
4434
- mov r0, r4
44354540 bl sprintf
4436
- ldr r3, [r6, #1092]
4437
- ldr r1, .L819+44
4438
- ldr r2, [r3, #528]
4541
+ ldr r3, [r5, #1096]
44394542 add r4, r4, r0
4543
+ ldr r1, .L816+44
44404544 mov r0, r4
4545
+ ldr r2, [r3, #528]
4546
+ bl sprintf
4547
+ add r3, r5, #2784
4548
+ add r4, r4, r0
4549
+ ldrh r2, [r3]
4550
+ mov r0, r4
4551
+ ldr r1, .L816+48
4552
+ bl sprintf
4553
+ movw r3, #2786
4554
+ add r4, r4, r0
4555
+ ldrh r2, [r5, r3]
4556
+ mov r0, r4
4557
+ ldr r1, .L816+52
44414558 bl sprintf
44424559 movw r3, #2788
4443
- ldrh r2, [r6, r3]
4444
- ldr r1, .L819+48
44454560 add r4, r4, r0
4561
+ ldrh r2, [r5, r3]
44464562 mov r0, r4
4563
+ ldr r1, .L816+56
44474564 bl sprintf
44484565 movw r3, #2790
4449
- ldrh r2, [r6, r3]
4450
- ldr r1, .L819+52
44514566 add r4, r4, r0
4567
+ ldrh r2, [r5, r3]
44524568 mov r0, r4
4569
+ ldr r1, .L816+60
44534570 bl sprintf
44544571 movw r3, #2792
4455
- ldrh r2, [r6, r3]
4456
- ldr r1, .L819+56
44574572 add r4, r4, r0
4573
+ ldrh r2, [r5, r3]
44584574 mov r0, r4
4575
+ ldr r1, .L816+64
44594576 bl sprintf
44604577 movw r3, #2794
4461
- ldrh r2, [r6, r3]
4462
- ldr r1, .L819+60
44634578 add r4, r4, r0
4579
+ ldrh r2, [r5, r3]
44644580 mov r0, r4
4581
+ ldr r1, .L816+68
44654582 bl sprintf
4466
- movw r3, #2796
4467
- ldrh r2, [r6, r3]
4468
- ldr r1, .L819+64
4583
+ ldrb r1, [r5, #2797] @ zero_extendqisi2
44694584 add r4, r4, r0
4585
+ ldrb r3, [r5, #2796] @ zero_extendqisi2
44704586 mov r0, r4
4471
- bl sprintf
4472
- movw r3, #2798
4473
- ldrh r2, [r6, r3]
4474
- ldr r1, .L819+68
4475
- add r4, r4, r0
4476
- mov r0, r4
4477
- bl sprintf
4478
- ldrb r1, [r6, #2801] @ zero_extendqisi2
4479
- ldrb r2, [r6, #2774] @ zero_extendqisi2
4480
- ldrb r3, [r6, #2800] @ zero_extendqisi2
4481
- add r4, r4, r0
4587
+ ldrb r2, [r5, #2769] @ zero_extendqisi2
44824588 str r1, [sp]
4483
- ldr r1, .L819+72
4484
- mov r0, r4
4589
+ ldr r1, .L816+72
44854590 bl sprintf
4486
- ldr r3, [r6, #2804]
4487
- ldr r1, .L819+76
4488
- ldrh r2, [r3, #148]
4489
- ldrh r3, [r3, #146]
4591
+ ldr r2, [r5, #2800]
44904592 add r4, r4, r0
4593
+ ldr r1, .L816+76
44914594 mov r0, r4
4595
+ ldrh r3, [r2, #146]
4596
+ ldrh r2, [r2, #148]
44924597 bl sprintf
4493
- ldr r3, [r6, #2804]
4494
- ldr r1, .L819+80
4598
+ ldr r3, [r5, #2800]
4599
+ add r4, r4, r0
4600
+ ldr r1, .L816+80
4601
+ mov r0, r4
44954602 ldr r2, [r3, #16]
44964603 ldr r3, [r3, #20]
44974604 add r2, r3, r2, lsr #11
4498
- add r4, r4, r0
4499
- mov r0, r4
45004605 bl sprintf
4501
- ldr r3, [r6, #2804]
4502
- ldr r1, .L819+84
4606
+ ldr r3, [r5, #2800]
4607
+ add r4, r4, r0
4608
+ ldr r1, .L816+84
4609
+ mov r0, r4
45034610 ldr r2, [r3, #24]
45044611 ldr r3, [r3, #28]
45054612 add r2, r3, r2, lsr #11
4506
- add r4, r4, r0
4507
- mov r0, r4
45084613 bl sprintf
4509
- ldr r3, [r6, #2804]
4510
- ldr r1, .L819+88
4614
+ ldr r3, [r5, #2800]
4615
+ add r4, r4, r0
4616
+ ldr r1, .L816+88
4617
+ mov r0, r4
45114618 ldr r2, [r3, #64]
4512
- add r4, r4, r0
4513
- mov r0, r4
45144619 bl sprintf
4515
- ldr r3, [r6, #2804]
4516
- ldr r1, .L819+92
4620
+ ldr r3, [r5, #2800]
4621
+ add r4, r4, r0
4622
+ ldr r1, .L816+92
4623
+ mov r0, r4
45174624 ldr r2, [r3, #68]
4518
- add r4, r4, r0
4519
- mov r0, r4
45204625 bl sprintf
4521
- ldr r3, [r6, #1092]
4522
- ldr r2, .L819+96
4523
- ldr r1, .L819+100
4524
- ldr r3, [r3, #12]
4525
- umull r2, r3, r3, r2
4526
- mov r2, r3, lsr #3
4626
+ ldr r3, [r5, #1096]
45274627 add r4, r4, r0
4628
+ ldr r1, .L816+96
45284629 mov r0, r4
4630
+ ldr r2, [r3, #12]
4631
+ umull r2, r3, r2, r1
4632
+ ldr r1, .L816+100
4633
+ lsr r2, r3, #3
45294634 bl sprintf
4530
- ldr r3, [r6, #2804]
4531
- ldrb r2, [r6] @ zero_extendqisi2
4635
+ ldr r3, [r5, #2800]
4636
+ add r4, r4, r0
4637
+ ldrb r2, [r5] @ zero_extendqisi2
4638
+ mov r0, r4
45324639 ldrh r1, [r3, #150]
4533
- add r4, r4, r0
45344640 str r1, [sp]
4535
- ldr r1, .L819+104
4536
- mov r0, r4
4641
+ ldr r1, .L816+104
45374642 ldr r3, [r3, #156]
45384643 bl sprintf
4539
- ldr r3, [r6, #1092]
4540
- ldr r1, .L819+108
4644
+ ldr r3, [r5, #1096]
4645
+ add r4, r4, r0
4646
+ ldr r1, .L816+108
4647
+ mov r0, r4
45414648 ldr r2, [r3, #556]
4542
- add r4, r4, r0
4543
- mov r0, r4
45444649 bl sprintf
4545
- ldr r3, [r6, #1092]
4546
- ldr r1, .L819+112
4650
+ ldr r3, [r5, #1096]
4651
+ add r4, r4, r0
4652
+ ldr r1, .L816+112
4653
+ mov r0, r4
45474654 ldr r2, [r3, #552]
4548
- add r4, r4, r0
4549
- mov r0, r4
45504655 bl sprintf
4551
- ldr r3, [r6, #2804]
4552
- ldr r1, .L819+116
4656
+ ldr r3, [r5, #2800]
4657
+ add r4, r4, r0
4658
+ ldr r1, .L816+116
4659
+ mov r0, r4
45534660 ldr r2, [r3, #52]
4554
- add r4, r4, r0
4555
- mov r0, r4
45564661 bl sprintf
4557
- ldr r3, [r6, #2804]
4558
- ldr r1, .L819+120
4662
+ ldr r3, [r5, #2800]
4663
+ add r4, r4, r0
4664
+ ldr r1, .L816+120
4665
+ mov r0, r4
45594666 ldr r2, [r3, #60]
4560
- add r4, r4, r0
4561
- mov r0, r4
45624667 bl sprintf
4563
- ldr r3, [r6, #2804]
4564
- ldr r1, .L819+124
4668
+ ldr r3, [r5, #2800]
4669
+ add r4, r4, r0
4670
+ ldr r1, .L816+124
4671
+ mov r0, r4
45654672 ldr r2, [r3, #76]
4566
- add r4, r4, r0
4567
- mov r0, r4
45684673 bl sprintf
4569
- ldr r3, [r6, #2804]
4570
- ldr r1, .L819+128
4674
+ ldr r3, [r5, #2800]
4675
+ add r4, r4, r0
4676
+ ldr r1, .L816+128
4677
+ mov r0, r4
45714678 ldr r2, [r3, #8]
4679
+ bl sprintf
4680
+ ldr r1, [r5, #1096]
45724681 add r4, r4, r0
45734682 mov r0, r4
4574
- bl sprintf
4575
- ldr r1, [r6, #1092]
4576
- ldrh r2, [r1, #16]
45774683 ldrh r3, [r1, #22]
4684
+ ldrh r2, [r1, #16]
45784685 ldrb r1, [r1, #25] @ zero_extendqisi2
4579
- add r4, r4, r0
45804686 str r1, [sp]
4581
- ldr r1, .L819+132
4582
- mov r0, r4
4687
+ ldr r1, .L816+132
45834688 bl sprintf
4584
- ldr r1, [r6, #1092]
4585
- ldrh r2, [r1, #48]
4689
+ ldr r1, [r5, #1096]
4690
+ add r4, r4, r0
4691
+ mov r0, r4
45864692 ldrh r3, [r1, #54]
4693
+ ldrh r2, [r1, #48]
45874694 ldrb r1, [r1, #57] @ zero_extendqisi2
4588
- add r4, r4, r0
45894695 str r1, [sp]
4590
- ldr r1, .L819+136
4591
- mov r0, r4
4696
+ ldr r1, .L816+136
45924697 bl sprintf
4593
- ldr r1, [r6, #1092]
4594
- ldrh r2, [r1, #80]
4698
+ ldr r1, [r5, #1096]
4699
+ add r4, r4, r0
4700
+ mov r0, r4
45954701 ldrh r3, [r1, #86]
4702
+ ldrh r2, [r1, #80]
45964703 ldrb r1, [r1, #89] @ zero_extendqisi2
4597
- add r4, r4, r0
45984704 str r1, [sp]
4599
- ldr r1, .L819+140
4600
- mov r0, r4
4705
+ ldr r1, .L816+140
46014706 bl sprintf
4602
- ldr r3, [r6, #2804]
4603
- ldrh r1, [r3, #88]
4604
- ldrh r2, [r3, #74]
4605
- str r1, [sp]
4707
+ ldr r3, [r5, #2800]
46064708 add r4, r4, r0
4607
- ldrh r1, [r3, #92]
46084709 mov r0, r4
4609
- str r1, [sp, #4]
46104710 ldrh r1, [r3, #96]
4711
+ ldrh r2, [r3, #74]
46114712 str r1, [sp, #8]
4612
- ldr r1, .L819+144
4713
+ ldrh r1, [r3, #92]
4714
+ str r1, [sp, #4]
4715
+ ldrh r1, [r3, #88]
4716
+ str r1, [sp]
4717
+ ldr r1, .L816+144
46134718 ldr r3, [r3, #84]
46144719 bl sprintf
4615
- ldr r3, [r6, #2804]
4616
- ldrh r1, [r3, #90]
4617
- ldrh r2, [r3, #72]
4618
- str r1, [sp]
4720
+ ldr r3, [r5, #2800]
46194721 add r4, r4, r0
4620
- ldrh r1, [r3, #94]
46214722 mov r0, r4
4622
- str r1, [sp, #4]
46234723 ldrh r1, [r3, #98]
4724
+ ldrh r2, [r3, #72]
46244725 str r1, [sp, #8]
4625
- ldr r1, .L819+148
4726
+ ldrh r1, [r3, #94]
4727
+ str r1, [sp, #4]
4728
+ ldrh r1, [r3, #90]
4729
+ str r1, [sp]
4730
+ ldr r1, .L816+148
46264731 ldr r3, [r3, #80]
46274732 bl sprintf
4628
- movw r3, #2808
4629
- ldrh r2, [r6, r3]
4630
- ldr r1, .L819+152
4733
+ movw r3, #2804
46314734 add r4, r4, r0
4735
+ ldrh r2, [r5, r3]
46324736 mov r0, r4
4737
+ ldr r1, .L816+152
46334738 bl sprintf
4634
- movw r1, #2814
4635
- ldrh r1, [r6, r1]
4636
- movw r3, #2810
4637
- ldrh r2, [r6, r3]
4638
- movw r3, #2812
4639
- ldrh r3, [r6, r3]
4640
- str r1, [sp]
4641
- add r1, r6, #2816
4739
+ ldr r1, [r5, #2812]
46424740 add r4, r4, r0
4643
- ldrh r1, [r1]
4741
+ movw r3, #2806
4742
+ movw r2, #2808
4743
+ ldrh r3, [r5, r3]
46444744 mov r0, r4
4645
- str r1, [sp, #4]
4646
- ldr r1, [r6, #2820]
46474745 str r1, [sp, #8]
4648
- ldr r1, .L819+156
4649
- bl sprintf
4650
- ldr r1, [r6, #1092]
4651
- add r3, r1, #584
4652
- ldrh r2, [r3]
4653
- movw r3, #586
4654
- ldrh r3, [r1, r3]
4655
- add r4, r4, r0
4656
- add r0, r1, #588
4657
- ldrh r0, [r0]
4658
- str r0, [sp]
4659
- movw r0, #590
4660
- ldrh r1, [r1, r0]
4661
- mov r0, r4
4746
+ add r1, r5, #2816
4747
+ ldrh r1, [r1]
4748
+ ldrh r2, [r5, r2]
46624749 str r1, [sp, #4]
4663
- ldr r1, .L819+160
4750
+ movw r1, #2818
4751
+ ldrh r1, [r5, r1]
4752
+ str r1, [sp]
4753
+ ldr r1, .L816+156
46644754 bl sprintf
4665
- ldr r3, [r6, #1092]
4666
- ldr r1, .L819+164
4667
- ldr r2, [r3, #544]
4668
- str r2, [sp]
4755
+ ldr r1, [r5, #1096]
46694756 add r4, r4, r0
4670
- ldr r2, [r6, #2804]
4757
+ movw r0, #590
4758
+ movw r3, #586
4759
+ ldrh r0, [r1, r0]
4760
+ add r2, r1, #584
4761
+ ldrh r3, [r1, r3]
4762
+ add r1, r1, #588
4763
+ ldrh r2, [r2]
4764
+ str r0, [sp, #4]
46714765 mov r0, r4
4672
- ldr r2, [r2, #44]
4673
- str r2, [sp, #4]
4674
- ldr r2, [r3, #548]
4675
- str r2, [sp, #8]
4676
- ldr r2, [r3, #536]
4677
- ldr r3, [r3, #540]
4766
+ ldrh r1, [r1]
4767
+ str r1, [sp]
4768
+ ldr r1, .L816+160
4769
+ bl sprintf
4770
+ ldr r2, [r5, #1096]
4771
+ add r4, r4, r0
4772
+ ldr r1, .L816+164
4773
+ mov r0, r4
4774
+ ldr r3, [r2, #548]
4775
+ str r3, [sp, #8]
4776
+ ldr r3, [r5, #2800]
4777
+ ldr r3, [r3, #44]
4778
+ str r3, [sp, #4]
4779
+ ldr r3, [r2, #544]
4780
+ str r3, [sp]
4781
+ ldr r3, [r2, #540]
4782
+ ldr r2, [r2, #536]
46784783 bl sprintf
46794784 add r0, r4, r0
4680
- rsb r0, r5, r0
4785
+ sub r0, r0, r6
46814786 add sp, sp, #16
46824787 @ sp needed
4683
- ldmfd sp!, {r4, r5, r6, pc}
4684
-.L820:
4788
+ pop {r4, r5, r6, pc}
4789
+.L817:
46854790 .align 2
4686
-.L819:
4791
+.L816:
46874792 .word .LC1
46884793 .word .LC2
46894794 .word .LANCHOR2
46904795 .word .LANCHOR0
4796
+ .word .LC53
4797
+ .word .LC54
4798
+ .word .LC55
46914799 .word .LC56
46924800 .word .LC57
46934801 .word .LC58
....@@ -4705,10 +4813,10 @@
47054813 .word .LC70
47064814 .word .LC71
47074815 .word .LC72
4816
+ .word -858993459
47084817 .word .LC73
47094818 .word .LC74
47104819 .word .LC75
4711
- .word -858993459
47124820 .word .LC76
47134821 .word .LC77
47144822 .word .LC78
....@@ -4723,13 +4831,13 @@
47234831 .word .LC87
47244832 .word .LC88
47254833 .word .LC89
4726
- .word .LC90
4727
- .word .LC91
4728
- .word .LC92
47294834 .fnend
47304835 .size ftl_print_info_to_buf, .-ftl_print_info_to_buf
47314836 .align 2
47324837 .global zftl_proc_ftl_read
4838
+ .syntax unified
4839
+ .arm
4840
+ .fpu softvfp
47334841 .type zftl_proc_ftl_read, %function
47344842 zftl_proc_ftl_read:
47354843 .fnstart
....@@ -4741,34 +4849,40 @@
47414849 .size zftl_proc_ftl_read, .-zftl_proc_ftl_read
47424850 .align 2
47434851 .global ftl_gc_write_buf
4852
+ .syntax unified
4853
+ .arm
4854
+ .fpu softvfp
47444855 .type ftl_gc_write_buf, %function
47454856 ftl_gc_write_buf:
47464857 .fnstart
47474858 @ args = 0, pretend = 0, frame = 0
47484859 @ frame_needed = 0, uses_anonymous_args = 0
4749
- stmfd sp!, {r4, lr}
4860
+ push {r4, lr}
47504861 .save {r4, lr}
47514862 mov r1, r0
47524863 ldrb r3, [r0, #2] @ zero_extendqisi2
4753
- ldr r4, .L824
4864
+ ldr r4, .L821
47544865 orr r3, r3, #2
47554866 strb r3, [r0, #2]
47564867 add r0, r4, #2816
4757
- add r0, r0, #8
4868
+ add r0, r0, #4
47584869 bl buf_add_tail
4759
- ldrb r0, [r4, #2800] @ zero_extendqisi2
4870
+ ldrb r0, [r4, #2796] @ zero_extendqisi2
47604871 add r0, r0, #1
47614872 uxtb r0, r0
4762
- strb r0, [r4, #2800]
4763
- ldmfd sp!, {r4, pc}
4764
-.L825:
4873
+ strb r0, [r4, #2796]
4874
+ pop {r4, pc}
4875
+.L822:
47654876 .align 2
4766
-.L824:
4877
+.L821:
47674878 .word .LANCHOR0
47684879 .fnend
47694880 .size ftl_gc_write_buf, .-ftl_gc_write_buf
47704881 .align 2
47714882 .global gc_hook
4883
+ .syntax unified
4884
+ .arm
4885
+ .fpu softvfp
47724886 .type gc_hook, %function
47734887 gc_hook:
47744888 .fnstart
....@@ -4780,6 +4894,9 @@
47804894 .size gc_hook, .-gc_hook
47814895 .align 2
47824896 .global vpn_check
4897
+ .syntax unified
4898
+ .arm
4899
+ .fpu softvfp
47834900 .type vpn_check, %function
47844901 vpn_check:
47854902 .fnstart
....@@ -4791,6 +4908,9 @@
47914908 .size vpn_check, .-vpn_check
47924909 .align 2
47934910 .global ftl_scan_all_data
4911
+ .syntax unified
4912
+ .arm
4913
+ .fpu softvfp
47944914 .type ftl_scan_all_data, %function
47954915 ftl_scan_all_data:
47964916 .fnstart
....@@ -4802,719 +4922,741 @@
48024922 .size ftl_scan_all_data, .-ftl_scan_all_data
48034923 .align 2
48044924 .global gc_add_sblk
4925
+ .syntax unified
4926
+ .arm
4927
+ .fpu softvfp
48054928 .type gc_add_sblk, %function
48064929 gc_add_sblk:
48074930 .fnstart
48084931 @ args = 0, pretend = 0, frame = 0
48094932 @ frame_needed = 0, uses_anonymous_args = 0
4810
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr}
4933
+ push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr}
48114934 .save {r4, r5, r6, r7, r8, r9, r10, lr}
48124935 .pad #16
48134936 mov r5, r0
4814
- ldr r8, .L866
4937
+ ldr r8, .L862
48154938 mov r4, r1
48164939 mov r9, r2
4817
- ldr r7, .L866+4
4940
+ ldr r7, .L862+4
48184941 ldr r3, [r8]
48194942 tst r3, #256
4820
- beq .L830
4821
- ldr r3, [r7, #1080]
4822
- mov r1, r5
4823
- ldr r2, [r7, #1088]
4824
- add r3, r3, r0, asl #2
4825
- ldrb r3, [r3, #2] @ zero_extendqisi2
4826
- mov r3, r3, lsr #5
4827
- str r3, [sp]
4828
- mov r3, r0, asl #1
4829
- ldr r0, .L866+8
4830
- ldrh r3, [r2, r3]
4831
- mov r2, r4
4832
- str r3, [sp, #4]
4833
- ldr r3, .L866+12
4834
- ldrh r3, [r3, #52]
4835
- str r3, [sp, #8]
4836
- movw r3, #2814
4943
+ beq .L827
4944
+ movw r3, #2818
4945
+ ldr r2, [r7, #1092]
48374946 ldrh r3, [r7, r3]
48384947 str r3, [sp, #12]
4948
+ ldr r3, .L862+8
4949
+ ldrh r3, [r3, #52]
4950
+ str r3, [sp, #8]
4951
+ lsl r3, r0, #1
4952
+ ldrh r3, [r2, r3]
4953
+ mov r2, r1
4954
+ mov r1, r0
4955
+ str r3, [sp, #4]
4956
+ ldr r3, [r7, #1084]
4957
+ add r3, r3, r0, lsl #2
4958
+ ldr r0, .L862+12
4959
+ ldrb r3, [r3, #2] @ zero_extendqisi2
4960
+ lsr r3, r3, #5
4961
+ str r3, [sp]
48394962 mov r3, r9
48404963 bl printk
4841
-.L830:
4842
- movw r3, #1076
4964
+.L827:
4965
+ movw r3, #1080
48434966 ldrh r3, [r7, r3]
48444967 cmp r3, r5
4845
- bhi .L831
4846
- ldr r1, .L866+16
4968
+ bhi .L828
48474969 movw r2, #543
4848
- ldr r0, .L866+20
4970
+ ldr r1, .L862+16
4971
+ ldr r0, .L862+20
48494972 bl printk
48504973 bl dump_stack
4851
-.L831:
4852
- movw r3, #1076
4853
- ldr r1, .L866+4
4974
+.L828:
4975
+ movw r3, #1080
48544976 ldrh r3, [r7, r3]
48554977 cmp r3, r5
4856
- bhi .L832
4978
+ bhi .L829
48574979 ldr r0, [r8]
48584980 ands r0, r0, #1024
4859
- beq .L833
4860
- mov r1, r5
4861
- mov r2, r4
4981
+ beq .L826
48624982 mov r3, r9
4863
- ldr r0, .L866+24
4983
+ mov r2, r4
4984
+ mov r1, r5
4985
+ ldr r0, .L862+24
48644986 bl printk
4865
- b .L852
4866
-.L832:
4867
- ldr r2, [r1, #1088]
4868
- mov r3, r5, asl #1
4987
+.L849:
4988
+ mov r0, #0
4989
+ b .L826
4990
+.L829:
4991
+ ldr r2, [r7, #1092]
4992
+ lsl r3, r5, #1
48694993 ldrh r3, [r2, r3]
4870
- ldr r2, [r1, #1080]
4871
- add r2, r2, r5, asl #2
4872
- ldrb ip, [r2, #2] @ zero_extendqisi2
4873
- ands r6, ip, #224
4874
- bne .L834
4994
+ ldr r2, [r7, #1084]
4995
+ add r2, r2, r5, lsl #2
4996
+ ldrb r2, [r2, #2] @ zero_extendqisi2
4997
+ ands r6, r2, #224
4998
+ bne .L831
48754999 cmp r3, #0
4876
- beq .L852
4877
- ldr r1, .L866+16
5000
+ beq .L849
48785001 movw r2, #553
4879
- ldr r0, .L866+20
5002
+ ldr r1, .L862+16
5003
+ ldr r0, .L862+20
48805004 bl printk
48815005 bl dump_stack
4882
- b .L852
4883
-.L834:
4884
- movw r2, #2828
4885
- ldrh r2, [r1, r2]
4886
- cmp r2, r5
4887
- beq .L852
4888
- ldr r2, [r1, #1092]
4889
- ldrh r0, [r2, #48]
5006
+ b .L849
5007
+.L831:
5008
+ movw r1, #2824
5009
+ ldrh r1, [r7, r1]
5010
+ cmp r1, r5
5011
+ beq .L849
5012
+ ldr r1, [r7, #1096]
5013
+ ldrh r0, [r1, #48]
48905014 cmp r0, r5
4891
- beq .L852
4892
- ldrh r0, [r2, #16]
5015
+ beq .L849
5016
+ ldrh r0, [r1, #16]
48935017 cmp r0, r5
4894
- beq .L852
4895
- ldrh r0, [r2, #80]
5018
+ beq .L849
5019
+ ldrh r0, [r1, #80]
48965020 cmp r0, r5
4897
- beq .L852
4898
- ldr r0, .L866+12
4899
- add r1, r1, #2880
4900
- ldrh lr, [r0, #52]
4901
- mov r0, #0
4902
-.L835:
4903
- cmp r0, lr
4904
- bcs .L865
4905
- ldrh r6, [r1, #2]!
4906
- cmp r6, r5
4907
- beq .L852
4908
- add r0, r0, #1
4909
- b .L835
4910
-.L865:
5021
+ beq .L849
5022
+ ldr r0, .L862+8
5023
+ mov ip, #0
5024
+ ldrh r10, [r0, #52]!
5025
+.L832:
5026
+ cmp ip, r10
5027
+ bcc .L833
49115028 cmp r4, #0
4912
- bne .L840
4913
- ldr r0, .L866+28
4914
- ldrh r6, [r0]
4915
- cmp r6, r5
4916
- moveq r0, r4
4917
- beq .L833
4918
- add r0, r0, #4
4919
- mov r1, r4
4920
-.L839:
4921
- ldrh r10, [r1, r0]
4922
- cmp r5, r10
4923
- bne .L838
4924
- ldr r0, [r8]
4925
- ands r0, r0, #256
4926
- beq .L833
4927
- stmia sp, {r5, r6}
5029
+ bne .L837
5030
+ ldr ip, .L862+28
5031
+ mov r0, r4
5032
+ ldrh lr, [ip, #-4]
5033
+ cmp r5, lr
5034
+ beq .L826
5035
+ sub ip, ip, #2
5036
+.L836:
5037
+ ldrh r6, [r0, ip]
5038
+ cmp r5, r6
5039
+ bne .L835
5040
+ ldr r1, [r8]
5041
+ ands r0, r1, #256
5042
+ beq .L826
5043
+ stm sp, {r5, lr}
5044
+ lsr r2, r2, #5
49285045 mov r1, r5
4929
- mov r2, ip, lsr #5
4930
- ldr r0, .L866+32
5046
+ ldr r0, .L862+32
49315047 bl printk
4932
- b .L852
5048
+ b .L849
5049
+.L833:
5050
+ ldrh lr, [r0, #2]!
5051
+ cmp lr, r5
5052
+ beq .L849
5053
+ add ip, ip, #1
5054
+ b .L832
5055
+.L835:
5056
+ add r0, r0, #2
5057
+ cmp r0, #16
5058
+ bne .L836
5059
+ add r1, r1, r9, lsl #7
5060
+ add r6, r1, #136
49335061 .L838:
4934
- add r1, r1, #2
4935
- cmp r1, #16
4936
- bne .L839
4937
- add r6, r2, r9, asl #7
4938
- add r6, r6, #136
4939
- b .L841
4940
-.L840:
4941
- add r6, r2, #392
4942
-.L841:
4943
- ldr r2, [r8]
4944
- tst r2, #256
4945
- beq .L842
4946
- stmia sp, {r3, lr}
4947
- movw r3, #2814
4948
- ldrh r3, [r7, r3]
4949
- mov r1, r5
4950
- ldr r0, .L866+36
5062
+ ldr r1, [r8]
5063
+ tst r1, #256
5064
+ beq .L839
5065
+ movw r1, #2818
5066
+ stm sp, {r3, r10}
5067
+ ldrh r1, [r7, r1]
5068
+ lsr r3, r2, #5
5069
+ ldr r0, .L862+36
49515070 mov r2, r4
4952
- str r3, [sp, #8]
4953
- mov r3, ip, lsr #5
5071
+ str r1, [sp, #8]
5072
+ mov r1, r5
49545073 bl printk
4955
-.L842:
4956
- add r1, r6, #128
5074
+.L839:
49575075 mov r3, r6
5076
+ add r1, r6, #128
49585077 movw r0, #65535
4959
-.L845:
5078
+.L842:
49605079 mov r2, r3
49615080 add r3, r3, #2
49625081 ldrh ip, [r2]
49635082 cmp ip, r0
4964
- bne .L843
5083
+ bne .L840
49655084 cmp r4, #0
49665085 strh r5, [r2] @ movhi
4967
- ldreq r3, [r7, #1092]
4968
- ldrne r2, [r7, #1092]
4969
- addeq r9, r3, r9, asl #1
4970
- ldrneh r3, [r2, #124]
4971
- ldreqh r3, [r9, #120]
5086
+ ldreq r3, [r7, #1096]
5087
+ ldrne r2, [r7, #1096]
5088
+ addeq r9, r3, r9, lsl #1
5089
+ ldrhne r3, [r2, #124]
5090
+ ldrheq r3, [r9, #120]
49725091 addne r3, r3, #1
5092
+ strhne r3, [r2, #124] @ movhi
49735093 addeq r3, r3, #1
4974
- strneh r3, [r2, #124] @ movhi
4975
- streqh r3, [r9, #120] @ movhi
4976
- b .L864
4977
-.L843:
4978
- cmp r3, r1
4979
- bne .L845
4980
-.L864:
5094
+ strheq r3, [r9, #120] @ movhi
5095
+.L861:
49815096 mov r0, #1
4982
- b .L833
4983
-.L852:
4984
- mov r0, #0
4985
-.L833:
5097
+.L826:
49865098 add sp, sp, #16
49875099 @ sp needed
4988
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
4989
-.L867:
5100
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
5101
+.L837:
5102
+ add r6, r1, #392
5103
+ b .L838
5104
+.L840:
5105
+ cmp r3, r1
5106
+ bne .L842
5107
+ b .L861
5108
+.L863:
49905109 .align 2
4991
-.L866:
5110
+.L862:
49925111 .word .LANCHOR2
49935112 .word .LANCHOR0
4994
- .word .LC93
4995
- .word .LANCHOR0+2828
4996
- .word .LANCHOR1+1608
5113
+ .word .LANCHOR0+2824
5114
+ .word .LC90
5115
+ .word .LANCHOR1+1448
49975116 .word .LC0
4998
- .word .LC94
5117
+ .word .LC91
49995118 .word .LANCHOR3-3152
5000
- .word .LC95
5001
- .word .LC96
5119
+ .word .LC92
5120
+ .word .LC93
50025121 .fnend
50035122 .size gc_add_sblk, .-gc_add_sblk
50045123 .align 2
50055124 .global gc_mark_bad_ppa
5125
+ .syntax unified
5126
+ .arm
5127
+ .fpu softvfp
50065128 .type gc_mark_bad_ppa, %function
50075129 gc_mark_bad_ppa:
50085130 .fnstart
50095131 @ args = 0, pretend = 0, frame = 0
50105132 @ frame_needed = 0, uses_anonymous_args = 0
5011
- ldr r3, .L874
5012
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
5013
- .save {r4, r5, r6, r7, r8, lr}
5014
- sub r2, r3, #3120
5015
- ldr r5, .L874+4
5016
- mov r6, #1
5017
- ldrh r1, [r2, #-12]
5018
- mov r7, r0
5133
+ ldr r3, .L869
5134
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
5135
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
5136
+ mov r8, r0
5137
+ ldr r5, .L869+4
5138
+ mov r7, #1
5139
+ sub r2, r3, #3136
5140
+ ldrh r2, [r2, #-2]
5141
+ ldrb r1, [r3, #-3136] @ zero_extendqisi2
50195142 add r5, r5, #4096
5020
- ldrb r2, [r5, #-2907] @ zero_extendqisi2
5021
- mov r0, r0, lsr r1
5022
- rsb r2, r2, #24
5023
- uxth r4, r0
5024
- rsb r2, r1, r2
5025
- ldrb r1, [r3, #-3130] @ zero_extendqisi2
5026
- mov r2, r6, asl r2
5027
- sub r2, r2, #1
5028
- and r0, r0, r2
5143
+ lsr r6, r0, r2
5144
+ ldrb r0, [r5, #-2943] @ zero_extendqisi2
5145
+ uxth r4, r6
5146
+ rsb r0, r0, #24
5147
+ sub r0, r0, r2
5148
+ lsl r0, r7, r0
5149
+ sub r0, r0, #1
5150
+ and r0, r0, r6
50295151 bl __aeabi_uidiv
5030
- mov r3, r7
5031
- ldr r1, [r5, #920]
5152
+ uxth r9, r0
5153
+ mov r3, r8
50325154 mov r2, r4
5033
- uxth r8, r0
5034
- ldr r0, .L874+8
5155
+ ldr r1, [r5, #916]
5156
+ ldr r0, .L869+8
50355157 bl printk
5036
- mov r1, r6
5037
- mov r0, r8
5158
+ mov r1, r7
50385159 mov r2, #0
5160
+ mov r0, r9
50395161 bl gc_add_sblk
5040
- ldr r3, [r5, #920]
5041
- ldr r0, .L874+12
5162
+ ldr r3, [r5, #916]
50425163 mov r1, #0
5043
-.L869:
5164
+ ldr r0, .L869+12
5165
+ movw ip, #1096
5166
+.L865:
50445167 uxth r2, r1
5045
- cmp r2, r3
5046
- bcs .L873
5047
- add r2, r2, #1088
5048
- add r1, r1, #1
5049
- add r2, r2, #8
5050
- mov r2, r2, asl #1
5051
- ldrh r2, [r0, r2]
5052
- cmp r2, r4
5053
- bne .L869
5054
- b .L870
5055
-.L873:
5168
+ cmp r3, r2
5169
+ bhi .L867
50565170 cmp r3, #5
5057
- bhi .L870
5171
+ bhi .L866
50585172 add r2, r3, #1
50595173 add r3, r3, #1088
5174
+ str r2, [r5, #916]
50605175 add r3, r3, #8
5061
- str r2, [r5, #920]
5062
- ldr r2, .L874+12
5063
- mov r3, r3, asl #1
5176
+ ldr r2, .L869+12
5177
+ lsl r3, r3, #1
50645178 strh r4, [r2, r3] @ movhi
5065
-.L870:
5179
+ b .L866
5180
+.L867:
5181
+ add r2, r2, ip
5182
+ add r1, r1, #1
5183
+ lsl r2, r2, #1
5184
+ ldrh r2, [r0, r2]
5185
+ cmp r4, r2
5186
+ bne .L865
5187
+.L866:
50665188 mov r0, #0
5067
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
5068
-.L875:
5189
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
5190
+.L870:
50695191 .align 2
5070
-.L874:
5192
+.L869:
50715193 .word .LANCHOR3
50725194 .word .LANCHOR0
5073
- .word .LC97
5074
- .word .LANCHOR0+2828
5195
+ .word .LC94
5196
+ .word .LANCHOR0+2824
50755197 .fnend
50765198 .size gc_mark_bad_ppa, .-gc_mark_bad_ppa
50775199 .align 2
50785200 .global gc_get_src_ppa_from_index
5201
+ .syntax unified
5202
+ .arm
5203
+ .fpu softvfp
50795204 .type gc_get_src_ppa_from_index, %function
50805205 gc_get_src_ppa_from_index:
50815206 .fnstart
50825207 @ args = 0, pretend = 0, frame = 0
50835208 @ frame_needed = 0, uses_anonymous_args = 0
50845209 @ link register save eliminated.
5085
- ldr r3, .L877
5086
- ldr r3, [r3, #-3128]
5087
- ldr r0, [r3, r0, asl #2]
5210
+ ldr r3, .L872
5211
+ ldr r3, [r3, #-3132]
5212
+ ldr r0, [r3, r0, lsl #2]
50885213 bx lr
5089
-.L878:
5214
+.L873:
50905215 .align 2
5091
-.L877:
5216
+.L872:
50925217 .word .LANCHOR3
50935218 .fnend
50945219 .size gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
50955220 .align 2
50965221 .global gc_write_completed
5222
+ .syntax unified
5223
+ .arm
5224
+ .fpu softvfp
50975225 .type gc_write_completed, %function
50985226 gc_write_completed:
50995227 .fnstart
51005228 @ args = 0, pretend = 0, frame = 8
51015229 @ frame_needed = 0, uses_anonymous_args = 0
5102
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
5230
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
51035231 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
51045232 .pad #12
5105
- ldr r5, .L910
5106
- mov r6, r5
5107
-.L880:
5108
- ldrb fp, [r5, #2777] @ zero_extendqisi2
5233
+.L875:
5234
+ ldr r7, .L902
5235
+ ldrb fp, [r7, #2772] @ zero_extendqisi2
5236
+ mov r6, r7
51095237 cmp fp, #255
5110
- beq .L909
5111
- mov r3, #48
5112
- mul r3, r3, fp
5113
- add r2, r5, r3
5114
- ldrb r1, [r2, #1236] @ zero_extendqisi2
5115
- strb r1, [r5, #2777]
5116
- ldr r1, .L910+4
5117
- add r3, r1, r3
5118
- ldr r1, [r2, #1272]
5119
- cmp r1, #0
5120
- ldrh r8, [r3, #32]
5121
- beq .L881
5122
- ldr r3, .L910+8
5123
- mov r0, #1
5124
- ldr r2, [r2, #1260]
5125
- strh r0, [r3] @ movhi
5126
- ldr r3, .L910+12
5127
- ldr r0, .L910+16
5128
- str r2, [r3, #916]
5129
- bl printk
5130
- ldr r1, .L910+20
5131
- mov r2, #956
5132
- ldr r0, .L910+24
5133
- bl printk
5134
- bl dump_stack
5135
-.L881:
5136
- ldr r7, .L910+28
5137
- ldrb r3, [r7, #-3124] @ zero_extendqisi2
5138
- mov r10, r7
5139
- cmp r3, #3
5140
- bne .L882
5141
- ldrb r3, [r6, #1196] @ zero_extendqisi2
5142
- cmp r3, #0
5143
- bne .L882
5144
- ldr r3, [r5, #1092]
5145
- ldrb r2, [r7, #-3123] @ zero_extendqisi2
5146
- ldrb r3, [r3, #89] @ zero_extendqisi2
5147
- cmp r2, r3
5148
- movhi r3, #1
5149
- bhi .L884
5150
- cmp r3, #3
5151
- movcs r3, #2
5152
-.L884:
5153
- add r4, r3, r3, asl #1
5154
- b .L885
5155
-.L882:
5156
- ldrb r3, [r7, #-3122] @ zero_extendqisi2
5157
- cmp r3, #0
5158
- moveq r4, #1
5159
- beq .L885
5160
- ldr r3, .L910+28
5161
- ldrb r3, [r3, #-3121] @ zero_extendqisi2
5162
- cmp r3, #0
5163
- moveq r4, #1
5164
- movne r4, #2
5165
-.L885:
5166
- mov r2, #48
5167
- ldr r1, [r7, #-3120]
5168
- mla r2, r2, fp, r6
5169
- mov r9, r8
5170
- ldrb r1, [r1, r8] @ zero_extendqisi2
5171
- ldrb r2, [r2, #1237] @ zero_extendqisi2
5172
- cmp r1, r2
5173
- beq .L886
5174
- ldr r1, .L910+20
5175
- mov r2, #976
5176
- ldr r0, .L910+24
5177
- bl printk
5178
- bl dump_stack
5179
-.L886:
5180
- mov r2, #48
5181
- mla fp, r2, fp, r6
5182
- ldrb r2, [fp, #1281] @ zero_extendqisi2
5183
- cmp r2, #3
5184
- beq .L887
5185
- ldrb r1, [r7, #-3124] @ zero_extendqisi2
5186
- ldr r2, .L910+28
5187
- cmp r1, #3
5188
- bne .L887
5189
- ldrb r1, [r2, #-3116] @ zero_extendqisi2
5190
- cmp r1, #0
5191
- bne .L887
5192
- ldrb r1, [r5, #1196] @ zero_extendqisi2
5193
- cmp r1, #0
5194
- bne .L887
5195
- ldrb r1, [r5, #1197] @ zero_extendqisi2
5196
- cmp r1, #0
5197
- bne .L887
5198
- ldrb r1, [r2, #-3122] @ zero_extendqisi2
5199
- cmp r1, #0
5200
- beq .L888
5201
- ldrb r2, [r2, #-3121] @ zero_extendqisi2
5202
- cmp r2, #0
5203
- bne .L887
5204
-.L888:
5205
- ldr r2, [r7, #-3120]
5206
- mov r3, #0
5207
- mov r1, #48
5208
- mov r0, r3
5209
- add ip, r2, r8
5210
- b .L889
5211
-.L887:
5212
- ldr r2, .L910+32
5213
- mvn r7, #0
5214
- mov fp, #48
5215
- strh r8, [r2] @ movhi
5216
- mov r2, #0
5217
-.L890:
5218
- rsb r1, r8, r9
5219
- uxth r1, r1
5220
- cmp r1, r4
5221
- bcs .L880
5222
- ldr r1, [r10, #-3120]
5223
- ldr r3, .L910+4
5224
- str r2, [sp, #4]
5225
- ldrb r0, [r1, r9] @ zero_extendqisi2
5226
- strb r7, [r1, r9]
5227
- add r9, r9, #1
5228
- mul r0, fp, r0
5229
- add r1, r6, r0
5230
- add r0, r3, r0
5231
- strb r2, [r1, #1281]
5232
- bl zbuf_free
5233
- ldrb r1, [r6, #2835] @ zero_extendqisi2
5234
- sub r1, r1, #1
5235
- strb r1, [r6, #2835]
5236
- ldr r2, [sp, #4]
5237
- b .L890
5238
-.L889:
5239
- uxth r2, r3
5240
- cmp r2, r4
5241
- bcs .L880
5242
- ldrb r2, [ip, r3] @ zero_extendqisi2
5243
- add r3, r3, #1
5244
- mla r2, r1, r2, r6
5245
- strb r0, [r2, #1281]
5246
- b .L889
5247
-.L909:
5238
+ bne .L888
52485239 add sp, sp, #12
52495240 @ sp needed
5250
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
5251
-.L911:
5241
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
5242
+.L888:
5243
+ mov r2, #48
5244
+ add r10, r6, #1232
5245
+ mul r2, r2, fp
5246
+ str r10, [sp, #4]
5247
+ add r0, r6, r2
5248
+ add r2, r10, r2
5249
+ ldrb r1, [r0, #1232] @ zero_extendqisi2
5250
+ ldrh r8, [r2, #32]
5251
+ strb r1, [r7, #2772]
5252
+ ldr r1, [r0, #1268]
5253
+ cmp r1, #0
5254
+ beq .L876
5255
+ ldr r3, .L902+4
5256
+ mov r2, #1
5257
+ strh r2, [r3] @ movhi
5258
+ ldr r2, [r0, #1256]
5259
+ add r0, r6, #4096
5260
+ str r2, [r0, #912]
5261
+ ldr r0, .L902+8
5262
+ bl printk
5263
+ mov r2, #956
5264
+ ldr r1, .L902+12
5265
+ ldr r0, .L902+16
5266
+ bl printk
5267
+ bl dump_stack
5268
+.L876:
5269
+ ldr r5, .L902+20
5270
+ ldrb r2, [r5, #-3128] @ zero_extendqisi2
5271
+ mov r10, r5
5272
+ cmp r2, #3
5273
+ bne .L877
5274
+ ldrb r2, [r7, #1158] @ zero_extendqisi2
5275
+ cmp r2, #0
5276
+ bne .L877
5277
+ ldr r2, [r7, #1096]
5278
+ ldrb r4, [r2, #89] @ zero_extendqisi2
5279
+ ldrb r2, [r5, #-3127] @ zero_extendqisi2
5280
+ cmp r2, r4
5281
+ movhi r4, #1
5282
+ bhi .L878
5283
+ cmp r4, #2
5284
+ movcs r4, #2
5285
+.L878:
5286
+ add r4, r4, r4, lsl #1
5287
+.L879:
5288
+ mov r2, #48
5289
+ ldr r1, [r5, #-3124]
5290
+ mla r2, r2, fp, r6
5291
+ ldrb r1, [r1, r8] @ zero_extendqisi2
5292
+ mov r9, r8
5293
+ ldrb r2, [r2, #1233] @ zero_extendqisi2
5294
+ cmp r1, r2
5295
+ beq .L880
5296
+ mov r2, #976
5297
+ ldr r1, .L902+12
5298
+ ldr r0, .L902+16
5299
+ bl printk
5300
+ bl dump_stack
5301
+.L880:
5302
+ mov r2, #48
5303
+ mla r3, r2, fp, r6
5304
+ ldrb r3, [r3, #1277] @ zero_extendqisi2
5305
+ cmp r3, #3
5306
+ beq .L881
5307
+ ldrb r3, [r5, #-3128] @ zero_extendqisi2
5308
+ cmp r3, #3
5309
+ bne .L881
5310
+ ldrb r3, [r5, #-3120] @ zero_extendqisi2
5311
+ cmp r3, #0
5312
+ bne .L881
5313
+ ldrb r3, [r7, #1158] @ zero_extendqisi2
5314
+ cmp r3, #0
5315
+ bne .L881
5316
+ ldrb r3, [r7, #1159] @ zero_extendqisi2
5317
+ cmp r3, #0
5318
+ bne .L881
5319
+ ldrb r3, [r5, #-3126] @ zero_extendqisi2
5320
+ cmp r3, #0
5321
+ beq .L882
5322
+ ldrb r3, [r5, #-3125] @ zero_extendqisi2
5323
+ cmp r3, #0
5324
+ bne .L881
5325
+.L882:
5326
+ ldr r2, [r5, #-3124]
5327
+ mov r3, #0
5328
+ mov r1, #48
5329
+ movw r0, #1277
5330
+ mov ip, r3
5331
+ add r8, r2, r8
5332
+.L883:
5333
+ uxth r2, r3
5334
+ cmp r4, r2
5335
+ bls .L875
5336
+ ldrb r2, [r8, r3] @ zero_extendqisi2
5337
+ add r3, r3, #1
5338
+ mla r2, r1, r2, r6
5339
+ strb ip, [r2, r0]
5340
+ b .L883
5341
+.L877:
5342
+ ldrb r2, [r5, #-3126] @ zero_extendqisi2
5343
+ cmp r2, #0
5344
+ moveq r4, #1
5345
+ beq .L879
5346
+ ldrb r2, [r5, #-3125] @ zero_extendqisi2
5347
+ cmp r2, #0
5348
+ moveq r4, #1
5349
+ movne r4, #2
5350
+ b .L879
5351
+.L881:
5352
+ ldr r3, .L902+24
5353
+ mvn r5, #0
5354
+ mov r7, #48
5355
+ movw fp, #1277
5356
+ strh r8, [r3] @ movhi
5357
+.L884:
5358
+ sub r2, r9, r8
5359
+ uxth r2, r2
5360
+ cmp r4, r2
5361
+ bls .L875
5362
+ ldr r2, [r10, #-3124]
5363
+ mov r1, #0
5364
+ ldr r3, [sp, #4]
5365
+ ldrb r0, [r2, r9] @ zero_extendqisi2
5366
+ strb r5, [r2, r9]
5367
+ add r9, r9, #1
5368
+ mla r2, r7, r0, r6
5369
+ add r0, r0, r0, lsl #1
5370
+ strb r1, [r2, fp]
5371
+ add r0, r3, r0, lsl #4
5372
+ bl zbuf_free
5373
+ ldrb r2, [r6, #2831] @ zero_extendqisi2
5374
+ sub r2, r2, #1
5375
+ strb r2, [r6, #2831]
5376
+ b .L884
5377
+.L903:
52525378 .align 2
5253
-.L910:
5379
+.L902:
52545380 .word .LANCHOR0
5255
- .word .LANCHOR0+1236
5256
- .word .LANCHOR0+5010
5257
- .word .LANCHOR0+4096
5258
- .word .LC98
5259
- .word .LANCHOR1+1620
5381
+ .word .LANCHOR0+5006
5382
+ .word .LC95
5383
+ .word .LANCHOR1+1460
52605384 .word .LC0
52615385 .word .LANCHOR3
5262
- .word .LANCHOR0+4932
5386
+ .word .LANCHOR0+4928
52635387 .fnend
52645388 .size gc_write_completed, .-gc_write_completed
52655389 .align 2
52665390 .global gc_get_src_blk
5391
+ .syntax unified
5392
+ .arm
5393
+ .fpu softvfp
52675394 .type gc_get_src_blk, %function
52685395 gc_get_src_blk:
52695396 .fnstart
52705397 @ args = 0, pretend = 0, frame = 0
52715398 @ frame_needed = 0, uses_anonymous_args = 0
5272
- ldr r1, .L922
5273
- stmfd sp!, {r4, r5, lr}
5274
- .save {r4, r5, lr}
5275
- ldr r3, [r1, #1092]
5276
- ldr ip, .L922+4
5399
+ ldr r1, .L916
5400
+ ldr r3, [r1, #1096]
52775401 ldrh r2, [r3, #124]
5278
- ldrb r0, [ip, #-3115] @ zero_extendqisi2
52795402 cmp r2, #0
52805403 addne r3, r3, #392
52815404 movne r2, #1
5282
- bne .L914
5283
- add lr, r3, r0, asl #1
5284
- ldrh lr, [lr, #120]
5285
- cmp lr, #0
5286
- beq .L919
5287
- add r3, r3, r0, asl #7
5405
+ bne .L906
5406
+ ldr r0, .L916+4
5407
+ ldrb r0, [r0, #-3119] @ zero_extendqisi2
5408
+ add ip, r3, r0, lsl #1
5409
+ ldrh ip, [ip, #120]
5410
+ cmp ip, #0
5411
+ beq .L911
5412
+ add r3, r3, r0, lsl #7
52885413 add r3, r3, #136
5289
-.L914:
5290
- add lr, r3, #128
5291
- movw r4, #65535
5292
-.L918:
5293
- mov r5, r3
5414
+.L906:
5415
+ push {r4, lr}
5416
+ .save {r4, lr}
5417
+ add ip, r3, #128
5418
+ movw lr, #65535
5419
+.L910:
5420
+ mov r4, r3
52945421 ldrh r0, [r3], #2
5295
- cmp r0, r4
5296
- beq .L916
5422
+ cmp r0, lr
5423
+ beq .L908
52975424 cmp r2, #0
52985425 mvn r3, #0
5299
- strh r3, [r5] @ movhi
5300
- ldreqb r2, [ip, #-3115] @ zero_extendqisi2
5301
- ldreq r3, [r1, #1092]
5302
- ldrne r2, [r1, #1092]
5303
- addeq r3, r3, r2, asl #1
5304
- ldrneh r3, [r2, #124]
5305
- ldreqh r2, [r3, #120]
5426
+ strh r3, [r4] @ movhi
5427
+ ldreq r3, .L916+4
5428
+ ldrne r2, [r1, #1096]
5429
+ ldrbeq r2, [r3, #-3119] @ zero_extendqisi2
5430
+ ldreq r3, [r1, #1096]
5431
+ ldrhne r3, [r2, #124]
5432
+ addeq r3, r3, r2, lsl #1
53065433 subne r3, r3, #1
5434
+ strhne r3, [r2, #124] @ movhi
5435
+ ldrheq r2, [r3, #120]
53075436 subeq r2, r2, #1
5308
- strneh r3, [r2, #124] @ movhi
5309
- streqh r2, [r3, #120] @ movhi
5310
- ldmfd sp!, {r4, r5, pc}
5311
-.L916:
5312
- cmp r3, lr
5313
- bne .L918
5314
- ldmfd sp!, {r4, r5, pc}
5315
-.L919:
5437
+ strheq r2, [r3, #120] @ movhi
5438
+ pop {r4, pc}
5439
+.L908:
5440
+ cmp r3, ip
5441
+ bne .L910
5442
+ pop {r4, pc}
5443
+.L911:
53165444 movw r0, #65535
5317
- ldmfd sp!, {r4, r5, pc}
5318
-.L923:
5445
+ bx lr
5446
+.L917:
53195447 .align 2
5320
-.L922:
5448
+.L916:
53215449 .word .LANCHOR0
53225450 .word .LANCHOR3
53235451 .fnend
53245452 .size gc_get_src_blk, .-gc_get_src_blk
53255453 .align 2
53265454 .global gc_free_temp_buf
5455
+ .syntax unified
5456
+ .arm
5457
+ .fpu softvfp
53275458 .type gc_free_temp_buf, %function
53285459 gc_free_temp_buf:
53295460 .fnstart
53305461 @ args = 0, pretend = 0, frame = 0
53315462 @ frame_needed = 0, uses_anonymous_args = 0
5332
- stmfd sp!, {r4, r5, r6, lr}
5463
+ push {r4, r5, r6, lr}
53335464 .save {r4, r5, r6, lr}
5334
- ldr r5, .L939
5335
- ldrb r0, [r5, #2835] @ zero_extendqisi2
5465
+ ldr r5, .L933
5466
+ ldrb r0, [r5, #2831] @ zero_extendqisi2
53365467 cmp r0, #0
5337
- ldmeqfd sp!, {r4, r5, r6, pc}
5338
- ldrb r3, [r5, #2774] @ zero_extendqisi2
5468
+ popeq {r4, r5, r6, pc}
5469
+ ldrb r3, [r5, #2769] @ zero_extendqisi2
53395470 cmp r3, #1
5340
- bhi .L931
5341
- ldr r2, .L939+4
5342
- movw r3, #2104
5343
- ldr r1, .L939+8
5344
- ldrh r4, [r2, r3]
5345
- sub r3, r1, #3104
5346
- mov r6, r1
5347
- ldrh r0, [r3, #-10]
5348
- add r2, r4, #24
5349
- ldrb r3, [r1, #-3123] @ zero_extendqisi2
5471
+ bhi .L925
5472
+ ldr r2, .L933+4
5473
+ add r3, r5, #4928
5474
+ ldrh r4, [r3]
5475
+ movw ip, #1277
5476
+ sub r3, r2, #3104
5477
+ mov r6, r2
5478
+ ldrh r0, [r3, #-14]
5479
+ add r1, r4, #24
5480
+ ldrb r3, [r2, #-3127] @ zero_extendqisi2
53505481 mul r3, r3, r0
5351
- ldr r0, [r1, #-3120]
5352
- mov r1, #48
5353
- cmp r3, r2
5354
- movcs r3, r2
5355
-.L926:
5482
+ cmp r3, r1
5483
+ movcs r3, r1
5484
+ ldr r1, [r2, #-3124]
5485
+ mov r2, #48
5486
+.L920:
53565487 cmp r4, r3
5357
- bcs .L931
5358
- ldrb r2, [r0, r4] @ zero_extendqisi2
5359
- cmp r2, #255
5360
- beq .L927
5361
- mul r2, r1, r2
5362
- add ip, r5, r2
5363
- ldrb ip, [ip, #1281] @ zero_extendqisi2
5364
- cmp ip, #0
5365
- bne .L927
5366
- ldr r0, .L939+12
5367
- add r0, r0, r2
5488
+ bcc .L923
5489
+.L925:
5490
+ mov r0, #0
5491
+ pop {r4, r5, r6, pc}
5492
+.L923:
5493
+ ldrb r0, [r1, r4] @ zero_extendqisi2
5494
+ cmp r0, #255
5495
+ beq .L921
5496
+ mla lr, r2, r0, r5
5497
+ ldrb lr, [lr, ip] @ zero_extendqisi2
5498
+ cmp lr, #0
5499
+ bne .L921
5500
+ ldr r3, .L933+8
5501
+ add r0, r0, r0, lsl #1
5502
+ add r0, r3, r0, lsl #4
53685503 bl zbuf_free
5369
- ldr r3, .L939+16
5504
+ ldr r3, .L933+12
53705505 ldr r3, [r3]
53715506 tst r3, #256
5372
- beq .L928
5373
- ldr r3, [r6, #-3120]
5507
+ beq .L922
5508
+ ldr r3, [r6, #-3124]
53745509 mov r1, r4
5375
- ldr r0, .L939+20
5510
+ ldr r0, .L933+16
53765511 ldrb r2, [r3, r4] @ zero_extendqisi2
53775512 bl printk
5378
-.L928:
5379
- ldr r3, [r6, #-3120]
5513
+.L922:
5514
+ ldr r3, [r6, #-3124]
53805515 mvn r2, #0
53815516 mov r0, #1
53825517 strb r2, [r3, r4]
5383
- ldrb r3, [r5, #2835] @ zero_extendqisi2
5518
+ ldrb r3, [r5, #2831] @ zero_extendqisi2
53845519 add r3, r3, r2
5385
- strb r3, [r5, #2835]
5386
- ldmfd sp!, {r4, r5, r6, pc}
5387
-.L927:
5520
+ strb r3, [r5, #2831]
5521
+ pop {r4, r5, r6, pc}
5522
+.L921:
53885523 add r4, r4, #1
5389
- b .L926
5390
-.L931:
5391
- mov r0, #0
5392
- ldmfd sp!, {r4, r5, r6, pc}
5393
-.L940:
5524
+ b .L920
5525
+.L934:
53945526 .align 2
5395
-.L939:
5527
+.L933:
53965528 .word .LANCHOR0
5397
- .word .LANCHOR0+2828
53985529 .word .LANCHOR3
5399
- .word .LANCHOR0+1236
5530
+ .word .LANCHOR0+1232
54005531 .word .LANCHOR2
5401
- .word .LC99
5532
+ .word .LC96
54025533 .fnend
54035534 .size gc_free_temp_buf, .-gc_free_temp_buf
54045535 .align 2
54055536 .global get_ink_scaned_blk
5537
+ .syntax unified
5538
+ .arm
5539
+ .fpu softvfp
54065540 .type get_ink_scaned_blk, %function
54075541 get_ink_scaned_blk:
54085542 .fnstart
54095543 @ args = 0, pretend = 0, frame = 0
54105544 @ frame_needed = 0, uses_anonymous_args = 0
54115545 @ link register save eliminated.
5412
- ldr r1, .L944
5546
+ ldr r1, .L938
54135547 movw ip, #2108
54145548 ldrh r3, [r1, ip]
54155549 cmp r3, #0
54165550 addne r2, r3, #1040
54175551 subne r3, r3, #1
54185552 addne r2, r2, #11
5419
- strneh r3, [r1, ip] @ movhi
5420
- addne r2, r1, r2, asl #1
5421
- ldrneh r0, [r2, #6]
5553
+ strhne r3, [r1, ip] @ movhi
5554
+ addne r2, r1, r2, lsl #1
5555
+ ldrhne r0, [r2, #6]
54225556 movweq r0, #65535
54235557 bx lr
5424
-.L945:
5558
+.L939:
54255559 .align 2
5426
-.L944:
5427
- .word .LANCHOR0+2828
5560
+.L938:
5561
+ .word .LANCHOR0+2824
54285562 .fnend
54295563 .size get_ink_scaned_blk, .-get_ink_scaned_blk
54305564 .align 2
54315565 .global print_gc_debug_info
5566
+ .syntax unified
5567
+ .arm
5568
+ .fpu softvfp
54325569 .type print_gc_debug_info, %function
54335570 print_gc_debug_info:
54345571 .fnstart
54355572 @ args = 0, pretend = 0, frame = 0
54365573 @ frame_needed = 0, uses_anonymous_args = 0
5437
- stmfd sp!, {r0, r1, r2, r3, r4, lr}
5574
+ push {r0, r1, r2, r3, r4, lr}
54385575 .save {lr}
54395576 .pad #20
5440
- movw r2, #2828
5441
- ldr r0, .L948
5442
- movw ip, #2102
5443
- add r3, r0, r2
5444
- ldrh r1, [r0, r2]
5445
- ldrh r2, [r3, #2]
5446
- ldrh r3, [r3, ip]
5447
- ldrb ip, [r0, #2774] @ zero_extendqisi2
5448
- str ip, [sp]
5449
- ldrb ip, [r0, #2835] @ zero_extendqisi2
5577
+ movw ip, #2804
5578
+ ldr r0, .L942
5579
+ movw r1, #2824
5580
+ movw r3, #2102
5581
+ ldrh ip, [r0, ip]
5582
+ add r2, r0, r1
5583
+ ldrh r3, [r2, r3]
5584
+ ldrh r1, [r0, r1]
5585
+ ldrh r2, [r2, #2]
5586
+ str ip, [sp, #8]
5587
+ ldrb ip, [r0, #2831] @ zero_extendqisi2
54505588 str ip, [sp, #4]
5451
- movw ip, #2808
5452
- ldrh r0, [r0, ip]
5453
- str r0, [sp, #8]
5454
- ldr r0, .L948+4
5589
+ ldrb r0, [r0, #2769] @ zero_extendqisi2
5590
+ str r0, [sp]
5591
+ ldr r0, .L942+4
54555592 bl printk
54565593 add sp, sp, #20
54575594 @ sp needed
54585595 ldr pc, [sp], #4
5459
-.L949:
5596
+.L943:
54605597 .align 2
5461
-.L948:
5598
+.L942:
54625599 .word .LANCHOR0
5463
- .word .LC100
5600
+ .word .LC97
54645601 .fnend
54655602 .size print_gc_debug_info, .-print_gc_debug_info
54665603 .align 2
54675604 .global _list_pop_index_node
5605
+ .syntax unified
5606
+ .arm
5607
+ .fpu softvfp
54685608 .type _list_pop_index_node, %function
54695609 _list_pop_index_node:
54705610 .fnstart
54715611 @ args = 0, pretend = 0, frame = 0
54725612 @ frame_needed = 0, uses_anonymous_args = 0
5473
- stmfd sp!, {r3, r4, r5, lr}
5474
- .save {r3, r4, r5, lr}
5613
+ push {r4, r5, r6, lr}
5614
+ .save {r4, r5, r6, lr}
54755615 ldr r5, [r0]
54765616 cmp r5, #0
5477
- beq .L956
5478
- ldr r3, .L958
5617
+ beq .L950
5618
+ ldr r3, .L952
54795619 movw ip, #65535
54805620 mov lr, #6
54815621 ldr r4, [r3, #1036]
5482
-.L952:
5622
+.L946:
54835623 cmp r1, #0
5484
- bne .L953
5485
-.L955:
5486
- rsb r4, r4, r5
5487
- ldr r3, .L958+4
5488
- mov r4, r4, asr #1
5489
- mul r4, r3, r4
5490
- uxth r4, r4
5491
- mov r1, r4
5624
+ bne .L947
5625
+.L949:
5626
+ sub r4, r5, r4
5627
+ asr r3, r4, #1
5628
+ ldr r4, .L952+4
5629
+ mul r4, r4, r3
5630
+ uxth r1, r4
54925631 bl _list_remove_node
54935632 mvn r3, #0
5494
- mov r0, r4
5633
+ uxth r0, r4
54955634 strh r3, [r5] @ movhi
54965635 strh r3, [r5, #2] @ movhi
5497
- ldmfd sp!, {r3, r4, r5, pc}
5498
-.L953:
5636
+ pop {r4, r5, r6, pc}
5637
+.L947:
54995638 ldrh r3, [r5]
55005639 cmp r3, ip
5501
- beq .L955
5640
+ beq .L949
55025641 sub r1, r1, #1
55035642 mla r5, lr, r3, r4
55045643 uxth r1, r1
5505
- b .L952
5506
-.L956:
5644
+ b .L946
5645
+.L950:
55075646 movw r0, #65535
5508
- ldmfd sp!, {r3, r4, r5, pc}
5509
-.L959:
5647
+ pop {r4, r5, r6, pc}
5648
+.L953:
55105649 .align 2
5511
-.L958:
5650
+.L952:
55125651 .word .LANCHOR0
55135652 .word -1431655765
55145653 .fnend
55155654 .size _list_pop_index_node, .-_list_pop_index_node
55165655 .align 2
55175656 .global _list_get_gc_head_node
5657
+ .syntax unified
5658
+ .arm
5659
+ .fpu softvfp
55185660 .type _list_get_gc_head_node, %function
55195661 _list_get_gc_head_node:
55205662 .fnstart
....@@ -5523,712 +5665,721 @@
55235665 @ link register save eliminated.
55245666 ldr r0, [r0]
55255667 cmp r0, #0
5526
- beq .L965
5527
- ldr r3, .L968
5668
+ beq .L959
5669
+ ldr r3, .L961
5670
+ movw r2, #65535
55285671 mov ip, #6
5529
- ldr r2, [r3, #1036]
5530
- movw r3, #65535
5531
-.L962:
5672
+ ldr r3, [r3, #1036]
5673
+.L956:
55325674 cmp r1, #0
5533
- beq .L963
5675
+ beq .L957
55345676 ldrh r0, [r0]
5535
- cmp r0, r3
5536
- subne r1, r1, #1
5537
- mlane r0, ip, r0, r2
5538
- uxthne r1, r1
5539
- bne .L962
5540
-.L967:
5677
+ cmp r0, r2
5678
+ bne .L958
55415679 bx lr
5542
-.L965:
5680
+.L958:
5681
+ sub r1, r1, #1
5682
+ mla r0, ip, r0, r3
5683
+ uxth r1, r1
5684
+ b .L956
5685
+.L959:
55435686 movw r0, #65535
55445687 bx lr
5545
-.L963:
5546
- rsb r0, r2, r0
5547
- ldr r3, .L968+4
5548
- mov r0, r0, asr #1
5549
- mul r0, r3, r0
5688
+.L957:
5689
+ sub r0, r0, r3
5690
+ asr r3, r0, #1
5691
+ ldr r0, .L961+4
5692
+ mul r0, r0, r3
55505693 uxth r0, r0
55515694 bx lr
5552
-.L969:
5695
+.L962:
55535696 .align 2
5554
-.L968:
5697
+.L961:
55555698 .word .LANCHOR0
55565699 .word -1431655765
55575700 .fnend
55585701 .size _list_get_gc_head_node, .-_list_get_gc_head_node
55595702 .align 2
5703
+ .syntax unified
5704
+ .arm
5705
+ .fpu softvfp
5706
+ .type zftl_get_gc_node.part.10, %function
5707
+zftl_get_gc_node.part.10:
5708
+ .fnstart
5709
+ @ args = 0, pretend = 0, frame = 0
5710
+ @ frame_needed = 0, uses_anonymous_args = 0
5711
+ @ link register save eliminated.
5712
+ mov r1, r0
5713
+ ldr r0, .L964
5714
+ b _list_get_gc_head_node
5715
+.L965:
5716
+ .align 2
5717
+.L964:
5718
+ .word .LANCHOR3-3116
5719
+ .fnend
5720
+ .size zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
5721
+ .align 2
55605722 .global gc_search_src_blk
5723
+ .syntax unified
5724
+ .arm
5725
+ .fpu softvfp
55615726 .type gc_search_src_blk, %function
55625727 gc_search_src_blk:
55635728 .fnstart
5564
- @ args = 0, pretend = 0, frame = 24
5729
+ @ args = 0, pretend = 0, frame = 32
55655730 @ frame_needed = 0, uses_anonymous_args = 0
5566
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
5731
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
55675732 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
5568
- .pad #36
5569
- sub sp, sp, #36
5570
- ldr r6, .L1093
5571
- str r0, [sp, #8]
5572
- str r1, [sp, #16]
5573
- ldr r7, [r6, #1092]
5574
- add r3, r7, r0, asl #1
5575
- ldrh r4, [r3, #120]
5576
- cmp r4, #0
5577
- bne .L1025
5578
- ldr r3, .L1093+4
5579
- mov r5, r2
5733
+ .pad #44
5734
+ sub sp, sp, #44
5735
+ ldr r5, .L1086
5736
+ str r1, [sp, #24]
5737
+ ldr r1, [r5, #1096]
5738
+ str r0, [sp, #16]
5739
+ str r2, [sp, #12]
5740
+ add r3, r1, r0, lsl #1
5741
+ ldrh r3, [r3, #120]
5742
+ cmp r3, #0
5743
+ str r3, [sp, #20]
5744
+ movne r0, r3
5745
+ bne .L966
5746
+ ldr r3, .L1086+4
55805747 ldrh r2, [r3, #52]
55815748 cmp r2, #1
5582
- ldrls r1, .L1093+8
5583
- strlsh r4, [r1, #-8] @ movhi
5584
- strlsh r4, [r1, #-6] @ movhi
5585
- strlsh r4, [r1, #-4] @ movhi
5586
- ldr r1, [sp, #8]
5587
- cmp r1, #0
5588
- bne .L1092
5589
- ldr r8, [sp, #8]
5590
- ldr r10, .L1093+12
5591
- ldr fp, .L1093+16
5592
- mov r4, r8
5593
-.L974:
5594
- add r9, r5, #1
5595
- uxth r3, r8
5596
- cmp r3, r9
5597
- bge .L980
5598
- ldrh r2, [r10]
5599
- ldr ip, .L1093+12
5600
- mov r1, r2
5601
- add r0, ip, #6
5602
- str ip, [sp, #20]
5603
- str r2, [sp, #12]
5604
- bl _list_get_gc_head_node
5605
- movw r3, #65535
5606
- ldr r2, [sp, #12]
5607
- cmp r0, r3
5749
+ ldrls r0, .L1086+8
5750
+ ldrhls ip, [sp, #20]
5751
+ strhls ip, [r0, #-8] @ movhi
5752
+ strhls ip, [r0, #-6] @ movhi
5753
+ strhls ip, [r0, #-4] @ movhi
5754
+ ldr r0, [sp, #16]
5755
+ cmp r0, #0
5756
+ bne .L970
5757
+ ldr r10, .L1086+12
56085758 mov r7, r0
5609
- ldr ip, [sp, #20]
5610
- add r2, r2, #1
5759
+ ldr fp, .L1086+16
5760
+ mov r4, r0
5761
+.L971:
5762
+ ldr r3, [sp, #12]
5763
+ add r8, r3, #1
5764
+ uxth r3, r7
5765
+ cmp r3, r8
5766
+ bge .L976
5767
+ ldr r3, .L1086+20
5768
+ mov r0, r3
5769
+ str r3, [sp, #20]
5770
+ ldrh r9, [r0], #6
5771
+ mov r1, r9
5772
+ bl _list_get_gc_head_node
5773
+ add r2, r9, #1
5774
+ ldr r3, [sp, #20]
5775
+ movw r1, #65535
56115776 uxth r2, r2
5612
- strh r2, [r10] @ movhi
5613
- beq .L976
5614
- ldr r3, [fp]
5615
- mov ip, r0, asl #1
5777
+ cmp r0, r1
5778
+ mov r6, r0
5779
+ strh r2, [r3] @ movhi
5780
+ beq .L972
5781
+ ldr r3, [r10]
5782
+ lsl r9, r0, #1
56165783 tst r3, #256
5617
- beq .L977
5618
- ldr r3, [r6, #1088]
5619
- mov r1, r7
5620
- ldr r0, .L1093+20
5621
- str ip, [sp, #12]
5622
- ldrh r3, [r3, ip]
5784
+ beq .L973
5785
+ ldr r3, [r5, #1092]
5786
+ mov r1, r0
5787
+ mov r0, fp
5788
+ ldrh r3, [r3, r9]
56235789 bl printk
5624
- ldr ip, [sp, #12]
5625
-.L977:
5626
- ldr r3, [r6, #1088]
5627
- ldrh r2, [r3, ip]
5628
- ldr r3, .L1093+24
5790
+.L973:
5791
+ ldr r3, [r5, #1092]
5792
+ ldrh r2, [r3, r9]
5793
+ ldr r3, .L1086+24
56295794 ldrh r3, [r3]
56305795 cmp r2, r3
5631
- bcs .L978
5632
- mov r1, #0
5633
- mov r0, r7
5634
- mov r2, r1
5796
+ bcs .L974
5797
+ mov r2, #0
5798
+ mov r0, r6
5799
+ mov r1, r2
56355800 bl gc_add_sblk
56365801 cmp r0, #0
5637
- beq .L979
5802
+ beq .L975
5803
+ add r4, r4, #1
5804
+ ldr r3, [sp, #12]
5805
+ uxth r4, r4
5806
+ cmp r4, r3
5807
+ bcc .L975
5808
+.L976:
5809
+ ldr r3, [sp, #24]
5810
+ tst r3, #2
5811
+ beq .L978
5812
+ movw r3, #2794
5813
+ ldrh r3, [r5, r3]
5814
+ cmp r3, #32
5815
+ bls .L978
5816
+ ldr r9, .L1086+28
5817
+ mov fp, #0
5818
+ ldr r6, .L1086+32
5819
+ sub r10, r9, #12
5820
+.L979:
5821
+ uxth r3, fp
5822
+ cmp r8, r3
5823
+ ble .L983
5824
+ ldr r7, .L1086+36
5825
+ mov r0, r10
5826
+ ldrh r3, [r7]
5827
+ mov r1, r3
5828
+ str r3, [sp, #20]
5829
+ bl _list_get_gc_head_node
5830
+ ldr r3, [sp, #20]
5831
+ add r3, r3, #1
5832
+ strh r3, [r7] @ movhi
5833
+ movw r3, #65535
5834
+ cmp r0, r3
5835
+ beq .L980
5836
+ ldr r3, [r5, #1092]
5837
+ lsl r2, r0, #1
5838
+ ldrh r2, [r3, r2]
5839
+ ldrh r3, [r6]
5840
+ cmp r2, r3
5841
+ bcs .L980
5842
+ mov r2, #0
5843
+ mov r1, r2
5844
+ bl gc_add_sblk
5845
+ cmp r0, #0
5846
+ beq .L982
5847
+ add r4, r4, #1
5848
+ ldr r3, [sp, #12]
5849
+ uxth r4, r4
5850
+ cmp r4, r3
5851
+ bcc .L982
5852
+.L983:
5853
+ ldr r3, [sp, #12]
5854
+ cmp r4, r3
5855
+ bcs .L985
5856
+ ldr r0, .L1086+40
5857
+ ldrh r1, [r9, #-8]
5858
+ ldrh r2, [r6]
5859
+ sub r3, r0, #3104
5860
+ ldrh ip, [r3, #-14]
5861
+ ldrb r3, [r0, #-3127] @ zero_extendqisi2
5862
+ mul r3, r3, ip
5863
+ sub r3, r3, r1, lsr #2
5864
+ cmp r2, r3
5865
+ addlt r2, r2, r1, lsr #3
5866
+ strhlt r2, [r6] @ movhi
5867
+.L978:
5868
+ ldr r3, [sp, #24]
5869
+ tst r3, #1
5870
+ beq .L986
5871
+ ldrh r6, [sp, #12]
5872
+ cmp r4, r6
5873
+ bcs .L986
5874
+ mov r9, #0
5875
+ movw r8, #65535
5876
+.L991:
5877
+ ldr r10, .L1086+44
5878
+ ldrh r7, [r10]
5879
+ mov r0, r7
5880
+ add r7, r7, #1
5881
+ bl zftl_get_gc_node.part.10
5882
+ cmp r0, r8
5883
+ strh r7, [r10] @ movhi
5884
+ beq .L987
5885
+ mov r2, #0
5886
+ mov r1, r2
5887
+ bl gc_add_sblk
5888
+ cmp r0, #0
5889
+ beq .L988
56385890 add r4, r4, #1
56395891 uxth r4, r4
5640
- cmp r4, r5
5641
- bcc .L979
5642
- b .L980
5643
-.L978:
5644
- ldr r3, .L1093+8
5892
+ cmp r6, r4
5893
+ bhi .L988
5894
+.L989:
5895
+ ldr r3, .L1086+28
5896
+ movw r2, #2818
5897
+ ldrh r1, [r3, #-8]
5898
+.L1085:
5899
+ ldrh r3, [r5, r2]
5900
+ cmp r3, r1, lsr #1
5901
+ bls .L986
5902
+ sub r3, r3, r1, lsr #3
5903
+.L1082:
5904
+ strh r3, [r5, r2] @ movhi
5905
+ b .L986
5906
+.L974:
5907
+ ldr r3, .L1086+8
56455908 mov r2, #0
56465909 strh r2, [r3, #-6] @ movhi
5647
- b .L980
5648
-.L976:
5649
- mov r3, #0
5650
- strh r3, [ip] @ movhi
5651
- b .L980
5652
-.L979:
5653
- add r8, r8, #1
5654
- b .L974
5655
-.L980:
5656
- ldr r3, [sp, #16]
5657
- tst r3, #2
5658
- beq .L982
5659
- movw r3, #2798
5660
- ldrh r3, [r6, r3]
5661
- cmp r3, #32
5662
- movhi r10, #0
5663
- ldrhi r8, .L1093+28
5664
- bls .L982
5665
-.L983:
5666
- uxth r2, r10
5667
- ldr r7, .L1093+32
5668
- cmp r2, r9
5669
- bge .L987
5670
- ldrh fp, [r8]
5671
- ldr r2, .L1093+28
5672
- mov r1, fp
5673
- add r0, r2, #8
5674
- str r2, [sp, #12]
5675
- bl _list_get_gc_head_node
5676
- movw ip, #65535
5677
- add fp, fp, #1
5678
- strh fp, [r8] @ movhi
5679
- cmp r0, ip
5680
- ldr r2, [sp, #12]
5681
- beq .L984
5682
- ldr fp, [r6, #1088]
5683
- mov r1, r0, asl #1
5684
- ldr r3, .L1093+32
5685
- ldrh ip, [fp, r1]
5686
- ldrh r1, [r3]
5687
- cmp ip, r1
5688
- bcs .L984
5689
- mov r1, #0
5690
- mov r2, r1
5691
- bl gc_add_sblk
5692
- cmp r0, #0
5693
- beq .L986
5694
- add r4, r4, #1
5695
- uxth r4, r4
5696
- cmp r4, r5
5697
- bcc .L986
5698
- b .L987
5699
-.L984:
5700
- mov r3, #0
5701
- strh r3, [r2] @ movhi
5702
- b .L987
5703
-.L986:
5704
- add r10, r10, #1
5705
- b .L983
5706
-.L987:
5707
- cmp r4, r5
5708
- ldr r2, .L1093+36
5709
- bcs .L989
5710
- ldrh ip, [r2, #-26]
5711
- ldrb r3, [r2, #-35] @ zero_extendqisi2
5712
- ldrh r0, [r2, #-8]
5713
- ldrh r1, [r7]
5714
- mul r3, r3, ip
5715
- sub r3, r3, r0, lsr #2
5716
- cmp r1, r3
5717
- ldrlt r3, .L1093+32
5718
- addlt r1, r1, r0, lsr #3
5719
- strlth r1, [r3] @ movhi
5720
- b .L982
5721
-.L989:
5722
- ldrh r2, [r2, #-8]
5723
- ldrh r3, [r7]
5724
- cmp r3, r2
5725
- subhi r3, r3, r2, lsr #3
5726
- ldrhi r2, .L1093+32
5727
- strhih r3, [r2] @ movhi
5728
-.L982:
5729
- ldr r3, [sp, #16]
5730
- tst r3, #1
5731
- beq .L990
5732
- uxth r7, r5
5733
- cmp r4, r7
5734
- bcs .L990
5735
- ldr r8, .L1093+40
5736
- mov fp, #0
5737
- movw r9, #65535
5738
-.L995:
5739
- ldrh r10, [r8]
5740
- ldr r3, .L1093+40
5741
- mov r1, r10
5742
- add r0, r3, #20
5743
- str r3, [sp, #12]
5744
- bl _list_get_gc_head_node
5745
- add r10, r10, #1
5746
- strh r10, [r8] @ movhi
5747
- cmp r0, r9
5748
- ldr r3, [sp, #12]
5749
- beq .L991
5750
- mov r1, #0
5751
- mov r2, r1
5752
- bl gc_add_sblk
5753
- cmp r0, #0
5754
- beq .L992
5755
- add r4, r4, #1
5756
- uxth r4, r4
5757
- cmp r4, r7
5758
- bcc .L992
5759
- b .L993
5760
-.L991:
5910
+ b .L976
5911
+.L972:
57615912 mov r2, #0
57625913 strh r2, [r3] @ movhi
5763
- b .L994
5764
-.L992:
5914
+ b .L976
5915
+.L975:
5916
+ add r7, r7, #1
5917
+ b .L971
5918
+.L980:
5919
+ mov r3, #0
5920
+ strh r3, [r7] @ movhi
5921
+ b .L983
5922
+.L982:
57655923 add fp, fp, #1
5766
- uxth r3, fp
5767
- cmp r3, r7
5768
- bcc .L995
5769
-.L994:
5770
- cmp r4, r7
5771
- bcs .L993
5772
- ldr r1, .L1093+36
5773
- movw r2, #2814
5774
- ldrh r3, [r6, r2]
5924
+ b .L979
5925
+.L985:
5926
+ ldrh r3, [r6]
5927
+ ldrh r2, [r9, #-8]
5928
+ cmp r3, r2
5929
+ subhi r3, r3, r2, lsr #3
5930
+ strhhi r3, [r6] @ movhi
5931
+ b .L978
5932
+.L987:
5933
+ mov r3, #0
5934
+ strh r3, [r10] @ movhi
5935
+.L990:
5936
+ cmp r4, r6
5937
+ bcs .L989
5938
+ ldr r1, .L1086+28
5939
+ movw r2, #2818
5940
+ ldrh r3, [r5, r2]
57755941 ldrh r1, [r1, #-8]
57765942 cmp r3, r1
57775943 addcc r3, r3, r1, lsr #3
5778
- bcc .L1091
5944
+ bcc .L1082
5945
+.L986:
5946
+ ldr r3, .L1086+12
5947
+ ldr r3, [r3]
5948
+ tst r3, #256
5949
+ beq .L1021
5950
+ ldr r3, [sp, #12]
5951
+ ldr r2, [sp, #24]
5952
+ ldr r1, [sp, #16]
5953
+ str r3, [sp]
5954
+ mov r3, r4
5955
+ ldr r0, .L1086+48
5956
+ bl printk
5957
+.L1021:
5958
+ mov r0, r4
5959
+.L966:
5960
+ add sp, sp, #44
5961
+ @ sp needed
5962
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
5963
+.L988:
5964
+ add r9, r9, #1
5965
+ uxth r3, r9
5966
+ cmp r6, r3
5967
+ bhi .L991
57795968 b .L990
5780
-.L993:
5781
- ldr r1, .L1093+36
5782
- movw r2, #2814
5783
- ldrh r3, [r6, r2]
5784
- ldrh r1, [r1, #-8]
5785
- cmp r3, r1, lsr #1
5786
- bls .L990
5787
- sub r3, r3, r1, lsr #3
5788
-.L1091:
5789
- ldr r1, .L1093
5790
- b .L1090
5791
-.L1092:
5792
- ldr r8, .L1093+44
5793
- cmp r5, #1
5794
- sub r8, r8, #3104
5795
- ldrb r0, [r8, #-19] @ zero_extendqisi2
5796
- ldrh r1, [r8, #-10]
5797
- smulbb r1, r0, r1
5798
- uxth r1, r1
5799
- str r1, [sp, #12]
5800
- bne .L996
5969
+.L970:
5970
+ ldr r4, .L1086+40
5971
+ ldrb r7, [r4, #-3127] @ zero_extendqisi2
5972
+ sub r4, r4, #3104
5973
+ ldrh r0, [r4, #-14]
5974
+ smulbb r7, r7, r0
5975
+ ldr r0, [sp, #12]
5976
+ cmp r0, #1
5977
+ uxth r7, r7
5978
+ bne .L992
58015979 cmp r2, #0
5802
- beq .L996
5803
- ldrh r0, [r7, #80]
5980
+ beq .L992
5981
+ ldrh r0, [r1, #80]
58045982 movw r1, #65535
5805
- mov r5, #8
58065983 cmp r0, r1
58075984 movwne r1, #2102
5808
- ldrne r0, [sp, #12]
5809
- ldrneh r1, [r3, r1]
5810
- rsbne r1, r1, r0
5811
- uxthne r1, r1
5812
- strne r1, [sp, #12]
5813
-.L996:
5814
- movw r0, #2180
5815
- mov r7, #0
5816
- strh r7, [r3, r0] @ movhi
5817
- ldr r3, [sp, #16]
5818
- ldr r4, .L1093+36
5985
+ ldrhne r1, [r3, r1]
5986
+ subne r7, r7, r1
5987
+ mov r1, #8
5988
+ uxthne r7, r7
5989
+ str r1, [sp, #12]
5990
+.L992:
5991
+ mov r6, #0
5992
+ movw r1, #2180
5993
+ strh r6, [r3, r1] @ movhi
5994
+ ldr r3, [sp, #24]
5995
+ ldr r1, .L1086+28
58195996 ands r3, r3, #1
5820
- str r3, [sp, #20]
5821
- ldr r1, .L1093
5822
- strh r7, [r4] @ movhi
5823
- ldreq r7, [sp, #20]
5824
- moveq r4, r7
5825
- beq .L997
5826
- ldrh r0, [r4, #2]
5827
- movw r3, #2794
5828
- ldrh r3, [r1, r3]
5829
- add r4, r4, #16
5830
- str r4, [sp, #24]
5831
- cmp r3, r0, lsr #2
5832
- bhi .L998
5833
- movw r0, #2796
5834
- ldrh r1, [r1, r0]
5997
+ strh r6, [r1, #-6] @ movhi
5998
+ mov r8, r1
5999
+ str r3, [sp, #28]
6000
+ ldreq r6, [sp, #28]
6001
+ moveq r4, r6
6002
+ beq .L993
6003
+ movw r3, #2790
6004
+ ldrh r1, [r1, #-4]
6005
+ ldrh r3, [r5, r3]
6006
+ cmp r3, r1, lsr #2
6007
+ bhi .L994
6008
+ movw r1, #2792
6009
+ ldrh r1, [r5, r1]
58356010 cmp r1, r3
5836
- movcs r4, r7
5837
- bcs .L999
5838
-.L998:
6011
+ movcs r4, r6
6012
+ bcs .L995
6013
+.L994:
58396014 cmp r2, #1
5840
- bls .L1000
5841
-.L1002:
6015
+ bls .L996
6016
+.L998:
58426017 mov r4, #0
5843
- b .L1001
5844
-.L1000:
5845
- ldr r4, .L1093+8
6018
+.L997:
6019
+ ldr r9, .L1086+52
6020
+ mov r6, #0
6021
+ mov r8, #64
6022
+ movw fp, #65535
6023
+.L1001:
6024
+ ldr r2, .L1086+44
6025
+ ldrh r3, [r2]
6026
+ str r2, [sp, #36]
6027
+ mov r0, r3
6028
+ str r3, [sp, #32]
6029
+ bl zftl_get_gc_node.part.10
6030
+ cmp r0, fp
6031
+ mov r10, r0
6032
+ ldr r2, [sp, #36]
6033
+ beq .L999
6034
+ ldr r3, [sp, #32]
58466035 mov r1, #0
5847
- mov r3, r3, lsr #2
5848
- strh r3, [r8, #-8] @ movhi
5849
- add r0, r4, #12
6036
+ add r3, r3, #1
6037
+ strh r3, [r2] @ movhi
6038
+ ldr r2, [sp, #16]
6039
+ bl gc_add_sblk
6040
+ cmp r0, #0
6041
+ beq .L1000
6042
+ ldr r3, [r5, #1092]
6043
+ lsl r10, r10, #1
6044
+ add r4, r4, #1
6045
+ ldr r2, [sp, #12]
6046
+ uxth r4, r4
6047
+ ldrh r3, [r3, r10]
6048
+ add r6, r6, r3
6049
+ uxth r6, r6
6050
+ cmp r7, r6
6051
+ movcs r3, #0
6052
+ movcc r3, #1
6053
+ cmp r4, r2
6054
+ orrcs r3, r3, #1
6055
+ cmp r3, #0
6056
+ bne .L995
6057
+ ldr r2, .L1086+56
6058
+ ldrh r3, [r9]
6059
+ ldrh r2, [r2]
6060
+ cmp r3, r2, lsl #1
6061
+ ble .L1000
6062
+.L995:
6063
+ movw r3, #2792
6064
+ ldrh r2, [r5, r3]
6065
+ ldr r3, .L1086+28
6066
+ ldrh r3, [r3, #-4]
6067
+ cmp r2, r3, lsr #2
6068
+ bhi .L1022
6069
+ movw r3, #2790
6070
+ ldrh r3, [r5, r3]
6071
+ add r3, r3, #8
6072
+ cmp r2, r3
6073
+ ble .L993
6074
+.L1022:
6075
+ cmp r7, r6
6076
+ bls .L993
6077
+ ldrh r3, [sp, #16]
6078
+ mov r8, #64
6079
+ str r3, [sp, #32]
6080
+.L1004:
6081
+ ldr fp, .L1086+20
6082
+ mov r0, fp
6083
+ ldrh r9, [r0], #6
6084
+ mov r1, r9
58506085 bl _list_get_gc_head_node
6086
+ movw r3, #65535
6087
+ mov r10, r0
6088
+ cmp r0, r3
6089
+ beq .L1002
6090
+ add r9, r9, #1
6091
+ ldr r2, [sp, #32]
6092
+ mov r1, #0
6093
+ strh r9, [fp] @ movhi
6094
+ bl gc_add_sblk
6095
+ cmp r0, #0
6096
+ beq .L1003
6097
+ ldr r3, [r5, #1092]
6098
+ lsl r10, r10, #1
6099
+ add r4, r4, #1
6100
+ ldr r2, [sp, #12]
6101
+ uxth r4, r4
6102
+ ldrh r3, [r3, r10]
6103
+ add r6, r6, r3
6104
+ uxth r6, r6
6105
+ cmp r7, r6
6106
+ movcs r3, #0
6107
+ movcc r3, #1
6108
+ cmp r4, r2
6109
+ orrcs r3, r3, #1
6110
+ cmp r3, #0
6111
+ beq .L1003
6112
+.L993:
6113
+ ldr r3, [sp, #24]
6114
+ tst r3, #2
6115
+ beq .L1005
6116
+ movw r3, #2794
6117
+ ldrh r3, [r5, r3]
6118
+ cmp r3, #32
6119
+ movls r3, #0
6120
+ movhi r3, #1
6121
+ cmp r6, r7
6122
+ movcs r3, #0
6123
+ cmp r3, #0
6124
+ beq .L1005
6125
+ ldr r10, .L1086+40
6126
+ mov r5, #64
6127
+ sub fp, r10, #3088
6128
+ sub r3, fp, #12
6129
+ str r3, [sp, #32]
6130
+.L1011:
6131
+ ldr r8, .L1086+8
6132
+ ldr r0, [sp, #32]
6133
+ ldrh r9, [r8, #-4]
6134
+ sub r2, r8, #4
6135
+ str r2, [sp, #36]
6136
+ mov r1, r9
6137
+ bl _list_get_gc_head_node
6138
+ movw r3, #65535
6139
+ ldr r2, [sp, #36]
6140
+ cmp r0, r3
6141
+ beq .L1006
6142
+ ldr r3, [sp, #12]
6143
+ add r9, r9, #1
6144
+ strh r9, [r8, #-4] @ movhi
6145
+ cmp r3, #1
6146
+ bne .L1007
6147
+ ldrh r2, [r8, #-14]
6148
+ ldrb r3, [r10, #-3127] @ zero_extendqisi2
6149
+ smulbb r3, r3, r2
6150
+ ldrh r2, [fp, #-8]
6151
+ sub r3, r3, r2, lsr #3
6152
+ ldr r2, .L1086+60
6153
+ strh r3, [r2] @ movhi
6154
+.L1007:
6155
+ ldr r9, .L1086
6156
+ lsl r8, r0, #1
6157
+ ldr r3, [r9, #1092]
6158
+ ldrh r2, [r3, r8]
6159
+ ldr r3, .L1086+60
6160
+ ldrh r3, [r3]
6161
+ cmp r2, r3
6162
+ bcs .L1008
6163
+ ldr r2, [sp, #16]
6164
+ mov r1, #0
6165
+ bl gc_add_sblk
6166
+ cmp r0, #0
6167
+ beq .L1009
6168
+ ldr r3, [sp, #20]
6169
+ add r4, r4, #1
6170
+ ldr r2, [sp, #12]
6171
+ uxth r4, r4
6172
+ add r0, r3, #1
6173
+ uxth r3, r0
6174
+ str r3, [sp, #20]
6175
+ ldr r3, [r9, #1092]
6176
+ ldrh r3, [r3, r8]
6177
+ add r6, r6, r3
6178
+ uxth r6, r6
6179
+ cmp r7, r6
6180
+ movcs r3, #0
6181
+ movcc r3, #1
6182
+ cmp r4, r2
6183
+ orrcs r3, r3, #1
6184
+ cmp r3, #0
6185
+ beq .L1009
6186
+.L1010:
6187
+ ldr r3, [sp, #12]
6188
+ ldr r0, .L1086+28
6189
+ ldr r2, .L1086
6190
+ cmp r4, r3
6191
+ add lr, r0, #3088
6192
+ bcc .L1012
6193
+ ldr r3, [sp, #20]
6194
+ cmp r3, #0
6195
+ bne .L1013
6196
+ movw r3, #2794
6197
+ ldrh r1, [r2, r3]
6198
+ ldrh r3, [r0, #-2]
6199
+ cmp r1, r3
6200
+ bls .L1013
6201
+.L1012:
6202
+ ldr r3, .L1086+8
6203
+ movw ip, #2808
6204
+ ldrh r0, [r0, #-8]
6205
+ ldrh r1, [r2, ip]
6206
+ ldrh r5, [r3, #-14]
6207
+ ldrb r3, [lr, #-3127] @ zero_extendqisi2
6208
+ lsr r0, r0, #3
6209
+ mul r3, r3, r5
6210
+ sub r3, r3, r0
6211
+ cmp r1, r3
6212
+ addlt r1, r1, r0
6213
+ strhlt r1, [r2, ip] @ movhi
6214
+.L1005:
6215
+ ldr r3, [sp, #28]
6216
+ cmp r3, #0
6217
+ beq .L986
6218
+ ldrh r9, [sp, #12]
6219
+ cmp r6, r7
6220
+ cmpcc r4, r9
6221
+ bcs .L986
6222
+ ldr r5, .L1086
6223
+ mov r8, #64
6224
+.L1019:
6225
+ ldr fp, .L1086+20
6226
+ mov r0, fp
6227
+ ldrh r10, [r0], #6
6228
+ mov r1, r10
6229
+ bl _list_get_gc_head_node
6230
+ movw r3, #65535
6231
+ cmp r0, r3
6232
+ beq .L1015
6233
+ add r10, r10, #1
6234
+ ldr r2, [r5, #1092]
6235
+ ldr r3, .L1086+64
6236
+ strh r10, [fp] @ movhi
6237
+ lsl r10, r0, #1
6238
+ ldrh r1, [r2, r10]
6239
+ ldrh r2, [r3]
6240
+ cmp r1, r2
6241
+ bcs .L1016
6242
+ ldrh r2, [fp, #18]
6243
+ ldrh r3, [r3, #-14]
6244
+ cmp r3, r2, lsr #1
6245
+ bls .L1017
6246
+.L1016:
6247
+ ldr r2, [sp, #16]
6248
+ mov r1, #0
6249
+ bl gc_add_sblk
6250
+ cmp r0, #0
6251
+ beq .L1018
6252
+ ldr r3, [r5, #1092]
6253
+ add r4, r4, #1
6254
+ uxth r4, r4
6255
+ ldrh r3, [r3, r10]
6256
+ add r6, r6, r3
6257
+ uxth r6, r6
6258
+ cmp r7, r6
6259
+ cmpcs r9, r4
6260
+ bhi .L1018
6261
+.L1017:
6262
+ ldr r3, .L1086+28
6263
+ cmp r4, r9
6264
+ movw r2, #2806
6265
+ ldrhcc r1, [r3, #-8]
6266
+ bcc .L1085
6267
+ ldrh r0, [r3, #-8]
6268
+ ldr r3, .L1086+40
6269
+ ldrh r1, [r5, r2]
6270
+ ldrb r3, [r3, #-3127] @ zero_extendqisi2
6271
+ mul r3, r0, r3
6272
+ sub r3, r3, #32
6273
+ cmp r1, r3
6274
+ addlt r1, r1, r0, lsr #3
6275
+ strhlt r1, [r5, r2] @ movhi
6276
+ b .L986
6277
+.L996:
6278
+ lsr r3, r3, #2
6279
+ mov r0, #0
6280
+ strh r3, [r4, #-8] @ movhi
6281
+ bl zftl_get_gc_node.part.10
58516282 movw r2, #65535
58526283 cmp r0, r2
5853
- beq .L1002
5854
- ldr r1, [r6, #1088]
5855
- mov r3, r0, asl #1
5856
- ldrh r2, [r4, #8]
6284
+ beq .L998
6285
+ ldr r1, [r5, #1092]
6286
+ lsl r3, r0, #1
6287
+ ldrh r2, [r8, #-8]
58576288 ldrh r3, [r1, r3]
58586289 cmp r3, r2, lsr #2
5859
- bcs .L1002
5860
- mov r1, #0
5861
- ldr r2, [sp, #8]
6290
+ bcs .L998
58626291 mov r3, #1
6292
+ ldr r2, [sp, #16]
6293
+ mov r1, #0
58636294 strh r3, [r4, #-8] @ movhi
58646295 bl gc_add_sblk
58656296 adds r4, r0, #0
58666297 movne r4, #1
5867
-.L1001:
5868
- ldr r9, .L1093+40
5869
- mov r8, #64
5870
- mov r7, #0
5871
-.L1005:
5872
- ldrh fp, [r9]
5873
- ldr r3, .L1093+40
5874
- mov r1, fp
5875
- add r0, r3, #20
5876
- str r3, [sp, #28]
5877
- bl _list_get_gc_head_node
5878
- movw r2, #65535
5879
- cmp r0, r2
5880
- mov r10, r0
5881
- ldr r3, [sp, #28]
5882
- beq .L1003
5883
- mov r1, #0
5884
- ldr r2, [sp, #8]
5885
- add fp, fp, #1
5886
- strh fp, [r9] @ movhi
5887
- bl gc_add_sblk
5888
- cmp r0, #0
5889
- beq .L1004
5890
- ldr r3, [r6, #1088]
5891
- mov r10, r10, asl #1
5892
- add r4, r4, #1
5893
- ldrh r3, [r3, r10]
5894
- uxth r4, r4
5895
- add r7, r7, r3
5896
- ldr r3, [sp, #12]
5897
- uxth r7, r7
5898
- cmp r7, r3
5899
- cmpls r4, r5
5900
- bcs .L999
5901
- ldr r2, .L1093+48
5902
- ldr r3, .L1093+52
5903
- ldrh r2, [r2]
5904
- ldrh r3, [r3]
5905
- cmp r3, r2, asl #1
5906
- ble .L1004
5907
- b .L999
5908
-.L1003:
5909
- mov r2, #0
5910
- strh r2, [r3] @ movhi
5911
- b .L999
5912
-.L1004:
6298
+ b .L997
6299
+.L999:
6300
+ mov r3, #0
6301
+ strh r3, [r2] @ movhi
6302
+ b .L995
6303
+.L1000:
59136304 sub r8, r8, #1
59146305 uxth r8, r8
59156306 cmp r8, #0
5916
- bne .L1005
5917
-.L999:
5918
- movw r3, #2796
5919
- ldrh r2, [r6, r3]
5920
- ldr r3, [sp, #24]
5921
- ldrh r3, [r3, #-14]
5922
- cmp r2, r3, lsr #2
5923
- bhi .L1026
5924
- ldr r1, .L1093
5925
- movw r3, #2794
5926
- ldrh r3, [r1, r3]
5927
- add r3, r3, #8
5928
- cmp r2, r3
5929
- bgt .L1026
5930
-.L997:
5931
- ldr r3, [sp, #16]
5932
- tst r3, #2
5933
- beq .L1009
5934
- movw r3, #2798
5935
- ldrh r2, [r6, r3]
5936
- ldr r3, [sp, #12]
5937
- cmp r7, r3
5938
- movcs r3, #0
5939
- movcc r3, #1
5940
- cmp r2, #32
5941
- movls r3, #0
5942
- cmp r3, #0
5943
- beq .L1009
5944
- ldr r9, .L1093+28
5945
- mov r8, #64
5946
- mov r6, #0
5947
-.L1015:
5948
- ldrh r3, [r9]
5949
- ldr r10, .L1093+28
5950
- ldr fp, .L1093
5951
- add r0, r10, #8
5952
- mov r1, r3
5953
- str r3, [sp, #24]
5954
- bl _list_get_gc_head_node
5955
- movw r2, #65535
5956
- cmp r0, r2
5957
- beq .L1010
5958
- ldr r3, [sp, #24]
5959
- cmp r5, #1
5960
- add r3, r3, #1
5961
- strh r3, [r9] @ movhi
5962
- bne .L1011
5963
- ldr r3, .L1093+44
5964
- ldrb r2, [r3, #-3123] @ zero_extendqisi2
5965
- ldrh r3, [r10, #-6]
5966
- smulbb r3, r2, r3
5967
- ldrh r2, [r10, #12]
5968
- sub r3, r3, r2, lsr #3
5969
- ldr r2, .L1093+56
5970
- strh r3, [r2] @ movhi
5971
-.L1011:
5972
- ldr r3, [fp, #1088]
5973
- mov r10, r0, asl #1
5974
- ldrh r2, [r3, r10]
5975
- ldr r3, .L1093+56
5976
- ldrh r3, [r3]
5977
- cmp r2, r3
5978
- bcs .L1012
5979
- mov r1, #0
5980
- ldr r2, [sp, #8]
5981
- bl gc_add_sblk
5982
- cmp r0, #0
5983
- beq .L1013
5984
- ldr r3, .L1093
5985
- add r4, r4, #1
5986
- add r6, r6, #1
5987
- uxth r4, r4
5988
- ldr r3, [r3, #1088]
5989
- uxth r6, r6
5990
- ldrh r3, [r3, r10]
5991
- add r7, r7, r3
5992
- ldr r3, [sp, #12]
5993
- uxth r7, r7
5994
- cmp r7, r3
5995
- cmpls r4, r5
5996
- bcc .L1013
5997
- b .L1014
5998
-.L1012:
5999
- ldr r3, .L1093+8
6307
+ bne .L1001
6308
+ b .L995
6309
+.L1002:
6310
+ cmp r9, #64
6311
+ movhi r3, #0
6312
+ strhhi r3, [fp] @ movhi
6313
+ b .L993
6314
+.L1003:
6315
+ sub r8, r8, #1
6316
+ uxth r8, r8
6317
+ cmp r8, #0
6318
+ bne .L1004
6319
+ b .L993
6320
+.L1008:
6321
+ ldr r3, .L1086+8
60006322 mov r2, #0
60016323 strh r2, [r3, #-4] @ movhi
6002
- b .L1014
6003
-.L1010:
6004
- mov r3, #0
6005
- strh r3, [r10] @ movhi
6006
- b .L1014
6007
-.L1013:
6008
- sub r8, r8, #1
6009
- uxth r8, r8
6010
- cmp r8, #0
6011
- bne .L1015
6012
-.L1014:
6013
- ldr r0, .L1093+44
6014
- cmp r4, r5
6015
- sub r2, r0, #3088
6016
- bcc .L1016
6017
- cmp r6, #0
6018
- bne .L1017
6019
- ldr ip, .L1093
6020
- sub r3, r0, #3072
6021
- movw r1, #2798
6022
- ldrh r3, [r3, #-12]
6023
- ldrh r1, [ip, r1]
6024
- cmp r1, r3
6025
- bls .L1017
6026
-.L1016:
6027
- ldr r3, .L1093+8
6028
- movw r1, #2810
6029
- ldrh r2, [r2, #-8]
6030
- ldrh ip, [fp, r1]
6031
- ldrh lr, [r3, #-10]
6032
- ldrb r3, [r0, #-3123] @ zero_extendqisi2
6033
- mov r2, r2, lsr #3
6034
- mul r3, r3, lr
6035
- rsb r3, r2, r3
6036
- cmp ip, r3
6037
- addlt r3, r2, ip
6038
- ldrlt r2, .L1093
6039
- strlth r3, [r2, r1] @ movhi
6040
- b .L1009
6041
-.L1017:
6042
- ldrh ip, [r2, #-8]
6043
- movw r1, #2810
6044
- ldrb r2, [r0, #-3123] @ zero_extendqisi2
6045
- ldrh r3, [fp, r1]
6046
- mul r2, r2, ip
6047
- cmp r3, r2
6048
- subgt r3, r3, ip, lsr #3
6049
- bgt .L1089
6050
- b .L990
6051
-.L1009:
6052
- ldr r3, [sp, #20]
6053
- cmp r3, #0
6054
- beq .L990
6055
- ldr r3, [sp, #12]
6056
- uxth r9, r5
6057
- cmp r4, r9
6058
- cmpcc r7, r3
6059
- bcs .L990
6060
- ldr r10, .L1093
6061
- mov r6, #64
6062
-.L1023:
6063
- ldr r2, .L1093+12
6064
- ldr fp, .L1093
6065
- add r0, r2, #6
6066
- ldrh r8, [r2]
6067
- str r2, [sp, #20]
6068
- mov r1, r8
6069
- bl _list_get_gc_head_node
6070
- movw r1, #65535
6071
- cmp r0, r1
6072
- ldr r2, [sp, #20]
6073
- beq .L1019
6074
- ldr r3, .L1093+12
6075
- add r8, r8, #1
6076
- ldr r2, [r10, #1088]
6077
- strh r8, [r3] @ movhi
6078
- mov r8, r0, asl #1
6079
- ldrh r1, [r2, r8]
6080
- ldr r2, .L1093+60
6081
- ldrh r2, [r2]
6082
- cmp r1, r2
6083
- bcs .L1020
6084
- ldr r2, .L1093+52
6085
- ldrh r1, [r3, #24]
6086
- ldrh r2, [r2]
6087
- cmp r2, r1, lsr #1
6088
- bls .L1021
6089
-.L1020:
6090
- mov r1, #0
6091
- ldr r2, [sp, #8]
6092
- bl gc_add_sblk
6093
- cmp r0, #0
6094
- beq .L1022
6095
- ldr r2, [r10, #1088]
6096
- add r4, r4, #1
6097
- ldr r3, [sp, #12]
6098
- uxth r4, r4
6099
- ldrh r2, [r2, r8]
6100
- add r7, r7, r2
6101
- uxth r7, r7
6102
- cmp r7, r3
6103
- cmpls r4, r9
6104
- bcc .L1022
6105
- b .L1021
6106
-.L1019:
6107
- cmp r8, #64
6108
- movhi r3, #0
6109
- strhih r3, [r2] @ movhi
6110
- b .L1021
6111
-.L1022:
6112
- sub r6, r6, #1
6113
- uxth r6, r6
6114
- cmp r6, #0
6115
- bne .L1023
6116
-.L1021:
6117
- cmp r4, r9
6118
- ldr r0, .L1093+36
6119
- movw r1, #2812
6120
- bcs .L1024
6121
- ldrh r2, [r0, #-8]
6122
- ldrh r3, [fp, r1]
6123
- cmp r3, r2, lsr #1
6124
- bls .L990
6125
- sub r3, r3, r2, lsr #3
6126
-.L1089:
6127
- ldr r2, .L1093
6128
-.L1090:
6129
- strh r3, [r2, r1] @ movhi
6130
- b .L990
6131
-.L1024:
6132
- ldr r3, .L1093+44
6133
- ldrh r0, [r0, #-8]
6134
- ldrh r2, [fp, r1]
6135
- ldrb r3, [r3, #-3123] @ zero_extendqisi2
6136
- mul r3, r3, r0
6137
- sub r3, r3, #32
6138
- cmp r2, r3
6139
- addlt r2, r2, r0, lsr #3
6140
- ldrlt r3, .L1093
6141
- strlth r2, [r3, r1] @ movhi
6142
-.L990:
6143
- ldr r3, .L1093+16
6144
- ldr r3, [r3]
6145
- tst r3, #256
6146
- beq .L1025
6147
- str r5, [sp]
6148
- mov r3, r4
6149
- ldr r0, .L1093+64
6150
- ldr r1, [sp, #8]
6151
- ldr r2, [sp, #16]
6152
- bl printk
6153
-.L1025:
6154
- mov r0, r4
6155
- add sp, sp, #36
6156
- @ sp needed
6157
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
6158
-.L1026:
6159
- ldr r3, [sp, #12]
6160
- cmp r7, r3
6161
- bcs .L997
6162
- ldr r9, .L1093+12
6163
- mov r8, #64
6164
- movw r10, #65535
6165
-.L1008:
6166
- ldrh fp, [r9]
6167
- ldr r2, .L1093+12
6168
- mov r1, fp
6169
- add r0, r2, #6
6170
- str r2, [sp, #28]
6171
- bl _list_get_gc_head_node
6172
- cmp r0, r10
6173
- mov r3, r0
6174
- str r0, [sp, #24]
6175
- ldr r2, [sp, #28]
6176
- beq .L1006
6177
- mov r1, #0
6178
- ldr r2, [sp, #8]
6179
- add fp, fp, #1
6180
- strh fp, [r9] @ movhi
6181
- bl gc_add_sblk
6182
- cmp r0, #0
6183
- ldr r3, [sp, #24]
6184
- beq .L1007
6185
- ldr r2, [r6, #1088]
6186
- mov r3, r3, asl #1
6187
- add r4, r4, #1
6188
- ldrh r3, [r2, r3]
6189
- uxth r4, r4
6190
- add r7, r7, r3
6191
- ldr r3, [sp, #12]
6192
- uxth r7, r7
6193
- cmp r7, r3
6194
- cmpls r4, r5
6195
- bcc .L1007
6196
- b .L997
6324
+ b .L1010
61976325 .L1006:
6198
- cmp fp, #64
6326
+ mov r3, #0
6327
+ strh r3, [r2] @ movhi
6328
+ b .L1010
6329
+.L1009:
6330
+ sub r5, r5, #1
6331
+ uxth r5, r5
6332
+ cmp r5, #0
6333
+ bne .L1011
6334
+ b .L1010
6335
+.L1013:
6336
+ ldrh r0, [r0, #-8]
6337
+ movw ip, #2808
6338
+ ldrb r1, [lr, #-3127] @ zero_extendqisi2
6339
+ ldrh r3, [r2, ip]
6340
+ mul r1, r0, r1
6341
+ cmp r3, r1
6342
+ subgt r3, r3, r0, lsr #3
6343
+ strhgt r3, [r2, ip] @ movhi
6344
+ b .L986
6345
+.L1015:
6346
+ cmp r10, #64
61996347 movhi r3, #0
6200
- strhih r3, [r2] @ movhi
6201
- b .L997
6202
-.L1007:
6348
+ strhhi r3, [fp] @ movhi
6349
+ b .L1017
6350
+.L1018:
62036351 sub r8, r8, #1
62046352 uxth r8, r8
62056353 cmp r8, #0
6206
- bne .L1008
6207
- b .L997
6208
-.L1094:
6354
+ bne .L1019
6355
+ b .L1017
6356
+.L1087:
62096357 .align 2
6210
-.L1093:
6358
+.L1086:
62116359 .word .LANCHOR0
6212
- .word .LANCHOR0+2828
6360
+ .word .LANCHOR0+2824
62136361 .word .LANCHOR3-3104
6214
- .word .LANCHOR3-3110
62156362 .word .LANCHOR2
6216
- .word .LC101
6217
- .word .LANCHOR0+2814
6218
- .word .LANCHOR3-3108
6219
- .word .LANCHOR0+2816
6363
+ .word .LC98
6364
+ .word .LANCHOR3-3110
6365
+ .word .LANCHOR0+2818
62206366 .word .LANCHOR3-3088
6221
- .word .LANCHOR3-3112
6367
+ .word .LANCHOR0+2816
6368
+ .word .LANCHOR3-3108
62226369 .word .LANCHOR3
6223
- .word .LANCHOR0+2794
6224
- .word .LANCHOR0+2796
6225
- .word .LANCHOR0+2810
6226
- .word .LANCHOR0+2812
6227
- .word .LC102
6370
+ .word .LANCHOR3-3112
6371
+ .word .LC99
6372
+ .word .LANCHOR0+2792
6373
+ .word .LANCHOR0+2790
6374
+ .word .LANCHOR0+2808
6375
+ .word .LANCHOR0+2806
62286376 .fnend
62296377 .size gc_search_src_blk, .-gc_search_src_blk
62306378 .align 2
62316379 .global zftl_get_gc_node
6380
+ .syntax unified
6381
+ .arm
6382
+ .fpu softvfp
62326383 .type zftl_get_gc_node, %function
62336384 zftl_get_gc_node:
62346385 .fnstart
....@@ -6237,2951 +6388,3056 @@
62376388 @ link register save eliminated.
62386389 cmp r1, #5
62396390 mov r3, r0
6240
- ldreq r0, .L1099
6241
- beq .L1098
6391
+ moveq r1, r0
6392
+ ldreq r0, .L1092
6393
+ beq .L1091
62426394 cmp r1, #2
6243
- ldreq r0, .L1099+4
6244
- ldrne r0, .L1099+8
6245
-.L1098:
6246
- mov r1, r3
6395
+ movne r1, r3
6396
+ ldrne r0, .L1092+4
6397
+ bne .L1091
6398
+ b zftl_get_gc_node.part.10
6399
+.L1091:
62476400 b _list_get_gc_head_node
6248
-.L1100:
6401
+.L1093:
62496402 .align 2
6250
-.L1099:
6403
+.L1092:
62516404 .word .LANCHOR3-3100
6252
- .word .LANCHOR3-3092
62536405 .word .LANCHOR3-3104
62546406 .fnend
62556407 .size zftl_get_gc_node, .-zftl_get_gc_node
62566408 .align 2
62576409 .global zftl_insert_free_list
6410
+ .syntax unified
6411
+ .arm
6412
+ .fpu softvfp
62586413 .type zftl_insert_free_list, %function
62596414 zftl_insert_free_list:
62606415 .fnstart
62616416 @ args = 0, pretend = 0, frame = 0
62626417 @ frame_needed = 0, uses_anonymous_args = 0
62636418 @ link register save eliminated.
6264
- ldr r3, .L1105
6419
+ ldr r2, .L1098
62656420 mov r1, r0
6266
- ldr r3, [r3, #1080]
6267
- add r3, r3, r0, asl #2
6421
+ ldr r3, [r2, #1084]
6422
+ add r3, r3, r0, lsl #2
62686423 ldrb r3, [r3, #2] @ zero_extendqisi2
62696424 ands r3, r3, #24
6270
- ldreq r0, .L1105+4
6271
- ldreq r2, .L1105+8
6272
- beq .L1104
6273
-.L1102:
6425
+ addeq r2, r2, #2784
6426
+ ldreq r0, .L1098+4
6427
+ beq .L1097
62746428 cmp r3, #16
6275
- ldreq r0, .L1105+12
6276
- ldreq r2, .L1105+16
6277
- ldrne r0, .L1105+20
6278
- ldrne r2, .L1105+24
6279
-.L1104:
6429
+ ldr r0, .L1098+8
6430
+ ldreq r2, .L1098+12
6431
+ ldrne r2, .L1098+16
6432
+ subeq r0, r0, #12
6433
+ subne r0, r0, #8
6434
+.L1097:
62806435 b _insert_free_list
6281
-.L1106:
6436
+.L1099:
62826437 .align 2
6283
-.L1105:
6438
+.L1098:
62846439 .word .LANCHOR0
6285
- .word .LANCHOR3-3080
6286
- .word .LANCHOR0+2788
6287
- .word .LANCHOR3-3076
6288
- .word .LANCHOR0+2790
6440
+ .word .LANCHOR3-3088
62896441 .word .LANCHOR3-3072
6290
- .word .LANCHOR0+2792
6442
+ .word .LANCHOR0+2786
6443
+ .word .LANCHOR0+2788
62916444 .fnend
62926445 .size zftl_insert_free_list, .-zftl_insert_free_list
62936446 .align 2
62946447 .global zftl_insert_data_list
6448
+ .syntax unified
6449
+ .arm
6450
+ .fpu softvfp
62956451 .type zftl_insert_data_list, %function
62966452 zftl_insert_data_list:
62976453 .fnstart
62986454 @ args = 0, pretend = 0, frame = 0
62996455 @ frame_needed = 0, uses_anonymous_args = 0
63006456 @ link register save eliminated.
6301
- ldr r3, .L1112
6457
+ ldr r3, .L1105
63026458 mov r1, r0
6303
- ldr r3, [r3, #1080]
6304
- add r3, r3, r0, asl #2
6459
+ ldr r3, [r3, #1084]
6460
+ add r3, r3, r0, lsl #2
63056461 ldrb r3, [r3, #2] @ zero_extendqisi2
63066462 and r3, r3, #224
63076463 cmp r3, #64
6308
- ldreq r0, .L1112+4
6309
- ldreq r2, .L1112+8
6310
- beq .L1111
6311
-.L1108:
6464
+ bne .L1101
6465
+ ldr r2, .L1105+4
6466
+ ldr r0, .L1105+8
6467
+.L1104:
6468
+ b _insert_data_list
6469
+.L1101:
63126470 cmp r3, #96
6313
- ldreq r0, .L1112+12
6314
- ldreq r2, .L1112+16
6315
- beq .L1111
6316
-.L1109:
6471
+ ldreq r2, .L1105+12
6472
+ ldreq r0, .L1105+16
6473
+ beq .L1104
6474
+.L1102:
63176475 cmp r3, #160
63186476 bxne lr
6319
- ldr r0, .L1112+20
6320
- ldr r2, .L1112+24
6321
-.L1111:
6322
- b _insert_data_list
6323
-.L1113:
6477
+ ldr r2, .L1105+20
6478
+ ldr r0, .L1105+24
6479
+ b .L1104
6480
+.L1106:
63246481 .align 2
6325
-.L1112:
6482
+.L1105:
63266483 .word .LANCHOR0
6327
- .word .LANCHOR3-3092
6328
- .word .LANCHOR0+2794
6484
+ .word .LANCHOR0+2790
6485
+ .word .LANCHOR3-3116
6486
+ .word .LANCHOR0+2792
63296487 .word .LANCHOR3-3104
6330
- .word .LANCHOR0+2796
6488
+ .word .LANCHOR0+2794
63316489 .word .LANCHOR3-3100
6332
- .word .LANCHOR0+2798
63336490 .fnend
63346491 .size zftl_insert_data_list, .-zftl_insert_data_list
63356492 .align 2
63366493 .global zftl_gc_get_free_sblk
6494
+ .syntax unified
6495
+ .arm
6496
+ .fpu softvfp
63376497 .type zftl_gc_get_free_sblk, %function
63386498 zftl_gc_get_free_sblk:
63396499 .fnstart
63406500 @ args = 0, pretend = 0, frame = 0
63416501 @ frame_needed = 0, uses_anonymous_args = 0
6342
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
6502
+ push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
63436503 .save {r4, r5, r6, r7, r8, lr}
63446504 .pad #16
63456505 movw r2, #65535
6346
- ldr r8, .L1129
6347
- mov r7, r0
6348
- ldr r3, [r8, #1092]
6506
+ ldr r8, .L1126
6507
+ ldr r3, [r8, #1096]
63496508 add r3, r3, #588
63506509 ldrh r4, [r3]
63516510 clz r3, r0
6511
+ lsr r3, r3, #5
63526512 cmp r4, r2
6353
- mov r3, r3, lsr #5
63546513 moveq r3, #0
63556514 cmp r3, #0
6356
- beq .L1115
6357
- ldr r0, .L1129+4
6515
+ beq .L1108
63586516 mov r1, r4
6517
+ ldr r0, .L1126+4
63596518 bl printk
6360
- ldr r3, [r8, #1092]
6519
+ ldr r3, [r8, #1096]
63616520 mvn r2, #0
63626521 add r3, r3, #588
63636522 strh r2, [r3] @ movhi
6364
- b .L1116
6365
-.L1115:
6366
- movw r3, #2790
6367
- mov r6, r1
6368
- ldrh r1, [r8, r3]
6369
- movw r3, #2792
6370
- ldrh r3, [r8, r3]
6371
- mov r5, r8
6372
- cmp r1, r3
6373
- bcc .L1117
6374
- movw r2, #2788
6375
- ldrh r2, [r8, r2]
6376
- cmp r3, #0
6377
- cmpne r2, r1
6378
- bls .L1118
6379
-.L1117:
6380
- cmp r7, #0
6381
- ldr r0, .L1129+8
6382
- rsbne r1, r1, r1, asl #3
6383
- moveq r1, r3, lsr #2
6384
- ubfxne r1, r1, #3, #16
6385
- ldr r2, .L1129+12
6386
- b .L1128
6387
-.L1118:
6388
- cmp r0, #0
6389
- ldr r2, .L1129+16
6390
- movne r1, r1, lsr #3
6391
- moveq r1, r0
6392
- ldr r0, .L1129+20
6393
-.L1128:
6394
- bl _list_pop_index_node
6395
- movw r3, #65535
6396
- uxth r4, r0
6397
- cmp r4, r3
6398
- bne .L1123
6399
- movw r3, #2788
6400
- ldr r0, .L1129+24
6401
- ldrh r3, [r5, r3]
6402
- mov r1, r4
6403
- mov r2, r6
6404
- str r3, [sp]
6405
- movw r3, #2792
6406
- ldrh r3, [r5, r3]
6407
- str r3, [sp, #4]
6408
- ldr r3, .L1129+28
6409
- ldr r3, [r3, #-3080]
6410
- bl printk
6411
-.L1123:
6412
- cmp r7, #0
6413
- beq .L1116
6414
- ldr r3, .L1129+32
6415
- ldr r3, [r3]
6416
- tst r3, #256
6417
- beq .L1116
6418
- ldr r2, [r5, #1080]
6419
- mov r0, r4, asl #2
6420
- add r3, r2, r0
6421
- ldr r1, [r2, r4, asl #2]
6422
- ldrb r3, [r3, #2] @ zero_extendqisi2
6423
- ubfx r1, r1, #11, #8
6424
- str r1, [sp]
6425
- ldrh r2, [r2, r0]
6426
- ldr r0, .L1129+36
6427
- ubfx r2, r2, #0, #11
6428
- str r2, [sp, #4]
6429
- ldr r1, [r5, #1088]
6430
- mov r2, r4, asl #1
6431
- ldrh r2, [r1, r2]
6432
- mov r1, r4
6433
- str r2, [sp, #8]
6434
- mov r2, r3, lsr #5
6435
- ubfx r3, r3, #3, #2
6436
- bl printk
6437
-.L1116:
6523
+.L1109:
64386524 mov r0, r4
64396525 add sp, sp, #16
64406526 @ sp needed
6441
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
6442
-.L1130:
6527
+ pop {r4, r5, r6, r7, r8, pc}
6528
+.L1108:
6529
+ movw r3, #2786
6530
+ mov r7, r1
6531
+ ldrh r1, [r8, r3]
6532
+ movw r3, #2788
6533
+ ldrh r3, [r8, r3]
6534
+ mov r6, r0
6535
+ mov r5, r8
6536
+ ldr r0, .L1126+8
6537
+ cmp r1, r3
6538
+ bcc .L1110
6539
+ add r2, r8, #2784
6540
+ ldrh r2, [r2]
6541
+ cmp r3, #0
6542
+ cmpne r2, r1
6543
+ bls .L1111
6544
+.L1110:
6545
+ cmp r6, #0
6546
+ ldr r2, .L1126+12
6547
+ rsbne r1, r1, r1, lsl #3
6548
+ lsreq r1, r3, #2
6549
+ ubfxne r1, r1, #3, #16
6550
+ sub r0, r0, #8
6551
+.L1125:
6552
+ bl _list_pop_index_node
6553
+ uxth r4, r0
6554
+ movw r3, #65535
6555
+ cmp r4, r3
6556
+ bne .L1116
6557
+ movw r3, #2788
6558
+ mov r2, r7
6559
+ ldrh r3, [r5, r3]
6560
+ mov r1, r4
6561
+ ldr r0, .L1126+16
6562
+ str r3, [sp, #4]
6563
+ ldr r3, .L1126+20
6564
+ ldrh r3, [r3]
6565
+ str r3, [sp]
6566
+ ldr r3, .L1126+24
6567
+ ldr r3, [r3, #-3088]
6568
+ bl printk
6569
+.L1116:
6570
+ cmp r6, #0
6571
+ beq .L1109
6572
+ ldr r3, .L1126+28
6573
+ ldr r3, [r3]
6574
+ tst r3, #256
6575
+ beq .L1109
6576
+ ldr ip, [r5, #1092]
6577
+ lsl r0, r4, #1
6578
+ ldr r1, [r5, #1084]
6579
+ lsl r3, r4, #2
6580
+ ldrh r0, [ip, r0]
6581
+ add r2, r1, r3
6582
+ ldrb r2, [r2, #2] @ zero_extendqisi2
6583
+ str r0, [sp, #8]
6584
+ ldrh r3, [r1, r3]
6585
+ ldr r0, .L1126+32
6586
+ ubfx r3, r3, #0, #11
6587
+ str r3, [sp, #4]
6588
+ ldr r3, [r1, r4, lsl #2]
6589
+ mov r1, r4
6590
+ ubfx r3, r3, #11, #8
6591
+ str r3, [sp]
6592
+ ubfx r3, r2, #3, #2
6593
+ lsr r2, r2, #5
6594
+ bl printk
6595
+ b .L1109
6596
+.L1111:
6597
+ cmp r6, #0
6598
+ ldr r2, .L1126+36
6599
+ lsrne r1, r1, #3
6600
+ moveq r1, r6
6601
+ sub r0, r0, #12
6602
+ b .L1125
6603
+.L1127:
64436604 .align 2
6444
-.L1129:
6605
+.L1126:
64456606 .word .LANCHOR0
6446
- .word .LC103
6607
+ .word .LC100
64476608 .word .LANCHOR3-3072
6448
- .word .LANCHOR0+2792
6449
- .word .LANCHOR0+2790
6450
- .word .LANCHOR3-3076
6451
- .word .LC104
6609
+ .word .LANCHOR0+2788
6610
+ .word .LC101
6611
+ .word .LANCHOR0+2784
64526612 .word .LANCHOR3
64536613 .word .LANCHOR2
6454
- .word .LC105
6614
+ .word .LC102
6615
+ .word .LANCHOR0+2786
64556616 .fnend
64566617 .size zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
64576618 .align 2
64586619 .global zftl_get_free_sblk
6620
+ .syntax unified
6621
+ .arm
6622
+ .fpu softvfp
64596623 .type zftl_get_free_sblk, %function
64606624 zftl_get_free_sblk:
64616625 .fnstart
64626626 @ args = 0, pretend = 0, frame = 0
64636627 @ frame_needed = 0, uses_anonymous_args = 0
64646628 cmp r1, #5
6465
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
6629
+ push {r0, r1, r4, r5, r6, r7, r8, lr}
64666630 .save {r4, r5, r6, r7, r8, lr}
64676631 .pad #8
64686632 mov r7, r1
6469
- ldr r5, .L1147
6470
- bne .L1132
6471
- movw r3, #2790
6633
+ ldr r5, .L1141
6634
+ bne .L1129
6635
+ movw r3, #2786
6636
+ ldr r0, .L1141+4
64726637 ldrh r1, [r5, r3]
6473
- movw r3, #2792
6474
- ldrh r2, [r5, r3]
6475
- cmp r1, r2
6476
- bcc .L1133
64776638 movw r3, #2788
6478
- ldrh r3, [r5, r3]
6479
- cmp r2, #0
6639
+ ldrh ip, [r5, r3]
6640
+ cmp r1, ip
6641
+ bcc .L1130
6642
+ add r3, r5, #2784
6643
+ ldrh r3, [r3]
6644
+ cmp ip, #0
64806645 cmpne r3, r1
64816646 movhi r1, #1
64826647 movls r1, #0
6483
- bls .L1134
6484
-.L1133:
6485
- ldr r0, .L1147+4
6486
- mov r1, r2, lsr #1
6487
- b .L1146
6488
-.L1134:
6489
- ldr r0, .L1147+8
6490
- ldr r2, .L1147+12
6491
- b .L1145
6492
-.L1132:
6493
- ldr r3, [r5, #1092]
6648
+ ldrls r2, .L1141+8
6649
+ subls r0, r0, #12
6650
+ bls .L1140
6651
+.L1130:
6652
+ ldr r2, .L1141+12
6653
+ lsr r1, ip, #1
6654
+ sub r0, r0, #8
6655
+.L1140:
6656
+ bl _list_pop_index_node
6657
+ uxth r4, r0
6658
+ movw r3, #65535
6659
+ cmp r4, r3
6660
+ bne .L1134
6661
+ movw r3, #2788
6662
+ mov r2, r7
6663
+ ldrh r3, [r5, r3]
6664
+ mov r1, r4
6665
+ ldr r0, .L1141+16
6666
+ str r3, [sp, #4]
6667
+ ldr r3, .L1141+20
6668
+ ldrh r3, [r3]
6669
+ str r3, [sp]
6670
+ ldr r3, .L1141+24
6671
+ ldr r3, [r3, #-3088]
6672
+ bl printk
6673
+ b .L1134
6674
+.L1129:
6675
+ ldr r3, [r5, #1096]
64946676 movw r8, #590
64956677 ldrh r4, [r3, r8]
64966678 movw r3, #65535
64976679 cmp r1, #1
64986680 cmpne r4, r3
6499
- beq .L1136
6500
- ldr r0, .L1147+16
6681
+ beq .L1133
65016682 mov r1, r4
6683
+ ldr r0, .L1141+28
65026684 bl printk
6503
- ldr r3, [r5, #1092]
6685
+ ldr r3, [r5, #1096]
65046686 mvn r2, #0
65056687 strh r2, [r3, r8] @ movhi
6506
- b .L1137
6507
-.L1136:
6508
- movw r3, #2788
6509
- movw r2, #2792
6510
- ldrh r3, [r5, r3]
6511
- mov r6, r0
6512
- ldrh r2, [r5, r2]
6513
- cmp r3, r2
6514
- bcc .L1138
6515
- movw r1, #2790
6516
- ldrh r1, [r5, r1]
6517
- cmp r2, #0
6518
- cmpne r1, r3
6519
- bls .L1139
6520
-.L1138:
6521
- bl get_ink_scaned_blk
6522
- movw r3, #65535
6523
- cmp r0, r3
6524
- movne r4, r0
6525
- bne .L1137
6526
- cmp r7, #1
6527
- ldr r0, .L1147+4
6528
- movweq r3, #2792
6529
- ldreqh r6, [r5, r3]
6530
- moveq r6, r6, lsr #1
6531
- mov r1, r6
6532
-.L1146:
6533
- ldr r2, .L1147+20
6534
- b .L1145
6535
-.L1139:
6536
- cmp r7, #1
6537
- ldr r0, .L1147+24
6538
- moveq r6, r3, lsr #1
6539
- ldr r2, .L1147+28
6540
- mov r1, r6
6541
-.L1145:
6542
- bl _list_pop_index_node
6543
- movw r3, #65535
6544
- uxth r4, r0
6545
- cmp r4, r3
6546
- bne .L1137
6547
- movw r3, #2788
6548
- ldr r0, .L1147+32
6549
- ldrh r3, [r5, r3]
6550
- mov r1, r4
6551
- mov r2, r7
6552
- str r3, [sp]
6553
- movw r3, #2792
6554
- ldrh r3, [r5, r3]
6555
- str r3, [sp, #4]
6556
- ldr r3, .L1147+36
6557
- ldr r3, [r3, #-3080]
6558
- bl printk
6559
-.L1137:
6688
+.L1134:
65606689 mov r0, r4
65616690 add sp, sp, #8
65626691 @ sp needed
6563
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
6564
-.L1148:
6692
+ pop {r4, r5, r6, r7, r8, pc}
6693
+.L1133:
6694
+ add r3, r5, #2784
6695
+ movw r2, #2788
6696
+ ldrh r3, [r3]
6697
+ mov r6, r0
6698
+ ldrh r2, [r5, r2]
6699
+ cmp r3, r2
6700
+ bcc .L1135
6701
+ movw r1, #2786
6702
+ ldrh r1, [r5, r1]
6703
+ cmp r2, #0
6704
+ cmpne r1, r3
6705
+ bls .L1136
6706
+.L1135:
6707
+ bl get_ink_scaned_blk
6708
+ movw r3, #65535
6709
+ mov r4, r0
6710
+ cmp r0, r3
6711
+ bne .L1134
6712
+ cmp r7, #1
6713
+ ldr r2, .L1141+12
6714
+ movweq r3, #2788
6715
+ ldr r0, .L1141+32
6716
+ ldrheq r6, [r5, r3]
6717
+ lsreq r6, r6, #1
6718
+ mov r1, r6
6719
+ b .L1140
6720
+.L1136:
6721
+ cmp r7, #1
6722
+ ldr r2, .L1141+20
6723
+ lsreq r6, r3, #1
6724
+ ldr r0, .L1141+36
6725
+ mov r1, r6
6726
+ b .L1140
6727
+.L1142:
65656728 .align 2
6566
-.L1147:
6729
+.L1141:
65676730 .word .LANCHOR0
65686731 .word .LANCHOR3-3072
6569
- .word .LANCHOR3-3076
6570
- .word .LANCHOR0+2790
6571
- .word .LC106
6572
- .word .LANCHOR0+2792
6573
- .word .LANCHOR3-3080
6732
+ .word .LANCHOR0+2786
65746733 .word .LANCHOR0+2788
6575
- .word .LC104
6734
+ .word .LC101
6735
+ .word .LANCHOR0+2784
65766736 .word .LANCHOR3
6737
+ .word .LC103
6738
+ .word .LANCHOR3-3080
6739
+ .word .LANCHOR3-3088
65776740 .fnend
65786741 .size zftl_get_free_sblk, .-zftl_get_free_sblk
65796742 .align 2
65806743 .global zftl_remove_data_node
6744
+ .syntax unified
6745
+ .arm
6746
+ .fpu softvfp
65816747 .type zftl_remove_data_node, %function
65826748 zftl_remove_data_node:
65836749 .fnstart
65846750 @ args = 0, pretend = 0, frame = 0
65856751 @ frame_needed = 0, uses_anonymous_args = 0
65866752 @ link register save eliminated.
6587
- ldr r3, .L1154
6753
+ ldr r3, .L1148
65886754 mov r1, r0
6589
- ldr r3, [r3, #1080]
6590
- add r3, r3, r0, asl #2
6755
+ ldr r3, [r3, #1084]
6756
+ add r3, r3, r0, lsl #2
65916757 ldrb r3, [r3, #2] @ zero_extendqisi2
65926758 and r3, r3, #224
65936759 cmp r3, #64
6594
- ldreq r0, .L1154+4
6595
- ldreq r2, .L1154+8
6596
- beq .L1153
6597
-.L1150:
6760
+ bne .L1144
6761
+ ldr r2, .L1148+4
6762
+ ldr r0, .L1148+8
6763
+.L1147:
6764
+ b _list_remove_node
6765
+.L1144:
65986766 cmp r3, #96
6599
- ldreq r0, .L1154+12
6600
- ldreq r2, .L1154+16
6601
- beq .L1153
6602
-.L1151:
6767
+ ldreq r2, .L1148+12
6768
+ ldreq r0, .L1148+16
6769
+ beq .L1147
6770
+.L1145:
66036771 cmp r3, #160
66046772 bxne lr
6605
- ldr r0, .L1154+20
6606
- ldr r2, .L1154+24
6607
-.L1153:
6608
- b _list_remove_node
6609
-.L1155:
6773
+ ldr r2, .L1148+20
6774
+ ldr r0, .L1148+24
6775
+ b .L1147
6776
+.L1149:
66106777 .align 2
6611
-.L1154:
6778
+.L1148:
66126779 .word .LANCHOR0
6613
- .word .LANCHOR3-3092
6614
- .word .LANCHOR0+2794
6780
+ .word .LANCHOR0+2790
6781
+ .word .LANCHOR3-3116
6782
+ .word .LANCHOR0+2792
66156783 .word .LANCHOR3-3104
6616
- .word .LANCHOR0+2796
6784
+ .word .LANCHOR0+2794
66176785 .word .LANCHOR3-3100
6618
- .word .LANCHOR0+2798
66196786 .fnend
66206787 .size zftl_remove_data_node, .-zftl_remove_data_node
66216788 .align 2
66226789 .global zftl_remove_free_node
6790
+ .syntax unified
6791
+ .arm
6792
+ .fpu softvfp
66236793 .type zftl_remove_free_node, %function
66246794 zftl_remove_free_node:
66256795 .fnstart
66266796 @ args = 0, pretend = 0, frame = 0
66276797 @ frame_needed = 0, uses_anonymous_args = 0
66286798 @ link register save eliminated.
6629
- ldr r3, .L1160
6799
+ ldr r2, .L1154
66306800 mov r1, r0
6631
- ldr r3, [r3, #1080]
6632
- add r3, r3, r0, asl #2
6801
+ ldr r3, [r2, #1084]
6802
+ add r3, r3, r0, lsl #2
66336803 ldrb r3, [r3, #2] @ zero_extendqisi2
66346804 ands r3, r3, #24
6635
- ldreq r0, .L1160+4
6636
- ldreq r2, .L1160+8
6637
- beq .L1159
6638
-.L1157:
6805
+ addeq r2, r2, #2784
6806
+ ldreq r0, .L1154+4
6807
+ beq .L1153
66396808 cmp r3, #16
6640
- ldreq r0, .L1160+12
6641
- ldreq r2, .L1160+16
6642
- ldrne r0, .L1160+20
6643
- ldrne r2, .L1160+24
6644
-.L1159:
6809
+ ldr r0, .L1154+8
6810
+ ldreq r2, .L1154+12
6811
+ ldrne r2, .L1154+16
6812
+ subeq r0, r0, #12
6813
+ subne r0, r0, #8
6814
+.L1153:
66456815 b _list_remove_node
6646
-.L1161:
6816
+.L1155:
66476817 .align 2
6648
-.L1160:
6818
+.L1154:
66496819 .word .LANCHOR0
6650
- .word .LANCHOR3-3080
6651
- .word .LANCHOR0+2788
6652
- .word .LANCHOR3-3076
6653
- .word .LANCHOR0+2790
6820
+ .word .LANCHOR3-3088
66546821 .word .LANCHOR3-3072
6655
- .word .LANCHOR0+2792
6822
+ .word .LANCHOR0+2786
6823
+ .word .LANCHOR0+2788
66566824 .fnend
66576825 .size zftl_remove_free_node, .-zftl_remove_free_node
66586826 .align 2
66596827 .global zftl_list_update_data_list
6828
+ .syntax unified
6829
+ .arm
6830
+ .fpu softvfp
66606831 .type zftl_list_update_data_list, %function
66616832 zftl_list_update_data_list:
66626833 .fnstart
66636834 @ args = 0, pretend = 0, frame = 0
66646835 @ frame_needed = 0, uses_anonymous_args = 0
66656836 @ link register save eliminated.
6666
- ldr r3, .L1167
6837
+ ldr r3, .L1161
66676838 mov r1, r0
6668
- ldr r3, [r3, #1080]
6669
- add r3, r3, r0, asl #2
6839
+ ldr r3, [r3, #1084]
6840
+ add r3, r3, r0, lsl #2
66706841 ldrb r3, [r3, #2] @ zero_extendqisi2
66716842 and r3, r3, #224
66726843 cmp r3, #64
6673
- ldreq r0, .L1167+4
6674
- ldreq r2, .L1167+8
6675
- beq .L1166
6676
-.L1163:
6844
+ bne .L1157
6845
+ ldr r2, .L1161+4
6846
+ ldr r0, .L1161+8
6847
+.L1160:
6848
+ b _list_update_data_list
6849
+.L1157:
66776850 cmp r3, #96
6678
- ldreq r0, .L1167+12
6679
- ldreq r2, .L1167+16
6680
- beq .L1166
6681
-.L1164:
6851
+ ldreq r2, .L1161+12
6852
+ ldreq r0, .L1161+16
6853
+ beq .L1160
6854
+.L1158:
66826855 cmp r3, #160
66836856 bxne lr
6684
- ldr r0, .L1167+20
6685
- ldr r2, .L1167+24
6686
-.L1166:
6687
- b _list_update_data_list
6688
-.L1168:
6857
+ ldr r2, .L1161+20
6858
+ ldr r0, .L1161+24
6859
+ b .L1160
6860
+.L1162:
66896861 .align 2
6690
-.L1167:
6862
+.L1161:
66916863 .word .LANCHOR0
6692
- .word .LANCHOR3-3092
6693
- .word .LANCHOR0+2794
6864
+ .word .LANCHOR0+2790
6865
+ .word .LANCHOR3-3116
6866
+ .word .LANCHOR0+2792
66946867 .word .LANCHOR3-3104
6695
- .word .LANCHOR0+2796
6868
+ .word .LANCHOR0+2794
66966869 .word .LANCHOR3-3100
6697
- .word .LANCHOR0+2798
66986870 .fnend
66996871 .size zftl_list_update_data_list, .-zftl_list_update_data_list
67006872 .align 2
67016873 .global print_list_info
6874
+ .syntax unified
6875
+ .arm
6876
+ .fpu softvfp
67026877 .type print_list_info, %function
67036878 print_list_info:
67046879 .fnstart
67056880 @ args = 0, pretend = 0, frame = 0
67066881 @ frame_needed = 0, uses_anonymous_args = 0
6707
- stmfd sp!, {r4, r5, r6, r7, lr}
6708
- .save {r4, r5, r6, r7, lr}
6882
+ push {r4, r5, r6, r7, r8, r9, lr}
6883
+ .save {r4, r5, r6, r7, r8, r9, lr}
67096884 mov r4, r0
67106885 ldrh r2, [r1]
67116886 .pad #36
67126887 sub sp, sp, #36
6713
- ldr r1, [r4]
6714
- ldr r0, .L1174
6888
+ ldr r1, [r0]
6889
+ ldr r0, .L1168
67156890 bl printk
67166891 ldr r4, [r4]
67176892 cmp r4, #0
6718
- beq .L1169
6719
- ldr r6, .L1174+4
6893
+ beq .L1163
6894
+ ldr r6, .L1168+4
67206895 mov r5, #0
6721
- ldr r7, .L1174+8
6722
-.L1172:
6896
+ ldr r7, .L1168+8
6897
+ ldr r8, .L1168+12
6898
+.L1166:
67236899 ldr r2, [r6, #1036]
6724
- ldrh r0, [r4, #2]
6725
- rsb r2, r2, r4
6726
- ldr r1, [r6, #1080]
6900
+ ldr r9, [r6, #1092]
6901
+ ldr r1, [r6, #1084]
6902
+ sub r2, r4, r2
67276903 ldrh r3, [r4]
6728
- mov r2, r2, asr #1
6729
- str r0, [sp]
6730
- ldrh r0, [r4, #4]
6904
+ asr r2, r2, #1
67316905 mul r2, r7, r2
6732
- str r0, [sp, #4]
67336906 uxth r2, r2
6734
- mov ip, r2, asl #2
6735
- add lr, r1, ip
6736
- ldrb r0, [lr, #2] @ zero_extendqisi2
6737
- mov r0, r0, lsr #5
6738
- str r0, [sp, #8]
6739
- ldrb r0, [lr, #2] @ zero_extendqisi2
6740
- ubfx r0, r0, #3, #2
6741
- str r0, [sp, #12]
6742
- ldr r0, [r1, r2, asl #2]
6743
- ubfx r0, r0, #11, #8
6744
- str r0, [sp, #16]
6745
- ldrh r1, [r1, ip]
6746
- ldr r0, [r6, #1088]
6747
- ubfx r1, r1, #0, #11
6748
- str r1, [sp, #20]
6749
- mov r1, r2, asl #1
6750
- ldrh r1, [r0, r1]
6751
- ldr r0, .L1174+12
6752
- str r1, [sp, #24]
6907
+ lsl lr, r2, #1
6908
+ lsl r0, r2, #2
6909
+ ldrh lr, [r9, lr]
6910
+ add ip, r1, r0
6911
+ str lr, [sp, #24]
6912
+ ldrh r0, [r1, r0]
6913
+ ubfx r0, r0, #0, #11
6914
+ str r0, [sp, #20]
6915
+ mov r0, r8
6916
+ ldr r1, [r1, r2, lsl #2]
6917
+ ubfx r1, r1, #11, #8
6918
+ str r1, [sp, #16]
6919
+ ldrb r1, [ip, #2] @ zero_extendqisi2
6920
+ ubfx r1, r1, #3, #2
6921
+ str r1, [sp, #12]
6922
+ ldrb r1, [ip, #2] @ zero_extendqisi2
6923
+ lsr r1, r1, #5
6924
+ str r1, [sp, #8]
6925
+ ldrh r1, [r4, #4]
6926
+ str r1, [sp, #4]
6927
+ ldrh r1, [r4, #2]
6928
+ str r1, [sp]
67536929 mov r1, r5
67546930 bl printk
6755
- ldrh r2, [r4]
6931
+ ldrh r4, [r4]
67566932 movw r3, #65535
6757
- cmp r2, r3
6758
- beq .L1169
6933
+ cmp r4, r3
6934
+ beq .L1163
67596935 ldr r3, [r6, #1036]
6760
- mov r4, #6
6936
+ mov r2, #6
67616937 add r5, r5, #1
6762
- mla r4, r4, r2, r3
6763
- ldr r3, .L1174+16
67646938 uxth r5, r5
6939
+ mla r4, r2, r4, r3
6940
+ ldr r3, .L1168+16
67656941 ldrh r3, [r3]
67666942 cmp r3, r5
6767
- bcs .L1172
6768
-.L1169:
6943
+ bcs .L1166
6944
+.L1163:
67696945 add sp, sp, #36
67706946 @ sp needed
6771
- ldmfd sp!, {r4, r5, r6, r7, pc}
6772
-.L1175:
6947
+ pop {r4, r5, r6, r7, r8, r9, pc}
6948
+.L1169:
67736949 .align 2
6774
-.L1174:
6775
- .word .LC107
6950
+.L1168:
6951
+ .word .LC104
67766952 .word .LANCHOR0
67776953 .word -1431655765
6778
- .word .LC108
6779
- .word .LANCHOR3-3068
6954
+ .word .LC105
6955
+ .word .LANCHOR3-3076
67806956 .fnend
67816957 .size print_list_info, .-print_list_info
67826958 .align 2
67836959 .global dump_all_list_info
6960
+ .syntax unified
6961
+ .arm
6962
+ .fpu softvfp
67846963 .type dump_all_list_info, %function
67856964 dump_all_list_info:
67866965 .fnstart
67876966 @ args = 0, pretend = 0, frame = 0
67886967 @ frame_needed = 0, uses_anonymous_args = 0
6789
- stmfd sp!, {r4, r5, r6, lr}
6790
- .save {r4, r5, r6, lr}
6791
- ldr r4, .L1178
6792
- ldr r5, .L1178+4
6968
+ push {r4, r5, r6, r7, r8, lr}
6969
+ .save {r4, r5, r6, r7, r8, lr}
6970
+ ldr r5, .L1172
6971
+ ldr r4, .L1172+4
6972
+ sub r6, r5, #3088
6973
+ sub r7, r5, #3072
6974
+ mov r0, r6
6975
+ sub r5, r5, #3104
67936976 add r1, r4, #2784
6794
- sub r6, r5, #3072
6795
- add r1, r1, #4
6796
- sub r0, r6, #8
67976977 bl print_list_info
67986978 add r1, r4, #2784
6799
- sub r0, r6, #4
6979
+ sub r0, r7, #12
6980
+ add r1, r1, #2
6981
+ bl print_list_info
6982
+ add r1, r4, #2784
6983
+ sub r0, r7, #8
6984
+ add r1, r1, #4
6985
+ bl print_list_info
6986
+ add r1, r4, #2784
6987
+ sub r0, r5, #12
68006988 add r1, r1, #6
68016989 bl print_list_info
68026990 add r1, r4, #2784
6803
- mov r0, r6
6991
+ mov r0, r5
68046992 add r1, r1, #8
6805
- bl print_list_info
6806
- sub r6, r5, #3088
6807
- add r1, r4, #2784
6808
- sub r0, r6, #4
6809
- add r1, r1, #10
6810
- bl print_list_info
6811
- add r1, r4, #2784
6812
- sub r0, r5, #3104
6813
- add r1, r1, #12
68146993 bl print_list_info
68156994 add r1, r4, #2784
68166995 sub r0, r6, #12
6817
- add r1, r1, #14
6818
- ldmfd sp!, {r4, r5, r6, lr}
6996
+ add r1, r1, #10
6997
+ pop {r4, r5, r6, r7, r8, lr}
68196998 b print_list_info
6820
-.L1179:
6999
+.L1173:
68217000 .align 2
6822
-.L1178:
6823
- .word .LANCHOR0
7001
+.L1172:
68247002 .word .LANCHOR3
7003
+ .word .LANCHOR0
68257004 .fnend
68267005 .size dump_all_list_info, .-dump_all_list_info
68277006 .align 2
68287007 .global ftl_tmp_into_update
7008
+ .syntax unified
7009
+ .arm
7010
+ .fpu softvfp
68297011 .type ftl_tmp_into_update, %function
68307012 ftl_tmp_into_update:
68317013 .fnstart
68327014 @ args = 0, pretend = 0, frame = 0
68337015 @ frame_needed = 0, uses_anonymous_args = 0
68347016 @ link register save eliminated.
6835
- ldr r3, .L1185
6836
- ldr r3, [r3, #2804]
7017
+ ldr r3, .L1179
7018
+ ldr r3, [r3, #2800]
68377019 ldr r2, [r3, #16]
68387020 cmp r2, #2048
6839
- movhi r0, r2, lsr #11
68407021 ldrhi r1, [r3, #20]
6841
- subhi r2, r2, r0, asl #11
7022
+ addhi r1, r1, r2, lsr #11
7023
+ ubfxhi r2, r2, #0, #11
68427024 strhi r2, [r3, #16]
68437025 ldr r2, [r3, #24]
6844
- addhi r1, r1, r0
68457026 strhi r1, [r3, #20]
68467027 cmp r2, #2048
6847
- movhi r0, r2, lsr #11
68487028 ldrhi r1, [r3, #28]
6849
- subhi r2, r2, r0, asl #11
7029
+ addhi r1, r1, r2, lsr #11
7030
+ ubfxhi r2, r2, #0, #11
68507031 strhi r2, [r3, #24]
68517032 ldr r2, [r3, #32]
6852
- addhi r1, r1, r0
68537033 strhi r1, [r3, #28]
68547034 cmp r2, #1024
6855
- movhi r0, r2, lsr #10
68567035 ldrhi r1, [r3, #36]
6857
- subhi r2, r2, r0, asl #10
7036
+ addhi r1, r1, r2, lsr #10
7037
+ ubfxhi r2, r2, #0, #10
68587038 strhi r2, [r3, #32]
68597039 ldr r2, [r3, #40]
6860
- addhi r1, r1, r0
68617040 strhi r1, [r3, #36]
68627041 cmp r2, #1024
6863
- movhi r0, r2, lsr #10
68647042 ldrhi r1, [r3, #44]
6865
- subhi r2, r2, r0, asl #10
7043
+ addhi r1, r1, r2, lsr #10
7044
+ ubfxhi r2, r2, #0, #10
68667045 strhi r2, [r3, #40]
6867
- addhi r1, r1, r0
68687046 strhi r1, [r3, #44]
68697047 bx lr
6870
-.L1186:
7048
+.L1180:
68717049 .align 2
6872
-.L1185:
7050
+.L1179:
68737051 .word .LANCHOR0
68747052 .fnend
68757053 .size ftl_tmp_into_update, .-ftl_tmp_into_update
68767054 .global __aeabi_idiv
68777055 .align 2
68787056 .global ftl_get_blk_list_in_sblk
7057
+ .syntax unified
7058
+ .arm
7059
+ .fpu softvfp
68797060 .type ftl_get_blk_list_in_sblk, %function
68807061 ftl_get_blk_list_in_sblk:
68817062 .fnstart
68827063 @ args = 0, pretend = 0, frame = 8
68837064 @ frame_needed = 0, uses_anonymous_args = 0
6884
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
7065
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
68857066 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
68867067 .pad #12
68877068 mov r5, #0
6888
- ldr r8, .L1197
7069
+ ldr r9, .L1189
68897070 mov r10, r0
6890
- ldr r9, .L1197+4
68917071 mov r6, r1
6892
- ldr r2, .L1197+8
68937072 mov r7, r5
6894
- ldr r4, [r8, #1080]
6895
- add r4, r4, r0, asl #2
6896
- ldrb r3, [r4, #3] @ zero_extendqisi2
6897
-.L1188:
6898
- ldrb r1, [r9, #-3123] @ zero_extendqisi2
7073
+ ldr r8, .L1189+4
7074
+ ldr r3, [r9, #1084]
7075
+ add r3, r3, r0, lsl #2
7076
+ ldrb r2, [r3, #3] @ zero_extendqisi2
7077
+ mov r3, r8
7078
+.L1182:
7079
+ ldrb r1, [r8, #-3127] @ zero_extendqisi2
68997080 cmp r7, r1
6900
- ldr r1, .L1197+4
6901
- bge .L1195
6902
- mov r1, r3, asr r7
7081
+ blt .L1185
7082
+ add r6, r6, r5, lsl #1
7083
+ mov r2, r5
7084
+ mvn r0, #0
7085
+.L1186:
7086
+ ldrb r1, [r3, #-3127] @ zero_extendqisi2
7087
+ cmp r2, r1
7088
+ blt .L1187
7089
+ mov r0, r5
7090
+ add sp, sp, #12
7091
+ @ sp needed
7092
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
7093
+.L1185:
7094
+ asr r1, r2, r7
69037095 tst r1, #1
6904
- bne .L1189
6905
- ldrb r4, [r9, #-3130] @ zero_extendqisi2
7096
+ bne .L1183
7097
+ ldrb r4, [r8, #-3136] @ zero_extendqisi2
69067098 mov r0, r7
6907
- str r2, [sp, #4]
6908
- mov fp, r5, asl #1
6909
- str r3, [sp]
7099
+ stm sp, {r2, r3}
7100
+ lsl fp, r5, #1
69107101 add r5, r5, #1
69117102 mov r1, r4
69127103 bl __aeabi_idiv
6913
- smulbb r4, r10, r4
6914
- ldrb r1, [r8, #1189] @ zero_extendqisi2
7104
+ ldr ip, .L1189+8
7105
+ smulbb r4, r4, r10
7106
+ ldrb r1, [r9, #1153] @ zero_extendqisi2
7107
+ ldm sp, {r2, r3}
7108
+ ldrh ip, [ip]
69157109 rsb r1, r1, #24
6916
- ldr r2, [sp, #4]
6917
- ldr r3, [sp]
6918
- ldrh ip, [r2]
6919
- rsb r1, ip, r1
6920
- add r0, r4, r0, asl r1
6921
- uxth r4, r0
6922
- strh r4, [r6, fp] @ movhi
6923
- ldrb r1, [r9, #-3130] @ zero_extendqisi2
7110
+ sub r1, r1, ip
7111
+ add r0, r4, r0, lsl r1
7112
+ uxth r0, r0
7113
+ strh r0, [r6, fp] @ movhi
7114
+ ldrb r1, [r8, #-3136] @ zero_extendqisi2
69247115 cmp r1, #1
69257116 subhi r1, r1, #1
69267117 andhi r1, r1, r7
6927
- addhi r4, r4, r1
6928
- strhih r4, [r6, fp] @ movhi
6929
-.L1189:
7118
+ addhi r0, r0, r1
7119
+ strhhi r0, [r6, fp] @ movhi
7120
+.L1183:
69307121 add r7, r7, #1
6931
- b .L1188
6932
-.L1195:
6933
- add r6, r6, r5, asl #1
6934
- mov r0, r5
6935
- mvn r2, #0
6936
-.L1192:
6937
- ldrb r3, [r1, #-3123] @ zero_extendqisi2
6938
- cmp r5, r3
6939
- strlth r2, [r6], #2 @ movhi
6940
- addlt r5, r5, #1
6941
- blt .L1192
6942
-.L1196:
6943
- add sp, sp, #12
6944
- @ sp needed
6945
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
6946
-.L1198:
7122
+ b .L1182
7123
+.L1187:
7124
+ strh r0, [r6], #2 @ movhi
7125
+ add r2, r2, #1
7126
+ b .L1186
7127
+.L1190:
69477128 .align 2
6948
-.L1197:
7129
+.L1189:
69497130 .word .LANCHOR0
69507131 .word .LANCHOR3
6951
- .word .LANCHOR3-3132
7132
+ .word .LANCHOR3-3138
69527133 .fnend
69537134 .size ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
69547135 .align 2
69557136 .global ftl_erase_phy_blk
7137
+ .syntax unified
7138
+ .arm
7139
+ .fpu softvfp
69567140 .type ftl_erase_phy_blk, %function
69577141 ftl_erase_phy_blk:
69587142 .fnstart
69597143 @ args = 0, pretend = 0, frame = 0
69607144 @ frame_needed = 0, uses_anonymous_args = 0
6961
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
6962
- .save {r3, r4, r5, r6, r7, lr}
7145
+ ldr r2, .L1197
7146
+ ldr r3, .L1197+4
7147
+ push {r4, r5, r6, r7, r8, lr}
7148
+ .save {r4, r5, r6, r7, r8, lr}
69637149 mov r6, r1
6964
- ldr r3, .L1205
6965
- ldrb r4, [r3, #1189] @ zero_extendqisi2
6966
- ldr r3, .L1205+4
6967
- rsb r4, r4, #24
6968
- sub r2, r3, #3120
6969
- sub r7, r3, #3056
6970
- ldrh r2, [r2, #-12]
6971
- rsb r4, r2, r4
6972
- mvn r2, #0
6973
- mov r5, r0, asr r4
6974
- bic r4, r0, r2, asl r4
6975
- ldrb r2, [r3, #-3122] @ zero_extendqisi2
6976
- uxtb r5, r5
7150
+ sub r1, r2, #3136
7151
+ sub r7, r2, #3072
7152
+ ldrb r3, [r3, #1153] @ zero_extendqisi2
7153
+ ldrh r4, [r1, #-2]
7154
+ rsb r3, r3, #24
7155
+ sub r3, r3, r4
7156
+ mvn r4, #0
7157
+ asr r5, r0, r3
7158
+ bic r4, r0, r4, lsl r3
7159
+ ldrb r3, [r2, #-3126] @ zero_extendqisi2
69777160 sxth r4, r4
6978
- cmp r2, #0
6979
- beq .L1200
6980
- ldrb r3, [r3, #-3121] @ zero_extendqisi2
7161
+ uxtb r5, r5
69817162 cmp r3, #0
6982
- bne .L1200
6983
- ldrh r2, [r7, #-10]
6984
- clz r1, r1
7163
+ beq .L1192
7164
+ ldrb r3, [r2, #-3125] @ zero_extendqisi2
7165
+ cmp r3, #0
7166
+ bne .L1192
7167
+ ldrh r2, [r7, #-2]
7168
+ clz r1, r6
7169
+ lsr r1, r1, #5
69857170 mov r0, r5
6986
- mov r1, r1, lsr #5
6987
- mul r2, r2, r4
7171
+ mul r2, r4, r2
69887172 bl flash_erase_block_en
6989
-.L1200:
6990
- ldrh r2, [r7, #-10]
6991
- mov r0, r5
7173
+.L1192:
7174
+ ldrh r2, [r7, #-2]
69927175 uxtb r1, r6
6993
- mul r2, r2, r4
6994
- ldmfd sp!, {r3, r4, r5, r6, r7, lr}
7176
+ mov r0, r5
7177
+ mul r2, r4, r2
7178
+ pop {r4, r5, r6, r7, r8, lr}
69957179 b flash_erase_block_en
6996
-.L1206:
7180
+.L1198:
69977181 .align 2
6998
-.L1205:
6999
- .word .LANCHOR0
7182
+.L1197:
70007183 .word .LANCHOR3
7184
+ .word .LANCHOR0
70017185 .fnend
70027186 .size ftl_erase_phy_blk, .-ftl_erase_phy_blk
70037187 .align 2
70047188 .global ftl_erase_sblk
7189
+ .syntax unified
7190
+ .arm
7191
+ .fpu softvfp
70057192 .type ftl_erase_sblk, %function
70067193 ftl_erase_sblk:
70077194 .fnstart
70087195 @ args = 0, pretend = 0, frame = 80
70097196 @ frame_needed = 0, uses_anonymous_args = 0
7010
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
7197
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
70117198 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
7012
- mov r10, r0, asl #2
7013
- ldr r4, .L1235
7014
- .pad #84
7015
- sub sp, sp, #84
7016
- ldr r9, .L1235+4
7199
+ lsl fp, r0, #2
7200
+ ldr r4, .L1224
70177201 mov r8, r0
70187202 mov r7, r1
70197203 mov r6, #0
7020
- ldr r3, [r4, #1080]
7021
- add r3, r3, r10
7204
+ ldr r9, .L1224+4
7205
+ .pad #84
7206
+ sub sp, sp, #84
7207
+ ldr r3, [r4, #1084]
7208
+ add r3, r3, fp
70227209 ldrb r3, [r3, #3] @ zero_extendqisi2
7023
- str r3, [sp, #12]
7024
-.L1208:
7025
- ldrb r3, [r9, #-3064] @ zero_extendqisi2
7210
+ str r3, [sp, #4]
7211
+.L1200:
7212
+ ldr r3, .L1224+4
7213
+ ldrb r3, [r3, #-3072] @ zero_extendqisi2
70267214 cmp r6, r3
7027
- bge .L1219
7028
- ldrb r2, [r9, #-3130] @ zero_extendqisi2
7215
+ bge .L1211
7216
+ ldr r3, .L1224+4
70297217 mov r5, #0
7030
- sub fp, r2, #1
7218
+ ldrb r2, [r3, #-3136] @ zero_extendqisi2
7219
+ sub r10, r2, #1
70317220 mul r3, r2, r8
70327221 mul ip, r2, r6
7033
- str r3, [sp, #4]
7034
- ldr r3, .L1235+8
7035
- ldrh r3, [r3]
70367222 str r3, [sp, #8]
7223
+ ldr r3, .L1224+8
7224
+ ldrh r3, [r3]
7225
+ str r3, [sp, #12]
70377226 mov r3, r5
7038
-.L1220:
7039
- cmp r3, r2
7040
- bge .L1234
7041
- ldr lr, [sp, #12]
7042
- add r1, r3, ip
7043
- mov r1, lr, asr r1
7227
+ b .L1212
7228
+.L1202:
7229
+ ldr lr, [sp, #4]
7230
+ add r1, ip, r3
7231
+ asr r1, lr, r1
70447232 tst r1, #1
7045
- bne .L1209
7046
- add r1, sp, #80
7047
- ldr r0, [sp, #4]
7048
- add lr, r1, r5, asl #2
7049
- and r1, r3, fp
7050
- add r1, r0, r1
7233
+ bne .L1201
70517234 ldr r0, [sp, #8]
7235
+ add r1, sp, #80
7236
+ add lr, r1, r5, lsl #2
7237
+ and r1, r3, r10
70527238 add r5, r5, #1
7239
+ add r1, r1, r0
7240
+ ldr r0, [sp, #12]
70537241 mul r1, r0, r1
70547242 str r1, [lr, #-64]
7055
-.L1209:
7243
+.L1201:
70567244 add r3, r3, #1
7057
- b .L1220
7058
-.L1234:
7245
+.L1212:
7246
+ cmp r3, r2
7247
+ blt .L1202
70597248 cmp r2, #4
7060
- bne .L1232
7061
- uxtb r3, r6
7062
- uxtb ip, r7
7063
- mov fp, #0
7064
-.L1211:
7065
- cmp fp, r5
7066
- beq .L1214
7067
- mov r0, r3
7249
+ bne .L1203
7250
+ uxtb r3, r7
7251
+ mov r10, #0
70687252 str r3, [sp, #8]
7069
- add r3, sp, #16
7070
- mov r1, ip
7071
- str ip, [sp, #4]
7072
- ldr r2, [r3, fp, asl #2]
7073
- add fp, fp, #1
7074
- bl flash_erase_block_en
7075
- ldr ip, [sp, #4]
7076
- ldr r3, [sp, #8]
7077
- b .L1211
7078
-.L1232:
7079
- cmp r5, #2
7080
- bne .L1215
7081
- ldr r3, .L1235+4
7082
- uxtb r5, r6
7083
- ldrb r3, [r3, #-3122] @ zero_extendqisi2
7084
- cmp r3, #0
7085
- beq .L1216
7086
- ldrb r3, [r9, #-3121] @ zero_extendqisi2
7087
- cmp r3, #0
7088
- bne .L1216
7089
- clz r1, r7
7090
- mov r0, r5
7091
- ldr r2, [sp, #16]
7092
- mov r1, r1, lsr #5
7093
- ldr r3, [sp, #20]
7094
- bl flash_erase_duplane_block
7095
-.L1216:
7096
- mov r0, r5
7097
- uxtb r1, r7
7098
- ldr r2, [sp, #16]
7099
- ldr r3, [sp, #20]
7100
- bl flash_erase_duplane_block
7101
- b .L1214
7102
-.L1215:
7103
- cmp r5, #1
7104
- bne .L1214
7105
- ldr r3, .L1235+4
7106
- uxtb r5, r6
7107
- ldrb r3, [r3, #-3122] @ zero_extendqisi2
7108
- cmp r3, #0
7109
- beq .L1218
7110
- ldrb r3, [r9, #-3121] @ zero_extendqisi2
7111
- cmp r3, #0
7112
- bne .L1218
7113
- clz r1, r7
7114
- mov r0, r5
7115
- ldr r2, [sp, #16]
7116
- mov r1, r1, lsr #5
7117
- bl flash_erase_block_en
7118
-.L1218:
7119
- mov r0, r5
7120
- uxtb r1, r7
7121
- ldr r2, [sp, #16]
7122
- bl flash_erase_block_en
7123
-.L1214:
7253
+ uxtb r3, r6
7254
+.L1204:
7255
+ cmp r10, r5
7256
+ bne .L1205
7257
+.L1206:
71247258 add r6, r6, #1
7125
- b .L1208
7126
-.L1219:
7259
+ b .L1200
7260
+.L1205:
7261
+ add r2, sp, #16
7262
+ mov r0, r3
7263
+ ldr r2, [r2, r10, lsl #2]
7264
+ add r10, r10, #1
7265
+ ldr r1, [sp, #8]
7266
+ str r3, [sp, #12]
7267
+ bl flash_erase_block_en
7268
+ ldr r3, [sp, #12]
7269
+ b .L1204
7270
+.L1203:
7271
+ cmp r5, #2
7272
+ bne .L1207
7273
+ ldrb r3, [r9, #-3126] @ zero_extendqisi2
7274
+ uxtb r5, r6
7275
+ cmp r3, #0
7276
+ beq .L1208
7277
+ ldrb r3, [r9, #-3125] @ zero_extendqisi2
7278
+ cmp r3, #0
7279
+ bne .L1208
7280
+ clz r1, r7
7281
+ ldr r3, [sp, #20]
7282
+ ldr r2, [sp, #16]
7283
+ lsr r1, r1, #5
7284
+ mov r0, r5
7285
+ bl flash_erase_duplane_block
7286
+.L1208:
7287
+ ldr r3, [sp, #20]
7288
+ uxtb r1, r7
7289
+ ldr r2, [sp, #16]
7290
+ mov r0, r5
7291
+ bl flash_erase_duplane_block
7292
+ b .L1206
7293
+.L1207:
7294
+ cmp r5, #1
7295
+ bne .L1206
7296
+ ldrb r3, [r9, #-3126] @ zero_extendqisi2
7297
+ uxtb r5, r6
7298
+ cmp r3, #0
7299
+ beq .L1210
7300
+ ldrb r3, [r9, #-3125] @ zero_extendqisi2
7301
+ cmp r3, #0
7302
+ bne .L1210
7303
+ clz r1, r7
7304
+ ldr r2, [sp, #16]
7305
+ lsr r1, r1, #5
7306
+ mov r0, r5
7307
+ bl flash_erase_block_en
7308
+.L1210:
7309
+ ldr r2, [sp, #16]
7310
+ uxtb r1, r7
7311
+ mov r0, r5
7312
+ bl flash_erase_block_en
7313
+ b .L1206
7314
+.L1211:
71277315 cmp r7, #0
7128
- ldr r1, [r4, #1080]
7129
- bne .L1221
7130
- ldrh r3, [r1, r10]
7131
- ubfx r2, r3, #0, #11
7132
- add r2, r2, #1
7133
- bfi r3, r2, #0, #11
7134
- strh r3, [r1, r10] @ movhi
7135
- ldr r3, [r4, #2804]
7316
+ bne .L1213
7317
+ ldr r2, [r4, #1084]
7318
+ ldrh r3, [r2, fp]
7319
+ add r1, r3, #1
7320
+ bfi r3, r1, #0, #11
7321
+ strh r3, [r2, fp] @ movhi
7322
+ ldr r3, [r4, #2800]
71367323 ldr r2, [r3, #84]
71377324 ldrh r0, [r3, #96]
71387325 add r2, r2, #1
71397326 str r2, [r3, #84]
7140
- ldr r2, [r4, #1080]
7141
- ldrh r2, [r2, r10]
7327
+ ldr r2, [r4, #1084]
7328
+ ldrh r2, [r2, fp]
71427329 ubfx r2, r2, #0, #11
71437330 uxth r1, r2
71447331 cmp r0, r1
7145
- strlth r2, [r3, #96] @ movhi
7146
- b .L1223
7147
-.L1221:
7148
- ldr r3, [r1, r8, asl #2]
7332
+ strhlt r2, [r3, #96] @ movhi
7333
+.L1215:
7334
+ mov r0, #0
7335
+ add sp, sp, #84
7336
+ @ sp needed
7337
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
7338
+.L1213:
7339
+ ldr r1, [r4, #1084]
7340
+ ldr r3, [r1, r8, lsl #2]
71497341 ubfx r2, r3, #11, #8
71507342 add r2, r2, #1
71517343 bfi r3, r2, #11, #8
7152
- str r3, [r1, r8, asl #2]
7153
- ldr r3, [r4, #2804]
7344
+ str r3, [r1, r8, lsl #2]
7345
+ ldr r3, [r4, #2800]
71547346 ldr r2, [r3, #80]
71557347 ldrh r1, [r3, #98]
71567348 add r2, r2, #1
71577349 str r2, [r3, #80]
7158
- ldr r2, [r4, #1080]
7159
- ldr r2, [r2, r8, asl #2]
7350
+ ldr r2, [r4, #1084]
7351
+ ldr r2, [r2, r8, lsl #2]
71607352 ubfx r2, r2, #11, #8
71617353 cmp r1, r2
7162
- strcch r2, [r3, #98] @ movhi
7163
-.L1223:
7164
- mov r0, #0
7165
- add sp, sp, #84
7166
- @ sp needed
7167
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
7168
-.L1236:
7354
+ strhcc r2, [r3, #98] @ movhi
7355
+ b .L1215
7356
+.L1225:
71697357 .align 2
7170
-.L1235:
7358
+.L1224:
71717359 .word .LANCHOR0
71727360 .word .LANCHOR3
7173
- .word .LANCHOR3-3066
7361
+ .word .LANCHOR3-3074
71747362 .fnend
71757363 .size ftl_erase_sblk, .-ftl_erase_sblk
71767364 .align 2
71777365 .global ftl_alloc_sys_blk
7366
+ .syntax unified
7367
+ .arm
7368
+ .fpu softvfp
71787369 .type ftl_alloc_sys_blk, %function
71797370 ftl_alloc_sys_blk:
71807371 .fnstart
71817372 @ args = 0, pretend = 0, frame = 0
71827373 @ frame_needed = 0, uses_anonymous_args = 0
7183
- ldr r3, .L1248
7184
- stmfd sp!, {r4, lr}
7374
+ ldr r3, .L1236
7375
+ push {r4, lr}
71857376 .save {r4, lr}
7186
- ldr r2, [r3, #2804]
71877377 mov r4, r3
7378
+ ldr r2, [r3, #2800]
71887379 ldrh r1, [r2, #136]
71897380 cmp r1, #63
71907381 movhi r3, #0
7191
- strhih r3, [r2, #136] @ movhi
7382
+ strhhi r3, [r2, #136] @ movhi
71927383 ldrh r3, [r2, #112]
71937384 cmp r3, #0
7194
- bne .L1239
7195
- ldr r1, .L1248+4
7385
+ bne .L1228
71967386 movw r2, #1359
7197
- ldr r0, .L1248+8
7387
+ ldr r1, .L1236+4
7388
+ ldr r0, .L1236+8
71987389 bl printk
71997390 bl dump_stack
7200
-.L1239:
7201
- ldr r3, [r4, #2804]
7391
+.L1228:
7392
+ ldr r3, [r4, #2800]
72027393 movw lr, #65535
72037394 mov ip, #0
7204
-.L1243:
7395
+.L1232:
72057396 ldrh r2, [r3, #136]
7206
- add r1, r2, #79
7207
- add r1, r3, r1, asl #1
7208
-.L1240:
7397
+ add r1, r3, r2, lsl #1
7398
+ add r1, r1, #158
7399
+.L1229:
72097400 cmp r2, #63
7210
- bgt .L1247
7401
+ strhgt ip, [r3, #136] @ movhi
7402
+ bgt .L1232
7403
+.L1231:
72117404 ldrh r0, [r1, #2]!
72127405 cmp r0, lr
7213
- bne .L1245
7214
- add r2, r2, #1
7215
- b .L1240
7216
-.L1247:
7217
- strh ip, [r3, #136] @ movhi
7218
- b .L1243
7219
-.L1245:
7220
- add r1, r3, r2, asl #1
7406
+ addeq r2, r2, #1
7407
+ beq .L1229
7408
+.L1234:
7409
+ add r1, r3, r2, lsl #1
72217410 mvn ip, #0
72227411 strh ip, [r1, #160] @ movhi
72237412 strh r2, [r3, #136] @ movhi
72247413 ldrh r2, [r3, #112]
72257414 add r2, r2, ip
72267415 strh r2, [r3, #112] @ movhi
7227
- ldmfd sp!, {r4, pc}
7228
-.L1249:
7416
+ pop {r4, pc}
7417
+.L1237:
72297418 .align 2
7230
-.L1248:
7419
+.L1236:
72317420 .word .LANCHOR0
7232
- .word .LANCHOR1+1640
7421
+ .word .LANCHOR1+1479
72337422 .word .LC0
72347423 .fnend
72357424 .size ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
72367425 .align 2
72377426 .global ftl_free_sys_blk
7427
+ .syntax unified
7428
+ .arm
7429
+ .fpu softvfp
72387430 .type ftl_free_sys_blk, %function
72397431 ftl_free_sys_blk:
72407432 .fnstart
72417433 @ args = 0, pretend = 0, frame = 0
72427434 @ frame_needed = 0, uses_anonymous_args = 0
7243
- stmfd sp!, {r3, r4, r5, lr}
7244
- .save {r3, r4, r5, lr}
7435
+ ldr r3, .L1247
7436
+ push {r4, r5, r6, lr}
7437
+ .save {r4, r5, r6, lr}
72457438 mov r5, r0
7246
- ldr r3, .L1260
7247
- ldr r2, [r3, #2804]
72487439 mov r4, r3
7440
+ ldr r2, [r3, #2800]
72497441 ldrh r1, [r2, #138]
72507442 cmp r1, #63
72517443 movhi r3, #0
7252
- strhih r3, [r2, #138] @ movhi
7444
+ strhhi r3, [r2, #138] @ movhi
72537445 ldrh r3, [r2, #112]
72547446 cmp r3, #63
7255
- bls .L1252
7256
- ldr r1, .L1260+4
7447
+ bls .L1240
72577448 movw r2, #1386
7258
- ldr r0, .L1260+8
7449
+ ldr r1, .L1247+4
7450
+ ldr r0, .L1247+8
72597451 bl printk
72607452 bl dump_stack
7261
-.L1252:
7262
- ldr r3, [r4, #2804]
7453
+.L1240:
7454
+ ldr r3, [r4, #2800]
72637455 movw ip, #65535
72647456 mov r0, #0
7265
-.L1256:
7457
+.L1244:
72667458 ldrh r2, [r3, #138]
7267
- add r1, r2, #79
7268
- add r1, r3, r1, asl #1
7269
-.L1253:
7459
+ add r1, r3, r2, lsl #1
7460
+ add r1, r1, #158
7461
+.L1241:
72707462 cmp r2, #63
7271
- bgt .L1259
7463
+ strhgt r0, [r3, #138] @ movhi
7464
+ bgt .L1244
7465
+.L1243:
72727466 ldrh lr, [r1, #2]!
72737467 cmp lr, ip
7274
- bne .L1254
7275
- add r1, r3, r2, asl #1
7468
+ bne .L1242
7469
+ add r1, r3, r2, lsl #1
72767470 strh r5, [r1, #160] @ movhi
72777471 strh r2, [r3, #138] @ movhi
72787472 ldrh r2, [r3, #112]
72797473 add r2, r2, #1
72807474 strh r2, [r3, #112] @ movhi
7281
- ldmfd sp!, {r3, r4, r5, pc}
7282
-.L1254:
7475
+ pop {r4, r5, r6, pc}
7476
+.L1242:
72837477 add r2, r2, #1
7284
- b .L1253
7285
-.L1259:
7286
- strh r0, [r3, #138] @ movhi
7287
- b .L1256
7288
-.L1261:
7478
+ b .L1241
7479
+.L1248:
72897480 .align 2
7290
-.L1260:
7481
+.L1247:
72917482 .word .LANCHOR0
7292
- .word .LANCHOR1+1660
7483
+ .word .LANCHOR1+1497
72937484 .word .LC0
72947485 .fnend
72957486 .size ftl_free_sys_blk, .-ftl_free_sys_blk
72967487 .align 2
72977488 .global ftl_info_data_recovery
7489
+ .syntax unified
7490
+ .arm
7491
+ .fpu softvfp
72987492 .type ftl_info_data_recovery, %function
72997493 ftl_info_data_recovery:
73007494 .fnstart
73017495 @ args = 0, pretend = 0, frame = 0
73027496 @ frame_needed = 0, uses_anonymous_args = 0
7303
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
7497
+ push {r4, r5, r6, r7, r8, lr}
73047498 .save {r4, r5, r6, r7, r8, lr}
73057499 movw r3, #65535
73067500 ldrh r6, [r0]
73077501 cmp r6, r3
7308
- ldmeqfd sp!, {r4, r5, r6, r7, r8, pc}
7309
- ldr r4, .L1272
7310
- mov r8, r6, asl #2
7311
- ldr r5, [r4, #1080]
7502
+ popeq {r4, r5, r6, r7, r8, pc}
7503
+ ldr r4, .L1259
7504
+ lsl r8, r6, #2
7505
+ ldr r5, [r4, #1084]
73127506 add r7, r5, r8
73137507 ldrb r3, [r7, #2] @ zero_extendqisi2
73147508 tst r3, #224
7315
- ldmnefd sp!, {r4, r5, r6, r7, r8, pc}
7509
+ popne {r4, r5, r6, r7, r8, pc}
73167510 ldrb r2, [r0, #4] @ zero_extendqisi2
73177511 mov r0, r6
73187512 bfi r3, r2, #5, #3
73197513 strb r3, [r7, #2]
73207514 bl zftl_remove_free_node
73217515 ldrb r3, [r7, #2] @ zero_extendqisi2
7322
- ldr r2, [r4, #2804]
7516
+ ldr r2, [r4, #2800]
73237517 tst r3, #8
7324
- ldrneh r3, [r2, #116]
7518
+ ldrhne r3, [r2, #116]
73257519 subne r3, r3, #1
7326
- strneh r3, [r2, #116] @ movhi
7327
- bne .L1267
7520
+ strhne r3, [r2, #116] @ movhi
7521
+ bne .L1254
73287522 tst r3, #24
7329
- ldreqh r3, [r2, #114]
7330
- ldrneh r3, [r2, #118]
7523
+ ldrheq r3, [r2, #114]
7524
+ ldrhne r3, [r2, #118]
73317525 subeq r3, r3, #1
73327526 subne r3, r3, #1
7333
- streqh r3, [r2, #114] @ movhi
7334
- strneh r3, [r2, #118] @ movhi
7335
-.L1267:
7527
+ strheq r3, [r2, #114] @ movhi
7528
+ strhne r3, [r2, #118] @ movhi
7529
+.L1254:
73367530 ldrb r3, [r7, #2] @ zero_extendqisi2
73377531 and r3, r3, #224
73387532 cmp r3, #160
7339
- bne .L1269
7340
- ldr r3, [r5, r6, asl #2]
7533
+ bne .L1256
7534
+ ldr r3, [r5, r6, lsl #2]
73417535 ubfx r2, r3, #11, #8
73427536 add r2, r2, #1
73437537 bfi r3, r2, #11, #8
7344
- str r3, [r5, r6, asl #2]
7345
- ldr r2, [r4, #2804]
7538
+ str r3, [r5, r6, lsl #2]
7539
+ ldr r2, [r4, #2800]
73467540 ldrh r3, [r2, #120]
73477541 sub r3, r3, #1
73487542 strh r3, [r2, #120] @ movhi
7349
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
7350
-.L1269:
7543
+ pop {r4, r5, r6, r7, r8, pc}
7544
+.L1256:
73517545 ldrh r2, [r5, r8]
73527546 cmp r3, #64
7353
- ubfx r1, r2, #0, #11
7354
- add r1, r1, #1
7547
+ add r1, r2, #1
73557548 bfi r2, r1, #0, #11
73567549 strh r2, [r5, r8] @ movhi
7357
- bne .L1270
7358
- ldr r2, [r4, #2804]
7550
+ bne .L1257
7551
+ ldr r2, [r4, #2800]
73597552 ldrh r3, [r2, #122]
73607553 sub r3, r3, #1
73617554 strh r3, [r2, #122] @ movhi
7362
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
7363
-.L1270:
7555
+ pop {r4, r5, r6, r7, r8, pc}
7556
+.L1257:
73647557 cmp r3, #96
7365
- ldreq r2, [r4, #2804]
7366
- ldreqh r3, [r2, #124]
7558
+ ldreq r2, [r4, #2800]
7559
+ ldrheq r3, [r2, #124]
73677560 subeq r3, r3, #1
7368
- streqh r3, [r2, #124] @ movhi
7369
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
7370
-.L1273:
7561
+ strheq r3, [r2, #124] @ movhi
7562
+ pop {r4, r5, r6, r7, r8, pc}
7563
+.L1260:
73717564 .align 2
7372
-.L1272:
7565
+.L1259:
73737566 .word .LANCHOR0
73747567 .fnend
73757568 .size ftl_info_data_recovery, .-ftl_info_data_recovery
73767569 .align 2
73777570 .global ftl_get_ppa_from_index
7571
+ .syntax unified
7572
+ .arm
7573
+ .fpu softvfp
73787574 .type ftl_get_ppa_from_index, %function
73797575 ftl_get_ppa_from_index:
73807576 .fnstart
73817577 @ args = 0, pretend = 0, frame = 0
73827578 @ frame_needed = 0, uses_anonymous_args = 0
7383
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
7384
- .save {r3, r4, r5, r6, r7, lr}
7579
+ ldr r3, .L1266
7580
+ push {r4, r5, r6, r7, r8, lr}
7581
+ .save {r4, r5, r6, r7, r8, lr}
73857582 mov r4, r0
7386
- ldr r3, .L1279
7387
- ldr r2, .L1279+4
7388
- ldr r5, [r3, #1092]
7389
- sub r3, r2, #3088
7390
- ldrb r2, [r2, #-3123] @ zero_extendqisi2
7391
- ldrh r3, [r3, #-8]
7392
- mul r1, r2, r3
7583
+ ldr r5, [r3, #1096]
7584
+ ldr r3, .L1266+4
7585
+ sub r2, r3, #3088
7586
+ ldrb r3, [r3, #-3127] @ zero_extendqisi2
7587
+ ldrh r2, [r2, #-8]
7588
+ mul r1, r3, r2
73937589 cmp r0, r1
7590
+ smulbbge r3, r3, r2
73947591 addlt r5, r5, #16
73957592 addge r5, r5, #48
7396
- smulbbge r3, r2, r3
73977593 ldrb r6, [r5, #9] @ zero_extendqisi2
7398
- rsbge r4, r3, r0
7399
- mov r1, r6
7594
+ subge r4, r0, r3
74007595 uxthge r4, r4
7596
+ mov r1, r6
74017597 mov r0, r4
74027598 bl __aeabi_idiv
7403
- movw r3, #65535
74047599 smulbb r6, r0, r6
7600
+ movw r3, #65535
74057601 mov r7, r0
7406
- rsb r4, r6, r4
7602
+ sub r4, r4, r6
74077603 uxth r4, r4
7408
- add r5, r5, r4, asl #1
7409
- ldrh r4, [r5, #16]
7604
+ add r4, r5, r4, lsl #1
7605
+ ldrh r4, [r4, #16]
74107606 cmp r4, r3
7411
- bne .L1277
7412
- ldr r1, .L1279+8
7607
+ bne .L1264
74137608 movw r2, #1945
7414
- ldr r0, .L1279+12
7609
+ ldr r1, .L1266+8
7610
+ ldr r0, .L1266+12
74157611 bl printk
74167612 bl dump_stack
7417
-.L1277:
7418
- ldr r3, .L1279+16
7419
- ldrh r0, [r3, #-10]
7420
- mla r0, r0, r4, r7
7421
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
7422
-.L1280:
7613
+.L1264:
7614
+ ldr r3, .L1266+16
7615
+ ldrh r0, [r3, #-2]
7616
+ mla r0, r4, r0, r7
7617
+ pop {r4, r5, r6, r7, r8, pc}
7618
+.L1267:
74237619 .align 2
7424
-.L1279:
7620
+.L1266:
74257621 .word .LANCHOR0
74267622 .word .LANCHOR3
7427
- .word .LANCHOR1+1680
7623
+ .word .LANCHOR1+1514
74287624 .word .LC0
7429
- .word .LANCHOR3-3056
7625
+ .word .LANCHOR3-3072
74307626 .fnend
74317627 .size ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
74327628 .align 2
74337629 .global lpa_hash_get_ppa
7630
+ .syntax unified
7631
+ .arm
7632
+ .fpu softvfp
74347633 .type lpa_hash_get_ppa, %function
74357634 lpa_hash_get_ppa:
74367635 .fnstart
74377636 @ args = 0, pretend = 0, frame = 0
74387637 @ frame_needed = 0, uses_anonymous_args = 0
7638
+ ldr r2, .L1276
74397639 uxtb r3, r0
7440
- ldr r2, .L1287
7441
- ldr r1, .L1287+4
7442
- mov r3, r3, asl #1
7640
+ lsl r3, r3, #1
7641
+ sub r1, r2, #3056
7642
+ ldr ip, [r2, #-2552]
7643
+ sub r1, r1, #14
7644
+ ldrh r3, [r1, r3]
7645
+ ldr r1, [r2, #-2556]
7646
+ movw r2, #65535
7647
+ cmp r3, r2
7648
+ bne .L1275
7649
+ mvn r0, #0
7650
+ bx lr
7651
+.L1270:
7652
+ lsl r3, r3, #1
7653
+ ldrh r3, [ip, r3]
7654
+ cmp r3, r2
7655
+ bne .L1271
7656
+ mvn r0, #0
7657
+ ldr pc, [sp], #4
7658
+.L1275:
74437659 str lr, [sp, #-4]!
74447660 .save {lr}
7445
- ldrh r3, [r1, r3]
7446
- ldr ip, [r2, #-2544]
7447
- ldr r1, [r2, #-2548]
7448
- movw r2, #65535
7449
-.L1282:
7450
- cmp r3, r2
7451
- beq .L1286
7452
- ldr lr, [r1, r3, asl #2]
7453
- cmp lr, r0
7454
- bne .L1283
7661
+.L1271:
7662
+ ldr lr, [r1, r3, lsl #2]
7663
+ cmp r0, lr
7664
+ bne .L1270
74557665 mov r0, r3
74567666 ldr lr, [sp], #4
74577667 b ftl_get_ppa_from_index
7458
-.L1283:
7459
- mov r3, r3, asl #1
7460
- ldrh r3, [ip, r3]
7461
- b .L1282
7462
-.L1286:
7463
- mvn r0, #0
7464
- ldr pc, [sp], #4
7465
-.L1288:
7668
+.L1277:
74667669 .align 2
7467
-.L1287:
7670
+.L1276:
74687671 .word .LANCHOR3
7469
- .word .LANCHOR3-3060
74707672 .fnend
74717673 .size lpa_hash_get_ppa, .-lpa_hash_get_ppa
74727674 .align 2
74737675 .global ftl_get_new_free_page
7676
+ .syntax unified
7677
+ .arm
7678
+ .fpu softvfp
74747679 .type ftl_get_new_free_page, %function
74757680 ftl_get_new_free_page:
74767681 .fnstart
74777682 @ args = 0, pretend = 0, frame = 0
74787683 @ frame_needed = 0, uses_anonymous_args = 0
7479
- stmfd sp!, {r4, lr}
7684
+ push {r4, lr}
74807685 .save {r4, lr}
74817686 movw r3, #65535
74827687 ldrh r2, [r0]
74837688 mov r4, r0
74847689 cmp r2, r3
7485
- bne .L1290
7486
- ldr r1, .L1299
7690
+ bne .L1279
74877691 movw r2, #2088
7488
- ldr r0, .L1299+4
7692
+ ldr r1, .L1287
7693
+ ldr r0, .L1287+4
74897694 bl printk
74907695 bl dump_stack
7491
-.L1290:
7492
- ldr r3, .L1299+8
7696
+.L1279:
7697
+ ldr r3, .L1287+8
74937698 ldrh r2, [r4, #2]
74947699 ldrh r3, [r3, #-8]
74957700 cmp r2, r3
7496
- bne .L1291
7497
- ldr r1, .L1299
7701
+ bne .L1280
74987702 movw r2, #2089
7499
- ldr r0, .L1299+4
7703
+ ldr r1, .L1287
7704
+ ldr r0, .L1287+4
75007705 bl printk
75017706 bl dump_stack
7502
-.L1291:
7707
+.L1280:
75037708 ldrh r3, [r4, #6]
75047709 cmp r3, #0
7505
- bne .L1292
7506
- ldr r1, .L1299
7710
+ bne .L1281
75077711 movw r2, #2090
7508
- ldr r0, .L1299+4
7712
+ ldr r1, .L1287
7713
+ ldr r0, .L1287+4
75097714 bl printk
75107715 bl dump_stack
7511
-.L1292:
7716
+.L1281:
75127717 ldrb r3, [r4, #5] @ zero_extendqisi2
75137718 movw r2, #65535
7514
- ldr r1, .L1299+12
7515
- mov lr, #0
7516
- add r3, r4, r3, asl #1
7517
- ldrb r0, [r1, #-3123] @ zero_extendqisi2
7518
- ldrh ip, [r3, #16]
7519
-.L1293:
7520
- cmp ip, r2
7719
+ mov r1, #0
7720
+ add r3, r4, r3, lsl #1
7721
+ ldrh r0, [r3, #16]
7722
+ ldr r3, .L1287+12
7723
+ ldrb ip, [r3, #-3127] @ zero_extendqisi2
7724
+.L1282:
7725
+ cmp r0, r2
75217726 ldrb r3, [r4, #5] @ zero_extendqisi2
7522
- bne .L1298
7727
+ beq .L1284
7728
+ ldr r1, .L1287+16
75237729 add r3, r3, #1
7524
- uxtb r3, r3
7525
- strb r3, [r4, #5]
7526
- cmp r3, r0
7527
- streqb lr, [r4, #5]
7528
- ldreqh r3, [r4, #2]
7529
- addeq r3, r3, #1
7530
- streqh r3, [r4, #2] @ movhi
7531
- ldrb r3, [r4, #5] @ zero_extendqisi2
7532
- add r3, r4, r3, asl #1
7533
- ldrh ip, [r3, #16]
7534
- b .L1293
7535
-.L1298:
7536
- ldr r0, .L1299+16
7537
- add r3, r3, #1
7538
- ldrb r1, [r1, #-3123] @ zero_extendqisi2
75397730 uxtb r3, r3
75407731 ldrh r2, [r4, #2]
7541
- ldrh r0, [r0, #-10]
7542
- cmp r1, r3
7732
+ ldrh r1, [r1, #-2]
7733
+ cmp ip, r3
75437734 strb r3, [r4, #5]
7735
+ addeq r3, r2, #1
7736
+ strheq r3, [r4, #2] @ movhi
75447737 moveq r3, #0
7545
- streqb r3, [r4, #5]
7546
- mul r0, r0, ip
7547
- ldrh ip, [r4, #6]
7548
- sub ip, ip, #1
7549
- strh ip, [r4, #6] @ movhi
7550
- ldrh ip, [r4, #10]
7738
+ strbeq r3, [r4, #5]
7739
+ mul r0, r0, r1
7740
+ ldrh r1, [r4, #6]
7741
+ sub r1, r1, #1
7742
+ strh r1, [r4, #6] @ movhi
75517743 orr r0, r0, r2
7552
- addeq r2, r2, #1
7553
- streqh r2, [r4, #2] @ movhi
7554
- add ip, ip, #1
7555
- strh ip, [r4, #10] @ movhi
7556
- ldmfd sp!, {r4, pc}
7557
-.L1300:
7744
+ ldrh r1, [r4, #10]
7745
+ add r1, r1, #1
7746
+ strh r1, [r4, #10] @ movhi
7747
+ pop {r4, pc}
7748
+.L1284:
7749
+ add r3, r3, #1
7750
+ uxtb r3, r3
7751
+ cmp r3, ip
7752
+ strb r3, [r4, #5]
7753
+ ldrheq r3, [r4, #2]
7754
+ strbeq r1, [r4, #5]
7755
+ addeq r3, r3, #1
7756
+ strheq r3, [r4, #2] @ movhi
7757
+ ldrb r3, [r4, #5] @ zero_extendqisi2
7758
+ add r3, r4, r3, lsl #1
7759
+ ldrh r0, [r3, #16]
7760
+ b .L1282
7761
+.L1288:
75587762 .align 2
7559
-.L1299:
7560
- .word .LANCHOR1+1704
7763
+.L1287:
7764
+ .word .LANCHOR1+1537
75617765 .word .LC0
75627766 .word .LANCHOR3-3088
75637767 .word .LANCHOR3
7564
- .word .LANCHOR3-3056
7768
+ .word .LANCHOR3-3072
75657769 .fnend
75667770 .size ftl_get_new_free_page, .-ftl_get_new_free_page
75677771 .align 2
75687772 .global ftl_ext_alloc_new_blk
7773
+ .syntax unified
7774
+ .arm
7775
+ .fpu softvfp
75697776 .type ftl_ext_alloc_new_blk, %function
75707777 ftl_ext_alloc_new_blk:
75717778 .fnstart
75727779 @ args = 0, pretend = 0, frame = 0
75737780 @ frame_needed = 0, uses_anonymous_args = 0
7574
- stmfd sp!, {r3, r4, r5, lr}
7575
- .save {r3, r4, r5, lr}
7781
+ push {r4, r5, r6, lr}
7782
+ .save {r4, r5, r6, lr}
75767783 bl ftl_alloc_sys_blk
7577
- movw r2, #65533
75787784 sub r3, r0, #1
7579
- mov r4, r0
7785
+ movw r2, #65533
75807786 uxth r3, r3
7787
+ mov r4, r0
75817788 cmp r3, r2
7582
- bls .L1302
7583
- ldr r1, .L1304
7789
+ bls .L1290
75847790 movw r2, #2125
7585
- ldr r0, .L1304+4
7791
+ ldr r1, .L1292
7792
+ ldr r0, .L1292+4
75867793 bl printk
75877794 bl dump_stack
7588
-.L1302:
7589
- ldr r5, .L1304+8
7795
+.L1290:
7796
+ ldr r5, .L1292+8
75907797 mov r1, #0
75917798 mov r0, r4
75927799 bl ftl_erase_phy_blk
7593
- ldr r3, [r5, #2804]
7800
+ ldr r3, [r5, #2800]
75947801 ldrh r0, [r3, #130]
75957802 bl ftl_free_sys_blk
7596
- ldr r3, [r5, #2804]
7803
+ ldr r3, [r5, #2800]
75977804 mov r0, #0
75987805 strh r4, [r3, #130] @ movhi
75997806 strh r0, [r3, #140] @ movhi
7600
- ldmfd sp!, {r3, r4, r5, pc}
7601
-.L1305:
7807
+ pop {r4, r5, r6, pc}
7808
+.L1293:
76027809 .align 2
7603
-.L1304:
7604
- .word .LANCHOR1+1728
7810
+.L1292:
7811
+ .word .LANCHOR1+1559
76057812 .word .LC0
76067813 .word .LANCHOR0
76077814 .fnend
76087815 .size ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
76097816 .align 2
76107817 .global ftl_total_vpn_update
7818
+ .syntax unified
7819
+ .arm
7820
+ .fpu softvfp
76117821 .type ftl_total_vpn_update, %function
76127822 ftl_total_vpn_update:
76137823 .fnstart
76147824 @ args = 0, pretend = 0, frame = 0
76157825 @ frame_needed = 0, uses_anonymous_args = 0
7616
- ldr r2, .L1319
7617
- ldrh r3, [r2, #-12]
7826
+ ldr r2, .L1308
7827
+ ldrh r3, [r2, #-4]
76187828 cmp r3, #4
76197829 cmpls r0, #0
7620
- addeq r3, r3, #1
7621
- streqh r3, [r2, #-12] @ movhi
7622
- bxeq lr
7623
- ldr r3, .L1319+4
7624
- movw ip, #1076
7625
- stmfd sp!, {r4, r5, r6, lr}
7626
- .save {r4, r5, r6, lr}
7830
+ bne .L1295
7831
+ add r3, r3, #1
7832
+ strh r3, [r2, #-4] @ movhi
7833
+ bx lr
7834
+.L1295:
7835
+ ldr r3, .L1308+4
76277836 mov r0, #0
7628
- ldrh lr, [r3, ip]
7837
+ movw ip, #1080
7838
+ push {r4, r5, r6, lr}
7839
+ .save {r4, r5, r6, lr}
7840
+ strh r0, [r2, #-4] @ movhi
76297841 movw r6, #65535
7630
- strh r0, [r2, #-12] @ movhi
7842
+ ldrh lr, [r3, ip]
76317843 mov ip, r0
7632
- ldr r1, [r3, #1088]
7633
- ldr r2, [r3, #1080]
7844
+ ldr r2, [r3, #1084]
7845
+ ldr r1, [r3, #1092]
7846
+ add lr, r2, lr, lsl #2
76347847 sub r1, r1, #2
7635
- add lr, r2, lr, asl #2
7636
-.L1309:
7848
+.L1297:
76377849 cmp r2, lr
7638
- beq .L1318
7850
+ bne .L1300
7851
+ ldr r4, [r3, #1096]
7852
+ ldr r3, [r3, #2800]
7853
+ str ip, [r4, #524]
7854
+ str r0, [r4, #528]
7855
+ ldrh r1, [r3, #120]
7856
+ cmp r1, #0
7857
+ popeq {r4, r5, r6, pc}
7858
+ bl __aeabi_uidiv
7859
+ str r0, [r4, #532]
7860
+ pop {r4, r5, r6, pc}
7861
+.L1300:
76397862 ldrh r4, [r1, #2]!
76407863 cmp r4, r6
7641
- beq .L1310
7864
+ beq .L1298
76427865 ldrb r5, [r2, #2] @ zero_extendqisi2
76437866 and r5, r5, #224
76447867 cmp r5, #160
76457868 addeq r0, r0, r4
76467869 addne ip, ip, r4
7647
-.L1310:
7870
+.L1298:
76487871 add r2, r2, #4
7649
- b .L1309
7650
-.L1318:
7651
- ldr r4, [r3, #1092]
7652
- ldr r3, [r3, #2804]
7653
- str ip, [r4, #524]
7654
- str r0, [r4, #528]
7655
- ldrh r1, [r3, #120]
7656
- cmp r1, #0
7657
- ldmeqfd sp!, {r4, r5, r6, pc}
7658
- bl __aeabi_uidiv
7659
- str r0, [r4, #532]
7660
- ldmfd sp!, {r4, r5, r6, pc}
7661
-.L1320:
7872
+ b .L1297
7873
+.L1309:
76627874 .align 2
7663
-.L1319:
7664
- .word .LANCHOR3-2528
7875
+.L1308:
7876
+ .word .LANCHOR3-2544
76657877 .word .LANCHOR0
76667878 .fnend
76677879 .size ftl_total_vpn_update, .-ftl_total_vpn_update
76687880 .align 2
76697881 .global ftl_debug_info_fill
7882
+ .syntax unified
7883
+ .arm
7884
+ .fpu softvfp
76707885 .type ftl_debug_info_fill, %function
76717886 ftl_debug_info_fill:
76727887 .fnstart
76737888 @ args = 0, pretend = 0, frame = 0
76747889 @ frame_needed = 0, uses_anonymous_args = 0
7675
- ldr r3, .L1326
7676
- ldrb r3, [r3, #2772] @ zero_extendqisi2
7890
+ ldr r3, .L1317
7891
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
76777892 cmp r3, #8
7678
- bls .L1325
7679
- stmfd sp!, {r4, lr}
7680
- .save {r4, lr}
7681
- sub r4, r0, #2
7682
- clz r4, r4
7893
+ bls .L1314
7894
+ sub r3, r0, #2
76837895 cmp r2, #0
7684
- mov r4, r4, lsr #5
7685
- moveq r4, #0
7686
- cmp r4, #0
7687
- streq r4, [r1]
7688
- streq r4, [r1, #4]
7689
- beq .L1322
7690
- ldr r3, .L1326+4
7691
- mov r4, r1
7896
+ clz r3, r3
7897
+ lsr r3, r3, #5
7898
+ moveq r3, #0
7899
+ cmp r3, #0
7900
+ streq r3, [r1]
7901
+ streq r3, [r1, #4]
7902
+ beq .L1314
7903
+ ldr r3, .L1317+4
76927904 mov r0, r2
7905
+ push {r4, lr}
7906
+ .save {r4, lr}
7907
+ mov r4, r1
76937908 str r3, [r1]
76947909 mov r1, #1024
76957910 bl js_hash
76967911 str r0, [r4, #4]
7697
-.L1322:
76987912 mov r0, #0
7699
- ldmfd sp!, {r4, pc}
7700
-.L1325:
7913
+ pop {r4, pc}
7914
+.L1314:
77017915 mov r0, #0
77027916 bx lr
7703
-.L1327:
7917
+.L1318:
77047918 .align 2
7705
-.L1326:
7706
- .word .LANCHOR0
7919
+.L1317:
7920
+ .word .LANCHOR3
77077921 .word 1212240712
77087922 .fnend
77097923 .size ftl_debug_info_fill, .-ftl_debug_info_fill
77107924 .align 2
77117925 .global ftl_vpn_update
7926
+ .syntax unified
7927
+ .arm
7928
+ .fpu softvfp
77127929 .type ftl_vpn_update, %function
77137930 ftl_vpn_update:
77147931 .fnstart
77157932 @ args = 0, pretend = 0, frame = 0
77167933 @ frame_needed = 0, uses_anonymous_args = 0
7717
- stmfd sp!, {r4, lr}
7934
+ push {r4, lr}
77187935 .save {r4, lr}
77197936 mov r4, r0
77207937 bl zftl_list_update_data_list
7721
- ldr r3, .L1332
7722
- mov r4, r4, asl #1
7723
- ldr r2, [r3, #1088]
7938
+ lsl r4, r4, #1
7939
+ ldr r3, .L1323
7940
+ ldr r2, [r3, #1092]
77247941 ldrh r2, [r2, r4]
77257942 cmp r2, #0
77267943 moveq r0, #1
77277944 movne r0, #0
7728
- streq r0, [r3, #2820]
7729
- ldmfd sp!, {r4, pc}
7730
-.L1333:
7945
+ streq r0, [r3, #2812]
7946
+ pop {r4, pc}
7947
+.L1324:
77317948 .align 2
7732
-.L1332:
7949
+.L1323:
77337950 .word .LANCHOR0
77347951 .fnend
77357952 .size ftl_vpn_update, .-ftl_vpn_update
77367953 .align 2
77377954 .global ftl_vpn_decrement
7955
+ .syntax unified
7956
+ .arm
7957
+ .fpu softvfp
77387958 .type ftl_vpn_decrement, %function
77397959 ftl_vpn_decrement:
77407960 .fnstart
77417961 @ args = 0, pretend = 0, frame = 0
77427962 @ frame_needed = 0, uses_anonymous_args = 0
7743
- stmfd sp!, {r3, r4, r5, lr}
7744
- .save {r3, r4, r5, lr}
77457963 movw r3, #65535
7964
+ push {r4, r5, r6, lr}
7965
+ .save {r4, r5, r6, lr}
77467966 cmp r0, r3
77477967 mov r5, r0
7748
- beq .L1335
7749
- ldr r1, .L1344
7750
- mov r3, r0, asl #1
7751
- ldr r2, [r1, #1088]
7968
+ beq .L1326
7969
+ ldr r1, .L1335
7970
+ lsl r3, r0, #1
7971
+ ldr r2, [r1, #1092]
77527972 ldrh r4, [r2, r3]
77537973 cmp r4, #0
77547974 subne r4, r4, #1
7755
- strneh r4, [r2, r3] @ movhi
7756
- bne .L1335
7757
- ldr r3, [r1, #1080]
7975
+ strhne r4, [r2, r3] @ movhi
7976
+ bne .L1326
7977
+ ldr r3, [r1, #1084]
77587978 mov r2, r4
7759
- mov r1, r5
7760
- add r3, r3, r0, asl #2
7761
- ldr r0, .L1344+4
7979
+ mov r1, r0
7980
+ add r3, r3, r0, lsl #2
7981
+ ldr r0, .L1335+4
77627982 ldrb r3, [r3, #2] @ zero_extendqisi2
7763
- mov r3, r3, lsr #5
7983
+ lsr r3, r3, #5
77647984 bl printk
7765
- mov r0, r4
7766
- ldmfd sp!, {r3, r4, r5, pc}
7767
-.L1335:
7768
- ldr r3, .L1344+8
7769
- ldrh r0, [r3]
7985
+.L1332:
7986
+ mov r0, #0
7987
+ pop {r4, r5, r6, pc}
7988
+.L1326:
7989
+ ldr r3, .L1335+8
7990
+ ldrh r0, [r3, #-4]
77707991 mov r4, r3
7771
- cmp r0, r5
7772
- beq .L1341
7992
+ cmp r5, r0
7993
+ beq .L1332
77737994 movw r2, #65535
77747995 cmp r0, r2
7775
- streqh r5, [r3] @ movhi
7776
- beq .L1341
7996
+ strheq r5, [r3, #-4] @ movhi
7997
+ beq .L1332
77777998 bl ftl_vpn_update
7778
- add r3, r4, #624
7779
- ldrh r1, [r4]
7780
- ldrh r2, [r3, #-10]
7781
- strh r5, [r4] @ movhi
7999
+ add r3, r4, #608
8000
+ adds r0, r0, #0
8001
+ ldrh r2, [r3]
8002
+ movne r0, #1
77828003 add r2, r2, #1
77838004 uxth r2, r2
7784
- adds r0, r0, #0
7785
- movne r0, #1
77868005 cmp r2, #7
77878006 movhi r2, #0
7788
- strh r2, [r3, #-10] @ movhi
7789
- ldrh r3, [r3, #-10]
7790
- ldr r2, .L1344+12
7791
- mov r3, r3, asl #1
7792
- strh r1, [r2, r3] @ movhi
7793
- ldmfd sp!, {r3, r4, r5, pc}
7794
-.L1341:
7795
- mov r0, #0
7796
- ldmfd sp!, {r3, r4, r5, pc}
7797
-.L1345:
8007
+ strh r2, [r3] @ movhi
8008
+ ldrh r3, [r3]
8009
+ ldrh r2, [r4, #-4]
8010
+ strh r5, [r4, #-4] @ movhi
8011
+ add r3, r4, r3, lsl #1
8012
+ strh r2, [r3, #-2] @ movhi
8013
+ pop {r4, r5, r6, pc}
8014
+.L1336:
77988015 .align 2
7799
-.L1344:
8016
+.L1335:
78008017 .word .LANCHOR0
7801
- .word .LC109
8018
+ .word .LC106
78028019 .word .LANCHOR3-3152
7803
- .word .LANCHOR3-3148
78048020 .fnend
78058021 .size ftl_vpn_decrement, .-ftl_vpn_decrement
78068022 .align 2
78078023 .global lpa_hash_update_ppa
8024
+ .syntax unified
8025
+ .arm
8026
+ .fpu softvfp
78088027 .type lpa_hash_update_ppa, %function
78098028 lpa_hash_update_ppa:
78108029 .fnstart
78118030 @ args = 0, pretend = 0, frame = 0
78128031 @ frame_needed = 0, uses_anonymous_args = 0
7813
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
8032
+ ldr r3, .L1349
8033
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
78148034 .save {r4, r5, r6, r7, r8, r9, r10, lr}
7815
- uxtb r6, r0
7816
- ldr r3, .L1358
7817
- movw r4, #65535
7818
- ldr ip, .L1358+4
7819
- mov r6, r6, asl #1
7820
- mov r8, r4
7821
- ldr r7, [r3, #-2548]
7822
- ldrh lr, [ip, r6]
7823
- ldr r9, [r3, #-2544]
7824
-.L1347:
7825
- cmp lr, r8
7826
- beq .L1351
7827
- ldr r5, [r7, lr, asl #2]
7828
- add r10, r7, lr, asl #2
7829
- cmp r5, r0
7830
- mov r5, lr, asl #1
7831
- bne .L1348
7832
- mvn lr, #0
7833
- str lr, [r10]
7834
- movw lr, #65535
7835
- cmp r4, lr
7836
- ldr lr, [r3, #-2544]
7837
- movne r4, r4, asl #1
7838
- ldreqh lr, [lr, r5]
7839
- ldrneh r7, [lr, r5]
7840
- streqh lr, [ip, r6] @ movhi
7841
- strneh r7, [lr, r4] @ movhi
7842
- mvn r4, #0
7843
- ldr lr, [r3, #-2544]
7844
- strh r4, [lr, r5] @ movhi
7845
- b .L1351
7846
-.L1348:
7847
- mov r4, lr
7848
- ldrh lr, [r9, r5]
7849
- b .L1347
7850
-.L1351:
7851
- ldr r4, [r3, #-2548]
8035
+ uxtb r7, r0
8036
+ movw r8, #65535
8037
+ sub lr, r3, #3056
8038
+ lsl r7, r7, #1
8039
+ sub ip, lr, #14
8040
+ ldr r6, [r3, #-2556]
8041
+ ldrh ip, [ip, r7]
8042
+ mov r5, r8
8043
+ ldr r9, [r3, #-2552]
8044
+.L1338:
8045
+ cmp ip, r5
8046
+ beq .L1342
8047
+ ldr r4, [r6, ip, lsl #2]
8048
+ add r10, r6, ip, lsl #2
8049
+ cmp r0, r4
8050
+ lsl r4, ip, #1
8051
+ bne .L1339
8052
+ mvn ip, #0
8053
+ cmp r8, r5
8054
+ str ip, [r10]
8055
+ lslne r8, r8, #1
8056
+ ldr ip, [r3, #-2552]
8057
+ ldrh r5, [ip, r4]
8058
+ subeq ip, lr, #14
8059
+ strheq r5, [ip, r7] @ movhi
8060
+ strhne r5, [ip, r8] @ movhi
8061
+ mvn r5, #0
8062
+ ldr ip, [r3, #-2552]
8063
+ strh r5, [ip, r4] @ movhi
8064
+.L1342:
8065
+ ldr ip, [r3, #-2556]
78528066 cmn r1, #1
7853
- ldr lr, .L1358
7854
- str r0, [r4, r2, asl #2]
7855
- ldrh r0, [ip, r6]
7856
- ldr r3, [r3, #-2544]
7857
- strh r2, [ip, r6] @ movhi
7858
- mov r2, r2, asl #1
7859
- strh r0, [r3, r2] @ movhi
7860
- beq .L1353
7861
- sub r3, lr, #3120
7862
- ldrh r0, [r3, #-12]
7863
- ldr r3, .L1358+8
7864
- mov r1, r1, lsr r0
7865
- ldrb r3, [r3, #1189] @ zero_extendqisi2
7866
- rsb r3, r3, #24
7867
- rsb r3, r0, r3
8067
+ str r0, [ip, r2, lsl #2]
8068
+ sub ip, lr, #14
8069
+ ldrh lr, [ip, r7]
8070
+ ldr r0, [r3, #-2552]
8071
+ strh r2, [ip, r7] @ movhi
8072
+ lsl r2, r2, #1
8073
+ strh lr, [r0, r2] @ movhi
8074
+ beq .L1344
8075
+ ldr r0, .L1349+4
8076
+ ldr r2, .L1349+8
8077
+ ldrb ip, [r0, #1153] @ zero_extendqisi2
78688078 mvn r0, #0
7869
- bic r0, r1, r0, asl r3
7870
- ldrb r1, [lr, #-3130] @ zero_extendqisi2
8079
+ ldrh r2, [r2, #-2]
8080
+ rsb ip, ip, #24
8081
+ sub ip, ip, r2
8082
+ lsr r2, r1, r2
8083
+ ldrb r1, [r3, #-3136] @ zero_extendqisi2
8084
+ bic r0, r2, r0, lsl ip
78718085 bl __aeabi_uidiv
78728086 uxth r0, r0
78738087 bl ftl_vpn_decrement
7874
-.L1353:
8088
+.L1344:
78758089 mvn r0, #0
7876
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
7877
-.L1359:
8090
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
8091
+.L1339:
8092
+ mov r8, ip
8093
+ ldrh ip, [r9, r4]
8094
+ b .L1338
8095
+.L1350:
78788096 .align 2
7879
-.L1358:
8097
+.L1349:
78808098 .word .LANCHOR3
7881
- .word .LANCHOR3-3060
78828099 .word .LANCHOR0
8100
+ .word .LANCHOR3-3136
78838101 .fnend
78848102 .size lpa_hash_update_ppa, .-lpa_hash_update_ppa
78858103 .align 2
78868104 .global ftl_mask_bad_block
8105
+ .syntax unified
8106
+ .arm
8107
+ .fpu softvfp
78878108 .type ftl_mask_bad_block, %function
78888109 ftl_mask_bad_block:
78898110 .fnstart
78908111 @ args = 0, pretend = 0, frame = 0
78918112 @ frame_needed = 0, uses_anonymous_args = 0
7892
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
7893
- .save {r4, r5, r6, r7, r8, r9, lr}
7894
- .pad #12
8113
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
8114
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
8115
+ .pad #8
78958116 mov r3, #1
7896
- ldr r1, .L1368
7897
- ldr r7, .L1368+4
7898
- sub r1, r1, #3120
7899
- ldrb r5, [r1, #-10] @ zero_extendqisi2
7900
- ldrb r4, [r7, #1189] @ zero_extendqisi2
7901
- ldrh r1, [r1, #-12]
7902
- rsb r2, r4, #24
7903
- mov r4, r3, asl r4
8117
+ ldr r7, .L1359
8118
+ ldr ip, .L1359+4
8119
+ ldrb r4, [r7, #1153] @ zero_extendqisi2
8120
+ ldrb r5, [ip, #-3136]! @ zero_extendqisi2
8121
+ rsb r1, r4, #24
8122
+ lsl r4, r3, r4
79048123 sub r4, r4, #1
7905
- and r4, r4, r0, lsr r2
7906
- rsb r2, r1, r2
7907
- mov r3, r3, asl r2
7908
- sub r3, r3, #1
8124
+ and r4, r4, r0, lsr r1
79098125 uxtb r4, r4
7910
- and r0, r3, r0, lsr r1
8126
+ smulbb r2, r4, r5
8127
+ uxtb r9, r2
8128
+ ldrh r2, [ip, #-2]
8129
+ sub r1, r1, r2
8130
+ lsl r3, r3, r1
79118131 mov r1, r5
7912
- smulbb r6, r4, r5
7913
- uxth r9, r0
8132
+ sub r3, r3, #1
8133
+ and r0, r3, r0, lsr r2
8134
+ uxth r10, r0
79148135 bl __aeabi_uidiv
8136
+ ldr r3, .L1359+8
79158137 cmp r5, #1
7916
- subhi r3, r5, #1
7917
- uxtb r6, r6
7918
- andhi r3, r3, r9
8138
+ subhi r2, r5, #1
8139
+ mov r6, r0
8140
+ andhi r2, r2, r10
79198141 uxth r8, r0
7920
- addhi r3, r6, r3
7921
- uxtbhi r6, r3
7922
- ldr r3, .L1368+8
79238142 ldr r3, [r3]
8143
+ addhi r2, r9, r2
8144
+ uxtbhi r9, r2
79248145 tst r3, #16384
7925
- beq .L1362
7926
- str r9, [sp]
8146
+ beq .L1353
8147
+ uxth r3, r0
8148
+ str r10, [sp]
8149
+ mov r2, r9
8150
+ ldr r0, .L1359+12
79278151 mov r1, r4
7928
- ldr r0, .L1368+12
7929
- mov r2, r6
7930
- mov r3, r8
79318152 bl printk
7932
-.L1362:
7933
- movw r3, #1076
8153
+.L1353:
8154
+ movw r3, #1080
79348155 ldrh r3, [r7, r3]
79358156 cmp r3, r8
7936
- bls .L1360
7937
- ldr r3, .L1368+4
7938
- mov r2, #1
7939
- ldr r4, [r3, #1080]
7940
- add r4, r4, r8, asl #2
7941
- ldrb r3, [r4, #3] @ zero_extendqisi2
7942
- orr r6, r3, r2, asl r6
7943
- strb r6, [r4, #3]
7944
-.L1360:
7945
- add sp, sp, #12
8157
+ bls .L1351
8158
+ ldr r3, [r7, #1084]
8159
+ uxth r6, r6
8160
+ add r6, r3, r6, lsl #2
8161
+ mov r3, #1
8162
+ ldrb r2, [r6, #3] @ zero_extendqisi2
8163
+ orr r2, r2, r3, lsl r9
8164
+ strb r2, [r6, #3]
8165
+.L1351:
8166
+ add sp, sp, #8
79468167 @ sp needed
7947
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
7948
-.L1369:
8168
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
8169
+.L1360:
79498170 .align 2
7950
-.L1368:
7951
- .word .LANCHOR3
8171
+.L1359:
79528172 .word .LANCHOR0
8173
+ .word .LANCHOR3
79538174 .word .LANCHOR2
7954
- .word .LC110
8175
+ .word .LC107
79558176 .fnend
79568177 .size ftl_mask_bad_block, .-ftl_mask_bad_block
79578178 .align 2
79588179 .global gc_free_bad_sblk
8180
+ .syntax unified
8181
+ .arm
8182
+ .fpu softvfp
79598183 .type gc_free_bad_sblk, %function
79608184 gc_free_bad_sblk:
79618185 .fnstart
79628186 @ args = 0, pretend = 0, frame = 8
79638187 @ frame_needed = 0, uses_anonymous_args = 0
7964
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
8188
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
79658189 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
79668190 .pad #12
7967
- ldr r4, .L1391
7968
- str r0, [sp]
7969
- ldr r3, [r4, #920]
8191
+ ldr r6, .L1382
8192
+ ldr r3, [r6, #916]
79708193 cmp r3, #0
7971
- movne r5, #0
7972
- ldrne r7, .L1391+4
7973
- beq .L1387
7974
-.L1371:
7975
- ldrb r3, [r7, #-3123] @ zero_extendqisi2
7976
- uxth r0, r5
7977
- cmp r3, r0
7978
- bls .L1387
7979
- ldrb r9, [r7, #-3130] @ zero_extendqisi2
7980
- mov fp, #0
7981
- ldr r6, .L1391+8
7982
- mov r1, r9
7983
- uxth r8, r9
7984
- bl __aeabi_idiv
7985
- ldr r2, .L1391+12
7986
- ldrb r3, [r6, #1189] @ zero_extendqisi2
7987
- cmp r9, #1
7988
- subhi r1, r8, #1
7989
- ldrh r2, [r2]
7990
- rsb r3, r3, #24
7991
- rsb r3, r2, r3
7992
- ldrh r2, [sp]
7993
- andhi r1, r1, r5
7994
- smulbb r2, r2, r8
7995
- ldr r8, .L1391+16
7996
- add r0, r2, r0, asl r3
7997
- mov r9, r8
7998
- uxth r2, r0
7999
- addhi r2, r2, r1
8000
- uxthhi r2, r2
8001
-.L1373:
8002
- ldr r1, [r4, #920]
8003
- uxth r10, fp
8004
- cmp r10, r1
8005
- bcs .L1389
8006
- add r1, r10, #1088
8007
- add r1, r1, #8
8008
- mov r1, r1, asl #1
8009
- ldrh r1, [r8, r1]
8010
- cmp r1, r2
8011
- bne .L1374
8012
- mov r1, r2
8013
- ldr r0, .L1391+20
8014
- str r2, [sp, #4]
8015
- bl printk
8016
- ldr r3, .L1391+4
8017
- ldrb r1, [r3, #-2536] @ zero_extendqisi2
8018
- cmp r1, #0
8019
- ldr r2, [sp, #4]
8020
- bne .L1375
8021
- ldrb r1, [r7, #-3122] @ zero_extendqisi2
8022
- cmp r1, #0
8023
- beq .L1376
8024
-.L1375:
8025
- ldr r1, [r6, #2804]
8026
- ldr r3, .L1391+24
8027
- ldr r1, [r1, #156]
8028
- cmp r1, r3
8029
- beq .L1377
8030
-.L1376:
8031
- ldr r1, .L1391+12
8032
- str r2, [sp, #4]
8033
- ldrh r0, [r1]
8034
- mov r0, r2, asl r0
8035
- bl ftl_mask_bad_block
8036
- ldr r2, [sp, #4]
8037
-.L1377:
8038
- ldr r0, [r4, #920]
8194
+ beq .L1378
8195
+ ldr r8, .L1382+4
8196
+ mov r7, #0
8197
+ str r0, [sp, #4]
8198
+.L1363:
8199
+ ldrb r2, [r8, #-3127] @ zero_extendqisi2
8200
+ uxth r3, r7
8201
+ cmp r2, r3
8202
+ bhi .L1373
80398203 .L1378:
8040
- cmp r10, r0
8041
- bcs .L1390
8042
- add r1, r10, #1088
8043
- add r3, r10, #1
8044
- add r1, r1, #9
8045
- mov r1, r1, asl #1
8046
- ldrh lr, [r9, r1]
8047
- add r1, r10, #1088
8048
- add r1, r1, #8
8049
- uxth r10, r3
8050
- mov r1, r1, asl #1
8051
- strh lr, [r9, r1] @ movhi
8052
- b .L1378
8053
-.L1390:
8054
- sub r0, r0, #1
8055
- str r0, [r4, #920]
8056
-.L1374:
8057
- add fp, fp, #1
8058
- b .L1373
8059
-.L1389:
8060
- add r5, r5, #1
8061
- b .L1371
8062
-.L1387:
80638204 mov r0, #0
80648205 add sp, sp, #12
80658206 @ sp needed
8066
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8067
-.L1392:
8207
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8208
+.L1373:
8209
+ ldrb r9, [r8, #-3136] @ zero_extendqisi2
8210
+ uxth r0, r7
8211
+ ldr r10, .L1382+8
8212
+ ldr fp, .L1382+12
8213
+ mov r1, r9
8214
+ bl __aeabi_idiv
8215
+ ldrb r3, [r10, #1153] @ zero_extendqisi2
8216
+ uxth r5, r9
8217
+ ldrh r2, [sp, #4]
8218
+ cmp r9, #1
8219
+ ldrh r4, [fp], #2
8220
+ mov r9, #0
8221
+ rsb r3, r3, #24
8222
+ str r10, [sp]
8223
+ ldr r10, .L1382+16
8224
+ sub r3, r3, r4
8225
+ smulbb r4, r2, r5
8226
+ subhi r5, r5, #1
8227
+ andhi r5, r5, r7
8228
+ add r4, r4, r0, lsl r3
8229
+ uxth r4, r4
8230
+ addhi r4, r4, r5
8231
+ uxthhi r4, r4
8232
+.L1365:
8233
+ ldr r1, [r6, #916]
8234
+ uxth r5, r9
8235
+ mov r3, r5
8236
+ cmp r1, r5
8237
+ addls r7, r7, #1
8238
+ bls .L1363
8239
+.L1372:
8240
+ add r3, r3, #1088
8241
+ add r3, r3, #8
8242
+ lsl r3, r3, #1
8243
+ ldrh r3, [r10, r3]
8244
+ cmp r3, r4
8245
+ bne .L1366
8246
+ mov r1, r4
8247
+ ldr r0, .L1382+20
8248
+ bl printk
8249
+ ldrb r3, [r8, #-2542] @ zero_extendqisi2
8250
+ cmp r3, #0
8251
+ bne .L1367
8252
+ ldrb r3, [r8, #-3126] @ zero_extendqisi2
8253
+ cmp r3, #0
8254
+ beq .L1368
8255
+.L1367:
8256
+ ldr r3, [sp]
8257
+ ldr r2, .L1382+24
8258
+ ldr r3, [r3, #2800]
8259
+ ldr r3, [r3, #156]
8260
+ cmp r3, r2
8261
+ beq .L1369
8262
+.L1368:
8263
+ ldrh r0, [fp, #-2]
8264
+ lsl r0, r4, r0
8265
+ bl ftl_mask_bad_block
8266
+.L1369:
8267
+ ldr r3, [r6, #916]
8268
+ movw r0, #1097
8269
+ movw ip, #1096
8270
+.L1370:
8271
+ cmp r5, r3
8272
+ bcc .L1371
8273
+ sub r3, r3, #1
8274
+ str r3, [r6, #916]
8275
+.L1366:
8276
+ add r9, r9, #1
8277
+ b .L1365
8278
+.L1371:
8279
+ add r1, r5, r0
8280
+ lsl r1, r1, #1
8281
+ ldrh lr, [r10, r1]
8282
+ add r1, r5, ip
8283
+ lsl r1, r1, #1
8284
+ add r5, r5, #1
8285
+ uxth r5, r5
8286
+ strh lr, [r10, r1] @ movhi
8287
+ b .L1370
8288
+.L1383:
80688289 .align 2
8069
-.L1391:
8290
+.L1382:
80708291 .word .LANCHOR0+4096
80718292 .word .LANCHOR3
80728293 .word .LANCHOR0
8073
- .word .LANCHOR3-3132
8074
- .word .LANCHOR0+2828
8075
- .word .LC111
8294
+ .word .LANCHOR3-3138
8295
+ .word .LANCHOR0+2824
8296
+ .word .LC108
80768297 .word 1145785929
80778298 .fnend
80788299 .size gc_free_bad_sblk, .-gc_free_bad_sblk
80798300 .align 2
80808301 .global ftl_free_sblk
8302
+ .syntax unified
8303
+ .arm
8304
+ .fpu softvfp
80818305 .type ftl_free_sblk, %function
80828306 ftl_free_sblk:
80838307 .fnstart
80848308 @ args = 0, pretend = 0, frame = 16
80858309 @ frame_needed = 0, uses_anonymous_args = 0
8086
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8310
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
80878311 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8088
- mov r10, r0, asl #2
8089
- ldr r5, .L1417
8312
+ lsl r10, r0, #2
8313
+ ldr r5, .L1407
80908314 .pad #20
80918315 sub sp, sp, #20
80928316 mov r7, r0
8093
- ldr r6, [r5, #1080]
8317
+ ldr r6, [r5, #1084]
80948318 add r8, r6, r10
80958319 ldrb r4, [r8, #2] @ zero_extendqisi2
80968320 tst r4, #8
8097
- mov r3, r4, lsr #5
8098
- str r3, [sp]
8099
- beq .L1394
8100
- ldr r9, [r5, #2804]
8101
- movw r1, #1084
8102
- ldrh r2, [r6, r10]
8103
- ldr fp, [r6, r0, asl #2]
8104
- ldrh r3, [r9, #74]
8105
- ubfx r2, r2, #0, #11
8106
- ldrh ip, [r9, #72]
8107
- ubfx fp, fp, #11, #8
8108
- add r3, r2, r3
8109
- ldrh r9, [r5, r1]
8110
- add ip, fp, ip
8111
- str r2, [sp, #12]
8112
- uxth r3, r3
8321
+ lsr r3, r4, #5
81138322 str r3, [sp, #4]
8114
- mov r1, r9
8115
- uxth ip, ip
8323
+ beq .L1385
8324
+ ldr r1, [r5, #2800]
8325
+ ldrh r3, [r6, r10]
8326
+ ldr fp, [r6, r0, lsl #2]
8327
+ ldrh r2, [r1, #74]
8328
+ ubfx r3, r3, #0, #11
8329
+ str r3, [sp, #12]
8330
+ ubfx fp, fp, #11, #8
8331
+ add r2, r3, r2
8332
+ uxth r3, r2
8333
+ ldrh r2, [r1, #72]
8334
+ add r1, r5, #1088
8335
+ ldrh r9, [r1]
81168336 mov r0, r3
8117
- str ip, [sp, #8]
8118
- bl __aeabi_uidiv
8119
- ldr r1, .L1417+4
8120
- ldrh lr, [r1, #-6]
8121
- ldr ip, [sp, #8]
8122
- ldr r3, [sp, #4]
8123
- uxtah r0, ip, r0
8124
- ldr r2, [sp, #12]
8125
- cmp r0, lr
8126
- ble .L1395
8127
- movw r3, #2798
8128
- sub r1, r1, #544
8129
- ldrh r0, [r5, r3]
8130
- movw r3, #2790
8131
- ldrh r3, [r5, r3]
8132
- add r0, r0, r3
8133
- ldrh r3, [r1, #-12]
8134
- add r3, r3, #8
8135
- cmp r0, r3
8136
- blt .L1401
8137
- movw r3, #2794
8138
- movw r0, #2788
8139
- ldrh r0, [r5, r0]
8140
- ldrh r3, [r5, r3]
8141
- add r3, r3, r0
8142
- movw r0, #2796
8143
- ldrh ip, [r5, r0]
8144
- add ip, r3, ip
8145
- ldrh r3, [r1, #-14]
8146
- add r3, r3, #8
8147
- cmp ip, r3
8148
- b .L1416
8149
-.L1395:
8150
- mla r3, r9, ip, r3
8151
- ldrh r0, [r1, #-4]
8152
- cmp r3, r0
8153
- ble .L1397
8154
- movw r3, #2794
8155
- movw r0, #2788
8156
- ldrh r0, [r5, r0]
8157
- ldrh r3, [r5, r3]
8158
- add r3, r3, r0
8159
- movw r0, #2796
8160
- ldrh ip, [r5, r0]
8161
- add ip, r3, ip
8162
- sub r3, r1, #544
8163
- ldrh r1, [r3, #-14]
8164
- add r0, r1, #8
8165
- cmp ip, r0
8166
- blt .L1414
8167
- movw r0, #2798
8168
- movw lr, #2790
8169
- ldrh r0, [r5, r0]
8170
- ldrh lr, [r5, lr]
8171
- ldrh r3, [r3, #-12]
8172
- add r0, r0, lr
8173
- add r3, r3, #8
8174
- cmp r0, r3
8175
- blt .L1401
8176
- add r1, r1, #24
8177
- cmp ip, r1
8178
-.L1416:
8179
- bge .L1401
8180
-.L1414:
8181
- bfc r4, #3, #2
8182
- b .L1412
8183
-.L1401:
8184
- mov r3, #2
8185
- bfi r4, r3, #3, #2
8186
-.L1412:
8187
- strb r4, [r8, #2]
8188
-.L1397:
8189
- ldrb r3, [r8, #2] @ zero_extendqisi2
8190
- ands r3, r3, #24
8191
- bne .L1402
8192
- mul r9, r9, fp
8193
- ldrh r3, [r6, r10]
8194
- mov fp, fp, lsr #3
8195
- add r9, r9, r9, asl #1
8196
- add r2, r2, r9, asr #2
8197
- bfi r3, r2, #0, #11
8198
- strh r3, [r6, r10] @ movhi
8199
- ldr r4, [r6, r7, asl #2]
8200
- bfi r4, fp, #11, #8
8201
- str r4, [r6, r7, asl #2]
8202
- b .L1403
8203
-.L1402:
8204
- cmp r3, #16
8205
- bne .L1403
8206
- mov r0, r2
8337
+ add r2, r2, fp
8338
+ str r3, [sp]
8339
+ uxth r2, r2
82078340 mov r1, r9
8208
- str r2, [sp, #4]
8209
- bl __aeabi_idiv
8210
- ldr r3, [r6, r7, asl #2]
8211
- add r0, r0, r0, asl #1
8212
- add fp, fp, r0, asr #2
8213
- bfi r3, fp, #11, #8
8214
- str r3, [r6, r7, asl #2]
8215
- ldr r2, [sp, #4]
8216
- ldrh r3, [r6, r10]
8217
- mov r2, r2, asr #5
8218
- bfi r3, r2, #0, #11
8219
- b .L1413
8220
-.L1394:
8221
- tst r4, #24
8222
- bne .L1403
8223
- movw r3, #2792
8224
- ldrh r3, [r5, r3]
8225
- cmp r3, #0
8226
- bne .L1403
8227
- movw r3, #2790
8228
- ldrh r1, [r5, r3]
8229
- cmp r1, #15
8230
- bhi .L1403
8231
- movw r3, #2794
8232
- movw r2, #2788
8341
+ str r2, [sp, #8]
8342
+ bl __aeabi_uidiv
8343
+ ldr ip, .L1407+4
8344
+ ldr r2, [sp, #8]
8345
+ ldr r3, [sp, #12]
8346
+ ldrh r1, [ip, #-12]
8347
+ uxtah r0, r2, r0
8348
+ cmp r0, r1
8349
+ ble .L1386
8350
+ movw r2, #2794
8351
+ ldrh r0, [r5, r2]
8352
+ movw r2, #2786
82338353 ldrh r2, [r5, r2]
8234
- ldrh r3, [r5, r3]
8235
- ldr r0, .L1417+8
8236
- add r3, r3, r2
8237
- movw r2, #2796
8354
+ add r0, r0, r2
8355
+ sub r2, ip, #560
8356
+ ldrh r1, [r2, #-2]
8357
+ add r1, r1, #8
8358
+ cmp r0, r1
8359
+ bge .L1387
8360
+.L1392:
8361
+ mov r2, #2
8362
+ bfi r4, r2, #3, #2
8363
+ b .L1403
8364
+.L1387:
8365
+ movw r1, #2790
8366
+ add r0, r5, #2784
8367
+ ldrh r0, [r0]
8368
+ ldrh r1, [r5, r1]
8369
+ ldrh r2, [r2, #-4]
8370
+ add r1, r1, r0
8371
+ movw r0, #2792
8372
+ ldrh r0, [r5, r0]
8373
+ add r2, r2, #8
8374
+ add r1, r1, r0
8375
+ cmp r1, r2
8376
+.L1406:
8377
+ bge .L1392
8378
+ b .L1404
8379
+.L1386:
8380
+ ldr r1, [sp]
8381
+ mla r2, r2, r9, r1
8382
+ ldrh r1, [ip, #-10]
8383
+ cmp r2, r1
8384
+ ble .L1388
8385
+ movw r2, #2790
8386
+ ldrh r1, [r5, r2]
8387
+ add r2, r5, #2784
8388
+ ldrh r2, [r2]
8389
+ add r1, r1, r2
8390
+ movw r2, #2792
82388391 ldrh r2, [r5, r2]
8239
- add r3, r3, r2
8240
- ldrh r2, [r0, #-14]
8241
- add r2, r2, #16
8242
- cmp r3, r2
8243
- ble .L1403
8244
- movw r3, #2798
8245
- ldrh r2, [r5, r3]
8246
- ldrh r3, [r0, #-12]
8247
- add r2, r2, r1
8248
- add r3, r3, #8
8249
- cmp r2, r3
8250
- bge .L1403
8251
- mov r3, #2
8252
- bfi r4, r3, #3, #2
8253
- strb r4, [r8, #2]
8254
- movw r3, #1084
8255
- ldrh r4, [r6, r10]
8256
- ldrh r1, [r5, r3]
8257
- ubfx r4, r4, #0, #11
8258
- mov r0, r4
8259
- mov r4, r4, asr #5
8260
- bl __aeabi_idiv
8261
- ldr r3, [r6, r7, asl #2]
8262
- ubfx r2, r3, #11, #8
8263
- add r0, r0, r0, asl #1
8264
- add r0, r2, r0, asr #2
8265
- bfi r3, r0, #11, #8
8266
- str r3, [r6, r7, asl #2]
8267
- ldrh r3, [r6, r10]
8268
- bfi r3, r4, #0, #11
8269
-.L1413:
8270
- strh r3, [r6, r10] @ movhi
8392
+ add r1, r1, r2
8393
+ sub r2, ip, #560
8394
+ ldrh r0, [r2, #-4]
8395
+ add ip, r0, #8
8396
+ cmp r1, ip
8397
+ bge .L1390
8398
+.L1404:
8399
+ bfc r4, #3, #2
82718400 .L1403:
8401
+ strb r4, [r8, #2]
8402
+.L1388:
8403
+ ldrb r2, [r8, #2] @ zero_extendqisi2
8404
+ ands r2, r2, #24
8405
+ bne .L1393
8406
+ mul r9, r9, fp
8407
+ ldrh r2, [r6, r10]
8408
+ lsr fp, fp, #3
8409
+ add r9, r9, r9, lsl #1
8410
+ add r3, r3, r9, asr #2
8411
+ bfi r2, r3, #0, #11
8412
+ strh r2, [r6, r10] @ movhi
8413
+ ldr r3, [r6, r7, lsl #2]
8414
+ bfi r3, fp, #11, #8
8415
+ str r3, [r6, r7, lsl #2]
8416
+.L1394:
82728417 mov r0, r7
82738418 bl zftl_remove_data_node
8274
- ldr r3, .L1417
8419
+ ldr r3, .L1407
82758420 mov r0, #0
8276
- ldr r2, [r3, #1080]
8421
+ ldr r2, [r3, #1084]
82778422 mov r4, r3
82788423 add r10, r2, r10
82798424 ldrb r2, [r10, #2] @ zero_extendqisi2
82808425 bfc r2, #5, #3
82818426 strb r2, [r10, #2]
8282
- ldr r1, [r3, #1088]
8283
- mov r2, r7, asl #1
8427
+ lsl r2, r7, #1
8428
+ ldr r1, [r3, #1092]
82848429 strh r0, [r1, r2] @ movhi
8285
- ldr r2, [sp]
8430
+ ldr r2, [sp, #4]
82868431 add r2, r2, #6
82878432 and r2, r2, #7
82888433 cmp r2, #4
8289
- bhi .L1406
8434
+ bhi .L1397
82908435 mov r0, r7
82918436 bl gc_free_bad_sblk
8292
-.L1406:
8437
+.L1397:
82938438 ldrb r3, [r8, #2] @ zero_extendqisi2
82948439 tst r3, #8
8295
- beq .L1407
8296
- ldr r3, [r4, #1092]
8440
+ beq .L1398
8441
+ ldr r3, [r4, #1096]
82978442 movw r2, #586
82988443 ldrh r1, [r3, r2]
82998444 cmp r1, r7
8300
- bne .L1407
8445
+ bne .L1398
83018446 mvn r1, #0
83028447 strh r1, [r3, r2] @ movhi
83038448 movw r2, #590
8304
- movw r1, #65535
83058449 ldrh r0, [r3, r2]
8450
+ movw r1, #65535
83068451 cmp r0, r1
8307
- bne .L1407
8452
+ bne .L1398
83088453 strh r7, [r3, r2] @ movhi
83098454 mov r1, r7
8310
- ldr r0, .L1417+12
8455
+ ldr r0, .L1407+8
83118456 add sp, sp, #20
83128457 @ sp needed
8313
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8458
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
83148459 b printk
8315
-.L1407:
8460
+.L1390:
8461
+ movw ip, #2794
8462
+ movw lr, #2786
8463
+ ldrh ip, [r5, ip]
8464
+ ldrh lr, [r5, lr]
8465
+ ldrh r2, [r2, #-2]
8466
+ add ip, ip, lr
8467
+ add r2, r2, #8
8468
+ cmp ip, r2
8469
+ blt .L1392
8470
+ add r0, r0, #24
8471
+ cmp r1, r0
8472
+ b .L1406
8473
+.L1393:
8474
+ cmp r2, #16
8475
+ bne .L1394
8476
+ mov r0, r3
8477
+ mov r1, r9
8478
+ str r3, [sp]
8479
+ bl __aeabi_idiv
8480
+ add r0, r0, r0, lsl #1
8481
+ ldr r2, [r6, r7, lsl #2]
8482
+ add fp, fp, r0, asr #2
8483
+ bfi r2, fp, #11, #8
8484
+ str r2, [r6, r7, lsl #2]
8485
+ ldr r3, [sp]
8486
+ ldrh r2, [r6, r10]
8487
+ asr r3, r3, #5
8488
+ bfi r2, r3, #0, #11
8489
+ strh r2, [r6, r10] @ movhi
8490
+ b .L1394
8491
+.L1385:
8492
+ tst r4, #24
8493
+ bne .L1394
8494
+ movw r3, #2788
8495
+ ldrh r3, [r5, r3]
8496
+ cmp r3, #0
8497
+ bne .L1394
8498
+ movw r3, #2786
8499
+ ldrh r0, [r5, r3]
8500
+ cmp r0, #15
8501
+ bhi .L1394
8502
+ movw r3, #2790
8503
+ add r2, r5, #2784
8504
+ ldrh r2, [r2]
8505
+ ldrh r3, [r5, r3]
8506
+ ldr ip, .L1407+12
8507
+ add r3, r3, r2
8508
+ movw r2, #2792
8509
+ ldrh r2, [r5, r2]
8510
+ ldrh r1, [ip, #-4]
8511
+ add r3, r3, r2
8512
+ add r1, r1, #16
8513
+ cmp r3, r1
8514
+ ble .L1394
8515
+ movw r3, #2794
8516
+ ldrh r2, [r5, r3]
8517
+ ldrh r3, [ip, #-2]
8518
+ add r2, r2, r0
8519
+ add r3, r3, #8
8520
+ cmp r2, r3
8521
+ bge .L1394
8522
+ mov r3, #2
8523
+ add r5, r5, #1088
8524
+ bfi r4, r3, #3, #2
8525
+ ldrh r1, [r5]
8526
+ strb r4, [r8, #2]
8527
+ ldrh r4, [r6, r10]
8528
+ ubfx r4, r4, #0, #11
8529
+ mov r0, r4
8530
+ asr r4, r4, #5
8531
+ bl __aeabi_idiv
8532
+ ldr r3, [r6, r7, lsl #2]
8533
+ add r0, r0, r0, lsl #1
8534
+ ubfx r2, r3, #11, #8
8535
+ add r0, r2, r0, asr #2
8536
+ bfi r3, r0, #11, #8
8537
+ str r3, [r6, r7, lsl #2]
8538
+ ldrh r3, [r6, r10]
8539
+ bfi r3, r4, #0, #11
8540
+ strh r3, [r6, r10] @ movhi
8541
+ b .L1394
8542
+.L1398:
83168543 mov r0, r7
83178544 add sp, sp, #20
83188545 @ sp needed
8319
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8546
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
83208547 b zftl_insert_free_list
8321
-.L1418:
8548
+.L1408:
83228549 .align 2
8323
-.L1417:
8550
+.L1407:
83248551 .word .LANCHOR0
83258552 .word .LANCHOR3-2528
8326
- .word .LANCHOR3-3072
8327
- .word .LC112
8553
+ .word .LC109
8554
+ .word .LANCHOR3-3088
83288555 .fnend
83298556 .size ftl_free_sblk, .-ftl_free_sblk
83308557 .align 2
83318558 .global gc_free_src_blk
8559
+ .syntax unified
8560
+ .arm
8561
+ .fpu softvfp
83328562 .type gc_free_src_blk, %function
83338563 gc_free_src_blk:
83348564 .fnstart
83358565 @ args = 0, pretend = 0, frame = 0
83368566 @ frame_needed = 0, uses_anonymous_args = 0
8337
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
8338
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
8567
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
8568
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
83398569 mov r5, #0
8340
- ldr r6, .L1458
8341
- ldr r8, .L1458+4
8342
- mov r7, r6
8343
-.L1420:
8344
- ldrh r2, [r8, #52]
8570
+ ldr r8, .L1447
8571
+ ldr r7, .L1447+4
8572
+ mov r6, r8
8573
+.L1410:
8574
+ ldrh r2, [r7, #52]
83458575 uxth r3, r5
83468576 cmp r2, r3
8347
- bls .L1457
8348
- add r3, r8, r3, asl #1
8577
+ bhi .L1424
8578
+ mov r3, #0
8579
+ strh r3, [r7, #52] @ movhi
8580
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
8581
+.L1424:
8582
+ uxth r3, r5
8583
+ add r3, r7, r3, lsl #1
83498584 ldrh r4, [r3, #54]
8350
- ldr r3, [r6, #1088]
8351
- mov r9, r4, asl #1
8585
+ ldr r3, [r8, #1092]
8586
+ lsl r9, r4, #1
83528587 ldrh r2, [r3, r9]
83538588 cmp r2, #0
8354
- beq .L1421
8355
- ldr r0, .L1458+8
8589
+ beq .L1411
83568590 mov r1, r4
8591
+ ldr r0, .L1447+8
83578592 bl printk
8358
-.L1421:
8359
- ldr r3, [r7, #1088]
8593
+.L1411:
8594
+ ldr r3, [r6, #1092]
83608595 mov r2, #0
83618596 strh r2, [r3, r9] @ movhi
8362
- ldr r3, [r7, #1088]
8597
+ ldr r3, [r6, #1092]
83638598 ldrh r3, [r3, r9]
83648599 cmp r3, r2
8365
- bne .L1422
8366
- ldr r3, .L1458+12
8367
- ldr r9, [r6, #1080]
8600
+ bne .L1412
8601
+ ldr r3, .L1447+12
8602
+ ldr r9, [r6, #1084]
83688603 ldr r3, [r3]
8369
- add r9, r9, r4, asl #2
8604
+ add r9, r9, r4, lsl #2
83708605 tst r3, #256
8371
- beq .L1423
8606
+ beq .L1413
83728607 ldrb r2, [r9, #2] @ zero_extendqisi2
83738608 mov r1, r4
8374
- ldr r0, .L1458+16
8375
- mov r2, r2, lsr #5
8609
+ ldr r0, .L1447+16
8610
+ lsr r2, r2, #5
83768611 bl printk
8377
-.L1423:
8612
+.L1413:
83788613 ldrb r3, [r9, #2] @ zero_extendqisi2
8379
- tst r3, #192
8380
- and r3, r3, #224
8381
- moveq r2, #1
8382
- movne r2, #0
8383
- cmp r3, #224
8384
- movne r3, r2
8385
- orreq r3, r2, #1
8614
+ and r2, r3, #224
8615
+ and r3, r3, #192
83868616 cmp r3, #0
8387
- beq .L1424
8388
- ldr r1, .L1458+20
8617
+ cmpne r2, #224
8618
+ bne .L1414
83898619 movw r2, #1363
8390
- ldr r0, .L1458+24
8620
+ ldr r1, .L1447+20
8621
+ ldr r0, .L1447+24
83918622 bl printk
83928623 bl dump_stack
8393
-.L1424:
8624
+.L1414:
83948625 mov r0, r4
83958626 bl ftl_free_sblk
8396
- ldr r3, [r7, #1092]
8627
+ ldr r3, [r6, #1096]
83978628 ldrh r1, [r3, #124]
83988629 cmp r1, #0
8399
- beq .L1425
8400
- add r0, r3, #388
8630
+ beq .L1415
8631
+ add r0, r3, #392
84018632 mov r2, #0
8402
- add r0, r0, #2
8403
-.L1427:
8404
- ldrh ip, [r0, #2]!
8405
- cmp ip, r4
8406
- bne .L1426
8633
+.L1417:
8634
+ ldrh ip, [r0], #2
8635
+ cmp r4, ip
8636
+ bne .L1416
84078637 add r2, r2, #196
84088638 mvn r0, #0
8639
+ lsl r2, r2, #1
84098640 add r1, r1, r0
8410
- mov r2, r2, asl #1
84118641 strh r0, [r3, r2] @ movhi
84128642 strh r1, [r3, #124] @ movhi
8413
- b .L1425
8414
-.L1426:
8415
- add r2, r2, #1
8416
- cmp r2, #64
8417
- bne .L1427
8418
-.L1425:
8643
+.L1415:
84198644 ldrh r1, [r3, #120]
84208645 cmp r1, #0
8421
- beq .L1428
8422
- add r0, r3, #134
8646
+ beq .L1418
8647
+ add r0, r3, #136
84238648 mov r2, #0
8424
-.L1430:
8425
- ldrh ip, [r0, #2]!
8426
- cmp ip, r4
8427
- bne .L1429
8428
- add r2, r3, r2, asl #1
8649
+.L1420:
8650
+ ldrh ip, [r0], #2
8651
+ cmp r4, ip
8652
+ bne .L1419
84298653 mvn r0, #0
8654
+ add r2, r3, r2, lsl #1
84308655 add r1, r1, r0
84318656 strh r0, [r2, #136] @ movhi
84328657 strh r1, [r3, #120] @ movhi
8433
- b .L1428
8434
-.L1429:
8435
- add r2, r2, #1
8436
- cmp r2, #64
8437
- bne .L1430
8438
-.L1428:
8439
- ldrh r0, [r3, #122]
8440
- cmp r0, #0
8441
- beq .L1431
8442
- add r1, r3, #260
8658
+.L1418:
8659
+ ldrh r1, [r3, #122]
8660
+ cmp r1, #0
8661
+ beq .L1421
8662
+ add r0, r3, #264
84438663 mov r2, #0
8444
- add r1, r1, #2
8445
-.L1433:
8446
- ldrh ip, [r1, #2]!
8447
- cmp ip, r4
8448
- bne .L1432
8664
+.L1423:
8665
+ ldrh ip, [r0], #2
8666
+ cmp r4, ip
8667
+ bne .L1422
84498668 add r2, r2, #132
8450
- mvn r1, #0
8451
- add r0, r0, r1
8452
- mov r2, r2, asl #1
8453
- strh r1, [r3, r2] @ movhi
8454
- strh r0, [r3, #122] @ movhi
8455
- b .L1431
8456
-.L1432:
8669
+ mvn r0, #0
8670
+ lsl r2, r2, #1
8671
+ add r1, r1, r0
8672
+ strh r0, [r3, r2] @ movhi
8673
+ strh r1, [r3, #122] @ movhi
8674
+.L1421:
8675
+ add r5, r5, #1
8676
+ b .L1410
8677
+.L1416:
84578678 add r2, r2, #1
84588679 cmp r2, #64
8459
- bne .L1433
8460
- b .L1431
8680
+ bne .L1417
8681
+ b .L1415
8682
+.L1419:
8683
+ add r2, r2, #1
8684
+ cmp r2, #64
8685
+ bne .L1420
8686
+ b .L1418
84618687 .L1422:
8462
- mov r0, r4
8688
+ add r2, r2, #1
8689
+ cmp r2, #64
8690
+ bne .L1423
8691
+ b .L1421
8692
+.L1412:
84638693 mov r1, #1
8694
+ mov r0, r4
84648695 bl gc_add_sblk
8465
-.L1431:
8466
- add r5, r5, #1
8467
- b .L1420
8468
-.L1457:
8469
- ldr r3, .L1458+4
8470
- mov r2, #0
8471
- strh r2, [r3, #52] @ movhi
8472
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
8473
-.L1459:
8696
+ b .L1421
8697
+.L1448:
84748698 .align 2
8475
-.L1458:
8699
+.L1447:
84768700 .word .LANCHOR0
8477
- .word .LANCHOR0+2828
8478
- .word .LC113
8701
+ .word .LANCHOR0+2824
8702
+ .word .LC110
84798703 .word .LANCHOR2
8480
- .word .LC114
8481
- .word .LANCHOR1+1752
8704
+ .word .LC111
8705
+ .word .LANCHOR1+1581
84828706 .word .LC0
84838707 .fnend
84848708 .size gc_free_src_blk, .-gc_free_src_blk
84858709 .align 2
84868710 .global print_ftl_debug_info
8711
+ .syntax unified
8712
+ .arm
8713
+ .fpu softvfp
84878714 .type print_ftl_debug_info, %function
84888715 print_ftl_debug_info:
84898716 .fnstart
84908717 @ args = 0, pretend = 0, frame = 0
84918718 @ frame_needed = 0, uses_anonymous_args = 0
8492
- stmfd sp!, {r4, lr}
8719
+ push {r4, lr}
84938720 .save {r4, lr}
8494
- movw ip, #2790
8495
- ldr r4, .L1462
84968721 .pad #32
84978722 sub sp, sp, #32
8498
- ldr r3, [r4, #2804]
8499
- ldrh ip, [r4, ip]
8500
- ldr r0, [r4, #1092]
8501
- ldrh r1, [r3, #148]
8502
- ldrh r2, [r3, #146]
8503
- movw r3, #2788
8504
- str ip, [sp]
8505
- movw ip, #2792
8506
- ldrh ip, [r4, ip]
8507
- ldrh r3, [r4, r3]
8508
- str ip, [sp, #4]
8509
- movw ip, #2794
8510
- ldrh ip, [r4, ip]
8511
- str ip, [sp, #8]
8512
- movw ip, #2796
8513
- ldrh ip, [r4, ip]
8514
- str ip, [sp, #12]
8515
- movw ip, #2798
8516
- ldrh ip, [r4, ip]
8517
- str ip, [sp, #16]
8518
- ldr ip, [r0, #524]
8519
- str ip, [sp, #20]
8520
- ldr r0, [r0, #528]
8521
- str r0, [sp, #24]
8522
- ldr r0, [r4, #2784]
8523
- str r0, [sp, #28]
8524
- ldr r0, .L1462+4
8525
- bl printk
8526
- ldr r2, [r4, #2804]
8527
- ldrb r3, [r4, #2801] @ zero_extendqisi2
8528
- ldr r0, .L1462+8
8529
- ldr r1, [r2, #8]
8530
- str r1, [sp]
8531
- ldr r1, [r2, #64]
8532
- str r1, [sp, #4]
8533
- ldr r1, [r2, #20]
8534
- ldr r2, [r2, #28]
8535
- bl printk
8536
- ldr r2, [r4, #2804]
8537
- ldr r0, .L1462+12
8538
- ldr r3, [r2, #16]
8539
- ldr r1, [r2, #52]
8540
- ldr r2, [r2, #60]
8541
- mov r3, r3, lsr #11
8542
- bl printk
8543
- ldr r2, [r4, #2804]
8544
- ldrh r0, [r2, #92]
8545
- ldrh r1, [r2, #74]
8546
- ldrh r3, [r2, #88]
8547
- str r0, [sp]
8548
- ldrh r0, [r2, #96]
8549
- str r0, [sp, #4]
8550
- ldrh r0, [r2, #72]
8551
- str r0, [sp, #8]
8552
- ldr r0, [r2, #80]
8553
- str r0, [sp, #12]
8554
- ldrh r0, [r2, #90]
8555
- str r0, [sp, #16]
8556
- ldrh r0, [r2, #94]
8723
+ ldr r4, .L1451
8724
+ ldr r1, [r4, #2800]
8725
+ add r3, r4, #2784
8726
+ ldr r0, [r4, #1096]
8727
+ ldr ip, [r4, #2780]
8728
+ ldrh r2, [r1, #146]
8729
+ ldrh r3, [r3]
8730
+ ldrh r1, [r1, #148]
8731
+ str ip, [sp, #28]
8732
+ ldr ip, [r0, #528]
8733
+ str ip, [sp, #24]
8734
+ ldr r0, [r0, #524]
85578735 str r0, [sp, #20]
8558
- ldrh r0, [r2, #98]
8559
- str r0, [sp, #24]
8560
- ldr r0, .L1462+16
8561
- ldr r2, [r2, #84]
8562
- bl printk
8563
- add r0, r4, #2816
8564
- movw r3, #2810
8565
- ldrh r0, [r0]
8566
- ldrh r1, [r4, r3]
8567
- movw r3, #2812
8568
- ldrh r2, [r4, r3]
8569
- movw r3, #2814
8570
- ldrh r3, [r4, r3]
8571
- str r0, [sp]
8572
- movw r0, #2808
8736
+ movw r0, #2794
8737
+ ldrh r0, [r4, r0]
8738
+ str r0, [sp, #16]
8739
+ movw r0, #2792
8740
+ ldrh r0, [r4, r0]
8741
+ str r0, [sp, #12]
8742
+ movw r0, #2790
8743
+ ldrh r0, [r4, r0]
8744
+ str r0, [sp, #8]
8745
+ movw r0, #2788
85738746 ldrh r0, [r4, r0]
85748747 str r0, [sp, #4]
8575
- ldr r0, .L1462+20
8576
- bl printk
8577
- ldr r0, [r4, #1092]
8578
- movw lr, #590
8579
- ldr ip, [r4, #2804]
8580
- add r3, r0, #584
8581
- ldrh r1, [r3]
8582
- movw r3, #586
8583
- ldrh r2, [r0, r3]
8584
- add r3, r0, #588
8585
- ldrh r0, [r0, lr]
8586
- ldrh r3, [r3]
8748
+ movw r0, #2786
8749
+ ldrh r0, [r4, r0]
85878750 str r0, [sp]
8588
- ldr r0, [ip, #156]
8589
- str r0, [sp, #4]
8590
- ldrh r0, [ip, #150]
8751
+ ldr r0, .L1451+4
8752
+ bl printk
8753
+ ldr r1, [r4, #2800]
8754
+ ldrb r3, [r4, #2797] @ zero_extendqisi2
8755
+ ldr r0, .L1451+8
8756
+ ldr r2, [r1, #64]
8757
+ str r2, [sp, #4]
8758
+ ldr r2, [r1, #8]
8759
+ str r2, [sp]
8760
+ ldr r2, [r1, #28]
8761
+ ldr r1, [r1, #20]
8762
+ bl printk
8763
+ ldr r1, [r4, #2800]
8764
+ ldr r0, .L1451+12
8765
+ ldr r3, [r1, #16]
8766
+ ldr r2, [r1, #60]
8767
+ ldr r1, [r1, #52]
8768
+ lsr r3, r3, #11
8769
+ bl printk
8770
+ ldr r2, [r4, #2800]
8771
+ ldrh r0, [r2, #98]
8772
+ ldrh r3, [r2, #88]
8773
+ ldrh r1, [r2, #74]
8774
+ str r0, [sp, #24]
8775
+ ldrh r0, [r2, #94]
8776
+ str r0, [sp, #20]
8777
+ ldrh r0, [r2, #90]
8778
+ str r0, [sp, #16]
8779
+ ldr r0, [r2, #80]
8780
+ str r0, [sp, #12]
8781
+ ldrh r0, [r2, #72]
85918782 str r0, [sp, #8]
8592
- ldr r0, .L1462+24
8783
+ ldrh r0, [r2, #96]
8784
+ str r0, [sp, #4]
8785
+ ldrh r0, [r2, #92]
8786
+ str r0, [sp]
8787
+ ldr r0, .L1451+16
8788
+ ldr r2, [r2, #84]
8789
+ bl printk
8790
+ movw r0, #2804
8791
+ movw r3, #2818
8792
+ ldrh r0, [r4, r0]
8793
+ movw r2, #2806
8794
+ movw r1, #2808
8795
+ ldrh r3, [r4, r3]
8796
+ ldrh r2, [r4, r2]
8797
+ str r0, [sp, #4]
8798
+ add r0, r4, #2816
8799
+ ldrh r0, [r0]
8800
+ ldrh r1, [r4, r1]
8801
+ str r0, [sp]
8802
+ ldr r0, .L1451+20
8803
+ bl printk
8804
+ ldr ip, [r4, #2800]
8805
+ movw r2, #586
8806
+ ldr r0, [r4, #1096]
8807
+ ldrh lr, [ip, #150]
8808
+ add r3, r0, #588
8809
+ add r1, r0, #584
8810
+ ldrh r2, [r0, r2]
8811
+ ldrh r3, [r3]
8812
+ ldrh r1, [r1]
8813
+ str lr, [sp, #8]
8814
+ ldr ip, [ip, #156]
8815
+ str ip, [sp, #4]
8816
+ movw ip, #590
8817
+ ldrh r0, [r0, ip]
8818
+ str r0, [sp]
8819
+ ldr r0, .L1451+24
85938820 bl printk
85948821 add sp, sp, #32
85958822 @ sp needed
8596
- ldmfd sp!, {r4, pc}
8597
-.L1463:
8823
+ pop {r4, pc}
8824
+.L1452:
85988825 .align 2
8599
-.L1462:
8826
+.L1451:
86008827 .word .LANCHOR0
8828
+ .word .LC112
8829
+ .word .LC113
8830
+ .word .LC114
86018831 .word .LC115
86028832 .word .LC116
86038833 .word .LC117
8604
- .word .LC118
8605
- .word .LC119
8606
- .word .LC120
86078834 .fnend
86088835 .size print_ftl_debug_info, .-print_ftl_debug_info
86098836 .align 2
86108837 .global ftl_write_buf
8838
+ .syntax unified
8839
+ .arm
8840
+ .fpu softvfp
86118841 .type ftl_write_buf, %function
86128842 ftl_write_buf:
86138843 .fnstart
86148844 @ args = 0, pretend = 0, frame = 0
86158845 @ frame_needed = 0, uses_anonymous_args = 0
8616
- stmfd sp!, {r4, r5, r6, lr}
8846
+ push {r4, r5, r6, lr}
86178847 .save {r4, r5, r6, lr}
86188848 subs r4, r0, #0
8619
- bne .L1465
8620
- ldr r1, .L1476
8621
- movw r2, #810
8622
- ldr r0, .L1476+4
8849
+ bne .L1454
8850
+ movw r2, #811
8851
+ ldr r1, .L1464
8852
+ ldr r0, .L1464+4
86238853 bl printk
86248854 bl dump_stack
86258855 bl print_ftl_debug_info
86268856 mvn r0, #0
8627
- ldmfd sp!, {r4, r5, r6, pc}
8628
-.L1465:
8629
- ldr r5, .L1476+8
8630
- ldrb r2, [r4, #40] @ zero_extendqisi2
8631
- ldrb r3, [r5, #2772] @ zero_extendqisi2
8632
- cmp r2, r3
8633
- bls .L1470
8634
- ldr r1, .L1476
8635
- movw r2, #817
8636
- ldr r0, .L1476+4
8637
- bl printk
8638
- bl dump_stack
8639
-.L1470:
8640
- ldrb r3, [r4, #40] @ zero_extendqisi2
8641
- cmp r3, #0
8642
- beq .L1467
8643
- ldrb r2, [r5, #2772] @ zero_extendqisi2
8644
- ldr r6, .L1476+8
8645
- cmp r2, r3
8646
- bcs .L1468
8647
-.L1467:
8648
- mov r0, r4
8649
- bl zbuf_free
8650
- ldrb r0, [r5, #2800] @ zero_extendqisi2
8651
- ldmfd sp!, {r4, r5, r6, pc}
8652
-.L1468:
8857
+ pop {r4, r5, r6, pc}
8858
+.L1457:
86538859 mov r1, r4
8654
- ldr r0, .L1476+12
8860
+ ldr r0, .L1464+8
86558861 bl buf_add_tail
8656
- ldr r3, [r6, #2804]
8862
+ ldr r3, [r6, #2800]
86578863 ldrb r1, [r4, #40] @ zero_extendqisi2
8658
- ldrb r0, [r6, #2800] @ zero_extendqisi2
8864
+ ldrb r0, [r6, #2796] @ zero_extendqisi2
86598865 ldr r2, [r3, #16]
86608866 add r0, r0, #1
86618867 add r2, r2, r1
8868
+ uxtb r0, r0
86628869 str r2, [r3, #16]
86638870 ldr r2, [r3, #32]
8664
- uxtb r0, r0
8665
- strb r0, [r6, #2800]
8871
+ strb r0, [r6, #2796]
86668872 add r2, r2, #1
86678873 str r2, [r3, #32]
8668
- ldmfd sp!, {r4, r5, r6, pc}
8669
-.L1477:
8874
+ pop {r4, r5, r6, pc}
8875
+.L1454:
8876
+ ldr r3, .L1464+12
8877
+ ldrb r1, [r4, #40] @ zero_extendqisi2
8878
+ ldrb r2, [r3, #-2546] @ zero_extendqisi2
8879
+ mov r5, r3
8880
+ cmp r1, r2
8881
+ bls .L1459
8882
+ movw r2, #818
8883
+ ldr r1, .L1464
8884
+ ldr r0, .L1464+4
8885
+ bl printk
8886
+ bl dump_stack
8887
+.L1459:
8888
+ ldrb r3, [r4, #40] @ zero_extendqisi2
8889
+ ldr r6, .L1464+16
8890
+ cmp r3, #0
8891
+ beq .L1456
8892
+ ldrb r2, [r5, #-2546] @ zero_extendqisi2
8893
+ cmp r2, r3
8894
+ bcs .L1457
8895
+.L1456:
8896
+ mov r0, r4
8897
+ bl zbuf_free
8898
+ ldrb r0, [r6, #2796] @ zero_extendqisi2
8899
+ pop {r4, r5, r6, pc}
8900
+.L1465:
86708901 .align 2
8671
-.L1476:
8672
- .word .LANCHOR1+1768
8902
+.L1464:
8903
+ .word .LANCHOR1+1597
86738904 .word .LC0
8905
+ .word .LANCHOR0+2820
8906
+ .word .LANCHOR3
86748907 .word .LANCHOR0
8675
- .word .LANCHOR0+2824
86768908 .fnend
86778909 .size ftl_write_buf, .-ftl_write_buf
86788910 .align 2
86798911 .global ftl_write_completed
8912
+ .syntax unified
8913
+ .arm
8914
+ .fpu softvfp
86808915 .type ftl_write_completed, %function
86818916 ftl_write_completed:
86828917 .fnstart
86838918 @ args = 0, pretend = 0, frame = 0
86848919 @ frame_needed = 0, uses_anonymous_args = 0
8685
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
8920
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
86868921 .save {r4, r5, r6, r7, r8, r9, r10, lr}
8687
- mov r5, #0
8688
- ldr r8, .L1496
8689
- ldr r9, .L1496+4
8922
+ mov r10, #0
8923
+ ldr r8, .L1483
8924
+ ldr r9, .L1483+4
86908925 mov r6, r8
8691
-.L1479:
8692
- ldrb r10, [r8, #2778] @ zero_extendqisi2
8693
- cmp r10, #255
8694
- beq .L1495
8695
- mov r4, #48
8696
- ldr r7, .L1496+8
8697
- mul r4, r4, r10
8698
- add r7, r7, r4
8699
- add r4, r8, r4
8700
- ldrb r3, [r4, #1236] @ zero_extendqisi2
8701
- strb r3, [r8, #2778]
8702
- ldr r3, [r4, #1272]
8703
- cmn r3, #1
8704
- bne .L1480
8705
- ldr r4, .L1496+12
8706
- ldrb r3, [r4, #-2536] @ zero_extendqisi2
8926
+.L1467:
8927
+ ldrb r5, [r8, #2773] @ zero_extendqisi2
8928
+ cmp r5, #255
8929
+ bne .L1478
8930
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
8931
+.L1478:
8932
+ mov r2, #48
8933
+ ldr r3, .L1483+8
8934
+ mul r2, r2, r5
8935
+ add r7, r5, r5, lsl #1
8936
+ add r7, r3, r7, lsl #4
8937
+ add r4, r8, r2
8938
+ ldrb r1, [r4, #1232] @ zero_extendqisi2
8939
+ strb r1, [r8, #2773]
8940
+ ldr r1, [r4, #1268]
8941
+ cmn r1, #1
8942
+ bne .L1468
8943
+ ldr r1, .L1483+12
8944
+ ldrb r3, [r1, #-2542] @ zero_extendqisi2
87078945 cmp r3, #0
8708
- bne .L1481
8709
- ldrb r3, [r4, #-3122] @ zero_extendqisi2
8946
+ bne .L1469
8947
+ ldrb r3, [r1, #-3126] @ zero_extendqisi2
87108948 cmp r3, #0
8711
- beq .L1482
8712
-.L1481:
8713
- ldr r3, [r6, #2804]
8949
+ beq .L1470
8950
+.L1469:
8951
+ ldr r3, [r6, #2800]
87148952 ldr r3, [r3, #156]
87158953 cmp r3, r9
8716
- beq .L1483
8717
-.L1482:
8718
- mov r5, #48
8719
- ldr r3, .L1496+16
8720
- mla r5, r5, r10, r6
8721
- ldrb r1, [r4, #-3130] @ zero_extendqisi2
8954
+ beq .L1471
8955
+.L1470:
8956
+ mov r10, #48
8957
+ ldr r3, .L1483+16
8958
+ mla r10, r10, r5, r6
8959
+ ldrb r1, [r1, #-3136] @ zero_extendqisi2
87228960 ldrh r0, [r3]
8723
- ldrb r3, [r6, #1189] @ zero_extendqisi2
8961
+ ldrb r3, [r6, #1153] @ zero_extendqisi2
8962
+ ldr r2, [r10, #1256]
87248963 rsb r3, r3, #24
8725
- ldr r2, [r5, #1260]
8726
- rsb r3, r0, r3
8727
- mov r2, r2, lsr r0
8964
+ sub r3, r3, r0
8965
+ lsr r2, r2, r0
87288966 mvn r0, #0
8729
- bic r0, r2, r0, asl r3
8967
+ bic r0, r2, r0, lsl r3
87308968 bl __aeabi_uidiv
8731
- ldr r3, [r6, #1092]
8969
+ ldr r3, [r6, #1096]
8970
+ uxth r4, r0
87328971 movw r2, #65535
8972
+ ldr r0, .L1483+20
87338973 ldr r1, [r3, #560]
87348974 cmp r1, r2
8735
- uxth r4, r0
8736
- streq r4, [r3, #560]
8737
- ldreq r2, [r5, #1260]
8738
- ldr r0, .L1496+20
87398975 mov r1, r4
8976
+ streq r4, [r3, #560]
8977
+ ldreq r2, [r10, #1256]
87408978 streq r2, [r3, #564]
87418979 mov r3, #48
8742
- mla r10, r3, r10, r6
8743
- ldr r2, [r10, #1256]
8744
- ldr r3, [r10, #1260]
8980
+ mla r5, r3, r5, r6
8981
+ ldr r3, [r5, #1256]
8982
+ ldr r2, [r5, #1252]
87458983 bl printk
8746
- ldr r3, [r6, #1092]
8984
+ ldr r3, [r6, #1096]
87478985 ldr r2, [r3, #556]
87488986 add r2, r2, #1
87498987 str r2, [r3, #556]
87508988 ldrh r2, [r3, #16]
87518989 cmp r2, r4
87528990 moveq r2, #0
8753
- streqh r2, [r3, #22] @ movhi
8754
- beq .L1483
8991
+ strheq r2, [r3, #22] @ movhi
8992
+ beq .L1471
87558993 ldrh r2, [r3, #48]
87568994 cmp r2, r4
87578995 moveq r2, #0
8758
- streqh r2, [r3, #54] @ movhi
8759
-.L1483:
8996
+ strheq r2, [r3, #54] @ movhi
8997
+.L1471:
87608998 mov r0, r7
8761
- mov r5, #1
8999
+ mov r10, #1
87629000 bl ftl_write_buf
8763
- b .L1479
8764
-.L1480:
8765
- cmp r5, #1
8766
- add r3, r4, #1248
8767
- add r3, r3, #12
8768
- bne .L1488
8769
- ldr r1, [r4, #1256]
8770
- ldr r2, [r4, #1260]
8771
- ldr r0, .L1496+24
9001
+ b .L1467
9002
+.L1468:
9003
+ cmp r10, #1
9004
+ bne .L1476
9005
+ ldr r2, [r4, #1256]
9006
+ ldr r1, [r4, #1252]
9007
+ ldr r0, .L1483+24
87729008 bl printk
87739009 mov r0, r7
87749010 bl ftl_write_buf
8775
- b .L1479
8776
-.L1488:
8777
- ldr r1, [r3, #4]
8778
- ldr r0, [r4, #1256]
8779
- ldrh r2, [r7, #32]
9011
+ b .L1467
9012
+.L1476:
9013
+ add r3, r3, r2
9014
+ ldr r1, [r4, #1260]
9015
+ ldrh r2, [r3, #32]
9016
+ ldr r0, [r4, #1252]
87809017 bl lpa_hash_update_ppa
8781
- ldrb r3, [r4, #1238] @ zero_extendqisi2
8782
- and r5, r3, #4
8783
- ands r5, r5, #255
9018
+ ldrb r3, [r4, #1234] @ zero_extendqisi2
9019
+ tst r3, #4
87849020 bicne r3, r3, #2
8785
- strneb r3, [r4, #1238]
8786
- movne r5, #0
8787
- bne .L1479
9021
+ strbne r3, [r4, #1234]
9022
+ bne .L1467
87889023 mov r0, r7
87899024 bl zbuf_free
8790
- b .L1479
8791
-.L1495:
8792
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
8793
-.L1497:
9025
+ b .L1467
9026
+.L1484:
87949027 .align 2
8795
-.L1496:
9028
+.L1483:
87969029 .word .LANCHOR0
87979030 .word 1145785929
8798
- .word .LANCHOR0+1236
9031
+ .word .LANCHOR0+1232
87999032 .word .LANCHOR3
8800
- .word .LANCHOR3-3132
8801
- .word .LC121
8802
- .word .LC122
9033
+ .word .LANCHOR3-3138
9034
+ .word .LC118
9035
+ .word .LC119
88039036 .fnend
88049037 .size ftl_write_completed, .-ftl_write_completed
88059038 .align 2
88069039 .global zftl_add_read_buf
9040
+ .syntax unified
9041
+ .arm
9042
+ .fpu softvfp
88079043 .type zftl_add_read_buf, %function
88089044 zftl_add_read_buf:
88099045 .fnstart
88109046 @ args = 0, pretend = 0, frame = 0
88119047 @ frame_needed = 0, uses_anonymous_args = 0
8812
- stmfd sp!, {r3, r4, r5, lr}
8813
- .save {r3, r4, r5, lr}
8814
- subs r4, r0, #0
8815
- bne .L1499
8816
- ldr r1, .L1504
8817
- movw r2, #1150
8818
- ldr r0, .L1504+4
9048
+ push {r4, r5, r6, lr}
9049
+ .save {r4, r5, r6, lr}
9050
+ subs r5, r0, #0
9051
+ bne .L1486
9052
+ movw r2, #1151
9053
+ ldr r1, .L1491
9054
+ ldr r0, .L1491+4
88199055 bl printk
88209056 bl dump_stack
8821
- ldmfd sp!, {r3, r4, r5, lr}
9057
+ pop {r4, r5, r6, lr}
88229058 b print_ftl_debug_info
8823
-.L1499:
8824
- ldr r3, .L1504+8
8825
- ldrb r2, [r4, #40] @ zero_extendqisi2
8826
- ldrb r3, [r3, #2772] @ zero_extendqisi2
9059
+.L1486:
9060
+ ldr r4, .L1491+8
9061
+ ldrb r2, [r5, #40] @ zero_extendqisi2
9062
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
88279063 cmp r2, r3
8828
- bls .L1501
8829
- ldr r1, .L1504
8830
- movw r2, #1157
8831
- ldr r0, .L1504+4
9064
+ bls .L1488
9065
+ movw r2, #1158
9066
+ ldr r1, .L1491
9067
+ ldr r0, .L1491+4
88329068 bl printk
88339069 bl dump_stack
8834
-.L1501:
8835
- ldr r5, .L1504+12
8836
- mov r1, r4
8837
- ldr r0, .L1504+16
9070
+.L1488:
9071
+ mov r1, r5
9072
+ ldr r0, .L1491+12
88389073 bl buf_add_tail
8839
- ldrb r3, [r5, #-2529] @ zero_extendqisi2
9074
+ ldrb r3, [r4, #-2535] @ zero_extendqisi2
88409075 add r3, r3, #1
8841
- strb r3, [r5, #-2529]
8842
- ldmfd sp!, {r3, r4, r5, pc}
8843
-.L1505:
9076
+ strb r3, [r4, #-2535]
9077
+ pop {r4, r5, r6, pc}
9078
+.L1492:
88449079 .align 2
8845
-.L1504:
8846
- .word .LANCHOR1+1784
9080
+.L1491:
9081
+ .word .LANCHOR1+1611
88479082 .word .LC0
8848
- .word .LANCHOR0
88499083 .word .LANCHOR3
8850
- .word .LANCHOR3-2530
9084
+ .word .LANCHOR3-2536
88519085 .fnend
88529086 .size zftl_add_read_buf, .-zftl_add_read_buf
88539087 .align 2
88549088 .global sblk_init
9089
+ .syntax unified
9090
+ .arm
9091
+ .fpu softvfp
88559092 .type sblk_init, %function
88569093 sblk_init:
88579094 .fnstart
88589095 @ args = 0, pretend = 0, frame = 0
88599096 @ frame_needed = 0, uses_anonymous_args = 0
88609097 @ link register save eliminated.
8861
- ldr r3, .L1507
9098
+ ldr r3, .L1494
88629099 mvn r2, #0
88639100 mov r0, #0
8864
- strb r2, [r3, #2775]
8865
- strb r2, [r3, #2778]
8866
- strb r2, [r3, #2776]
8867
- strb r2, [r3, #2777]
9101
+ strb r2, [r3, #2770]
9102
+ strb r2, [r3, #2773]
9103
+ strb r2, [r3, #2771]
9104
+ strb r2, [r3, #2772]
88689105 bx lr
8869
-.L1508:
9106
+.L1495:
88709107 .align 2
8871
-.L1507:
9108
+.L1494:
88729109 .word .LANCHOR0
88739110 .fnend
88749111 .size sblk_init, .-sblk_init
88759112 .align 2
88769113 .global dump_sblk_queue
9114
+ .syntax unified
9115
+ .arm
9116
+ .fpu softvfp
88779117 .type dump_sblk_queue, %function
88789118 dump_sblk_queue:
88799119 .fnstart
88809120 @ args = 0, pretend = 0, frame = 0
88819121 @ frame_needed = 0, uses_anonymous_args = 0
8882
- stmfd sp!, {r4, r5, r6, lr}
9122
+ push {r4, r5, r6, lr}
88839123 .save {r4, r5, r6, lr}
8884
- ldr r4, .L1519
8885
- ldr r0, .L1519+4
8886
- ldrb r1, [r4, #2775] @ zero_extendqisi2
9124
+ ldr r5, .L1506
9125
+ ldr r0, .L1506+4
9126
+ ldrb r1, [r5, #2770] @ zero_extendqisi2
88879127 bl printk
8888
- ldrb r4, [r4, #2775] @ zero_extendqisi2
9128
+ ldrb r4, [r5, #2770] @ zero_extendqisi2
88899129 cmp r4, #255
8890
- ldmeqfd sp!, {r4, r5, r6, pc}
8891
- ldr r3, .L1519+8
8892
- mov r2, #48
8893
- mov r6, r2
8894
- mla r4, r2, r4, r3
8895
- mov r5, r3
8896
-.L1511:
8897
- ldrb r1, [r4, #1] @ zero_extendqisi2
8898
- ldrb r2, [r4, #42] @ zero_extendqisi2
9130
+ popeq {r4, r5, r6, pc}
9131
+ add r4, r4, r4, lsl #1
9132
+ add r5, r5, #1232
9133
+ ldr r6, .L1506+8
9134
+ add r4, r5, r4, lsl #4
9135
+.L1498:
88999136 ldr r3, [r4, #24]
8900
- ldr r0, .L1519+12
9137
+ mov r0, r6
9138
+ ldrb r2, [r4, #42] @ zero_extendqisi2
9139
+ ldrb r1, [r4, #1] @ zero_extendqisi2
89019140 bl printk
89029141 ldrb r4, [r4] @ zero_extendqisi2
89039142 cmp r4, #255
8904
- ldmeqfd sp!, {r4, r5, r6, pc}
8905
- mla r4, r6, r4, r5
8906
- b .L1511
8907
-.L1520:
9143
+ popeq {r4, r5, r6, pc}
9144
+ add r4, r4, r4, lsl #1
9145
+ add r4, r5, r4, lsl #4
9146
+ b .L1498
9147
+.L1507:
89089148 .align 2
8909
-.L1519:
9149
+.L1506:
89109150 .word .LANCHOR0
8911
- .word .LC123
8912
- .word .LANCHOR0+1236
8913
- .word .LC124
9151
+ .word .LC120
9152
+ .word .LC121
89149153 .fnend
89159154 .size dump_sblk_queue, .-dump_sblk_queue
89169155 .align 2
89179156 .global queue_lun_state
9157
+ .syntax unified
9158
+ .arm
9159
+ .fpu softvfp
89189160 .type queue_lun_state, %function
89199161 queue_lun_state:
89209162 .fnstart
8921
- @ args = 0, pretend = 0, frame = 0
9163
+ @ args = 0, pretend = 0, frame = 8
89229164 @ frame_needed = 0, uses_anonymous_args = 0
8923
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9165
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
89249166 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
8925
- ldr lr, .L1537
8926
- ldrb ip, [lr, #2775] @ zero_extendqisi2
9167
+ .pad #12
9168
+ ldr lr, .L1520
9169
+ ldrb ip, [lr, #2770] @ zero_extendqisi2
89279170 cmp ip, #255
8928
- beq .L1529
8929
- ldr r4, .L1537+4
9171
+ beq .L1516
9172
+ ldrb r3, [lr, #1153] @ zero_extendqisi2
89309173 mov r2, #1
8931
- ldrb r3, [lr, #1189] @ zero_extendqisi2
8932
- mov r9, #48
8933
- sub r5, r4, #3120
8934
- rsb r7, r3, #24
8935
- ldrb r4, [r4, #-3130] @ zero_extendqisi2
8936
- ldrh r8, [r5, #-12]
8937
- mov r3, r2, asl r3
8938
- sub r4, r4, #1
9174
+ mov r8, #48
9175
+ movw r10, #1274
9176
+ rsb r6, r3, #24
9177
+ lsl r3, r2, r3
89399178 sub r3, r3, #1
8940
- rsb r5, r8, r7
8941
- mov r2, r2, asl r5
8942
- uxth r4, r4
8943
- sub r2, r2, #1
89449179 uxth r3, r3
8945
- and r5, r4, r0, asr r8
8946
- and r10, r3, r0, asr r7
9180
+ and r4, r3, r0, asr r6
9181
+ str r4, [sp]
9182
+ ldr r4, .L1520+4
9183
+ sub r5, r4, #3136
9184
+ ldrb r4, [r4, #-3136] @ zero_extendqisi2
9185
+ ldrh r7, [r5, #-2]
9186
+ sub r4, r4, #1
9187
+ sub r5, r6, r7
9188
+ uxth r4, r4
9189
+ lsl r2, r2, r5
9190
+ and r0, r4, r0, asr r7
9191
+ sub r2, r2, #1
89479192 uxth r2, r2
9193
+ and r0, r0, r2
9194
+ str r0, [sp, #4]
9195
+.L1515:
9196
+ mla r0, r8, ip, lr
9197
+ ldr r9, [sp]
9198
+ movw r5, #1256
9199
+ ldr r5, [r0, r5]
9200
+ and fp, r3, r5, lsr r6
9201
+ cmp r9, fp
9202
+ bne .L1510
9203
+ and r5, r4, r5, lsr r7
9204
+ ldr r9, [sp, #4]
9205
+ ldrb r0, [r0, r10] @ zero_extendqisi2
89489206 and r5, r5, r2
8949
-.L1528:
8950
- mla r0, r9, ip, lr
8951
- ldr r6, [r0, #1260]
8952
- and fp, r3, r6, lsr r7
8953
- cmp fp, r10
8954
- bne .L1523
8955
- and r6, r4, r6, lsr r8
8956
- ldrb r0, [r0, #1278] @ zero_extendqisi2
8957
- and r6, r6, r2
8958
- cmp r6, r5
8959
- bne .L1524
9207
+ cmp r9, r5
9208
+ bne .L1511
89609209 cmp r1, #1
8961
- ldmnefd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8962
- sub r6, r0, #7
8963
- tst r6, #253
8964
- beq .L1523
8965
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8966
-.L1524:
9210
+ bne .L1508
9211
+.L1513:
9212
+ sub r5, r0, #7
9213
+ tst r5, #253
9214
+ beq .L1510
9215
+.L1508:
9216
+ add sp, sp, #12
9217
+ @ sp needed
9218
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
9219
+.L1511:
89679220 cmp r1, #3
89689221 ldrls pc, [pc, r1, asl #2]
8969
- b .L1523
8970
-.L1525:
8971
- .word .L1522
8972
- .word .L1526
8973
- .word .L1527
8974
- .word .L1522
8975
-.L1526:
8976
- sub r6, r0, #7
8977
- tst r6, #253
8978
- beq .L1523
8979
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8980
-.L1527:
9222
+ b .L1510
9223
+.L1512:
9224
+ .word .L1508
9225
+ .word .L1513
9226
+ .word .L1514
9227
+ .word .L1508
9228
+.L1514:
89819229 cmp r0, #11
8982
- ldmnefd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8983
-.L1523:
8984
- mla ip, r9, ip, lr
8985
- ldrb ip, [ip, #1236] @ zero_extendqisi2
9230
+ bne .L1508
9231
+.L1510:
9232
+ mla ip, r8, ip, lr
9233
+ ldrb ip, [ip, #1232] @ zero_extendqisi2
89869234 cmp ip, #255
8987
- bne .L1528
8988
-.L1529:
9235
+ bne .L1515
9236
+.L1516:
89899237 mov r0, #0
8990
-.L1522:
8991
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
8992
-.L1538:
9238
+ b .L1508
9239
+.L1521:
89939240 .align 2
8994
-.L1537:
9241
+.L1520:
89959242 .word .LANCHOR0
89969243 .word .LANCHOR3
89979244 .fnend
89989245 .size queue_lun_state, .-queue_lun_state
89999246 .align 2
90009247 .global queue_remove_completed_req
9248
+ .syntax unified
9249
+ .arm
9250
+ .fpu softvfp
90019251 .type queue_remove_completed_req, %function
90029252 queue_remove_completed_req:
90039253 .fnstart
9004
- @ args = 0, pretend = 0, frame = 8
9254
+ @ args = 0, pretend = 0, frame = 16
90059255 @ frame_needed = 0, uses_anonymous_args = 0
9006
- ldr r3, .L1566
9256
+ ldr r3, .L1548
90079257 mov ip, #0
9008
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
9258
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
90099259 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9010
- .pad #12
9260
+ .pad #20
9261
+ sub sp, sp, #20
9262
+ ldr r7, .L1548+4
90119263 mov r0, #48
9012
- ldrb r1, [r3, #2777] @ zero_extendqisi2
9013
- mov r8, r3
9014
- ldrb r2, [r3, #2775] @ zero_extendqisi2
9015
- mvn r9, #0
9016
- ldrb r6, [r3, #2776] @ zero_extendqisi2
9017
- mov r4, r3
9018
- ldrb r7, [r3, #2778] @ zero_extendqisi2
9019
- mov r5, r0
9020
- ldr r10, .L1566+4
9264
+ mvn r4, #0
9265
+ movw r5, #1275
9266
+ ldrb r1, [r3, #2771] @ zero_extendqisi2
9267
+ movw r6, #1233
9268
+ ldrb r2, [r3, #2770] @ zero_extendqisi2
9269
+ add r8, r3, #1232
9270
+ add r9, r7, #1
9271
+ add r10, r7, #2
9272
+ str r1, [sp, #8]
9273
+ ldrb r1, [r3, #2773] @ zero_extendqisi2
9274
+ str r1, [sp, #12]
9275
+ ldrb r1, [r3, #2772] @ zero_extendqisi2
90219276 str r1, [sp, #4]
9022
-.L1540:
9277
+.L1523:
90239278 cmp r2, #255
9024
- beq .L1541
9279
+ beq .L1524
90259280 mla fp, r0, r2, r3
9281
+ movw lr, #1274
90269282 mov r1, r2
9027
- ldrb lr, [fp, #1278] @ zero_extendqisi2
9283
+ ldrb lr, [fp, lr] @ zero_extendqisi2
90289284 sub lr, lr, #12
90299285 cmp lr, #1
9030
- bls .L1542
9286
+ bls .L1525
90319287 cmp ip, #0
9032
- ldrne r3, .L1566
9033
- beq .L1539
9034
- b .L1564
9035
-.L1542:
9288
+ beq .L1522
9289
+.L1547:
9290
+ strb r2, [r3, #2770]
9291
+ b .L1522
9292
+.L1525:
90369293 mul ip, r0, r1
9037
- ldrb r2, [fp, #1236] @ zero_extendqisi2
9038
- add lr, r8, ip
9039
- ldrb fp, [lr, #1279] @ zero_extendqisi2
9040
- strb r9, [lr, #1236]
9294
+ ldrb r2, [fp, #1232] @ zero_extendqisi2
9295
+ add lr, r3, ip
9296
+ ldrb fp, [lr, r5] @ zero_extendqisi2
9297
+ strb r4, [lr, #1232]
90419298 cmp fp, #1
9042
- bne .L1545
9043
- add ip, r10, ip
9299
+ bne .L1528
9300
+ add ip, r8, ip
90449301 ldrh ip, [ip, #34]
90459302 cmp ip, #0
9046
- moveq ip, r7
9047
- ldreq lr, .L1566+8
9303
+ ldreq ip, [sp, #12]
9304
+ moveq lr, r10
90489305 ldrne ip, [sp, #4]
9049
- ldrne lr, .L1566+12
9050
- b .L1546
9051
-.L1545:
9052
- cmp fp, #0
9053
- beq .L1565
9054
-.L1547:
9055
- mov ip, #1
9056
- b .L1540
9057
-.L1565:
9058
- ldr ip, [lr, #1256]
9059
- cmn ip, #1
9060
- movne ip, r6
9061
- ldrne lr, .L1566+16
9062
- beq .L1547
9063
-.L1546:
9306
+ movne lr, r9
9307
+.L1529:
90649308 cmp ip, #255
9065
- bne .L1551
9066
- strb r2, [r3, #2775]
9309
+ bne .L1534
9310
+ strb r2, [r3, #2770]
90679311 mov r2, #48
9068
- mla r1, r2, r1, r3
9069
- ldrb r3, [r1, #1237] @ zero_extendqisi2
9312
+ mla r3, r2, r1, r3
9313
+ ldrb r3, [r3, #1233] @ zero_extendqisi2
90709314 strb r3, [lr]
9071
- b .L1539
9072
-.L1551:
9315
+.L1522:
9316
+ add sp, sp, #20
9317
+ @ sp needed
9318
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
9319
+.L1528:
9320
+ cmp fp, #0
9321
+ bne .L1530
9322
+ ldr ip, [lr, #1252]
9323
+ cmn ip, #1
9324
+ ldrne ip, [sp, #8]
9325
+ movne lr, r7
9326
+ bne .L1529
9327
+.L1530:
9328
+ mov ip, #1
9329
+ b .L1523
9330
+.L1534:
90739331 mov lr, ip
90749332 mla ip, r0, ip, r3
9075
- ldrb ip, [ip, #1236] @ zero_extendqisi2
9333
+ ldrb ip, [ip, #1232] @ zero_extendqisi2
90769334 cmp ip, #255
9077
- bne .L1551
9078
- mla r1, r5, r1, r4
9079
- mla lr, r5, lr, r4
9080
- ldrb r1, [r1, #1237] @ zero_extendqisi2
9081
- strb r1, [lr, #1236]
9082
- b .L1547
9083
-.L1541:
9335
+ bne .L1534
9336
+ mla r1, r0, r1, r3
9337
+ mla lr, r0, lr, r3
9338
+ ldrb r1, [r1, r6] @ zero_extendqisi2
9339
+ strb r1, [lr, #1232]
9340
+ b .L1530
9341
+.L1524:
90849342 cmp ip, #0
9085
- beq .L1539
9343
+ beq .L1522
90869344 mvn r2, #0
9087
-.L1564:
9088
- strb r2, [r3, #2775]
9089
-.L1539:
9090
- add sp, sp, #12
9091
- @ sp needed
9092
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
9093
-.L1567:
9345
+ b .L1547
9346
+.L1549:
90949347 .align 2
9095
-.L1566:
9348
+.L1548:
90969349 .word .LANCHOR0
9097
- .word .LANCHOR0+1236
9098
- .word .LANCHOR0+2778
9099
- .word .LANCHOR0+2777
9100
- .word .LANCHOR0+2776
9350
+ .word .LANCHOR0+2771
91019351 .fnend
91029352 .size queue_remove_completed_req, .-queue_remove_completed_req
91039353 .align 2
91049354 .global pm_select_ram_region
9355
+ .syntax unified
9356
+ .arm
9357
+ .fpu softvfp
91059358 .type pm_select_ram_region, %function
91069359 pm_select_ram_region:
91079360 .fnstart
91089361 @ args = 0, pretend = 0, frame = 0
91099362 @ frame_needed = 0, uses_anonymous_args = 0
9110
- ldr r2, .L1583
9363
+ ldr r1, .L1561
91119364 mov r3, #0
9112
- movw r1, #65535
9113
-.L1570:
9114
- mov ip, r3, asl #3
9115
- uxth r0, r3
9116
- ldrh ip, [ip, r2]
9117
- cmp ip, r1
9118
- ldr ip, .L1583
9119
- bxeq lr
9365
+ movw r0, #65535
9366
+ push {r4, r5, r6, lr}
9367
+ .save {r4, r5, r6, lr}
9368
+ add r2, r1, #4
9369
+.L1552:
9370
+ lsl ip, r3, #3
9371
+ uxth r4, r3
9372
+ ldrh ip, [ip, r1]
9373
+ cmp ip, r0
9374
+ beq .L1551
91209375 add r3, r3, #1
91219376 cmp r3, #32
9122
- bne .L1570
9123
- mov r2, #0
9124
- mov r0, r3
9125
- mov r1, #32768
9126
- stmfd sp!, {r4, r5, r6, lr}
9127
- .save {r4, r5, r6, lr}
9128
-.L1572:
9129
- add r3, ip, r2, asl #3
9130
- uxth lr, r2
9131
- ldrh r3, [r3, #2]
9132
- tst r3, #32768
9133
- bne .L1571
9134
- cmp r3, r1
9135
- movcc r1, r3
9136
- movcc r0, lr
9137
-.L1571:
9138
- add r2, r2, #1
9139
- cmp r2, #32
9140
- bne .L1572
9141
- cmp r0, #32
9142
- mov r4, r0
9143
- ldmnefd sp!, {r4, r5, r6, pc}
9144
- ldr r2, .L1583+4
9145
- mov r3, #0
9377
+ bne .L1552
9378
+ mov r4, r3
9379
+ mov r1, #0
9380
+ mov r3, #32768
9381
+ sub ip, r2, #4
9382
+.L1554:
9383
+ add r0, ip, r1, lsl #3
9384
+ uxth lr, r1
9385
+ ldrh r0, [r0, #2]
9386
+ tst r0, #32768
9387
+ bne .L1553
9388
+ cmp r0, r3
9389
+ movcc r3, r0
9390
+ movcc r4, lr
9391
+.L1553:
9392
+ add r1, r1, #1
9393
+ cmp r1, #32
9394
+ bne .L1554
9395
+ cmp r4, #32
9396
+ bne .L1551
9397
+ ldr r3, .L1561+4
91469398 mvn r1, #0
9147
- sub r2, r2, #2528
9148
- ldrb r5, [r2, #256] @ zero_extendqisi2
9149
-.L1574:
9150
- mov lr, r3, asl #3
9151
- uxth r6, r3
9152
- add r0, ip, lr
9399
+ sub r2, r2, #4
9400
+ ldrb lr, [r3, #-2276] @ zero_extendqisi2
9401
+ mov r3, #0
9402
+.L1556:
9403
+ lsl ip, r3, #3
9404
+ uxth r5, r3
9405
+ add r0, r2, ip
91539406 ldrh r0, [r0, #2]
91549407 cmp r0, r1
9155
- bcs .L1573
9156
- ldrh lr, [lr, r2]
9157
- cmp lr, r5
9408
+ bcs .L1555
9409
+ ldrh ip, [ip, r2]
9410
+ cmp ip, lr
91589411 movne r1, r0
9159
- movne r4, r6
9160
-.L1573:
9412
+ movne r4, r5
9413
+.L1555:
91619414 add r3, r3, #1
91629415 cmp r3, #32
9163
- bne .L1574
9416
+ bne .L1556
91649417 cmp r4, #32
9165
- bne .L1575
9166
- ldr r1, .L1583+8
9418
+ bne .L1551
91679419 movw r2, #377
9168
- ldr r0, .L1583+12
9420
+ ldr r1, .L1561+8
9421
+ ldr r0, .L1561+12
91699422 bl printk
91709423 bl dump_stack
9171
-.L1575:
9424
+.L1551:
91729425 mov r0, r4
9173
- ldmfd sp!, {r4, r5, r6, pc}
9174
-.L1584:
9426
+ pop {r4, r5, r6, pc}
9427
+.L1562:
91759428 .align 2
9176
-.L1583:
9177
- .word .LANCHOR3-2528
9429
+.L1561:
9430
+ .word .LANCHOR3-2532
91789431 .word .LANCHOR3
9179
- .word .LANCHOR1+1804
9432
+ .word .LANCHOR1+1629
91809433 .word .LC0
91819434 .fnend
91829435 .size pm_select_ram_region, .-pm_select_ram_region
91839436 .align 2
91849437 .global ftl_memset
9438
+ .syntax unified
9439
+ .arm
9440
+ .fpu softvfp
91859441 .type ftl_memset, %function
91869442 ftl_memset:
91879443 .fnstart
....@@ -9193,518 +9449,503 @@
91939449 .size ftl_memset, .-ftl_memset
91949450 .align 2
91959451 .global flash_lsb_page_tbl_build
9452
+ .syntax unified
9453
+ .arm
9454
+ .fpu softvfp
91969455 .type flash_lsb_page_tbl_build, %function
91979456 flash_lsb_page_tbl_build:
91989457 .fnstart
91999458 @ args = 0, pretend = 0, frame = 0
92009459 @ frame_needed = 0, uses_anonymous_args = 0
9201
- stmfd sp!, {r4, r5, r6, lr}
9460
+ push {r4, r5, r6, lr}
92029461 .save {r4, r5, r6, lr}
92039462 mov r6, r0
9204
- ldr r4, .L1630
9463
+ ldr r5, .L1618
92059464 mov r0, #1024
9206
- ldr r3, [r4, #1096]
9465
+ ldr r3, [r5, #1104]
92079466 ldrb r1, [r3, #12] @ zero_extendqisi2
92089467 bl __aeabi_idiv
92099468 cmp r6, #0
9210
- uxth r5, r0
9211
- bne .L1587
9212
- add r4, r4, #4
9213
-.L1588:
9214
- mov r3, r6, asl #1
9215
- strh r6, [r3, r4] @ movhi
9469
+ uxth r4, r0
9470
+ bne .L1565
9471
+ add r5, r5, #4
9472
+.L1566:
9473
+ lsl r3, r6, #1
9474
+ strh r6, [r3, r5] @ movhi
92169475 add r6, r6, #1
92179476 cmp r6, #512
9218
- bne .L1588
9219
-.L1592:
9220
- mov r1, #255
9221
- ldr r0, .L1630+4
9477
+ bne .L1566
9478
+.L1572:
92229479 mov r2, #2048
9480
+ mov r1, #255
9481
+ ldr r0, .L1618+4
92239482 bl ftl_memset
9483
+ ldr ip, .L1618+8
92249484 mov r3, #0
9225
- ldr r1, .L1630+8
9226
- ldr r0, .L1630+4
9227
- b .L1589
9228
-.L1587:
9485
+ ldr r0, .L1618+4
9486
+.L1567:
9487
+ lsl r2, r3, #1
9488
+ add r3, r3, #1
9489
+ ldrh r2, [r2, ip]
9490
+ lsl r1, r2, #1
9491
+ strh r2, [r0, r1] @ movhi
9492
+ uxth r2, r3
9493
+ cmp r2, r4
9494
+ bcc .L1567
9495
+ pop {r4, r5, r6, pc}
9496
+.L1565:
92299497 cmp r6, #1
9230
- bne .L1590
9231
- add r4, r4, #4
9498
+ bne .L1568
92329499 mov r3, #0
9233
-.L1591:
9500
+ add r5, r5, #4
9501
+.L1571:
9502
+ cmp r3, #3
92349503 uxth r2, r3
9235
- mov ip, r3, asl #1
9236
- cmp r2, #3
9237
- movls r0, #0
9238
- movhi r0, #1
9239
- bics r1, r0, r3
9504
+ bls .L1569
9505
+ tst r2, #1
9506
+ movne r1, #3
9507
+ moveq r1, #2
9508
+ rsb r2, r1, r2, lsl #1
9509
+ uxth r2, r2
9510
+.L1569:
9511
+ lsl r1, r3, #1
92409512 add r3, r3, #1
9241
- movne r1, #2
9242
- moveq r1, #3
9243
- cmp r0, #0
9244
- rsb r1, r1, r2, asl #1
9245
- movne r2, r1
92469513 cmp r3, #512
9247
- strh r2, [ip, r4] @ movhi
9248
- bne .L1591
9249
- b .L1592
9250
-.L1590:
9514
+ strh r2, [r1, r5] @ movhi
9515
+ bne .L1571
9516
+ b .L1572
9517
+.L1568:
92519518 cmp r6, #2
9252
- bne .L1593
9253
- add r4, r4, #4
9254
- mov r3, #0
9255
-.L1594:
9256
- uxth r2, r3
9257
- mov r1, r3, asl #1
9519
+ bne .L1573
9520
+ mov r2, #0
9521
+ add r5, r5, #4
9522
+.L1575:
9523
+ uxth r3, r2
92589524 cmp r2, #1
9259
- add r3, r3, #1
9260
- mov r0, r2, asl #1
9261
- subhi r2, r0, #1
9262
- cmp r3, #512
9263
- strh r2, [r1, r4] @ movhi
9264
- bne .L1594
9265
- b .L1592
9266
-.L1593:
9525
+ lsl r1, r2, #1
9526
+ add r2, r2, #1
9527
+ lslhi r3, r3, #1
9528
+ subhi r3, r3, #1
9529
+ uxthhi r3, r3
9530
+ cmp r2, #512
9531
+ strh r3, [r1, r5] @ movhi
9532
+ bne .L1575
9533
+ b .L1572
9534
+.L1573:
92679535 cmp r6, #3
9268
- bne .L1595
9269
- add r4, r4, #4
9536
+ bne .L1576
92709537 mov r3, #0
9271
-.L1596:
9538
+ add r5, r5, #4
9539
+.L1579:
9540
+ cmp r3, #5
92729541 uxth r2, r3
9273
- mov ip, r3, asl #1
9274
- cmp r2, #5
9275
- movls r0, #0
9276
- movhi r0, #1
9277
- bics r1, r0, r3
9542
+ bls .L1577
9543
+ tst r2, #1
9544
+ movne r1, #5
9545
+ moveq r1, #4
9546
+ rsb r2, r1, r2, lsl #1
9547
+ uxth r2, r2
9548
+.L1577:
9549
+ lsl r1, r3, #1
92789550 add r3, r3, #1
9279
- movne r1, #4
9280
- moveq r1, #5
9281
- cmp r0, #0
9282
- rsb r1, r1, r2, asl #1
9283
- movne r2, r1
92849551 cmp r3, #512
9285
- strh r2, [ip, r4] @ movhi
9286
- bne .L1596
9287
- b .L1592
9288
-.L1595:
9552
+ strh r2, [r1, r5] @ movhi
9553
+ bne .L1579
9554
+ b .L1572
9555
+.L1576:
92899556 cmp r6, #4
9557
+ mov r2, r5
92909558 mov r3, #0
9291
- bne .L1597
9292
- strh r3, [r4, #4] @ movhi
9559
+ bne .L1580
9560
+ strh r3, [r5, #4] @ movhi
92939561 mov r3, #1
9294
- strh r6, [r4, #12] @ movhi
9295
- strh r3, [r4, #6] @ movhi
9562
+ strh r3, [r5, #6] @ movhi
92969563 mov r3, #2
9297
- strh r3, [r4, #8] @ movhi
9564
+ strh r3, [r5, #8] @ movhi
92989565 mov r3, #3
9299
- strh r3, [r4, #10] @ movhi
9566
+ strh r3, [r5, #10] @ movhi
93009567 mov r3, #5
9301
- strh r3, [r4, #14] @ movhi
9568
+ strh r3, [r5, #14] @ movhi
93029569 mov r3, #7
9303
- strh r3, [r4, #16] @ movhi
9570
+ strh r3, [r5, #16] @ movhi
93049571 mov r3, #8
9305
- strh r3, [r4, #18]! @ movhi
9306
-.L1598:
9572
+ strh r6, [r5, #12] @ movhi
9573
+ strh r3, [r5, #18]! @ movhi
9574
+.L1582:
93079575 tst r3, #1
93089576 movne r2, #7
93099577 moveq r2, #6
9310
- rsb r2, r2, r3, asl #1
9578
+ rsb r2, r2, r3, lsl #1
93119579 add r3, r3, #1
9312
- strh r2, [r4, #2]! @ movhi
93139580 uxth r3, r3
9581
+ strh r2, [r5, #2]! @ movhi
93149582 cmp r3, #512
9315
- bne .L1598
9316
- b .L1592
9317
-.L1597:
9583
+ bne .L1582
9584
+ b .L1572
9585
+.L1580:
93189586 cmp r6, #5
9319
- bne .L1599
9320
- add r4, r4, #4
9321
-.L1600:
9322
- mov r2, r3, asl #1
9323
- strh r3, [r2, r4] @ movhi
9587
+ bne .L1583
9588
+ add r1, r5, #4
9589
+.L1584:
9590
+ lsl r0, r3, #1
9591
+ strh r3, [r0, r1] @ movhi
93249592 add r3, r3, #1
93259593 cmp r3, #16
9326
- bne .L1600
9327
- ldr r2, .L1630+12
9328
-.L1601:
9594
+ bne .L1584
9595
+ add r2, r2, #34
9596
+.L1585:
93299597 strh r3, [r2, #2]! @ movhi
93309598 add r3, r3, #2
93319599 uxth r3, r3
93329600 cmp r3, #1008
9333
- bne .L1601
9334
- b .L1592
9335
-.L1599:
9601
+ bne .L1585
9602
+ b .L1572
9603
+.L1583:
93369604 cmp r6, #8
9337
- bne .L1602
9338
- add r4, r4, #4
9339
-.L1603:
9340
- strh r3, [r3, r4] @ movhi
9605
+ bne .L1586
9606
+ add r5, r5, #4
9607
+.L1587:
9608
+ strh r3, [r3, r5] @ movhi
93419609 add r3, r3, #2
93429610 cmp r3, #1024
9343
- bne .L1603
9344
- b .L1592
9345
-.L1602:
9611
+ bne .L1587
9612
+ b .L1572
9613
+.L1586:
93469614 cmp r6, #9
9347
- bne .L1604
9348
- strh r3, [r4, #4] @ movhi
9349
- movw r2, #1021
9615
+ bne .L1588
9616
+ strh r3, [r5, #4] @ movhi
93509617 mov r3, #1
9351
- strh r3, [r4, #6] @ movhi
9618
+ strh r3, [r5, #6] @ movhi
93529619 mov r3, #2
9353
- strh r3, [r4, #8]! @ movhi
9620
+ strh r3, [r5, #8]! @ movhi
9621
+ movw r2, #1021
93549622 mov r3, #3
9355
-.L1605:
9356
- strh r3, [r4, #2]! @ movhi
9623
+.L1589:
9624
+ strh r3, [r5, #2]! @ movhi
93579625 add r3, r3, #2
93589626 uxth r3, r3
93599627 cmp r3, r2
9360
- bne .L1605
9361
- b .L1592
9362
-.L1604:
9628
+ bne .L1589
9629
+ b .L1572
9630
+.L1588:
93639631 cmp r6, #10
9364
- bne .L1606
9365
- add r4, r4, #4
9366
-.L1607:
9367
- mov r2, r3, asl #1
9368
- strh r3, [r2, r4] @ movhi
9632
+ bne .L1590
9633
+ add r1, r5, #4
9634
+.L1591:
9635
+ lsl r0, r3, #1
9636
+ strh r3, [r0, r1] @ movhi
93699637 add r3, r3, #1
93709638 cmp r3, #63
9371
- bne .L1607
9372
- ldr r2, .L1630+16
9639
+ bne .L1591
9640
+ add r2, r2, #128
93739641 movw r1, #961
9374
-.L1608:
9642
+.L1592:
93759643 strh r3, [r2, #2]! @ movhi
93769644 add r3, r3, #2
93779645 uxth r3, r3
93789646 cmp r3, r1
9379
- bne .L1608
9380
- b .L1592
9381
-.L1606:
9647
+ bne .L1592
9648
+ b .L1572
9649
+.L1590:
93829650 cmp r6, #11
9383
- bne .L1609
9384
- ldr r2, .L1630+8
9651
+ bne .L1593
9652
+ ldr r1, .L1618+8
93859653 mov r3, #0
9386
-.L1610:
9387
- mov r1, r3, asl #1
9388
- strh r3, [r1, r2] @ movhi
9654
+.L1594:
9655
+ lsl r0, r3, #1
9656
+ strh r3, [r0, r1] @ movhi
93899657 add r3, r3, #1
93909658 cmp r3, #8
9391
- bne .L1610
9392
- ldr r1, .L1630+20
9393
-.L1611:
9659
+ bne .L1594
9660
+ add r2, r2, #18
9661
+.L1596:
93949662 tst r3, #1
9395
- movne r2, #7
9396
- moveq r2, #6
9397
- rsb r2, r2, r3, asl #1
9663
+ movne r1, #7
9664
+ moveq r1, #6
9665
+ rsb r1, r1, r3, lsl #1
93989666 add r3, r3, #1
9399
- strh r2, [r1, #2]! @ movhi
94009667 uxth r3, r3
9668
+ strh r1, [r2, #2]! @ movhi
94019669 cmp r3, #512
9402
- bne .L1611
9403
- b .L1592
9404
-.L1609:
9670
+ bne .L1596
9671
+ b .L1572
9672
+.L1593:
94059673 cmp r6, #13
9406
- bne .L1592
9407
- ldr r2, .L1630+24
9674
+ bne .L1572
9675
+ ldr r2, .L1618+12
94089676 mov r3, #0
9409
-.L1612:
9677
+.L1597:
94109678 strh r3, [r2, #2]! @ movhi
94119679 add r3, r3, #3
94129680 uxth r3, r3
94139681 cmp r3, #1536
9414
- bne .L1612
9415
- b .L1592
9416
-.L1589:
9417
- uxth r2, r3
9418
- cmp r2, r5
9419
- bcs .L1629
9420
- mov r2, r3, asl #1
9421
- add r3, r3, #1
9422
- ldrh r2, [r2, r1]
9423
- mov ip, r2, asl #1
9424
- strh r2, [r0, ip] @ movhi
9425
- b .L1589
9426
-.L1629:
9427
- ldmfd sp!, {r4, r5, r6, pc}
9428
-.L1631:
9682
+ bne .L1597
9683
+ b .L1572
9684
+.L1619:
94299685 .align 2
9430
-.L1630:
9686
+.L1618:
94319687 .word .LANCHOR0
9432
- .word .LANCHOR3-2268
9688
+ .word .LANCHOR3-2272
94339689 .word .LANCHOR0+4
9434
- .word .LANCHOR0+34
9435
- .word .LANCHOR0+128
9436
- .word .LANCHOR0+18
94379690 .word .LANCHOR0+2
94389691 .fnend
94399692 .size flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
94409693 .align 2
94419694 .global flash_die_info_init
9695
+ .syntax unified
9696
+ .arm
9697
+ .fpu softvfp
94429698 .type flash_die_info_init, %function
94439699 flash_die_info_init:
94449700 .fnstart
94459701 @ args = 0, pretend = 0, frame = 8
94469702 @ frame_needed = 0, uses_anonymous_args = 0
9447
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
9703
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
94489704 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
94499705 .pad #12
9450
- ldr r5, .L1663
9451
- ldr r3, [r5]
9706
+ ldr r4, .L1638
9707
+ ldr r3, [r4]
94529708 tst r3, #4096
9453
- beq .L1633
9454
- ldr r0, .L1663+4
9455
- ldr r1, .L1663+8
9709
+ beq .L1621
9710
+ ldr r1, .L1638+4
9711
+ ldr r0, .L1638+8
94569712 bl printk
9457
-.L1633:
9458
- ldrh r3, [r5, #30]
9713
+.L1621:
9714
+ ldrh r3, [r4, #30]
94599715 mov r7, #0
9460
- ldr r4, .L1663+12
9461
- ldrb r1, [r5, #16] @ zero_extendqisi2
9462
- ldrh r0, [r5, #14]
9463
- add r10, r4, #1200
9464
- strh r3, [r4, #2] @ movhi
9465
- strb r7, [r4, #1101]
9716
+ ldr r5, .L1638+12
9717
+ ldr r9, .L1638+16
9718
+ ldr r6, .L1638+20
9719
+ strh r3, [r5, #2] @ movhi
9720
+ ldrb r1, [r4, #16] @ zero_extendqisi2
9721
+ add r8, r9, #6
9722
+ ldrh r0, [r4, #14]
9723
+ mov r10, r8
9724
+ strb r7, [r5, #1109]
94669725 bl __aeabi_idiv
9467
- ldr r6, .L1663+16
9468
- mov r1, r7
94699726 mov r2, #8
9470
- ldr r9, .L1663+20
9471
- strh r0, [r6, #-220] @ movhi
9472
- ldr r0, .L1663+24
9473
- bl ftl_memset
9474
- sub r0, r6, #216
9727
+ strh r0, [r6, #-224] @ movhi
94759728 mov r1, r7
9476
- mov r2, #32
9729
+ ldr r0, .L1638+24
94779730 bl ftl_memset
9478
-.L1638:
9479
- ldrb r2, [r5, #4] @ zero_extendqisi2
9480
- add r1, r10, r7, asl #3
9481
- ldr r8, .L1663+28
9731
+ mov r2, #32
9732
+ mov r1, r7
9733
+ sub r0, r6, #220
9734
+ bl ftl_memset
9735
+.L1623:
94829736 mov r3, #2
9483
- ldr r0, .L1663+32
9737
+ ldrb r2, [r4, #4] @ zero_extendqisi2
94849738 strb r3, [r7, r9]
9485
- mov r3, #0
9486
-.L1634:
9487
- cmp r3, r2
9488
- bcs .L1661
9489
- add ip, r0, r3
9490
- ldrb lr, [ip, #1] @ zero_extendqisi2
9491
- ldrb ip, [r1, r3] @ zero_extendqisi2
9492
- cmp lr, ip
9493
- bne .L1635
9494
- add r3, r3, #1
9495
- b .L1634
9496
-.L1661:
9497
- ldrb r3, [r4, #1101] @ zero_extendqisi2
9498
- mov r1, #0
9739
+ add r1, r8, r7, lsl #3
9740
+ ldr r0, .L1638+28
9741
+ bl flash_mem_cmp8
9742
+ cmp r0, #0
9743
+ ldr fp, .L1638+28
9744
+ bne .L1622
9745
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
9746
+ add r2, r6, r3, lsl #2
9747
+ str r0, [r2, #-220]
94999748 uxtb r0, r7
9500
- add r2, r6, r3, asl #2
9501
- str r1, [r2, #-216]
95029749 add r2, r3, #1
9503
- add r3, r4, r3
9504
- strb r2, [r4, #1101]
9505
- strb r0, [r3, #1180]
9750
+ add r3, r5, r3
9751
+ strb r2, [r5, #1109]
9752
+ strb r0, [r3, #1144]
95069753 bl zftl_flash_enter_slc_mode
9507
-.L1635:
9754
+.L1622:
95089755 add r7, r7, #1
95099756 cmp r7, #4
9510
- bne .L1638
9511
- ldrb r2, [r5, #12] @ zero_extendqisi2
9512
- ldr r3, .L1663
9513
- cmp r2, #2
9514
- beq .L1639
9515
-.L1646:
9516
- ldrb r3, [r5, #17] @ zero_extendqisi2
9517
- ldrb r2, [r4, #1101] @ zero_extendqisi2
9518
- smulbb r2, r2, r3
9519
- ldrh r3, [r5, #18]
9520
- smulbb r3, r2, r3
9521
- strh r3, [r6, #-184] @ movhi
9757
+ bne .L1623
9758
+ ldrb r3, [r4, #12] @ zero_extendqisi2
9759
+ cmp r3, #2
9760
+ beq .L1624
9761
+.L1628:
9762
+ ldrb r2, [r4, #17] @ zero_extendqisi2
9763
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
9764
+ smulbb r3, r3, r2
9765
+ ldrh r2, [r4, #18]
9766
+ smulbb r3, r3, r2
9767
+ strh r3, [r6, #-188] @ movhi
95229768 add sp, sp, #12
95239769 @ sp needed
9524
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
9525
-.L1639:
9526
- ldrh ip, [r3, #18]
9527
- mov lr, #0
9528
- ldrh r2, [r4, #2]
9529
- add r3, r3, #4
9530
- and ip, ip, #65280
9531
- ldrb r1, [r4, #1101] @ zero_extendqisi2
9532
- ldrb r7, [r3] @ zero_extendqisi2
9533
- mul r2, r2, ip
9534
- ldrb ip, [r3, #13] @ zero_extendqisi2
9535
- mul ip, ip, r2
9536
- ldrb r2, [r3, #23] @ zero_extendqisi2
9537
- str r2, [sp]
9538
- mov r2, ip, asl #1
9539
- str r2, [sp, #4]
9540
- mov r2, lr
9541
-.L1644:
9542
- add r9, r8, r2, asl #3
9543
- mov r0, #0
9544
-.L1640:
9545
- cmp r0, r7
9546
- bcs .L1662
9547
- add r10, r3, r0
9548
- ldrb fp, [r10, #1] @ zero_extendqisi2
9549
- ldrb r10, [r9, r0] @ zero_extendqisi2
9550
- cmp fp, r10
9551
- bne .L1641
9552
- add r0, r0, #1
9553
- b .L1640
9554
-.L1662:
9555
- ldmia sp, {r9, lr}
9556
- mov r0, r1
9557
- add r1, r6, r1, asl #2
9770
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
9771
+.L1624:
9772
+ ldrb r3, [r4, #4] @ zero_extendqisi2
9773
+ mov r7, #0
9774
+ ldrh r8, [r5, #2]
9775
+ ldrb r9, [r4, #27] @ zero_extendqisi2
9776
+ str r3, [sp]
9777
+ ldrh r3, [r4, #18]
9778
+ and r3, r3, #65280
9779
+ mul r3, r8, r3
9780
+ ldrb r8, [r4, #17] @ zero_extendqisi2
9781
+ mul r8, r8, r3
9782
+ lsl r3, r8, #1
9783
+.L1627:
9784
+ ldr r2, [sp]
9785
+ add r1, r10, r7, lsl #3
9786
+ mov r0, fp
9787
+ str r3, [sp, #4]
9788
+ bl flash_mem_cmp8
9789
+ cmp r0, #0
9790
+ ldr r3, [sp, #4]
9791
+ bne .L1625
9792
+ ldrb r2, [r5, #1109] @ zero_extendqisi2
95589793 cmp r9, #0
9559
- moveq lr, ip
9560
- str lr, [r1, #-216]
9561
- add r1, r0, #1
9562
- add r0, r4, r0
9563
- mov lr, #1
9564
- uxtb r1, r1
9565
- strb r2, [r0, #1180]
9566
-.L1641:
9567
- add r2, r2, #1
9568
- cmp r2, #4
9569
- bne .L1644
9570
- cmp lr, #0
9571
- strneb r1, [r4, #1101]
9572
- b .L1646
9573
-.L1664:
9794
+ moveq r0, r8
9795
+ movne r0, r3
9796
+ add r1, r6, r2, lsl #2
9797
+ str r0, [r1, #-220]
9798
+ add r1, r2, #1
9799
+ add r2, r5, r2
9800
+ strb r1, [r5, #1109]
9801
+ strb r7, [r2, #1144]
9802
+.L1625:
9803
+ add r7, r7, #1
9804
+ cmp r7, #4
9805
+ bne .L1627
9806
+ b .L1628
9807
+.L1639:
95749808 .align 2
9575
-.L1663:
9809
+.L1638:
95769810 .word .LANCHOR2
9811
+ .word .LANCHOR1+1650
95779812 .word .LC4
9578
- .word .LANCHOR1+1828
95799813 .word .LANCHOR0
9814
+ .word .LANCHOR0+1154
95809815 .word .LANCHOR3
9581
- .word .LANCHOR0+1192
9582
- .word .LANCHOR0+1180
9583
- .word .LANCHOR0+1200
9584
- .word .LANCHOR2+4
9816
+ .word .LANCHOR0+1144
9817
+ .word .LANCHOR2+5
95859818 .fnend
95869819 .size flash_die_info_init, .-flash_die_info_init
95879820 .align 2
95889821 .global lpa_hash_init
9822
+ .syntax unified
9823
+ .arm
9824
+ .fpu softvfp
95899825 .type lpa_hash_init, %function
95909826 lpa_hash_init:
95919827 .fnstart
95929828 @ args = 0, pretend = 0, frame = 0
95939829 @ frame_needed = 0, uses_anonymous_args = 0
9594
- stmfd sp!, {r4, lr}
9830
+ push {r4, lr}
95959831 .save {r4, lr}
9596
- mov r1, #255
9597
- ldr r4, .L1667
95989832 mov r2, #512
9833
+ ldr r4, .L1642
9834
+ mov r1, #255
95999835 sub r0, r4, #3056
9600
- sub r0, r0, #4
9836
+ sub r0, r0, #14
96019837 bl ftl_memset
96029838 sub r3, r4, #3088
9603
- ldr r0, [r4, #-2544]
9839
+ ldrb r2, [r4, #-3127] @ zero_extendqisi2
9840
+ ldrh r3, [r3, #-8]
96049841 mov r1, #255
9605
- ldrh r2, [r3, #-8]
9606
- ldrb r3, [r4, #-3123] @ zero_extendqisi2
9607
- mul r2, r3, r2
9608
- mov r2, r2, asl #2
9609
- ldmfd sp!, {r4, lr}
9842
+ ldr r0, [r4, #-2552]
9843
+ pop {r4, lr}
9844
+ mul r2, r2, r3
9845
+ lsl r2, r2, #2
96109846 b ftl_memset
9611
-.L1668:
9847
+.L1643:
96129848 .align 2
9613
-.L1667:
9849
+.L1642:
96149850 .word .LANCHOR3
96159851 .fnend
96169852 .size lpa_hash_init, .-lpa_hash_init
96179853 .align 2
96189854 .global lpa_rebuild_hash
9855
+ .syntax unified
9856
+ .arm
9857
+ .fpu softvfp
96199858 .type lpa_rebuild_hash, %function
96209859 lpa_rebuild_hash:
96219860 .fnstart
96229861 @ args = 0, pretend = 0, frame = 0
96239862 @ frame_needed = 0, uses_anonymous_args = 0
9624
- stmfd sp!, {r3, r4, r5, lr}
9625
- .save {r3, r4, r5, lr}
9626
- ldr r3, .L1682
9863
+ ldr r3, .L1656
9864
+ push {r4, r5, r6, lr}
9865
+ .save {r4, r5, r6, lr}
96279866 ldr r3, [r3]
96289867 tst r3, #4096
9629
- beq .L1670
9630
- ldr r0, .L1682+4
9631
- mov r2, #239
9632
- ldr r1, .L1682+8
9868
+ beq .L1645
96339869 mov r3, #0
9870
+ mov r2, #239
9871
+ ldr r1, .L1656+4
9872
+ ldr r0, .L1656+8
96349873 bl printk
9635
-.L1670:
9636
- ldr r4, .L1682+12
9637
- mov r1, #255
9874
+.L1645:
9875
+ ldr r4, .L1656+12
96389876 mov r2, #512
9639
- ldr r0, .L1682+16
9640
- sub r5, r4, #3088
9641
- bl ftl_memset
9642
- ldrb r3, [r4, #-3123] @ zero_extendqisi2
96439877 mov r1, #255
9644
- ldrh r2, [r5, #-8]
9645
- ldr r0, [r4, #-2544]
9646
- mul r2, r3, r2
9647
- mov r2, r2, asl #2
9878
+ sub r5, r4, #3056
9879
+ sub r6, r4, #3088
9880
+ sub r5, r5, #14
9881
+ mov r0, r5
96489882 bl ftl_memset
9649
- sub lr, r5, #8
9650
- add r5, r5, #28
9651
- mov r0, #0
9652
- mov ip, r4
9653
-.L1671:
9654
- ldrh r1, [lr]
9655
- uxth r2, r0
9656
- ldrb r3, [r4, #-3123] @ zero_extendqisi2
9657
- mul r3, r3, r1
9658
- cmp r2, r3, asl #1
9659
- bge .L1681
9660
- ldr r3, [ip, #-2548]
9661
- ldr r3, [r3, r2, asl #2]
9883
+ ldrh r3, [r6, #-8]
9884
+ mov r1, #255
9885
+ ldrb r2, [r4, #-3127] @ zero_extendqisi2
9886
+ ldr r0, [r4, #-2552]
9887
+ mul r2, r2, r3
9888
+ lsl r2, r2, #2
9889
+ bl ftl_memset
9890
+ mov r1, #0
9891
+.L1646:
9892
+ ldrh r0, [r6, #-8]
9893
+ uxth ip, r1
9894
+ ldrb r3, [r4, #-3127] @ zero_extendqisi2
9895
+ mov r2, ip
9896
+ mul r3, r3, r0
9897
+ cmp ip, r3, lsl #1
9898
+ blt .L1648
9899
+ pop {r4, r5, r6, pc}
9900
+.L1648:
9901
+ ldr r3, [r4, #-2556]
9902
+ ldr r3, [r3, r2, lsl #2]
96629903 cmn r3, #1
9663
- beq .L1672
9904
+ beq .L1647
96649905 uxtb r3, r3
9665
- mov r3, r3, asl #1
9666
- ldrh r1, [r5, r3]
9667
- strh r2, [r5, r3] @ movhi
9668
- mov r2, r2, asl #1
9669
- ldr r3, [ip, #-2544]
9670
- strh r1, [r3, r2] @ movhi
9671
-.L1672:
9672
- add r0, r0, #1
9673
- b .L1671
9674
-.L1681:
9675
- ldmfd sp!, {r3, r4, r5, pc}
9676
-.L1683:
9906
+ lsl r2, r2, #1
9907
+ lsl r3, r3, #1
9908
+ ldrh r0, [r5, r3]
9909
+ strh ip, [r5, r3] @ movhi
9910
+ ldr r3, [r4, #-2552]
9911
+ strh r0, [r3, r2] @ movhi
9912
+.L1647:
9913
+ add r1, r1, #1
9914
+ b .L1646
9915
+.L1657:
96779916 .align 2
9678
-.L1682:
9917
+.L1656:
96799918 .word .LANCHOR2
9680
- .word .LC125
9681
- .word .LANCHOR1+1848
9919
+ .word .LANCHOR1+1670
9920
+ .word .LC122
96829921 .word .LANCHOR3
9683
- .word .LANCHOR3-3060
96849922 .fnend
96859923 .size lpa_rebuild_hash, .-lpa_rebuild_hash
96869924 .align 2
96879925 .global zftl_read_flash_info
9926
+ .syntax unified
9927
+ .arm
9928
+ .fpu softvfp
96889929 .type zftl_read_flash_info, %function
96899930 zftl_read_flash_info:
96909931 .fnstart
96919932 @ args = 0, pretend = 0, frame = 0
96929933 @ frame_needed = 0, uses_anonymous_args = 0
9693
- stmfd sp!, {r4, lr}
9934
+ push {r4, lr}
96949935 .save {r4, lr}
9695
- mov r1, #0
96969936 mov r2, #11
9937
+ mov r1, #0
96979938 mov r4, r0
96989939 bl ftl_memset
9699
- ldr r2, .L1689
9700
- ldr r3, .L1689+4
9940
+ ldr r2, .L1662
97019941 mov ip, #1
9702
- ldrh r1, [r2, #2]
9703
- ldrb r0, [r3, #13] @ zero_extendqisi2
9704
- smulbb r1, r0, r1
9705
- ldr r0, .L1689+8
9942
+ ldr r3, .L1662+4
9943
+ ldrh r0, [r2, #2]
9944
+ ldrb r1, [r3, #13] @ zero_extendqisi2
9945
+ smulbb r1, r1, r0
9946
+ ldr r0, .L1662+8
97069947 strh r1, [r4, #4] @ unaligned
9707
- ldrb r1, [r2, #1172] @ zero_extendqisi2
9948
+ ldrb r1, [r2, #1193] @ zero_extendqisi2
97089949 strb r1, [r4, #7]
97099950 ldr r1, [r2, #1032]
97109951 str r1, [r4] @ unaligned
....@@ -9713,1348 +9954,1251 @@
97139954 mov r1, #32
97149955 ldrb r3, [r3, #11] @ zero_extendqisi2
97159956 strb r1, [r4, #8]
9716
- ldrb r1, [r2, #1101] @ zero_extendqisi2
9957
+ ldrb r1, [r2, #1109] @ zero_extendqisi2
97179958 strb r3, [r4, #9]
97189959 mov r3, #0
97199960 strb r3, [r4, #10]
9720
-.L1685:
9961
+.L1659:
97219962 uxtb r2, r3
9722
- cmp r2, r1
9723
- bcs .L1688
9963
+ cmp r1, r2
9964
+ bhi .L1660
9965
+ pop {r4, pc}
9966
+.L1660:
97249967 ldrb lr, [r3, r0] @ zero_extendqisi2
97259968 add r3, r3, #1
97269969 ldrb r2, [r4, #10] @ zero_extendqisi2
9727
- orr r2, r2, ip, asl lr
9970
+ orr r2, r2, ip, lsl lr
97289971 strb r2, [r4, #10]
9729
- b .L1685
9730
-.L1688:
9731
- ldmfd sp!, {r4, pc}
9732
-.L1690:
9972
+ b .L1659
9973
+.L1663:
97339974 .align 2
9734
-.L1689:
9975
+.L1662:
97359976 .word .LANCHOR0
97369977 .word .LANCHOR2
9737
- .word .LANCHOR0+1180
9978
+ .word .LANCHOR0+1144
97389979 .fnend
97399980 .size zftl_read_flash_info, .-zftl_read_flash_info
97409981 .align 2
9741
- .global gc_init
9742
- .type gc_init, %function
9743
-gc_init:
9744
- .fnstart
9745
- @ args = 0, pretend = 0, frame = 0
9746
- @ frame_needed = 0, uses_anonymous_args = 0
9747
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
9748
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
9749
- movw r9, #2828
9750
- ldr r6, .L1693
9751
- mov r5, #0
9752
- ldr r4, .L1693+4
9753
- mov r1, r5
9754
- add r7, r6, r9
9755
- movw r2, #2204
9756
- sub r8, r4, #3088
9757
- mov r0, r7
9758
- strb r5, [r4, #-3115]
9759
- strb r5, [r4, #-182]
9760
- str r5, [r4, #-180]
9761
- strh r5, [r8] @ movhi
9762
- bl ftl_memset
9763
- ldrh r2, [r8, #-8]
9764
- mvn r3, #0
9765
- strh r3, [r6, r9] @ movhi
9766
- movw ip, #2812
9767
- str r5, [r6, #2836]
9768
- mov r3, r2, lsr #1
9769
- strh r3, [r7, #34] @ movhi
9770
- ldrb r3, [r4, #-3123] @ zero_extendqisi2
9771
- mov r0, r2, lsr #2
9772
- strh r0, [r7, #32] @ movhi
9773
- sub r7, r4, #3104
9774
- smulbb r1, r3, r2
9775
- strh r5, [r7, #-8] @ movhi
9776
- strh r5, [r7, #-6] @ movhi
9777
- strh r5, [r7, #-4] @ movhi
9778
- uxth r1, r1
9779
- sub lr, r1, #32
9780
- strh lr, [r6, ip] @ movhi
9781
- movw ip, #2810
9782
- strh r1, [r6, ip] @ movhi
9783
- add r1, r6, #2816
9784
- strh r2, [r1] @ movhi
9785
- mov r2, #4
9786
- strh r2, [r4, #-176] @ movhi
9787
- movw r2, #2814
9788
- strh r0, [r6, r2] @ movhi
9789
- sub r4, r4, #3072
9790
- ldrh r0, [r7, #-10]
9791
- mul r0, r3, r0
9792
- mov r0, r0, asl #2
9793
- bl ftl_malloc
9794
- ldrb r3, [r4, #-51] @ zero_extendqisi2
9795
- str r0, [r4, #2900]
9796
- ldrh r0, [r7, #-10]
9797
- mul r0, r3, r0
9798
- mov r0, r0, asl #2
9799
- bl ftl_malloc
9800
- ldrh r3, [r7, #-10]
9801
- str r0, [r4, #2904]
9802
- ldrb r0, [r4, #-51] @ zero_extendqisi2
9803
- mul r0, r0, r3
9804
- bl ftl_malloc
9805
- ldrb r3, [r4, #-51] @ zero_extendqisi2
9806
- str r0, [r4, #-48]
9807
- ldrh r0, [r7, #-10]
9808
- mul r0, r3, r0
9809
- mov r0, r0, asl #2
9810
- bl ftl_malloc
9811
- ldrb r3, [r4, #-51] @ zero_extendqisi2
9812
- str r0, [r4, #-56]
9813
- ldrh r0, [r7, #-10]
9814
- mul r0, r3, r0
9815
- mov r0, r0, asl #2
9816
- bl ftl_malloc
9817
- movw r2, #2808
9818
- str r0, [r4, #2908]
9819
- ldrh r3, [r4, #-14]
9820
- mov r3, r3, lsr #2
9821
- strh r3, [r6, r2] @ movhi
9822
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
9823
-.L1694:
9824
- .align 2
9825
-.L1693:
9826
- .word .LANCHOR0
9827
- .word .LANCHOR3
9828
- .fnend
9829
- .size gc_init, .-gc_init
9830
- .align 2
98319982 .global gc_static_wearleveling
9983
+ .syntax unified
9984
+ .arm
9985
+ .fpu softvfp
98329986 .type gc_static_wearleveling, %function
98339987 gc_static_wearleveling:
98349988 .fnstart
98359989 @ args = 0, pretend = 0, frame = 24
98369990 @ frame_needed = 0, uses_anonymous_args = 0
9837
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9991
+ ldr r0, .L1779
9992
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
98389993 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
98399994 .pad #44
98409995 sub sp, sp, #44
9841
- ldr r4, .L1814
9842
- ldr r3, [r4, #2804]
9996
+ ldr r3, [r0, #2800]
98439997 ldr r3, [r3, #32]
98449998 cmp r3, #10240
9845
- bls .L1696
9999
+ bls .L1665
984610000 bl ftl_tmp_into_update
9847
-.L1696:
9848
- ldr r3, [r4, #1092]
10001
+.L1665:
10002
+ ldr r3, [r0, #1096]
984910003 ldr r2, [r3, #568]
9850
- ldr r0, [r3, #12]
9851
- add r1, r2, #35840
9852
- add r1, r1, #160
9853
- cmp r0, r1
9854
- bcs .L1697
9855
- ldr r1, .L1814
9856
- ldr ip, [r1, #2804]
9857
- ldr r1, [r3, #572]
9858
- ldr ip, [ip, #36]
9859
- add r1, r1, #256
9860
- cmp ip, r1
10004
+ ldr r1, [r3, #12]
10005
+ add ip, r2, #35840
10006
+ add ip, ip, #160
10007
+ cmp r1, ip
10008
+ bcs .L1666
10009
+ ldr lr, [r0, #2800]
10010
+ ldr ip, [r3, #572]
10011
+ ldr lr, [lr, #36]
10012
+ add ip, ip, #256
10013
+ cmp lr, ip
986110014 movcc r0, #0
9862
- bcc .L1806
9863
-.L1697:
10015
+ bcc .L1664
10016
+.L1666:
986410017 add r2, r2, #860160
986510018 add r2, r2, #3840
9866
- cmp r0, r2
9867
- bhi .L1699
9868
- ldr r1, [r4, #2804]
9869
- ldr r2, [r3, #572]
9870
- ldr r1, [r1, #36]
9871
- add r2, r2, #32
987210019 cmp r1, r2
10020
+ bhi .L1668
10021
+ ldr ip, [r0, #2800]
10022
+ ldr r2, [r3, #572]
10023
+ ldr ip, [ip, #36]
10024
+ add r2, r2, #32
10025
+ cmp ip, r2
987310026 movls r7, #0
9874
- movls r9, r7
9875
- bls .L1700
9876
-.L1699:
9877
- ldr r2, [r4, #2804]
9878
- mov r8, #0
9879
- ldr ip, .L1814
9880
- movw r5, #65535
9881
- mov fp, r8
9882
- mov r9, r8
9883
- ldr r1, [r2, #36]
9884
- mov r10, r8
9885
- str r0, [r3, #568]
9886
- mov r6, r5
9887
- str r8, [sp, #32]
9888
- str r1, [r3, #572]
10027
+ movls r5, r7
10028
+ bls .L1669
10029
+.L1668:
10030
+ ldr r2, [r0, #2800]
10031
+ mov r4, #0
10032
+ ldr r5, .L1779
10033
+ movw r10, #65535
10034
+ ldr r8, .L1779+4
10035
+ mov r6, r4
10036
+ ldr r0, [r2, #36]
10037
+ mov fp, r10
10038
+ str r1, [r3, #568]
10039
+ ldr r9, .L1779+8
10040
+ str r0, [r3, #572]
988910041 ldrh r7, [r2, #134]
9890
- str r8, [sp, #28]
9891
- str r8, [sp, #24]
9892
- str r8, [sp, #20]
9893
-.L1701:
9894
- ldr r2, .L1814+4
9895
- ldr r3, .L1814
9896
- ldrh r2, [r2]
9897
- cmp r2, r7
9898
- bls .L1811
9899
- ldr r0, [ip, #1080]
9900
- mov r1, r7, asl #2
9901
- add lr, r0, r1
9902
- ldrb r3, [lr, #2] @ zero_extendqisi2
9903
- and r2, r3, #224
9904
- cmp r2, #224
9905
- beq .L1702
9906
- tst r3, #8
9907
- ldrneh r3, [r0, r1]
9908
- ldrne r4, [r0, r1]
9909
- ubfxne r3, r3, #0, #11
9910
- ubfxne r4, r4, #11, #8
9911
- bne .L1704
9912
-.L1703:
9913
- tst r3, #24
9914
- ldreqh r3, [r0, r1]
9915
- movweq r4, #65535
9916
- ldrne r4, [r0, r1]
9917
- movwne r3, #65535
9918
- ubfxeq r3, r3, #0, #11
9919
- ubfxne r4, r4, #11, #8
9920
- bne .L1706
9921
-.L1704:
9922
- ldr r2, [sp, #32]
9923
- add r9, r9, #1
9924
- cmp r5, r3
9925
- add r2, r2, r3
9926
- uxth r9, r9
9927
- str r2, [sp, #32]
9928
- ldrhi r2, [ip, #1092]
9929
- movhi r5, r3
9930
- addhi r2, r2, #584
9931
- strhih r7, [r2, #2] @ movhi
9932
-.L1748:
9933
- ldr r2, [sp, #20]
9934
- cmp r2, r3
9935
- movw r2, #65535
9936
- strcc r3, [sp, #20]
9937
- movcc r8, r7
9938
- cmp r4, r2
9939
- beq .L1708
9940
-.L1706:
9941
- ldr r2, [sp, #24]
9942
- cmp r6, r4
9943
- add r2, r2, #1
9944
- movhi r6, r4
9945
- uxth r2, r2
9946
- str r2, [sp, #24]
9947
- ldr r2, [sp, #28]
9948
- add r2, r2, r4
9949
- str r2, [sp, #28]
9950
- ldrhi r2, [ip, #1092]
9951
- addhi r2, r2, #584
9952
- strhih r7, [r2] @ movhi
9953
- cmp r10, r4
9954
- movcc fp, r7
9955
- movcc r10, r4
9956
-.L1708:
9957
- cmp r4, #9
9958
- cmphi r3, #9
9959
- bhi .L1702
9960
- ldr r3, .L1814+8
9961
- ldr r3, [r3]
9962
- tst r3, #256
9963
- beq .L1702
9964
- ldrh r2, [r0, r1]
9965
- ldr r3, [r0, r1]
9966
- ldrb r1, [lr, #2] @ zero_extendqisi2
9967
- ubfx r2, r2, #0, #11
9968
- ubfx r3, r3, #11, #8
9969
- str ip, [sp, #36]
9970
- ubfx r1, r1, #3, #2
9971
- str r1, [sp]
9972
- ldrb r1, [lr, #2] @ zero_extendqisi2
9973
- mov r1, r1, lsr #5
9974
- str r1, [sp, #4]
9975
- ldrb r1, [lr, #3] @ zero_extendqisi2
9976
- str r1, [sp, #8]
9977
- mov r1, r7, asl #1
9978
- ldr r0, [ip, #1088]
9979
- ldrh r1, [r0, r1]
9980
- ldr r0, .L1814+12
9981
- str r1, [sp, #12]
9982
- mov r1, r7
9983
- bl printk
9984
- ldr ip, [sp, #36]
9985
-.L1702:
9986
- add r7, r7, #1
9987
- uxth r7, r7
9988
- b .L1701
9989
-.L1811:
9990
- ldr r0, [r3, #1092]
9991
- mov r2, #0
9992
- mov r1, #255
9993
- str r3, [sp, #36]
9994
- add r0, r0, #264
9995
- strh r2, [r0, #-142] @ movhi
10042
+ str r4, [sp, #36]
10043
+ str r4, [sp, #32]
10044
+ str r4, [sp, #28]
10045
+ str r4, [sp, #24]
10046
+ str r4, [sp, #16]
10047
+ str r4, [sp, #20]
10048
+.L1670:
10049
+ ldrh r3, [r8]
10050
+ cmp r3, r7
10051
+ bhi .L1679
10052
+ ldr r0, [r5, #1096]
10053
+ mov r3, #0
999610054 mov r2, #128
10055
+ mov r1, #255
10056
+ strh r3, [r0, #122] @ movhi
10057
+ add r0, r0, #264
999710058 bl ftl_memset
9998
- movw r2, #586
9999
- ldr r3, [sp, #36]
10000
- ldr r1, [r3, #1092]
10001
- ldr r7, [r3, #1080]
10002
- ldrh r1, [r1, r2]
10003
- ldr r2, .L1814+8
10004
- mov ip, r1, asl #2
10005
- ldr r2, [r2]
10006
- add r4, r7, ip
10007
- tst r2, #1024
10008
- beq .L1711
10009
- ldrb r0, [r4, #2] @ zero_extendqisi2
10010
- ldrh r2, [r7, ip]
10011
- ldr lr, [r7, r1, asl #2]
10059
+ ldr r2, [r5, #1096]
10060
+ movw r3, #586
10061
+ ldr r8, [r5, #1084]
10062
+ ldrh r1, [r2, r3]
10063
+ ldr r3, .L1779+8
10064
+ ldr r3, [r3]
10065
+ lsl r9, r1, #2
10066
+ add r7, r8, r9
10067
+ tst r3, #1024
10068
+ beq .L1680
10069
+ ldr ip, [r5, #1092]
10070
+ lsl r0, r1, #1
10071
+ ldr r3, [r8, r1, lsl #2]
10072
+ ldrh r2, [r8, r9]
10073
+ ldrh r0, [ip, r0]
10074
+ ubfx r3, r3, #11, #8
10075
+ ubfx r2, r2, #0, #11
10076
+ str r0, [sp, #12]
10077
+ ldrb r0, [r7, #3] @ zero_extendqisi2
10078
+ str r0, [sp, #8]
10079
+ ldrb r0, [r7, #2] @ zero_extendqisi2
10080
+ lsr r0, r0, #5
10081
+ str r0, [sp, #4]
10082
+ ldrb r0, [r7, #2] @ zero_extendqisi2
1001210083 ubfx r0, r0, #3, #2
1001310084 str r0, [sp]
10014
- ubfx r2, r2, #0, #11
10015
- ldrb r0, [r4, #2] @ zero_extendqisi2
10016
- str ip, [sp, #36]
10017
- mov r0, r0, lsr #5
10018
- str r0, [sp, #4]
10019
- ldrb r0, [r4, #3] @ zero_extendqisi2
10020
- str r0, [sp, #8]
10021
- ldr r0, [r3, #1088]
10022
- mov r3, r1, asl #1
10023
- ldrh r3, [r0, r3]
10024
- ldr r0, .L1814+16
10025
- str r3, [sp, #12]
10026
- ubfx r3, lr, #11, #8
10085
+ ldr r0, .L1779+12
1002710086 bl printk
10028
- ldr ip, [sp, #36]
10029
-.L1711:
10030
- ldrb r3, [r4, #2] @ zero_extendqisi2
10031
- ldr r1, .L1814
10087
+.L1680:
10088
+ ldrb r3, [r7, #2] @ zero_extendqisi2
1003210089 and r3, r3, #224
1003310090 cmp r3, #32
10034
- bne .L1712
10035
- ldr r3, [r1, #2804]
10091
+ bne .L1681
10092
+ ldr r3, .L1779
10093
+ ldr r3, [r3, #2800]
1003610094 add r3, r3, #688
1003710095 ldrh r3, [r3]
1003810096 cmp r3, #2
10039
- ldrhi r3, .L1814+20
10097
+ ldrhi r3, .L1779+16
1004010098 movhi r2, #1
10041
- strhi r2, [r3, #-160]
10042
-.L1712:
10043
- ldrb r2, [r4, #2] @ zero_extendqisi2
10099
+ strhi r2, [r3, #-184]
10100
+.L1681:
10101
+ ldrb r2, [r7, #2] @ zero_extendqisi2
1004410102 tst r2, #8
10045
- beq .L1713
10046
- ldr r3, [r1, #2804]
10047
- ldr r0, .L1814+20
10048
- ldr r4, .L1814
10103
+ beq .L1682
10104
+ ldr r5, .L1779
10105
+ ldr r3, [r5, #2800]
1004910106 ldrh r1, [r3, #96]
10050
- ldrh r0, [r0, #-156]
10051
- ldrh r3, [r7, ip]
10107
+ ldr r3, .L1779+16
10108
+ ldrh r0, [r3, #-180]
10109
+ ldrh r3, [r8, r9]
1005210110 ubfx r3, r3, #0, #11
1005310111 add r3, r3, r0, lsr #2
1005410112 cmp r1, r3
10055
- ble .L1713
10113
+ ble .L1682
1005610114 and r3, r2, #192
1005710115 cmp r3, #64
10058
- bne .L1714
10059
- ldr r2, [r4, #1092]
10116
+ bne .L1683
10117
+ ldr r0, [r5, #1096]
1006010118 movw r3, #586
10061
- mov r1, #0
10062
- ldrh r0, [r2, r3]
1006310119 mov r2, #1
10120
+ mov r1, #0
10121
+ ldrh r0, [r0, r3]
1006410122 bl gc_add_sblk
10065
- ldr r2, .L1814+24
10066
- movw r3, #2180
10123
+ ldr r2, .L1779+20
1006710124 mov r1, #1
10125
+ movw r3, #2180
1006810126 strh r1, [r2, r3] @ movhi
10069
- b .L1713
10070
-.L1714:
10127
+.L1682:
10128
+ ldr r1, .L1779
10129
+ ldr r3, [r1, #1096]
10130
+ ldr r7, [r1, #1084]
10131
+ add r3, r3, #584
10132
+ ldrh r5, [r3]
10133
+ ldr r3, .L1779+8
10134
+ ldr r3, [r3]
10135
+ lsl r2, r5, #2
10136
+ add r8, r7, r2
10137
+ tst r3, #1024
10138
+ beq .L1684
10139
+ ldr r0, [r1, #1092]
10140
+ lsl r1, r5, #1
10141
+ ldr r3, [r7, r5, lsl #2]
10142
+ ldrh r2, [r7, r2]
10143
+ ldrh r1, [r0, r1]
10144
+ ubfx r3, r3, #11, #8
10145
+ ldr r0, .L1779+24
10146
+ ubfx r2, r2, #0, #11
10147
+ str r1, [sp, #12]
10148
+ ldrb r1, [r8, #3] @ zero_extendqisi2
10149
+ str r1, [sp, #8]
10150
+ ldrb r1, [r8, #2] @ zero_extendqisi2
10151
+ lsr r1, r1, #5
10152
+ str r1, [sp, #4]
10153
+ ldrb r1, [r8, #2] @ zero_extendqisi2
10154
+ ubfx r1, r1, #3, #2
10155
+ str r1, [sp]
10156
+ mov r1, r5
10157
+ bl printk
10158
+.L1684:
10159
+ ldrb r3, [r8, #2] @ zero_extendqisi2
10160
+ tst r3, #8
10161
+ beq .L1685
10162
+ ldr r8, .L1779
10163
+ ldr r2, [r8, #2800]
10164
+ ldrh r1, [r2, #98]
10165
+ ldr r2, .L1779+16
10166
+ ldrh r0, [r2, #-178]
10167
+ ldr r2, [r7, r5, lsl #2]
10168
+ ubfx r2, r2, #11, #8
10169
+ add r2, r2, r0, lsr #2
10170
+ cmp r1, r2
10171
+ ble .L1685
10172
+ and r2, r3, #192
10173
+ cmp r2, #64
10174
+ bne .L1686
10175
+ ldr r3, [r8, #1096]
10176
+ mov r2, #1
10177
+ mov r1, #0
10178
+ add r3, r3, #584
10179
+ ldrh r0, [r3]
10180
+ bl gc_add_sblk
10181
+ ldr r2, .L1779+20
10182
+ mov r1, #1
10183
+ movw r3, #2180
10184
+ strh r1, [r2, r3] @ movhi
10185
+.L1685:
10186
+ ldr r3, .L1779+8
10187
+ ldr r3, [r3]
10188
+ tst r3, #1024
10189
+ beq .L1687
10190
+ ldr r1, .L1779
10191
+ lsl ip, r4, #2
10192
+ ldr r2, [r1, #1084]
10193
+ add r0, r2, ip
10194
+ ldr r3, [r2, r4, lsl #2]
10195
+ ldrh r2, [r2, ip]
10196
+ ldr ip, [r1, #1092]
10197
+ lsl r1, r4, #1
10198
+ ubfx r3, r3, #11, #8
10199
+ ubfx r2, r2, #0, #11
10200
+ ldrh r1, [ip, r1]
10201
+ str r1, [sp, #12]
10202
+ ldrb r1, [r0, #3] @ zero_extendqisi2
10203
+ str r1, [sp, #8]
10204
+ ldrb r1, [r0, #2] @ zero_extendqisi2
10205
+ lsr r1, r1, #5
10206
+ str r1, [sp, #4]
10207
+ ldrb r1, [r0, #2] @ zero_extendqisi2
10208
+ ldr r0, .L1779+28
10209
+ ubfx r1, r1, #3, #2
10210
+ str r1, [sp]
10211
+ mov r1, r4
10212
+ bl printk
10213
+.L1687:
10214
+ ldr r3, .L1779+8
10215
+ ldr r3, [r3]
10216
+ tst r3, #1024
10217
+ beq .L1688
10218
+ ldr r1, .L1779
10219
+ lsl ip, r6, #2
10220
+ ldr r2, [r1, #1084]
10221
+ add r0, r2, ip
10222
+ ldr r3, [r2, r6, lsl #2]
10223
+ ldrh r2, [r2, ip]
10224
+ ldr ip, [r1, #1092]
10225
+ lsl r1, r6, #1
10226
+ ubfx r3, r3, #11, #8
10227
+ ubfx r2, r2, #0, #11
10228
+ ldrh r1, [ip, r1]
10229
+ str r1, [sp, #12]
10230
+ ldrb r1, [r0, #3] @ zero_extendqisi2
10231
+ str r1, [sp, #8]
10232
+ ldrb r1, [r0, #2] @ zero_extendqisi2
10233
+ lsr r1, r1, #5
10234
+ str r1, [sp, #4]
10235
+ ldrb r1, [r0, #2] @ zero_extendqisi2
10236
+ ldr r0, .L1779+32
10237
+ ubfx r1, r1, #3, #2
10238
+ str r1, [sp]
10239
+ mov r1, r6
10240
+ bl printk
10241
+.L1688:
10242
+ ldr r5, .L1779
10243
+ ldrh r3, [sp, #16]
10244
+ ldr r1, [sp, #24]
10245
+ ldr r4, [r5, #2800]
10246
+ ldr r0, [sp, #36]
10247
+ strh r3, [r4, #96] @ movhi
10248
+ ldrh r3, [sp, #20]
10249
+ strh r10, [r4, #92] @ movhi
10250
+ strh fp, [r4, #94] @ movhi
10251
+ strh r3, [r4, #98] @ movhi
10252
+ bl __aeabi_uidiv
10253
+ strh r0, [r4, #88] @ movhi
10254
+ mov r6, r0
10255
+ ldr r1, [sp, #28]
10256
+ ldr r0, [sp, #32]
10257
+ bl __aeabi_uidiv
10258
+ strh r0, [r4, #90] @ movhi
10259
+ ldr r4, .L1779+8
10260
+ ldr r3, [r4]
10261
+ tst r3, #1024
10262
+ beq .L1689
10263
+ uxth r0, r0
10264
+ uxth r3, r6
10265
+ ldr r2, [sp, #28]
10266
+ str r0, [sp]
10267
+ ldr r1, [sp, #24]
10268
+ ldr r0, .L1779+36
10269
+ bl printk
10270
+.L1689:
10271
+ ldr r3, [r4]
10272
+ ldr r4, .L1779+16
10273
+ tst r3, #1024
10274
+ beq .L1690
10275
+ ldrh r3, [r4, #-178]
10276
+ mov r2, fp
10277
+ mov r1, r10
10278
+ ldr r0, .L1779+40
10279
+ str r3, [sp, #8]
10280
+ ldrh r3, [r4, #-180]
10281
+ str r3, [sp, #4]
10282
+ ldr r3, [sp, #20]
10283
+ str r3, [sp]
10284
+ ldr r3, [sp, #16]
10285
+ bl printk
10286
+.L1690:
10287
+ ldr r3, [sp, #20]
10288
+ sub r3, r3, fp
10289
+ str r3, [sp, #24]
10290
+ ldr r2, [sp, #24]
10291
+ ldrh r3, [r4, #-178]
10292
+ cmp r2, r3
10293
+ bgt .L1691
10294
+ ldr r3, [sp, #16]
10295
+ ldrh r2, [r4, #-180]
10296
+ sub r3, r3, r10
10297
+ cmp r3, r2
10298
+ movle r7, #0
10299
+ movle r5, r7
10300
+ ble .L1692
10301
+.L1691:
10302
+ ldr r3, [r5, #1096]
10303
+ mov r7, #0
10304
+ ldr r4, [r3, #580]
10305
+ ldr r3, [r5, #2800]
10306
+ mov r5, r7
10307
+ ldrh r9, [r3, #134]
10308
+ uxth r4, r4
10309
+ ldr r3, .L1779+20
10310
+ add r3, r3, #2176
10311
+ add r3, r3, #4
10312
+ str r3, [sp, #20]
10313
+.L1693:
10314
+ ldr r3, .L1779+4
10315
+ ldrh r3, [r3]
10316
+ cmp r9, r3
10317
+ bcc .L1703
10318
+.L1702:
10319
+ ldr r3, .L1779
10320
+ ldr r3, [r3, #1096]
10321
+ str r4, [r3, #580]
10322
+.L1692:
10323
+ cmp fp, #0
10324
+ beq .L1705
10325
+ ldr r2, .L1779
10326
+ ldr r4, .L1779+4
10327
+ ldr r3, [r2, #2800]
10328
+ mov r0, r2
10329
+ ldrh r3, [r3, #134]
10330
+.L1706:
10331
+ ldrh r2, [r4]
10332
+ cmp r2, r3
10333
+ bhi .L1708
10334
+ ldr r3, [r0, #2800]
10335
+ ldrh r2, [r3, #72]
10336
+ add r2, fp, r2
10337
+ strh r2, [r3, #72] @ movhi
10338
+ ldrh r2, [r3, #98]
10339
+ cmp fp, r2
10340
+ subcc r2, r2, fp
10341
+ strhcc r2, [r3, #98] @ movhi
10342
+.L1705:
10343
+ cmp r10, #0
10344
+ beq .L1711
10345
+ ldr r3, .L1779
10346
+ ldr r6, .L1779+4
10347
+ ldr r2, [r3, #2800]
10348
+ mov ip, r3
10349
+ ldrh r0, [r2, #134]
10350
+.L1712:
10351
+ ldrh r3, [r6]
10352
+ cmp r3, r0
10353
+ bhi .L1714
10354
+ ldr r3, [ip, #2800]
10355
+ ldrh r2, [r3, #74]
10356
+ add r2, r10, r2
10357
+ strh r2, [r3, #74] @ movhi
10358
+ ldrh r2, [r3, #96]
10359
+ cmp r10, r2
10360
+ subcc r2, r2, r10
10361
+ strhcc r2, [r3, #96] @ movhi
10362
+.L1711:
10363
+ ldr r4, .L1779+44
10364
+ mov r1, #0
10365
+ sub r0, r4, #12
10366
+ bl _list_get_gc_head_node
10367
+ movw r2, #65535
10368
+ cmp r0, r2
10369
+ beq .L1669
10370
+ ldr r2, .L1779
10371
+ lsl r3, r0, #1
10372
+ ldr r1, [r2, #1092]
10373
+ ldrh r2, [r4, #-8]
10374
+ ldrh r3, [r1, r3]
10375
+ cmp r3, r2, lsr #1
10376
+ bhi .L1669
10377
+ add r5, r5, #1
10378
+ mov r2, #1
10379
+ mov r1, #0
10380
+ bl gc_add_sblk
10381
+.L1669:
10382
+ add r0, r5, r7
10383
+.L1664:
10384
+ add sp, sp, #44
10385
+ @ sp needed
10386
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
10387
+.L1679:
10388
+ ldr r0, [r5, #1084]
10389
+ lsl r1, r7, #2
10390
+ add ip, r0, r1
10391
+ ldrb r3, [ip, #2] @ zero_extendqisi2
10392
+ and r2, r3, #224
10393
+ cmp r2, #224
10394
+ beq .L1671
10395
+ tst r3, #8
10396
+ beq .L1672
10397
+ ldrh r2, [r0, r1]
10398
+ ldr r3, [r0, r1]
10399
+ ubfx r2, r2, #0, #11
10400
+ ubfx r3, r3, #11, #8
10401
+.L1673:
10402
+ ldr lr, [sp, #24]
10403
+ cmp r10, r2
10404
+ add lr, lr, #1
10405
+ uxth lr, lr
10406
+ str lr, [sp, #24]
10407
+ ldr lr, [sp, #36]
10408
+ add lr, lr, r2
10409
+ str lr, [sp, #36]
10410
+ ldrhi r10, [r5, #1096]
10411
+ movwhi lr, #586
10412
+ strhhi r7, [r10, lr] @ movhi
10413
+ movhi r10, r2
10414
+.L1717:
10415
+ ldr lr, [sp, #16]
10416
+ cmp lr, r2
10417
+ movcc lr, r2
10418
+ movcc r4, r7
10419
+ str lr, [sp, #16]
10420
+ movw lr, #65535
10421
+ cmp r3, lr
10422
+ bne .L1675
10423
+.L1677:
10424
+ cmp r2, #9
10425
+ cmphi r3, #9
10426
+ bhi .L1671
10427
+ ldr r3, [r9]
10428
+ tst r3, #256
10429
+ beq .L1671
10430
+ ldr r3, [r0, r1]
10431
+ ldrh r2, [r0, r1]
10432
+ lsl r1, r7, #1
10433
+ ldr r0, [r5, #1092]
10434
+ ubfx r3, r3, #11, #8
10435
+ ubfx r2, r2, #0, #11
10436
+ ldrh r1, [r0, r1]
10437
+ ldr r0, .L1779+48
10438
+ str r1, [sp, #12]
10439
+ ldrb r1, [ip, #3] @ zero_extendqisi2
10440
+ str r1, [sp, #8]
10441
+ ldrb r1, [ip, #2] @ zero_extendqisi2
10442
+ lsr r1, r1, #5
10443
+ str r1, [sp, #4]
10444
+ ldrb r1, [ip, #2] @ zero_extendqisi2
10445
+ ubfx r1, r1, #3, #2
10446
+ str r1, [sp]
10447
+ mov r1, r7
10448
+ bl printk
10449
+.L1671:
10450
+ add r7, r7, #1
10451
+ uxth r7, r7
10452
+ b .L1670
10453
+.L1672:
10454
+ tst r3, #24
10455
+ ldrheq r2, [r0, r1]
10456
+ movweq r3, #65535
10457
+ ldrne r3, [r0, r1]
10458
+ movwne r2, #65535
10459
+ ubfxeq r2, r2, #0, #11
10460
+ ubfxne r3, r3, #11, #8
10461
+ beq .L1673
10462
+.L1675:
10463
+ ldr lr, [sp, #28]
10464
+ cmp fp, r3
10465
+ movhi fp, r3
10466
+ add lr, lr, #1
10467
+ uxth lr, lr
10468
+ str lr, [sp, #28]
10469
+ ldr lr, [sp, #32]
10470
+ add lr, lr, r3
10471
+ str lr, [sp, #32]
10472
+ ldrhi lr, [r5, #1096]
10473
+ addhi lr, lr, #584
10474
+ strhhi r7, [lr] @ movhi
10475
+ ldr lr, [sp, #20]
10476
+ cmp lr, r3
10477
+ movcc lr, r3
10478
+ movcc r6, r7
10479
+ str lr, [sp, #20]
10480
+ b .L1677
10481
+.L1683:
1007110482 tst r2, #224
10072
- bne .L1713
10073
- ldr r3, [r4, #1092]
10074
- movw r2, #590
10075
- movw r1, #65535
10076
- ldrh r0, [r3, r2]
10077
- cmp r0, r1
10078
- bne .L1713
10483
+ bne .L1682
10484
+ ldr r3, [r5, #1096]
10485
+ movw r8, #590
10486
+ movw r2, #65535
10487
+ ldrh r1, [r3, r8]
10488
+ cmp r1, r2
10489
+ bne .L1682
1007910490 movw r7, #586
10080
- str r2, [sp, #36]
1008110491 ldrh r0, [r3, r7]
1008210492 add r3, r3, #588
1008310493 ldrh r3, [r3]
1008410494 cmp r3, r0
10085
- beq .L1713
10495
+ beq .L1682
1008610496 bl zftl_remove_free_node
10087
- ldr r3, [r4, #1092]
10088
- ldrh r1, [r3, r7]
10089
- ldr r2, [sp, #36]
10090
- strh r1, [r3, r2] @ movhi
10497
+ ldr r3, [r5, #1096]
10498
+ ldrh r2, [r3, r7]
10499
+ strh r2, [r3, r8] @ movhi
1009110500 mvn r2, #0
1009210501 strh r2, [r3, r7] @ movhi
10093
-.L1713:
10094
- ldr r1, .L1814
10095
- ldr r2, .L1814+8
10096
- ldr r3, [r1, #1092]
10097
- ldr r2, [r2]
10098
- add r3, r3, #584
10099
- ldr ip, [r1, #1080]
10100
- tst r2, #1024
10101
- ldrh r7, [r3]
10102
- mov r3, r7, asl #2
10103
- add r4, ip, r3
10104
- beq .L1715
10105
- ldrb r0, [r4, #2] @ zero_extendqisi2
10106
- ldrh r2, [ip, r3]
10107
- ubfx r0, r0, #3, #2
10108
- ldr r3, [ip, r7, asl #2]
10109
- str r0, [sp]
10110
- ubfx r2, r2, #0, #11
10111
- ldrb r0, [r4, #2] @ zero_extendqisi2
10112
- ubfx r3, r3, #11, #8
10113
- str ip, [sp, #36]
10114
- mov r0, r0, lsr #5
10115
- str r0, [sp, #4]
10116
- ldrb r0, [r4, #3] @ zero_extendqisi2
10117
- str r0, [sp, #8]
10118
- ldr r0, [r1, #1088]
10119
- mov r1, r7, asl #1
10120
- ldrh r1, [r0, r1]
10121
- ldr r0, .L1814+28
10122
- str r1, [sp, #12]
10123
- mov r1, r7
10124
- bl printk
10125
- ldr ip, [sp, #36]
10126
-.L1715:
10127
- ldrb r3, [r4, #2] @ zero_extendqisi2
10128
- ldr r4, .L1814
10129
- tst r3, #8
10130
- beq .L1716
10131
- ldr r2, [r4, #2804]
10132
- ldr r0, .L1814+20
10133
- ldrh r1, [r2, #98]
10134
- ldrh r0, [r0, #-154]
10135
- ldr r2, [ip, r7, asl #2]
10136
- ubfx r2, r2, #11, #8
10137
- add r2, r2, r0, lsr #2
10138
- cmp r1, r2
10139
- ble .L1716
10140
- and r2, r3, #192
10141
- cmp r2, #64
10142
- bne .L1717
10143
- ldr r3, [r4, #1092]
10144
- mov r1, #0
10145
- mov r2, #1
10146
- add r3, r3, #584
10147
- ldrh r0, [r3]
10148
- bl gc_add_sblk
10149
- ldr r2, .L1814+24
10150
- movw r3, #2180
10151
- mov r1, #1
10152
- strh r1, [r2, r3] @ movhi
10153
- b .L1716
10154
-.L1717:
10502
+ b .L1682
10503
+.L1686:
1015510504 and r3, r3, #248
1015610505 cmp r3, #16
10157
- bne .L1716
10158
- ldr r3, [r4, #1092]
10506
+ bne .L1685
10507
+ ldr r3, [r8, #1096]
1015910508 add r2, r3, #588
1016010509 ldrh r1, [r2]
1016110510 movw r2, #65535
1016210511 cmp r1, r2
10163
- bne .L1716
10512
+ bne .L1685
1016410513 add r2, r3, #584
1016510514 ldrh r0, [r2]
1016610515 movw r2, #590
1016710516 ldrh r3, [r3, r2]
1016810517 cmp r3, r0
10169
- beq .L1716
10518
+ beq .L1685
1017010519 bl zftl_remove_free_node
10171
- ldr r3, [r4, #1092]
10520
+ ldr r3, [r8, #1096]
1017210521 add r2, r3, #588
1017310522 add r3, r3, #584
1017410523 ldrh r1, [r3]
1017510524 strh r1, [r2] @ movhi
1017610525 mvn r2, #0
1017710526 strh r2, [r3] @ movhi
10178
-.L1716:
10179
- ldr r3, .L1814+8
10180
- ldr r0, [r4, #1080]
10181
- ldr r3, [r3]
10182
- tst r3, #1024
10183
- beq .L1718
10184
- mov r3, r8, asl #2
10185
- add r1, r0, r3
10186
- ldrh r2, [r0, r3]
10187
- ldr r3, [r0, r8, asl #2]
10188
- ldrb r0, [r1, #2] @ zero_extendqisi2
10189
- ubfx r2, r2, #0, #11
10190
- ubfx r3, r3, #11, #8
10191
- ubfx r0, r0, #3, #2
10192
- str r0, [sp]
10193
- ldrb r0, [r1, #2] @ zero_extendqisi2
10194
- mov r0, r0, lsr #5
10195
- str r0, [sp, #4]
10196
- ldrb r1, [r1, #3] @ zero_extendqisi2
10197
- str r1, [sp, #8]
10198
- ldr r1, .L1814
10199
- ldr r0, [r1, #1088]
10200
- mov r1, r8, asl #1
10201
- ldrh r1, [r0, r1]
10202
- ldr r0, .L1814+32
10203
- str r1, [sp, #12]
10204
- mov r1, r8
10205
- bl printk
10206
-.L1718:
10207
- ldr r3, .L1814+8
10208
- ldr ip, .L1814
10209
- ldr r3, [r3]
10210
- ldr r0, [ip, #1080]
10211
- tst r3, #1024
10212
- beq .L1719
10213
- mov r3, fp, asl #2
10214
- add r1, r0, r3
10215
- ldrh r2, [r0, r3]
10216
- ldr r3, [r0, fp, asl #2]
10217
- ldrb r0, [r1, #2] @ zero_extendqisi2
10218
- ubfx r2, r2, #0, #11
10219
- ubfx r3, r3, #11, #8
10220
- ubfx r0, r0, #3, #2
10221
- str r0, [sp]
10222
- ldrb r0, [r1, #2] @ zero_extendqisi2
10223
- mov r0, r0, lsr #5
10224
- str r0, [sp, #4]
10225
- ldrb r1, [r1, #3] @ zero_extendqisi2
10226
- str r1, [sp, #8]
10227
- mov r1, fp, asl #1
10228
- ldr r0, [ip, #1088]
10229
- ldrh r1, [r0, r1]
10230
- ldr r0, .L1814+36
10231
- str r1, [sp, #12]
10232
- mov r1, fp
10233
- bl printk
10234
-.L1719:
10235
- ldr r4, [r4, #2804]
10236
- mov r1, r9
10237
- ldrh r3, [sp, #20]
10238
- ldr r0, [sp, #32]
10239
- strh r10, [r4, #98] @ movhi
10240
- strh r3, [r4, #96] @ movhi
10241
- strh r5, [r4, #92] @ movhi
10242
- strh r6, [r4, #94] @ movhi
10243
- bl __aeabi_uidiv
10244
- strh r0, [r4, #88] @ movhi
10245
- mov r7, r0
10246
- ldr r1, [sp, #24]
10247
- ldr r0, [sp, #28]
10248
- bl __aeabi_uidiv
10249
- strh r0, [r4, #90] @ movhi
10250
- ldr r4, .L1814+8
10251
- ldr r3, [r4]
10252
- tst r3, #1024
10253
- beq .L1720
10254
- uxth r0, r0
10255
- mov r1, r9
10256
- str r0, [sp]
10257
- uxth r3, r7
10258
- ldr r0, .L1814+40
10259
- ldr r2, [sp, #24]
10260
- bl printk
10261
-.L1720:
10262
- ldr r3, [r4]
10263
- ldr r4, .L1814+20
10264
- tst r3, #1024
10265
- beq .L1721
10266
- str r10, [sp]
10267
- mov r1, r5
10268
- ldrh r3, [r4, #-156]
10269
- mov r2, r6
10270
- ldr r0, .L1814+44
10271
- str r3, [sp, #4]
10272
- ldrh r3, [r4, #-154]
10273
- str r3, [sp, #8]
10274
- ldr r3, [sp, #20]
10275
- bl printk
10276
-.L1721:
10277
- rsb r3, r6, r10
10278
- str r3, [sp, #24]
10279
- ldr r2, [sp, #24]
10280
- ldrh r3, [r4, #-154]
10281
- cmp r2, r3
10282
- bgt .L1722
10283
- ldr r2, .L1814+20
10284
- ldr r3, [sp, #20]
10285
- ldrh r2, [r2, #-156]
10286
- rsb r3, r5, r3
10287
- cmp r3, r2
10288
- movle r7, #0
10289
- movle r9, r7
10290
- ble .L1723
10291
-.L1722:
10292
- ldr ip, .L1814
10293
- mov r7, #0
10294
- mov r9, r7
10295
- ldr r3, [ip, #1092]
10296
- mov fp, ip
10297
- ldr r4, [r3, #580]
10298
- ldr r3, [ip, #2804]
10299
- uxth r4, r4
10300
- ldrh r10, [r3, #134]
10301
-.L1724:
10302
- ldr r3, .L1814+4
10303
- ldrh r3, [r3]
10304
- cmp r10, r3
10305
- bcs .L1733
10527
+ b .L1685
10528
+.L1703:
1030610529 add r4, r4, #1
1030710530 uxth r4, r4
10308
- cmp r4, r3
10309
- ldr r3, [fp, #1080]
10310
- movcs r4, #0
10311
- mov r8, r4, asl #2
10312
- add r2, r3, r8
10531
+ cmp r3, r4
10532
+ ldr r3, .L1779
10533
+ movls r4, #0
10534
+ lsl r6, r4, #2
10535
+ ldr r8, [r3, #1084]
10536
+ add r2, r8, r6
1031310537 ldrb r2, [r2, #2] @ zero_extendqisi2
10314
- tst r2, #192
10315
- and r0, r2, #224
10316
- moveq r1, #1
10317
- movne r1, #0
10318
- cmp r0, #224
10319
- orreq r1, r1, #1
10538
+ and ip, r2, #224
10539
+ and r1, r2, #192
1032010540 cmp r1, #0
10321
- bne .L1726
10541
+ cmpne ip, #224
10542
+ beq .L1695
1032210543 ubfx r2, r2, #3, #2
10544
+ ldr r0, .L1779+16
1032310545 ands r1, r2, #1
10324
- beq .L1727
10325
- cmp r0, #160
10326
- b .L1809
10327
-.L1727:
10328
- cmp r2, #2
10329
-.L1809:
10330
- bne .L1729
10331
- ldr r2, .L1814+20
10546
+ beq .L1696
10547
+ cmp ip, #160
10548
+.L1777:
10549
+ bne .L1698
10550
+ ldrh r2, [r0, #-178]
1033210551 ldr r0, [sp, #24]
10333
- ldrh r2, [r2, #-154]
1033410552 cmp r0, r2
10335
- ble .L1730
10336
- ldr r2, [r3, r8]
10553
+ ble .L1699
10554
+ ldr r2, [r8, r6]
1033710555 ubfx r2, r2, #11, #8
10338
- cmp r2, r6
10339
- bls .L1731
10556
+ cmp r2, fp
10557
+ bls .L1700
1034010558 cmp r1, #0
10341
- beq .L1730
10342
- ldrh r2, [r3, r8]
10559
+ beq .L1699
10560
+ ldrh r2, [r8, r6]
1034310561 ubfx r2, r2, #0, #11
10344
- cmp r2, r5
10345
- bgt .L1730
10346
-.L1731:
10347
- mov r1, #0
10562
+ cmp r2, r10
10563
+ bgt .L1699
10564
+.L1700:
1034810565 mov r2, #1
10566
+ mov r1, #0
1034910567 mov r0, r4
1035010568 str r3, [sp, #28]
1035110569 bl gc_add_sblk
10352
- ldr r2, .L1814+48
10353
- mov r1, #1
10354
- add r9, r9, r1
10355
- strh r1, [r2] @ movhi
10356
- ldr r2, .L1814+8
10570
+ ldr r3, [sp, #20]
10571
+ mov r2, #1
10572
+ add r5, r5, r2
10573
+ strh r2, [r3] @ movhi
10574
+ ldr r2, .L1779+8
10575
+ ldr r3, [sp, #28]
1035710576 ldr r2, [r2]
1035810577 tst r2, #1024
10359
- ldr r3, [sp, #28]
10360
- beq .L1730
10361
- ldr r0, [fp, #1088]
10362
- mov r1, r4, asl r1
10363
- ldr r2, [fp, #1080]
10364
- ldrh lr, [r0, r1]
10365
- add r2, r2, r8
10366
- ldr r1, .L1814+24
10367
- ldrb r2, [r2, #2] @ zero_extendqisi2
10368
- ldr r0, .L1814+52
10369
- ldrh r1, [r1, #52]
10370
- str r1, [sp]
10371
- ldrh r1, [r3, r8]
10578
+ beq .L1699
10579
+ ldr r1, [r3, #1092]
10580
+ lsl r2, r4, #1
10581
+ ldr r3, [r3, #1084]
10582
+ ldrh r0, [r1, r2]
10583
+ ldr r1, [r8, r6]
10584
+ add r3, r3, r6
10585
+ ldrb r2, [r3, #2] @ zero_extendqisi2
10586
+ ldr r3, .L1779+20
10587
+ ubfx r1, r1, #11, #8
10588
+ str r1, [sp, #8]
10589
+ ldrh r1, [r8, r6]
10590
+ lsr r2, r2, #5
1037210591 ubfx r1, r1, #0, #11
1037310592 str r1, [sp, #4]
10374
- ldr r3, [r3, r8]
10375
- ubfx r3, r3, #11, #8
10376
- str r3, [sp, #8]
10377
- b .L1810
10378
-.L1729:
10379
- ldr r0, .L1814+20
10380
- ldr r2, [sp, #20]
10381
- ldrh r0, [r0, #-156]
10382
- rsb r2, r5, r2
10593
+ mov r1, r4
10594
+ ldrh r3, [r3, #52]
10595
+ str r3, [sp]
10596
+ mov r3, r0
10597
+ ldr r0, .L1779+52
10598
+.L1778:
10599
+ bl printk
10600
+.L1699:
10601
+ cmp r7, #4
10602
+ cmpls r5, #4
10603
+ bhi .L1702
10604
+.L1695:
10605
+ add r9, r9, #1
10606
+ uxth r9, r9
10607
+ b .L1693
10608
+.L1696:
10609
+ cmp r2, #2
10610
+ b .L1777
10611
+.L1698:
10612
+ ldr r2, [sp, #16]
10613
+ ldrh r0, [r0, #-180]
10614
+ sub r2, r2, r10
1038310615 cmp r2, r0
10384
- ble .L1730
10385
- ldrh r2, [r3, r8]
10386
- add r0, r5, #8
10616
+ ble .L1699
10617
+ ldrh r2, [r8, r6]
10618
+ add r0, r10, #8
1038710619 ubfx r2, r2, #0, #11
1038810620 cmp r2, r0
10389
- ble .L1732
10621
+ ble .L1701
1039010622 cmp r1, #0
10391
- beq .L1730
10392
- ldr r2, [r3, r8]
10393
- add r1, r6, #4
10623
+ beq .L1699
10624
+ ldr r2, [r8, r6]
10625
+ add r1, fp, #4
1039410626 ubfx r2, r2, #11, #8
1039510627 cmp r2, r1
10396
- bgt .L1730
10397
-.L1732:
10398
- mov r1, #0
10628
+ bgt .L1699
10629
+.L1701:
1039910630 mov r2, #1
10631
+ mov r1, #0
1040010632 mov r0, r4
1040110633 str r3, [sp, #28]
1040210634 bl gc_add_sblk
10403
- ldr r2, .L1814+48
10404
- mov r1, #1
10405
- add r7, r7, r1
10406
- strh r1, [r2] @ movhi
10407
- ldr r2, .L1814+8
10635
+ ldr r3, [sp, #20]
10636
+ mov r2, #1
10637
+ add r7, r7, r2
10638
+ strh r2, [r3] @ movhi
10639
+ ldr r2, .L1779+8
10640
+ ldr r3, [sp, #28]
1040810641 ldr r2, [r2]
1040910642 tst r2, #1024
10410
- ldr r3, [sp, #28]
10411
- beq .L1730
10412
- ldr r0, [fp, #1088]
10413
- mov r1, r4, asl r1
10414
- ldr r2, [fp, #1080]
10415
- ldrh lr, [r0, r1]
10416
- add r2, r2, r8
10417
- ldr r1, .L1814+24
10418
- ldrb r2, [r2, #2] @ zero_extendqisi2
10419
- ldr r0, .L1814+56
10420
- ldrh r1, [r1, #52]
10421
- str r1, [sp]
10422
- ldrh r1, [r3, r8]
10643
+ beq .L1699
10644
+ ldr r1, [r3, #1092]
10645
+ lsl r2, r4, #1
10646
+ ldr r3, [r3, #1084]
10647
+ ldrh r0, [r1, r2]
10648
+ ldr r1, [r8, r6]
10649
+ add r3, r3, r6
10650
+ ldrb r2, [r3, #2] @ zero_extendqisi2
10651
+ ldr r3, .L1779+20
10652
+ ubfx r1, r1, #11, #8
10653
+ str r1, [sp, #8]
10654
+ ldrh r1, [r8, r6]
10655
+ lsr r2, r2, #5
1042310656 ubfx r1, r1, #0, #11
1042410657 str r1, [sp, #4]
10425
- ldr r3, [r3, r8]
10426
- ubfx r3, r3, #11, #8
10427
- str r3, [sp, #8]
10428
-.L1810:
1042910658 mov r1, r4
10430
- mov r2, r2, lsr #5
10431
- mov r3, lr
10432
- bl printk
10433
-.L1730:
10434
- cmp r9, #4
10435
- cmpls r7, #4
10436
- bhi .L1733
10437
-.L1726:
10438
- add r10, r10, #1
10439
- uxth r10, r10
10440
- b .L1724
10441
-.L1733:
10442
- ldr r3, .L1814
10443
- ldr r3, [r3, #1092]
10444
- str r4, [r3, #580]
10445
-.L1723:
10446
- cmp r6, #0
10447
- beq .L1736
10448
- ldr r0, .L1814
10449
- ldr r4, .L1814+4
10450
- ldr r3, [r0, #2804]
10451
- ldrh r3, [r3, #134]
10452
-.L1737:
10453
- ldrh r2, [r4]
10454
- cmp r2, r3
10455
- bls .L1812
10456
- ldr ip, [r0, #1080]
10457
- mov lr, r3, asl #2
10458
- add r8, ip, lr
10459
- ldr r2, [ip, r3, asl #2]
10659
+ ldrh r3, [r3, #52]
10660
+ str r3, [sp]
10661
+ mov r3, r0
10662
+ ldr r0, .L1779+56
10663
+ b .L1778
10664
+.L1708:
10665
+ ldr ip, [r0, #1084]
10666
+ lsl lr, r3, #2
10667
+ ldr r2, [ip, r3, lsl #2]
10668
+ add r6, ip, lr
1046010669 ubfx r1, r2, #11, #8
10461
- cmp r1, r6
10462
- bcc .L1738
10463
- ldrb r8, [r8, #2] @ zero_extendqisi2
10464
- tst r8, #24
10465
- rsbne r1, r6, r1
10670
+ cmp fp, r1
10671
+ bhi .L1707
10672
+ ldrb r6, [r6, #2] @ zero_extendqisi2
10673
+ tst r6, #24
10674
+ subne r1, r1, fp
1046610675 bfine r2, r1, #11, #8
1046710676 strne r2, [ip, lr]
10468
-.L1738:
10677
+.L1707:
1046910678 add r3, r3, #1
1047010679 uxth r3, r3
10471
- b .L1737
10472
-.L1812:
10473
- ldr r3, .L1814
10474
- ldr r3, [r3, #2804]
10475
- ldrh r2, [r3, #72]
10476
- add r2, r6, r2
10477
- strh r2, [r3, #72] @ movhi
10478
- ldrh r2, [r3, #98]
10479
- cmp r2, r6
10480
- rsbhi r2, r6, r2
10481
- strhih r2, [r3, #98] @ movhi
10482
-.L1736:
10483
- cmp r5, #0
10484
- beq .L1742
10485
- ldr ip, .L1814
10486
- ldr r6, .L1814+4
10487
- ldr r3, [ip, #2804]
10488
- ldrh r3, [r3, #134]
10489
-.L1743:
10490
- ldrh r2, [r6]
10491
- cmp r2, r3
10492
- bls .L1813
10493
- ldr r4, [ip, #1080]
10494
- mov lr, r3, asl #2
10495
- add r0, r4, lr
10496
- ldrh r2, [r4, lr]
10497
- ubfx r1, r2, #0, #11
10498
- cmp r1, r5
10499
- blt .L1744
10500
- ldrb r0, [r0, #2] @ zero_extendqisi2
10501
- and r0, r0, #24
10502
- cmp r0, #16
10503
- rsbne r1, r5, r1
10504
- bfine r2, r1, #0, #11
10505
- strneh r2, [r4, lr] @ movhi
10506
-.L1744:
10507
- add r3, r3, #1
10508
- uxth r3, r3
10509
- b .L1743
10510
-.L1813:
10511
- ldr r3, .L1814
10512
- ldr r3, [r3, #2804]
10513
- ldrh r2, [r3, #74]
10514
- add r2, r5, r2
10515
- strh r2, [r3, #74] @ movhi
10516
- ldrh r2, [r3, #96]
10517
- cmp r2, r5
10518
- rsbhi r2, r5, r2
10519
- strhih r2, [r3, #96] @ movhi
10520
-.L1742:
10521
- ldr r4, .L1814+60
10522
- mov r1, #0
10523
- sub r0, r4, #12
10524
- bl _list_get_gc_head_node
10525
- movw r2, #65535
10526
- cmp r0, r2
10527
- beq .L1700
10528
- ldr r2, .L1814
10529
- mov r3, r0, asl #1
10530
- ldr r1, [r2, #1088]
10531
- ldrh r2, [r4, #-8]
10532
- ldrh r3, [r1, r3]
10533
- cmp r3, r2, lsr #1
10534
- bhi .L1700
10535
- mov r1, #0
10536
- mov r2, #1
10537
- bl gc_add_sblk
10538
- add r9, r9, #1
10539
-.L1700:
10540
- add r0, r7, r9
10541
-.L1806:
10542
- add sp, sp, #44
10543
- @ sp needed
10544
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
10545
-.L1815:
10680
+ b .L1706
10681
+.L1714:
10682
+ ldr r4, [ip, #1084]
10683
+ lsl lr, r0, #2
10684
+ ldrh r3, [r4, lr]
10685
+ add r1, r4, lr
10686
+ ubfx r2, r3, #0, #11
10687
+ cmp r2, r10
10688
+ blt .L1713
10689
+ ldrb r1, [r1, #2] @ zero_extendqisi2
10690
+ and r1, r1, #24
10691
+ cmp r1, #16
10692
+ subne r2, r2, r10
10693
+ bfine r3, r2, #0, #11
10694
+ strhne r3, [r4, lr] @ movhi
10695
+.L1713:
10696
+ add r0, r0, #1
10697
+ uxth r0, r0
10698
+ b .L1712
10699
+.L1780:
1054610700 .align 2
10547
-.L1814:
10701
+.L1779:
1054810702 .word .LANCHOR0
10549
- .word .LANCHOR0+1076
10703
+ .word .LANCHOR0+1080
1055010704 .word .LANCHOR2
10705
+ .word .LC124
10706
+ .word .LANCHOR3
10707
+ .word .LANCHOR0+2824
10708
+ .word .LC125
1055110709 .word .LC126
1055210710 .word .LC127
10553
- .word .LANCHOR3
10554
- .word .LANCHOR0+2828
1055510711 .word .LC128
1055610712 .word .LC129
10713
+ .word .LANCHOR3-3088
10714
+ .word .LC123
1055710715 .word .LC130
1055810716 .word .LC131
10559
- .word .LC132
10560
- .word .LANCHOR0+5008
10561
- .word .LC133
10562
- .word .LC134
10563
- .word .LANCHOR3-3088
1056410717 .fnend
1056510718 .size gc_static_wearleveling, .-gc_static_wearleveling
1056610719 .align 2
1056710720 .global zftl_sblk_list_init
10721
+ .syntax unified
10722
+ .arm
10723
+ .fpu softvfp
1056810724 .type zftl_sblk_list_init, %function
1056910725 zftl_sblk_list_init:
1057010726 .fnstart
1057110727 @ args = 0, pretend = 0, frame = 16
1057210728 @ frame_needed = 0, uses_anonymous_args = 0
10573
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10729
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1057410730 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10575
- movw r3, #1076
10576
- ldr r5, .L1849
10731
+ movw r3, #1080
10732
+ ldr r4, .L1813
1057710733 mov r2, #6
10578
- ldr r6, .L1849+4
1057910734 mov r1, #0
1058010735 .pad #20
1058110736 sub sp, sp, #20
10582
- mov fp, #0
10583
- ldrh r3, [r5, r3]
10584
- mov r4, fp
10585
- ldr r0, [r5, #1036]
10586
- mov r8, r5
10587
- ldr r10, .L1849+8
10737
+ ldr r7, .L1813+4
10738
+ mov r5, #0
10739
+ ldrh r3, [r4, r3]
10740
+ add r10, r4, #2784
10741
+ ldr r0, [r4, #1036]
10742
+ sub r8, r7, #3072
10743
+ sub r9, r7, #3104
1058810744 mul r2, r2, r3
1058910745 bl ftl_memset
10590
- sub r3, r6, #3056
10591
- mov r2, #32
10592
- str fp, [r6, #-3080]
10593
- strh r2, [r3, #-12] @ movhi
10746
+ mov r3, #32
10747
+ ldrh r1, [r9, #-14]
10748
+ strh r3, [r8, #-4] @ movhi
10749
+ movw r3, #2786
10750
+ strh r5, [r4, r3] @ movhi
1059410751 movw r3, #2788
10595
- strh fp, [r5, r3] @ movhi
10752
+ strh r5, [r4, r3] @ movhi
1059610753 movw r3, #2790
10597
- strh fp, [r5, r3] @ movhi
10598
- movw r3, #2792
10599
- strh fp, [r5, r3] @ movhi
10754
+ strh r5, [r4, r3] @ movhi
1060010755 movw r3, #2794
10601
- strh fp, [r5, r3] @ movhi
10602
- sub r2, r6, #3104
10603
- movw r3, #2798
10604
- str fp, [r6, #-3076]
10605
- strh fp, [r5, r3] @ movhi
10606
- movw r3, #2796
10607
- strh fp, [r5, r3] @ movhi
10756
+ strh r5, [r4, r3] @ movhi
10757
+ movw r3, #2792
10758
+ strh r5, [r4, r3] @ movhi
1060810759 mov r0, #32768
10609
- ldrb r3, [r6, #-3123] @ zero_extendqisi2
10610
- ldrh r1, [r2, #-10]
10611
- str fp, [r6, #-3072]
10612
- str fp, [r6, #-3104]
10760
+ ldrb r3, [r7, #-3127] @ zero_extendqisi2
10761
+ str r5, [r7, #-3088]
10762
+ str r5, [r7, #-3084]
10763
+ str r5, [r7, #-3080]
1061310764 mul r1, r1, r3
10614
- str fp, [r6, #-3092]
10615
- str fp, [r6, #-3100]
10765
+ str r5, [r7, #-3104]
10766
+ str r5, [r7, #-3116]
10767
+ str r5, [r7, #-3100]
10768
+ strh r5, [r10] @ movhi
1061610769 bl __aeabi_idiv
10617
- uxth r3, r0
10770
+ sxth r3, r0
10771
+ str r7, [sp, #8]
10772
+ str r10, [sp, #12]
1061810773 str r3, [sp, #4]
10619
- ldr r3, [r5, #2804]
10620
- str r6, [sp, #8]
10621
- ldrh r7, [r3, #134]
10622
- strh fp, [r3, #146] @ movhi
10623
-.L1817:
10624
- ldr r2, .L1849+12
10625
- sxth ip, r7
10626
- ldr r3, .L1849
10774
+ ldr r3, [r4, #2800]
10775
+ ldrsh r6, [r3, #134]
10776
+ strh r5, [r3, #146] @ movhi
10777
+.L1782:
10778
+ ldr r3, .L1813+8
10779
+ ldrh r3, [r3]
10780
+ cmp r6, r3
10781
+ blt .L1799
10782
+ ldr r2, [sp, #12]
10783
+ ldr r3, [r4, #2800]
1062710784 ldrh r2, [r2]
10628
- cmp ip, r2
10629
- bge .L1847
10630
- ldr r6, [r8, #1080]
10631
- add r6, r6, ip, asl #2
10632
- ldrb r3, [r6, #3] @ zero_extendqisi2
10785
+ strh r2, [r3, #114] @ movhi
10786
+ movw r2, #2786
10787
+ ldrh r2, [r4, r2]
10788
+ strh r2, [r3, #118] @ movhi
10789
+ movw r2, #2788
10790
+ ldrh r2, [r4, r2]
10791
+ strh r2, [r3, #116] @ movhi
10792
+ movw r2, #2790
10793
+ ldrh r2, [r4, r2]
10794
+ strh r2, [r3, #122] @ movhi
10795
+ movw r2, #2794
10796
+ ldrh r2, [r4, r2]
10797
+ strh r2, [r3, #120] @ movhi
10798
+ movw r2, #2792
10799
+ ldrh r2, [r4, r2]
10800
+ strh r2, [r3, #124] @ movhi
10801
+ add sp, sp, #20
10802
+ @ sp needed
10803
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
10804
+.L1799:
10805
+ ldr r7, [r4, #1084]
10806
+ add r7, r7, r6, lsl #2
10807
+ ldrb r3, [r7, #3] @ zero_extendqisi2
1063310808 cmp r3, #0
1063410809 ldreq r1, [sp, #4]
10635
- beq .L1818
10810
+ beq .L1783
1063610811 ldr r3, [sp, #8]
10637
- ldrh fp, [r10]
10638
- ldr r0, [r8, #2804]
10639
- ldrb lr, [r3, #-3123] @ zero_extendqisi2
10812
+ ldr ip, [r4, #2800]
10813
+ ldrh r10, [r9, #-14]
10814
+ ldrb lr, [r3, #-3127] @ zero_extendqisi2
1064010815 mov r3, #0
1064110816 mov r1, r3
10642
-.L1819:
10817
+.L1784:
1064310818 cmp r3, lr
10644
- bge .L1848
10645
- ldrb r2, [r6, #3] @ zero_extendqisi2
10646
- mov r2, r2, asr r3
10819
+ blt .L1787
10820
+ cmp r1, #0
10821
+ beq .L1788
10822
+ mov r0, #32768
10823
+ bl __aeabi_idiv
10824
+ add r1, r0, #1
10825
+ sxth r1, r1
10826
+.L1783:
10827
+ lsl fp, r6, #1
10828
+ ldr r0, [r4, #1036]
10829
+ add r2, fp, r6
10830
+ lsl r2, r2, #1
10831
+ add ip, r0, r2
10832
+ strh r1, [ip, #4] @ movhi
10833
+ mvn r1, #0
10834
+ strh r1, [ip, #2] @ movhi
10835
+ strh r1, [r0, r2] @ movhi
10836
+ ldrb r2, [r7, #2] @ zero_extendqisi2
10837
+ and r2, r2, #224
10838
+ cmp r2, #224
10839
+ cmpne r2, #32
10840
+ moveq r10, #1
10841
+ movne r10, #0
10842
+ beq .L1789
10843
+ ldr r1, [r4, #1096]
10844
+ ldrh r0, [r1, #16]
10845
+ cmp r6, r0
10846
+ beq .L1789
10847
+ ldrh r0, [r1, #48]
10848
+ cmp r6, r0
10849
+ beq .L1789
10850
+ ldrh r1, [r1, #80]
10851
+ cmp r6, r1
10852
+ beq .L1789
10853
+ cmp r2, #64
10854
+ bne .L1790
10855
+ uxth r7, r6
10856
+ ldr r2, .L1813+12
10857
+ sub r0, r9, #12
10858
+ mov r1, r7
10859
+.L1811:
10860
+ bl _insert_data_list
10861
+ ldr r2, [r4, #1092]
10862
+ ldrh r3, [r2, fp]
10863
+ cmp r3, #7
10864
+ movls r2, r10
10865
+ movls r1, #1
10866
+ movls r0, r7
10867
+ bls .L1809
10868
+.L1789:
10869
+ add r6, r6, #1
10870
+ sxth r6, r6
10871
+ b .L1782
10872
+.L1787:
10873
+ ldrb r2, [r7, #3] @ zero_extendqisi2
10874
+ asr r2, r2, r3
1064710875 add r3, r3, #1
1064810876 tst r2, #1
10649
- addeq r1, fp, r1
10650
- ldrneh r2, [r0, #146]
10651
- uxtheq r1, r1
10877
+ ldrhne r2, [ip, #146]
10878
+ addeq r1, r10, r1
10879
+ sxtheq r1, r1
1065210880 addne r2, r2, #1
10653
- strneh r2, [r0, #146] @ movhi
10654
- b .L1819
10655
-.L1848:
10656
- cmp r1, #0
10657
- beq .L1823
10658
- sxth r1, r1
10659
- mov r0, #32768
10660
- str ip, [sp, #12]
10661
- bl __aeabi_idiv
10662
- add r0, r0, #1
10663
- ldr ip, [sp, #12]
10664
- uxth r1, r0
10665
- b .L1818
10666
-.L1823:
10667
- ldrb r3, [r6, #2] @ zero_extendqisi2
10881
+ strhne r2, [ip, #146] @ movhi
10882
+ b .L1784
10883
+.L1788:
10884
+ ldrb r3, [r7, #2] @ zero_extendqisi2
1066810885 mvn r0, #0
1066910886 orr r3, r3, #224
10670
- strb r3, [r6, #2]
10671
- ldr r2, [r5, #1088]
10672
- mov r3, ip, asl #1
10887
+ strb r3, [r7, #2]
10888
+ lsl r3, r6, #1
10889
+ ldr r2, [r4, #1092]
1067310890 strh r0, [r2, r3] @ movhi
10674
-.L1818:
10675
- mov r9, ip, asl #1
10676
- ldr r0, [r5, #1036]
10677
- add r2, r9, ip
10678
- mov r2, r2, asl #1
10679
- add lr, r0, r2
10680
- strh r1, [lr, #4] @ movhi
10681
- mvn r1, #0
10682
- strh r1, [lr, #2] @ movhi
10683
- strh r1, [r0, r2] @ movhi
10684
- ldrb r2, [r6, #2] @ zero_extendqisi2
10685
- and r2, r2, #224
10686
- cmp r2, #32
10687
- cmpne r2, #224
10688
- moveq fp, #1
10689
- movne fp, #0
10690
- beq .L1824
10691
- ldr r1, [r8, #1092]
10692
- ldrh r0, [r1, #16]
10693
- cmp ip, r0
10694
- beq .L1824
10695
- ldrh r0, [r1, #48]
10696
- cmp ip, r0
10697
- beq .L1824
10698
- ldrh r1, [r1, #80]
10699
- cmp ip, r1
10700
- beq .L1824
10701
- cmp r2, #64
10702
- uxtheq r6, r7
10703
- ldreq r0, .L1849+16
10704
- ldreq r2, .L1849+20
10705
- moveq r1, r6
10706
- beq .L1845
10707
-.L1825:
10891
+ b .L1783
10892
+.L1790:
1070810893 cmp r2, #96
10709
- uxtheq r6, r7
10710
- ldreq r0, .L1849+24
10711
- ldreq r2, .L1849+28
10712
- moveq r1, r6
10713
- beq .L1845
10714
-.L1826:
10894
+ uxtheq r7, r6
10895
+ ldreq r2, .L1813+16
10896
+ ldreq r0, .L1813+20
10897
+ moveq r1, r7
10898
+ beq .L1811
10899
+.L1791:
1071510900 cmp r2, #160
10716
- bne .L1827
10717
- uxth r6, r7
10718
- ldr r0, .L1849+32
10719
- ldr r2, .L1849+36
10901
+ uxtheq r7, r6
10902
+ ldreq r2, .L1813+24
10903
+ ldreq r0, .L1813+28
10904
+ moveq r1, r7
10905
+ beq .L1811
10906
+.L1792:
10907
+ cmp r2, #0
10908
+ bne .L1789
10909
+ ldr r2, [r4, #1092]
10910
+ uxth r10, r6
10911
+ ldrh r2, [r2, fp]
10912
+ cmp r2, #0
10913
+ beq .L1793
10914
+ cmp r5, #2
10915
+ bgt .L1794
1072010916 mov r1, r6
10721
-.L1845:
10722
- bl _insert_data_list
10723
- ldr r2, [r8, #1088]
10724
- ldrh r3, [r2, r9]
10725
- cmp r3, #7
10726
- movls r0, r6
10727
- movls r1, #1
10728
- movls r2, fp
10729
- bhi .L1824
10730
- b .L1843
10731
-.L1827:
10732
- cmp r2, #0
10733
- bne .L1824
10734
- ldr r2, [r8, #1088]
10735
- uxth fp, r7
10736
- ldrh r2, [r2, r9]
10737
- cmp r2, #0
10738
- beq .L1828
10739
- sxth r3, r4
10740
- cmp r3, #2
10741
- bgt .L1829
10742
- mov r1, ip
10743
- ldr r0, .L1849+40
10917
+ ldr r0, .L1813+32
1074410918 bl printk
10745
- ldrb r3, [r6, #2] @ zero_extendqisi2
10746
- add r4, r4, #1
10747
- mov r0, fp
10748
- tst r3, #16
10919
+ ldrb r3, [r7, #2] @ zero_extendqisi2
10920
+ add r5, r5, #1
10921
+ sxth r5, r5
1074910922 mov r1, #1
10750
- uxth r4, r4
10923
+ mov r0, r10
10924
+ tst r3, #16
1075110925 movne r2, #5
1075210926 moveq r2, #2
1075310927 bfi r3, r2, #5, #3
1075410928 mov r2, #0
10755
- strb r3, [r6, #2]
10756
-.L1843:
10929
+ strb r3, [r7, #2]
10930
+.L1809:
1075710931 bl gc_add_sblk
10758
- b .L1824
10759
-.L1829:
10760
- ldr r1, .L1849+44
10932
+ b .L1789
10933
+.L1794:
1076110934 mov r2, #656
10762
- ldr r0, .L1849+48
10935
+ ldr r1, .L1813+36
10936
+ ldr r0, .L1813+40
1076310937 bl printk
1076410938 bl dump_stack
10765
-.L1828:
10766
- ldrb r3, [r6, #2] @ zero_extendqisi2
10939
+.L1793:
10940
+ ldrb r3, [r7, #2] @ zero_extendqisi2
1076710941 ands r3, r3, #24
10768
- ldreq r0, .L1849+52
10769
- moveq r1, fp
10770
- ldreq r2, .L1849+56
10771
- beq .L1841
10772
-.L1831:
10773
- cmp r3, #16
10774
- ldreq r0, .L1849+60
10775
- moveq r1, fp
10776
- ldreq r2, .L1849+64
10777
- movne r1, fp
10778
- ldrne r0, .L1849+68
10779
- ldrne r2, .L1849+72
10780
-.L1841:
10942
+ bne .L1797
10943
+ ldr r2, .L1813+44
10944
+ mov r1, r10
10945
+ ldr r0, .L1813+48
10946
+.L1807:
1078110947 bl _insert_free_list
10782
-.L1824:
10783
- add r7, r7, #1
10784
- uxth r7, r7
10785
- b .L1817
10786
-.L1847:
10787
- movw r1, #2788
10788
- ldr r2, [r3, #2804]
10789
- ldrh r1, [r3, r1]
10790
- strh r1, [r2, #114] @ movhi
10791
- movw r1, #2790
10792
- ldrh r1, [r3, r1]
10793
- strh r1, [r2, #118] @ movhi
10794
- movw r1, #2792
10795
- ldrh r1, [r3, r1]
10796
- strh r1, [r2, #116] @ movhi
10797
- movw r1, #2794
10798
- ldrh r1, [r3, r1]
10799
- strh r1, [r2, #122] @ movhi
10800
- movw r1, #2798
10801
- ldrh r1, [r3, r1]
10802
- strh r1, [r2, #120] @ movhi
10803
- movw r1, #2796
10804
- ldrh r3, [r3, r1]
10805
- strh r3, [r2, #124] @ movhi
10806
- add sp, sp, #20
10807
- @ sp needed
10808
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
10809
-.L1850:
10948
+ b .L1789
10949
+.L1797:
10950
+ cmp r3, #16
10951
+ ldreq r2, .L1813+52
10952
+ moveq r1, r10
10953
+ subeq r0, r8, #12
10954
+ ldrne r2, .L1813+56
10955
+ movne r1, r10
10956
+ subne r0, r8, #8
10957
+ b .L1807
10958
+.L1814:
1081010959 .align 2
10811
-.L1849:
10960
+.L1813:
1081210961 .word .LANCHOR0
1081310962 .word .LANCHOR3
10814
- .word .LANCHOR3-3114
10815
- .word .LANCHOR0+1076
10816
- .word .LANCHOR3-3092
10817
- .word .LANCHOR0+2794
10818
- .word .LANCHOR3-3104
10819
- .word .LANCHOR0+2796
10820
- .word .LANCHOR3-3100
10821
- .word .LANCHOR0+2798
10822
- .word .LC135
10823
- .word .LANCHOR1+1868
10824
- .word .LC0
10825
- .word .LANCHOR3-3080
10826
- .word .LANCHOR0+2788
10827
- .word .LANCHOR3-3076
10963
+ .word .LANCHOR0+1080
1082810964 .word .LANCHOR0+2790
10829
- .word .LANCHOR3-3072
1083010965 .word .LANCHOR0+2792
10966
+ .word .LANCHOR3-3104
10967
+ .word .LANCHOR0+2794
10968
+ .word .LANCHOR3-3100
10969
+ .word .LC132
10970
+ .word .LANCHOR1+1687
10971
+ .word .LC0
10972
+ .word .LANCHOR0+2784
10973
+ .word .LANCHOR3-3088
10974
+ .word .LANCHOR0+2786
10975
+ .word .LANCHOR0+2788
1083110976 .fnend
1083210977 .size zftl_sblk_list_init, .-zftl_sblk_list_init
1083310978 .align 2
1083410979 .global pm_free_sblk
10980
+ .syntax unified
10981
+ .arm
10982
+ .fpu softvfp
1083510983 .type pm_free_sblk, %function
1083610984 pm_free_sblk:
1083710985 .fnstart
1083810986 @ args = 0, pretend = 0, frame = 272
1083910987 @ frame_needed = 0, uses_anonymous_args = 0
10840
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
10988
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1084110989 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1084210990 .pad #284
1084310991 sub sp, sp, #284
10844
- ldr r5, .L1881
10845
- ldrh r3, [r5, #-152]
10992
+ ldr r5, .L1843
10993
+ ldrh r3, [r5, #-176]
1084610994 cmp r3, #128
10847
- bls .L1852
10848
- ldr r1, .L1881+4
10995
+ bls .L1816
1084910996 mov r2, #94
10850
- ldr r0, .L1881+8
10997
+ ldr r1, .L1843+4
10998
+ ldr r0, .L1843+8
1085110999 bl printk
1085211000 bl dump_stack
10853
-.L1852:
10854
- ldr r4, .L1881+12
10855
- mov r1, #0
10856
- ldrh lr, [r5, #-152]
10857
- mov r0, r1
10858
- movw r6, #65535
10859
- ldr r2, [r4, #2804]
10860
- add r3, r2, #688
10861
- add r2, r2, #412
10862
- add r2, r2, #2
10863
- ldrh ip, [r3]
10864
-.L1855:
10865
- ldrh r7, [r2, #2]!
10866
- uxth r3, r1
10867
- cmp r7, r6
10868
- addne r0, r0, #1
10869
- uxthne r0, r0
10870
- cmp r0, ip
10871
- bcs .L1854
10872
- cmp r0, lr
10873
- bcs .L1854
10874
- add r1, r1, #1
10875
- cmp r1, #128
10876
- bne .L1855
10877
- mov r3, r1
10878
-.L1854:
11001
+.L1816:
11002
+ ldr r4, .L1843+12
11003
+ mov r2, #0
11004
+ ldrh ip, [r5, #-176]
11005
+ movw lr, #65535
11006
+ ldr r1, [r4, #2800]
11007
+ add r3, r1, #688
11008
+ add r1, r1, #416
11009
+ ldrh r0, [r3]
11010
+ mov r3, r2
11011
+.L1819:
11012
+ ldrh r6, [r1], #2
11013
+ cmp r6, lr
11014
+ addne r2, r2, #1
11015
+ uxthne r2, r2
11016
+ cmp r2, r0
11017
+ bcs .L1818
11018
+ cmp r2, ip
11019
+ bcs .L1818
1087911020 add r3, r3, #1
10880
- add r0, sp, #24
10881
- mov r1, #0
10882
- mov r2, #256
1088311021 uxth r3, r3
10884
- mvn r8, #0
1088511022 cmp r3, #128
10886
- mov r6, #0
10887
- movcs r3, #128
10888
- str r3, [sp, #8]
10889
- bl ftl_memset
10890
- ldr r7, [r4, #2804]
10891
- movw r3, #698
10892
- ldrb ip, [r5, #-3130] @ zero_extendqisi2
10893
- add r10, r7, #700
10894
- ldrh fp, [r7, r3]
10895
- ldr r3, .L1881+16
10896
- ldrh r9, [r3, #-12]
10897
- ldrb r3, [r4, #1189] @ zero_extendqisi2
10898
- rsb r3, r3, #24
10899
- rsb r3, r9, r3
10900
- mvn r8, r8, asl r3
10901
-.L1856:
10902
- uxth r3, r6
10903
- cmp r3, fp
10904
- bcs .L1878
10905
- ldr r0, [r10, #4]!
10906
- mov r1, ip
10907
- str ip, [sp, #16]
10908
- and r0, r8, r0, lsr r9
10909
- bl __aeabi_uidiv
11023
+ bne .L1819
11024
+.L1818:
11025
+ add r3, r3, #1
11026
+ mov r2, #256
11027
+ uxth fp, r3
1091011028 mov r1, #0
10911
- uxth r3, r0
10912
- ldr ip, [sp, #16]
10913
- str r3, [sp, #12]
10914
- add r3, r7, #412
10915
- add r3, r3, #2
10916
- add r2, sp, #24
10917
-.L1857:
10918
- ldr r0, [sp, #8]
10919
- uxth lr, r1
10920
- cmp lr, r0
10921
- bcs .L1879
10922
- ldrh lr, [r3, #2]!
10923
- add r1, r1, #1
10924
- ldr r0, [sp, #12]
10925
- add r2, r2, #2
10926
- cmp lr, r0
10927
- ldreqh lr, [r2, #-2]
10928
- addeq lr, lr, #1
10929
- streqh lr, [r2, #-2] @ movhi
10930
- b .L1857
10931
-.L1879:
10932
- add r6, r6, #1
10933
- b .L1856
10934
-.L1878:
10935
- ldr r2, .L1881+20
11029
+ add r0, sp, #24
11030
+ cmp fp, #129
1093611031 mov r6, #0
10937
- ldrb fp, [r5, #-3123] @ zero_extendqisi2
10938
- add r8, sp, #24
10939
- movw r10, #65535
10940
- mov r9, r6
10941
- ldrh r3, [r2, #-8]
10942
- smulbb fp, fp, r3
10943
- add r3, r2, #3088
11032
+ moveq fp, #128
11033
+ bl ftl_memset
11034
+ ldr r7, [r4, #2800]
11035
+ movw r3, #698
11036
+ ldrb r8, [r4, #1153] @ zero_extendqisi2
11037
+ ldrb r2, [r5, #-3136] @ zero_extendqisi2
11038
+ ldrh r3, [r7, r3]
11039
+ add r10, r7, #704
11040
+ rsb r8, r8, #24
1094411041 str r3, [sp, #12]
10945
- uxth r7, fp
10946
-.L1861:
10947
- ldr r3, [sp, #8]
10948
- uxth fp, r6
10949
- cmp fp, r3
10950
- bcs .L1880
11042
+ ldr r3, .L1843+16
11043
+ ldrh r9, [r3, #-2]
11044
+ sub r3, r8, r9
11045
+ mvn r8, #0
11046
+ mvn r8, r8, lsl r3
11047
+.L1821:
11048
+ ldr r1, [sp, #12]
11049
+ uxth r3, r6
11050
+ cmp r1, r3
11051
+ bhi .L1824
11052
+ ldr r3, .L1843+20
11053
+ add r8, sp, #24
11054
+ ldrb r7, [r5, #-3127] @ zero_extendqisi2
11055
+ movw r10, #65535
11056
+ mov r6, #0
11057
+ ldrh r3, [r3, #-8]
11058
+ str r6, [sp, #12]
11059
+ smulbb r7, r7, r3
11060
+ uxth r7, r7
11061
+.L1830:
11062
+ ldr r2, [r4, #2800]
1095111063 add r3, r6, #208
10952
- ldr ip, [r4, #2804]
10953
- ldrb r1, [r5, #-3130] @ zero_extendqisi2
10954
- mov r3, r3, asl #1
10955
- add r2, ip, #692
10956
- str ip, [sp, #16]
10957
- ldrh r3, [ip, r3]
10958
- ldrh r0, [r2]
11064
+ lsl r3, r3, #1
11065
+ ldrb r1, [r5, #-3136] @ zero_extendqisi2
11066
+ uxth r9, r6
11067
+ ldrh r3, [r2, r3]
11068
+ add r0, r2, #692
11069
+ ldrh r0, [r0]
11070
+ str r2, [sp, #16]
1095911071 str r3, [sp, #20]
1096011072 bl __aeabi_idiv
1096111073 ldr r3, [sp, #20]
10962
- ldr ip, [sp, #16]
11074
+ ldr r2, [sp, #16]
1096311075 cmp r0, r3
10964
- movw r0, #65535
10965
- ldreq r2, [sp, #12]
10966
- ldreqb r1, [r2, #-3123] @ zero_extendqisi2
10967
- ldreq r2, .L1881+24
10968
- ldreqh r2, [r2]
10969
- smulbbeq r2, r1, r2
10970
- streqh r2, [r8] @ movhi
10971
- ldrh r2, [r8]
10972
- cmp r2, #0
10973
- cmpne r7, r2
10974
- movhi r1, #1
10975
- movls r1, #0
11076
+ ldreq r0, .L1843+24
11077
+ ldrbeq r1, [r5, #-3127] @ zero_extendqisi2
11078
+ ldrheq r0, [r0]
11079
+ smulbbeq r1, r1, r0
11080
+ strheq r1, [r8] @ movhi
11081
+ ldrh r1, [r8]
11082
+ ldrh ip, [r2, #74]
1097611083 cmp r1, #0
10977
- ldrh r1, [ip, #74]
10978
- movne r9, fp
10979
- movne r7, r2
11084
+ cmpne r1, r7
11085
+ movcc r0, #1
11086
+ movcs r0, #0
11087
+ cmp r0, #0
11088
+ ldr r0, [sp, #12]
11089
+ movne r0, r9
11090
+ movne r7, r1
11091
+ str r0, [sp, #16]
11092
+ str r0, [sp, #12]
11093
+ movw r0, #65535
1098011094 cmp r3, r0
10981
- cmpne r1, #2
10982
- bls .L1864
10983
- ldr r0, [r4, #1080]
10984
- mov r1, r3, asl #2
10985
- ldrh r1, [r0, r1]
10986
- ldrh r0, [ip, #92]
10987
- ubfx r1, r1, #0, #11
10988
- add r0, r0, #4
10989
- cmp r1, r0
10990
- bgt .L1864
10991
- str r1, [sp]
11095
+ cmpne ip, #2
11096
+ bls .L1827
11097
+ ldr ip, [r4, #1084]
11098
+ lsl r0, r3, #2
11099
+ ldrh r2, [r2, #92]
11100
+ ldrh r0, [ip, r0]
11101
+ add r2, r2, #4
11102
+ ubfx r0, r0, #0, #11
11103
+ cmp r0, r2
11104
+ bgt .L1827
11105
+ mov r10, r9
11106
+ str r0, [sp]
11107
+ mov r2, r1
11108
+ ldr r0, .L1843+28
1099211109 mov r1, r6
10993
- ldr r0, .L1881+28
10994
- mov r10, fp
1099511110 bl printk
10996
-.L1864:
11111
+.L1827:
1099711112 ldrh r2, [r8]
1099811113 cmp r2, #0
10999
- bne .L1865
11000
- add fp, r6, #208
11001
- ldr r1, [r4, #2804]
11114
+ bne .L1828
11115
+ ldr r1, [r4, #2800]
11116
+ add r9, r6, #208
11117
+ lsl r3, r9, #1
1100211118 movw r0, #65535
11003
- mov r3, fp, asl #1
1100411119 ldrh r3, [r1, r3]
1100511120 cmp r3, r0
11006
- beq .L1865
11007
- ldr r0, .L1881+32
11121
+ beq .L1828
11122
+ ldr r0, .L1843+32
1100811123 ldr r0, [r0]
1100911124 tst r0, #4096
11010
- beq .L1866
11125
+ beq .L1829
1101111126 add r1, r1, #688
11012
- ldr r0, .L1881+36
11127
+ ldr r0, .L1843+36
1101311128 ldrh r1, [r1]
1101411129 str r1, [sp]
1101511130 mov r1, r6
1101611131 bl printk
11017
-.L1866:
11018
- ldr r3, [r4, #2804]
11019
- mov fp, fp, asl #1
11020
- ldrh r0, [r3, fp]
11132
+.L1829:
11133
+ ldr r3, [r4, #2800]
11134
+ lsl r9, r9, #1
11135
+ ldrh r0, [r3, r9]
1102111136 bl ftl_free_sblk
11022
- ldr r3, [r4, #2804]
11137
+ ldr r3, [r4, #2800]
1102311138 mvn r2, #0
11024
- strh r2, [r3, fp] @ movhi
11139
+ strh r2, [r3, r9] @ movhi
1102511140 add r3, r3, #688
1102611141 ldrh r2, [r3]
1102711142 sub r2, r2, #1
1102811143 strh r2, [r3] @ movhi
11029
-.L1865:
11144
+.L1828:
1103011145 add r6, r6, #1
1103111146 add r8, r8, #2
11032
- b .L1861
11033
-.L1880:
11147
+ uxth r3, r6
11148
+ cmp fp, r3
11149
+ bhi .L1830
11150
+ ldr r3, [sp, #16]
1103411151 movw r0, #65535
1103511152 cmp r10, r0
11036
- movne r0, r10
11037
- moveq r0, r9
11153
+ movne r3, r10
11154
+ mov r0, r3
1103811155 add sp, sp, #284
1103911156 @ sp needed
11040
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
11041
-.L1882:
11157
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
11158
+.L1824:
11159
+ ldr r0, [r10], #4
11160
+ mov r1, r2
11161
+ str r2, [sp, #16]
11162
+ and r0, r8, r0, lsr r9
11163
+ bl __aeabi_uidiv
11164
+ ldr r2, [sp, #16]
11165
+ uxth r0, r0
11166
+ add lr, r7, #416
11167
+ add r1, sp, #24
11168
+ mov r3, #0
11169
+.L1823:
11170
+ ldrh ip, [lr], #2
11171
+ add r3, r3, #1
11172
+ uxth r3, r3
11173
+ add r1, r1, #2
11174
+ cmp r0, ip
11175
+ ldrheq ip, [r1, #-2]
11176
+ addeq ip, ip, #1
11177
+ strheq ip, [r1, #-2] @ movhi
11178
+ cmp fp, r3
11179
+ bne .L1823
11180
+ add r6, r6, #1
11181
+ b .L1821
11182
+.L1844:
1104211183 .align 2
11043
-.L1881:
11184
+.L1843:
1104411185 .word .LANCHOR3
11045
- .word .LANCHOR1+1888
11186
+ .word .LANCHOR1+1707
1104611187 .word .LC0
1104711188 .word .LANCHOR0
11048
- .word .LANCHOR3-3120
11189
+ .word .LANCHOR3-3136
1104911190 .word .LANCHOR3-3088
1105011191 .word .LANCHOR3-3096
11051
- .word .LC136
11192
+ .word .LC133
1105211193 .word .LANCHOR2
11053
- .word .LC137
11194
+ .word .LC134
1105411195 .fnend
1105511196 .size pm_free_sblk, .-pm_free_sblk
1105611197 .align 2
1105711198 .global ftl_memcpy
11199
+ .syntax unified
11200
+ .arm
11201
+ .fpu softvfp
1105811202 .type ftl_memcpy, %function
1105911203 ftl_memcpy:
1106011204 .fnstart
....@@ -11066,59 +11210,65 @@
1106611210 .size ftl_memcpy, .-ftl_memcpy
1106711211 .align 2
1106811212 .global flash_info_data_init
11213
+ .syntax unified
11214
+ .arm
11215
+ .fpu softvfp
1106911216 .type flash_info_data_init, %function
1107011217 flash_info_data_init:
1107111218 .fnstart
1107211219 @ args = 0, pretend = 0, frame = 0
1107311220 @ frame_needed = 0, uses_anonymous_args = 0
11074
- ldr r3, .L1890
11075
- stmfd sp!, {r4, lr}
11221
+ ldr r3, .L1852
11222
+ push {r4, lr}
1107611223 .save {r4, lr}
1107711224 ldr r3, [r3]
1107811225 tst r3, #4096
11079
- beq .L1885
11080
- ldr r0, .L1890+4
11226
+ beq .L1847
11227
+ ldr r2, .L1852+4
1108111228 mov r1, #120
11082
- ldr r2, .L1890+8
11229
+ ldr r0, .L1852+8
1108311230 bl printk
11084
-.L1885:
11085
- ldr r4, .L1890+12
11086
- mov r1, #0
11231
+.L1847:
11232
+ ldr r4, .L1852+12
1108711233 mov r2, #2048
11088
- ldr r0, [r4, #1176]
11234
+ mov r1, #0
11235
+ ldr r0, [r4, #1040]
1108911236 bl ftl_memset
11090
- ldr r3, [r4, #1176]
11091
- ldr r2, .L1890+16
11092
- ldr r1, .L1890+20
11237
+ ldr r3, [r4, #1040]
11238
+ ldr r2, .L1852+16
11239
+ ldr r1, .L1852+20
1109311240 str r2, [r3]
1109411241 mov r3, #2032
11095
- ldr r0, [r4, #1176]
11242
+ ldr r0, [r4, #1040]
1109611243 mov r2, #32
11097
- add r0, r0, #80
11098
- str r3, [r0, #-72]
11244
+ str r3, [r0, #8]
1109911245 mov r3, #1
11100
- strh r3, [r0, #-64] @ movhi
11246
+ strh r3, [r0, #16] @ movhi
11247
+ add r0, r0, #80
1110111248 bl ftl_memcpy
11102
- ldr r0, [r4, #1176]
11103
- ldr r1, .L1890+24
11249
+ ldr r0, [r4, #1040]
1110411250 mov r2, #32
11251
+ ldr r1, .L1852+24
11252
+ pop {r4, lr}
1110511253 add r0, r0, #48
11106
- ldmfd sp!, {r4, lr}
1110711254 b ftl_memcpy
11108
-.L1891:
11255
+.L1853:
1110911256 .align 2
11110
-.L1890:
11257
+.L1852:
1111111258 .word .LANCHOR2
11112
- .word .LC138
11113
- .word .LANCHOR1+1904
11259
+ .word .LANCHOR1+1720
11260
+ .word .LC135
1111411261 .word .LANCHOR0
1111511262 .word 1398362953
11116
- .word .LANCHOR0+1103
11263
+ .word .LANCHOR0+1111
1111711264 .word .LANCHOR2+4
1111811265 .fnend
1111911266 .size flash_info_data_init, .-flash_info_data_init
1112011267 .align 2
1112111268 .global ftl_memcpy32
11269
+ .syntax unified
11270
+ .arm
11271
+ .fpu softvfp
1112211272 .type ftl_memcpy32, %function
1112311273 ftl_memcpy32:
1112411274 .fnstart
....@@ -11126,18 +11276,22 @@
1112611276 @ frame_needed = 0, uses_anonymous_args = 0
1112711277 @ link register save eliminated.
1112811278 mov r3, #0
11129
-.L1893:
11279
+.L1855:
1113011280 cmp r3, r2
11131
- ldrne ip, [r1, r3, asl #2]
11132
- strne ip, [r0, r3, asl #2]
11133
- addne r3, r3, #1
11134
- bne .L1893
11135
-.L1895:
11281
+ bne .L1856
1113611282 bx lr
11283
+.L1856:
11284
+ ldr ip, [r1, r3, lsl #2]
11285
+ str ip, [r0, r3, lsl #2]
11286
+ add r3, r3, #1
11287
+ b .L1855
1113711288 .fnend
1113811289 .size ftl_memcpy32, .-ftl_memcpy32
1113911290 .align 2
1114011291 .global ftl_memcmp
11292
+ .syntax unified
11293
+ .arm
11294
+ .fpu softvfp
1114111295 .type ftl_memcmp, %function
1114211296 ftl_memcmp:
1114311297 .fnstart
....@@ -11149,178 +11303,198 @@
1114911303 .size ftl_memcmp, .-ftl_memcmp
1115011304 .align 2
1115111305 .global timer_get_time
11306
+ .syntax unified
11307
+ .arm
11308
+ .fpu softvfp
1115211309 .type timer_get_time, %function
1115311310 timer_get_time:
1115411311 .fnstart
1115511312 @ args = 0, pretend = 0, frame = 0
1115611313 @ frame_needed = 0, uses_anonymous_args = 0
1115711314 @ link register save eliminated.
11158
- ldr r3, .L1898
11315
+ ldr r3, .L1859
1115911316 ldr r0, [r3]
11160
- ldr r3, .L1898+4
11161
- ldr r3, [r3, #-144]
11162
- rsb r0, r3, r0
11317
+ ldr r3, .L1859+4
11318
+ ldr r3, [r3, #-168]
11319
+ sub r0, r0, r3
1116311320 b jiffies_to_msecs
11164
-.L1899:
11321
+.L1860:
1116511322 .align 2
11166
-.L1898:
11323
+.L1859:
1116711324 .word jiffies
1116811325 .word .LANCHOR3
1116911326 .fnend
1117011327 .size timer_get_time, .-timer_get_time
1117111328 .align 2
1117211329 .global StorageSysDataLoad
11330
+ .syntax unified
11331
+ .arm
11332
+ .fpu softvfp
1117311333 .type StorageSysDataLoad, %function
1117411334 StorageSysDataLoad:
1117511335 .fnstart
1117611336 @ args = 0, pretend = 0, frame = 0
1117711337 @ frame_needed = 0, uses_anonymous_args = 0
11178
- stmfd sp!, {r3, r4, r5, lr}
11179
- .save {r3, r4, r5, lr}
11180
- mov r2, #512
11181
- mov r5, r0
11338
+ push {r4, r5, r6, lr}
11339
+ .save {r4, r5, r6, lr}
1118211340 mov r4, r1
11183
- mov r0, r1
11341
+ mov r5, r0
11342
+ mov r2, #512
1118411343 mov r1, #0
11344
+ mov r0, r4
1118511345 bl ftl_memset
1118611346 bl rknand_device_lock
11187
- ldr r3, .L1902
11347
+ ldr r3, .L1863
1118811348 mov r2, r4
1118911349 mov r1, #1
1119011350 mov r0, r5
11191
- ldr r3, [r3, #-136]
11351
+ ldr r3, [r3, #-160]
1119211352 ldr r3, [r3, #12]
1119311353 blx r3
1119411354 mov r4, r0
1119511355 bl rknand_device_unlock
1119611356 mov r0, r4
11197
- ldmfd sp!, {r3, r4, r5, pc}
11198
-.L1903:
11357
+ pop {r4, r5, r6, pc}
11358
+.L1864:
1119911359 .align 2
11200
-.L1902:
11360
+.L1863:
1120111361 .word .LANCHOR3
1120211362 .fnend
1120311363 .size StorageSysDataLoad, .-StorageSysDataLoad
1120411364 .align 2
1120511365 .global StorageSysDataStore
11366
+ .syntax unified
11367
+ .arm
11368
+ .fpu softvfp
1120611369 .type StorageSysDataStore, %function
1120711370 StorageSysDataStore:
1120811371 .fnstart
1120911372 @ args = 0, pretend = 0, frame = 0
1121011373 @ frame_needed = 0, uses_anonymous_args = 0
11211
- stmfd sp!, {r3, r4, r5, lr}
11212
- .save {r3, r4, r5, lr}
11213
- mov r4, r1
11214
- mov r5, r0
11374
+ push {r4, r5, r6, lr}
11375
+ .save {r4, r5, r6, lr}
11376
+ mov r5, r1
11377
+ mov r4, r0
1121511378 bl rknand_device_lock
11216
- ldr r3, .L1906
11217
- mov r2, r4
11379
+ ldr r3, .L1867
11380
+ mov r2, r5
1121811381 mov r1, #1
11219
- mov r0, r5
11220
- ldr r3, [r3, #-136]
11382
+ mov r0, r4
11383
+ ldr r3, [r3, #-160]
1122111384 ldr r3, [r3, #16]
1122211385 blx r3
1122311386 mov r4, r0
1122411387 bl rknand_device_unlock
1122511388 mov r0, r4
11226
- ldmfd sp!, {r3, r4, r5, pc}
11227
-.L1907:
11389
+ pop {r4, r5, r6, pc}
11390
+.L1868:
1122811391 .align 2
11229
-.L1906:
11392
+.L1867:
1123011393 .word .LANCHOR3
1123111394 .fnend
1123211395 .size StorageSysDataStore, .-StorageSysDataStore
1123311396 .align 2
1123411397 .global FlashBootVendorRead
11398
+ .syntax unified
11399
+ .arm
11400
+ .fpu softvfp
1123511401 .type FlashBootVendorRead, %function
1123611402 FlashBootVendorRead:
1123711403 .fnstart
1123811404 @ args = 0, pretend = 0, frame = 0
1123911405 @ frame_needed = 0, uses_anonymous_args = 0
11240
- stmfd sp!, {r4, r5, r6, lr}
11406
+ push {r4, r5, r6, lr}
1124111407 .save {r4, r5, r6, lr}
11242
- mov r6, r0
11408
+ mov r4, r0
1124311409 mov r5, r1
11244
- mov r4, r2
11410
+ mov r6, r2
1124511411 bl rknand_device_lock
11246
- ldr r3, .L1910
11247
- mov r2, r4
11412
+ ldr r3, .L1871
11413
+ mov r2, r6
1124811414 mov r1, r5
11249
- mov r0, r6
11250
- ldr r3, [r3, #-136]
11415
+ mov r0, r4
11416
+ ldr r3, [r3, #-160]
1125111417 ldr r3, [r3, #4]
1125211418 blx r3
1125311419 mov r4, r0
1125411420 bl rknand_device_unlock
1125511421 mov r0, r4
11256
- ldmfd sp!, {r4, r5, r6, pc}
11257
-.L1911:
11422
+ pop {r4, r5, r6, pc}
11423
+.L1872:
1125811424 .align 2
11259
-.L1910:
11425
+.L1871:
1126011426 .word .LANCHOR3
1126111427 .fnend
1126211428 .size FlashBootVendorRead, .-FlashBootVendorRead
1126311429 .align 2
1126411430 .global FlashBootVendorWrite
11431
+ .syntax unified
11432
+ .arm
11433
+ .fpu softvfp
1126511434 .type FlashBootVendorWrite, %function
1126611435 FlashBootVendorWrite:
1126711436 .fnstart
1126811437 @ args = 0, pretend = 0, frame = 0
1126911438 @ frame_needed = 0, uses_anonymous_args = 0
11270
- stmfd sp!, {r4, r5, r6, lr}
11439
+ push {r4, r5, r6, lr}
1127111440 .save {r4, r5, r6, lr}
11272
- mov r6, r0
11441
+ mov r4, r0
1127311442 mov r5, r1
11274
- mov r4, r2
11443
+ mov r6, r2
1127511444 bl rknand_device_lock
11276
- ldr r3, .L1914
11277
- mov r2, r4
11445
+ ldr r3, .L1875
11446
+ mov r2, r6
1127811447 mov r1, r5
11279
- mov r0, r6
11280
- ldr r3, [r3, #-136]
11448
+ mov r0, r4
11449
+ ldr r3, [r3, #-160]
1128111450 ldr r3, [r3, #8]
1128211451 blx r3
1128311452 mov r4, r0
1128411453 bl rknand_device_unlock
1128511454 mov r0, r4
11286
- ldmfd sp!, {r4, r5, r6, pc}
11287
-.L1915:
11455
+ pop {r4, r5, r6, pc}
11456
+.L1876:
1128811457 .align 2
11289
-.L1914:
11458
+.L1875:
1129011459 .word .LANCHOR3
1129111460 .fnend
1129211461 .size FlashBootVendorWrite, .-FlashBootVendorWrite
1129311462 .align 2
1129411463 .global flash_sram_load_store
11464
+ .syntax unified
11465
+ .arm
11466
+ .fpu softvfp
1129511467 .type flash_sram_load_store, %function
1129611468 flash_sram_load_store:
1129711469 .fnstart
1129811470 @ args = 0, pretend = 0, frame = 0
1129911471 @ frame_needed = 0, uses_anonymous_args = 0
11300
- ldr ip, .L1920
11472
+ ldr ip, .L1882
1130111473 cmp r2, #0
1130211474 moveq r2, r3
11303
- ldr ip, [ip, #-132]
11475
+ ldr ip, [ip, #-156]
1130411476 add ip, ip, #4096
11305
- add r1, ip, r1
11306
- beq .L1919
11307
- str lr, [sp, #-4]!
11477
+ add ip, ip, r1
11478
+ moveq r1, ip
11479
+ strne lr, [sp, #-4]!
1130811480 .save {lr}
11309
- mov lr, r0
11310
- mov r0, r1
11311
- mov r1, lr
11312
- ldr lr, [sp], #4
11313
- mov r2, r3
11314
-.L1919:
11481
+ movne r1, r0
11482
+ ldrne lr, [sp], #4
11483
+ movne r2, r3
11484
+ movne r0, ip
11485
+.L1881:
1131511486 b ftl_memcpy
11316
-.L1921:
11487
+.L1883:
1131711488 .align 2
11318
-.L1920:
11489
+.L1882:
1131911490 .word .LANCHOR3
1132011491 .fnend
1132111492 .size flash_sram_load_store, .-flash_sram_load_store
1132211493 .align 2
1132311494 .global FlashCs123Init
11495
+ .syntax unified
11496
+ .arm
11497
+ .fpu softvfp
1132411498 .type FlashCs123Init, %function
1132511499 FlashCs123Init:
1132611500 .fnstart
....@@ -11331,312 +11505,699 @@
1133111505 .fnend
1133211506 .size FlashCs123Init, .-FlashCs123Init
1133311507 .align 2
11508
+ .global ftl_dma32_malloc
11509
+ .syntax unified
11510
+ .arm
11511
+ .fpu softvfp
11512
+ .type ftl_dma32_malloc, %function
11513
+ftl_dma32_malloc:
11514
+ .fnstart
11515
+ @ args = 0, pretend = 0, frame = 0
11516
+ @ frame_needed = 0, uses_anonymous_args = 0
11517
+ cmp r0, #8192
11518
+ ble .L1886
11519
+ b ftl_malloc
11520
+.L1886:
11521
+ push {r4, r5, r6, lr}
11522
+ .save {r4, r5, r6, lr}
11523
+ add r4, r0, #63
11524
+ ldr r5, .L1890
11525
+ bic r4, r4, #63
11526
+ ldr r3, [r5, #-152]
11527
+ cmp r4, r3
11528
+ ble .L1887
11529
+ mov r0, #16384
11530
+ bl ftl_malloc
11531
+ mov r3, #16384
11532
+ str r0, [r5, #-148]
11533
+ str r3, [r5, #-152]
11534
+.L1887:
11535
+ ldr r3, [r5, #-152]
11536
+ ldr r0, [r5, #-148]
11537
+ sub r3, r3, r4
11538
+ add r4, r0, r4
11539
+ str r3, [r5, #-152]
11540
+ str r4, [r5, #-148]
11541
+ pop {r4, r5, r6, pc}
11542
+.L1891:
11543
+ .align 2
11544
+.L1890:
11545
+ .word .LANCHOR3
11546
+ .fnend
11547
+ .size ftl_dma32_malloc, .-ftl_dma32_malloc
11548
+ .align 2
11549
+ .global nandc_init
11550
+ .syntax unified
11551
+ .arm
11552
+ .fpu softvfp
11553
+ .type nandc_init, %function
11554
+nandc_init:
11555
+ .fnstart
11556
+ @ args = 0, pretend = 0, frame = 8
11557
+ @ frame_needed = 0, uses_anonymous_args = 0
11558
+ push {r0, r1, r2, r3, r4, r5, r6, lr}
11559
+ .save {r4, r5, r6, lr}
11560
+ .pad #16
11561
+ mov r3, #0
11562
+ ldr r5, .L1912
11563
+ mov r6, r0
11564
+ str r3, [sp, #12]
11565
+ ldr r3, [r5]
11566
+ tst r3, #4096
11567
+ beq .L1893
11568
+ mov r2, r0
11569
+ ldr r1, .L1912+4
11570
+ ldr r0, .L1912+8
11571
+ bl printk
11572
+.L1893:
11573
+ ldr r4, .L1912+12
11574
+ mov r3, #6
11575
+ ldr r2, [r6, #352]
11576
+ strb r3, [r4, #1028]
11577
+ ldr r3, .L1912+16
11578
+ str r6, [r4, #1044]
11579
+ cmp r2, r3
11580
+ ldr r2, [r6, #128]
11581
+ moveq r3, #8
11582
+ strbeq r3, [r4, #1028]
11583
+ ldr r3, .L1912+20
11584
+ cmp r2, r3
11585
+ ldr r2, .L1912+24
11586
+ moveq r3, #9
11587
+ strbeq r3, [r4, #1028]
11588
+ ldrb r3, [r4, #1028] @ zero_extendqisi2
11589
+ cmp r3, #9
11590
+ bne .L1896
11591
+ mov r3, #1
11592
+ mov r1, #2
11593
+ strb r3, [r4, #1195]
11594
+ ldr r3, [sp, #12]
11595
+ orr r3, r3, #256
11596
+ str r3, [sp, #12]
11597
+ ldr r3, [sp, #12]
11598
+ bfi r3, r1, #18, #3
11599
+ str r3, [sp, #12]
11600
+ ldr r3, [sp, #12]
11601
+ str r3, [r6]
11602
+ mov r3, #0
11603
+ ldr r0, [r4, #1044]
11604
+ str r3, [r0, #520]
11605
+ movw r3, #4161
11606
+ str r3, [r0, #4]
11607
+ movw r3, #8321
11608
+ str r3, [r0, #8]
11609
+ mov r3, #38
11610
+ str r2, [r0, #80]
11611
+ str r3, [r0, #84]
11612
+ mov r3, #39
11613
+ str r3, [r0, #84]
11614
+ ldr r3, [r5]
11615
+ tst r3, #4096
11616
+ beq .L1898
11617
+ ldr r1, [r0]
11618
+ ldr r2, [r0, #8]
11619
+ ldr r3, [r0, #80]
11620
+ ldr ip, [r0, #84]
11621
+ ldr r0, [r0, #88]
11622
+.L1911:
11623
+ str r0, [sp, #4]
11624
+ str ip, [sp]
11625
+ ldr r0, .L1912+28
11626
+ bl printk
11627
+.L1898:
11628
+ mov r3, #1
11629
+ movw r2, #1228
11630
+ strb r3, [r4, #1196]
11631
+ mov r3, #0
11632
+ strh r3, [r4, r2] @ movhi
11633
+ strb r3, [r4, #1193]
11634
+ ldr r3, [r5]
11635
+ tst r3, #4096
11636
+ beq .L1892
11637
+ ldrb r1, [r4, #1028] @ zero_extendqisi2
11638
+ ldr r0, .L1912+32
11639
+ bl printk
11640
+.L1892:
11641
+ add sp, sp, #16
11642
+ @ sp needed
11643
+ pop {r4, r5, r6, pc}
11644
+.L1896:
11645
+ ldr r3, [sp, #12]
11646
+ mov r0, #1
11647
+ mov r1, #0
11648
+ strb r1, [r4, #1195]
11649
+ orr r3, r3, #256
11650
+ str r3, [sp, #12]
11651
+ ldr r3, [sp, #12]
11652
+ bfi r3, r0, #24, #3
11653
+ mov r0, #2048
11654
+ str r3, [sp, #12]
11655
+ ldr r3, [sp, #12]
11656
+ str r3, [r6]
11657
+ ldr r3, [r4, #1044]
11658
+ str r1, [r3, #336]
11659
+ movw r1, #4193
11660
+ str r1, [r3, #4]
11661
+ movw r1, #8321
11662
+ str r1, [r3, #344]
11663
+ str r2, [r3, #304]
11664
+ mov r2, #38
11665
+ str r2, [r3, #308]
11666
+ mov r2, #39
11667
+ str r2, [r3, #308]
11668
+ bl ftl_dma32_malloc
11669
+ ldr r3, [r5]
11670
+ str r0, [r4, #1200]
11671
+ tst r3, #4096
11672
+ beq .L1898
11673
+ ldr r0, [r4, #1044]
11674
+ ldr r1, [r0]
11675
+ ldr r2, [r0, #344]
11676
+ ldr r3, [r0, #304]
11677
+ ldr ip, [r0, #308]
11678
+ ldr r0, [r0, #312]
11679
+ b .L1911
11680
+.L1913:
11681
+ .align 2
11682
+.L1912:
11683
+ .word .LANCHOR2
11684
+ .word .LANCHOR1+1741
11685
+ .word .LC136
11686
+ .word .LANCHOR0
11687
+ .word 1446522928
11688
+ .word 1446588464
11689
+ .word 1052675
11690
+ .word .LC137
11691
+ .word .LC138
11692
+ .fnend
11693
+ .size nandc_init, .-nandc_init
11694
+ .align 2
11695
+ .global zbuf_init
11696
+ .syntax unified
11697
+ .arm
11698
+ .fpu softvfp
11699
+ .type zbuf_init, %function
11700
+zbuf_init:
11701
+ .fnstart
11702
+ @ args = 0, pretend = 0, frame = 0
11703
+ @ frame_needed = 0, uses_anonymous_args = 0
11704
+ push {r4, r5, r6, r7, r8, lr}
11705
+ .save {r4, r5, r6, r7, r8, lr}
11706
+ mov r5, #0
11707
+ ldr r4, .L1918
11708
+ mov r6, r5
11709
+ ldr r7, .L1918+4
11710
+.L1915:
11711
+ ldrb r0, [r7, #-2546] @ zero_extendqisi2
11712
+ uxtb r3, r5
11713
+ strb r6, [r4, #2]
11714
+ add r5, r5, #1
11715
+ add r2, r3, #1
11716
+ strb r3, [r4, #1]
11717
+ strb r2, [r4]
11718
+ add r4, r4, #48
11719
+ lsl r0, r0, #9
11720
+ str r6, [r4, #-40]
11721
+ bl ftl_dma32_malloc
11722
+ str r0, [r4, #-44]
11723
+ mov r0, #64
11724
+ bl ftl_dma32_malloc
11725
+ cmp r5, #32
11726
+ str r0, [r4, #-36]
11727
+ bne .L1915
11728
+ ldr r3, .L1918+8
11729
+ mvn r2, #0
11730
+ strb r2, [r3, #2720]
11731
+ strb r6, [r3, #2768]
11732
+ strb r5, [r3, #2769]
11733
+ pop {r4, r5, r6, r7, r8, pc}
11734
+.L1919:
11735
+ .align 2
11736
+.L1918:
11737
+ .word .LANCHOR0+1232
11738
+ .word .LANCHOR3
11739
+ .word .LANCHOR0
11740
+ .fnend
11741
+ .size zbuf_init, .-zbuf_init
11742
+ .align 2
11743
+ .global gc_init
11744
+ .syntax unified
11745
+ .arm
11746
+ .fpu softvfp
11747
+ .type gc_init, %function
11748
+gc_init:
11749
+ .fnstart
11750
+ @ args = 0, pretend = 0, frame = 0
11751
+ @ frame_needed = 0, uses_anonymous_args = 0
11752
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
11753
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
11754
+ movw r9, #2824
11755
+ ldr r6, .L1922
11756
+ mov r5, #0
11757
+ movw r2, #2204
11758
+ mov r1, r5
11759
+ ldr r4, .L1922+4
11760
+ add r7, r6, r9
11761
+ mov r0, r7
11762
+ sub r8, r4, #3088
11763
+ strb r5, [r4, #-3119]
11764
+ strb r5, [r4, #-144]
11765
+ str r5, [r4, #-140]
11766
+ strh r5, [r8, #-6] @ movhi
11767
+ bl ftl_memset
11768
+ mvn r3, #0
11769
+ ldrb r0, [r4, #-3127] @ zero_extendqisi2
11770
+ strh r3, [r6, r9] @ movhi
11771
+ movw ip, #2806
11772
+ ldrh r3, [r8, #-8]
11773
+ str r5, [r6, #2832]
11774
+ lsr r2, r3, #1
11775
+ lsr r1, r3, #2
11776
+ strh r2, [r7, #34] @ movhi
11777
+ smulbb r2, r0, r3
11778
+ strh r1, [r7, #32] @ movhi
11779
+ sub r7, r4, #3104
11780
+ strh r5, [r7, #-8] @ movhi
11781
+ uxth r2, r2
11782
+ strh r5, [r7, #-6] @ movhi
11783
+ strh r5, [r7, #-4] @ movhi
11784
+ sub lr, r2, #32
11785
+ strh lr, [r6, ip] @ movhi
11786
+ movw ip, #2808
11787
+ strh r2, [r6, ip] @ movhi
11788
+ add r2, r6, #2816
11789
+ strh r3, [r2] @ movhi
11790
+ mov r3, #4
11791
+ strh r3, [r4, #-136] @ movhi
11792
+ movw r3, #2818
11793
+ strh r1, [r6, r3] @ movhi
11794
+ ldrh r3, [r7, #-14]
11795
+ mul r0, r0, r3
11796
+ lsl r0, r0, #2
11797
+ bl ftl_dma32_malloc
11798
+ ldrh r3, [r7, #-14]
11799
+ str r0, [r4, #-132]
11800
+ ldrb r0, [r4, #-3127] @ zero_extendqisi2
11801
+ mul r0, r0, r3
11802
+ lsl r0, r0, #2
11803
+ bl ftl_dma32_malloc
11804
+ ldrh r3, [r7, #-14]
11805
+ str r0, [r4, #-128]
11806
+ ldrb r0, [r4, #-3127] @ zero_extendqisi2
11807
+ mul r0, r0, r3
11808
+ bl ftl_dma32_malloc
11809
+ ldrh r3, [r7, #-14]
11810
+ str r0, [r4, #-3124]
11811
+ ldrb r0, [r4, #-3127] @ zero_extendqisi2
11812
+ mul r0, r0, r3
11813
+ lsl r0, r0, #2
11814
+ bl ftl_dma32_malloc
11815
+ ldrh r3, [r7, #-14]
11816
+ str r0, [r4, #-3132]
11817
+ ldrb r0, [r4, #-3127] @ zero_extendqisi2
11818
+ mul r0, r0, r3
11819
+ lsl r0, r0, #2
11820
+ bl ftl_dma32_malloc
11821
+ ldrh r3, [r8, #-4]
11822
+ movw r2, #2804
11823
+ str r0, [r4, #-124]
11824
+ lsr r3, r3, #2
11825
+ strh r3, [r6, r2] @ movhi
11826
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
11827
+.L1923:
11828
+ .align 2
11829
+.L1922:
11830
+ .word .LANCHOR0
11831
+ .word .LANCHOR3
11832
+ .fnend
11833
+ .size gc_init, .-gc_init
11834
+ .align 2
1133411835 .global rk_ftl_de_init
11836
+ .syntax unified
11837
+ .arm
11838
+ .fpu softvfp
1133511839 .type rk_ftl_de_init, %function
1133611840 rk_ftl_de_init:
1133711841 .fnstart
1133811842 @ args = 0, pretend = 0, frame = 0
1133911843 @ frame_needed = 0, uses_anonymous_args = 0
11340
- stmfd sp!, {r4, lr}
11844
+ push {r4, lr}
1134111845 .save {r4, lr}
1134211846 mov r1, #0
11343
- ldr r0, .L1925
11847
+ ldr r0, .L1926
1134411848 bl printk
11345
- ldr r3, .L1925+4
11346
- ldr r3, [r3, #-136]
11849
+ ldr r3, .L1926+4
11850
+ pop {r4, lr}
11851
+ ldr r3, [r3, #-160]
1134711852 ldr r3, [r3, #40]
11348
- ldmfd sp!, {r4, lr}
1134911853 bx r3 @ indirect register sibling call
11350
-.L1926:
11854
+.L1927:
1135111855 .align 2
11352
-.L1925:
11856
+.L1926:
1135311857 .word .LC139
1135411858 .word .LANCHOR3
1135511859 .fnend
1135611860 .size rk_ftl_de_init, .-rk_ftl_de_init
1135711861 .align 2
1135811862 .global rk_ftl_cache_write_back
11863
+ .syntax unified
11864
+ .arm
11865
+ .fpu softvfp
1135911866 .type rk_ftl_cache_write_back, %function
1136011867 rk_ftl_cache_write_back:
1136111868 .fnstart
1136211869 @ args = 0, pretend = 0, frame = 0
1136311870 @ frame_needed = 0, uses_anonymous_args = 0
1136411871 @ link register save eliminated.
11365
- ldr r3, .L1928
11872
+ ldr r3, .L1929
1136611873 mov r0, #0
11367
- ldr r3, [r3, #-136]
11874
+ ldr r3, [r3, #-160]
1136811875 ldr r3, [r3, #32]
1136911876 bx r3 @ indirect register sibling call
11370
-.L1929:
11877
+.L1930:
1137111878 .align 2
11372
-.L1928:
11879
+.L1929:
1137311880 .word .LANCHOR3
1137411881 .fnend
1137511882 .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back
1137611883 .align 2
1137711884 .global rk_nand_suspend
11885
+ .syntax unified
11886
+ .arm
11887
+ .fpu softvfp
1137811888 .type rk_nand_suspend, %function
1137911889 rk_nand_suspend:
1138011890 .fnstart
1138111891 @ args = 0, pretend = 0, frame = 0
1138211892 @ frame_needed = 0, uses_anonymous_args = 0
1138311893 @ link register save eliminated.
11384
- ldr r3, .L1931
11385
- ldr r3, [r3, #-136]
11894
+ ldr r3, .L1932
11895
+ ldr r3, [r3, #-160]
1138611896 ldr r3, [r3, #44]
1138711897 bx r3 @ indirect register sibling call
11388
-.L1932:
11898
+.L1933:
1138911899 .align 2
11390
-.L1931:
11900
+.L1932:
1139111901 .word .LANCHOR3
1139211902 .fnend
1139311903 .size rk_nand_suspend, .-rk_nand_suspend
1139411904 .align 2
1139511905 .global rk_nand_resume
11906
+ .syntax unified
11907
+ .arm
11908
+ .fpu softvfp
1139611909 .type rk_nand_resume, %function
1139711910 rk_nand_resume:
1139811911 .fnstart
1139911912 @ args = 0, pretend = 0, frame = 0
1140011913 @ frame_needed = 0, uses_anonymous_args = 0
1140111914 @ link register save eliminated.
11402
- ldr r3, .L1934
11403
- ldr r3, [r3, #-136]
11915
+ ldr r3, .L1935
11916
+ ldr r3, [r3, #-160]
1140411917 ldr r3, [r3, #48]
1140511918 bx r3 @ indirect register sibling call
11406
-.L1935:
11919
+.L1936:
1140711920 .align 2
11408
-.L1934:
11921
+.L1935:
1140911922 .word .LANCHOR3
1141011923 .fnend
1141111924 .size rk_nand_resume, .-rk_nand_resume
1141211925 .align 2
1141311926 .global rk_ftl_get_capacity
11927
+ .syntax unified
11928
+ .arm
11929
+ .fpu softvfp
1141411930 .type rk_ftl_get_capacity, %function
1141511931 rk_ftl_get_capacity:
1141611932 .fnstart
1141711933 @ args = 0, pretend = 0, frame = 0
1141811934 @ frame_needed = 0, uses_anonymous_args = 0
1141911935 @ link register save eliminated.
11420
- ldr r3, .L1937
11936
+ ldr r3, .L1938
1142111937 mov r0, #0
11422
- ldr r3, [r3, #-136]
11938
+ ldr r3, [r3, #-160]
1142311939 ldr r3, [r3, #36]
1142411940 bx r3
11425
-.L1938:
11941
+.L1939:
1142611942 .align 2
11427
-.L1937:
11943
+.L1938:
1142811944 .word .LANCHOR3
1142911945 .fnend
1143011946 .size rk_ftl_get_capacity, .-rk_ftl_get_capacity
1143111947 .align 2
1143211948 .global rk_nandc_get_irq_status
11949
+ .syntax unified
11950
+ .arm
11951
+ .fpu softvfp
1143311952 .type rk_nandc_get_irq_status, %function
1143411953 rk_nandc_get_irq_status:
1143511954 .fnstart
1143611955 @ args = 0, pretend = 0, frame = 0
1143711956 @ frame_needed = 0, uses_anonymous_args = 0
1143811957 @ link register save eliminated.
11439
- ldr r3, .L1940
11440
- ldr r3, [r3, #-136]
11958
+ ldr r3, .L1941
11959
+ ldr r3, [r3, #-160]
1144111960 ldr r3, [r3, #60]
1144211961 bx r3
11443
-.L1941:
11962
+.L1942:
1144411963 .align 2
11445
-.L1940:
11964
+.L1941:
1144611965 .word .LANCHOR3
1144711966 .fnend
1144811967 .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
1144911968 .align 2
1145011969 .global rknand_proc_ftlread
11970
+ .syntax unified
11971
+ .arm
11972
+ .fpu softvfp
1145111973 .type rknand_proc_ftlread, %function
1145211974 rknand_proc_ftlread:
1145311975 .fnstart
1145411976 @ args = 0, pretend = 0, frame = 0
1145511977 @ frame_needed = 0, uses_anonymous_args = 0
1145611978 @ link register save eliminated.
11457
- ldr r3, .L1943
11458
- ldr r3, [r3, #-136]
11979
+ ldr r3, .L1944
11980
+ ldr r3, [r3, #-160]
1145911981 ldr r3, [r3, #64]
1146011982 bx r3
11461
-.L1944:
11983
+.L1945:
1146211984 .align 2
11463
-.L1943:
11985
+.L1944:
1146411986 .word .LANCHOR3
1146511987 .fnend
1146611988 .size rknand_proc_ftlread, .-rknand_proc_ftlread
1146711989 .align 2
1146811990 .global FtlRead
11991
+ .syntax unified
11992
+ .arm
11993
+ .fpu softvfp
1146911994 .type FtlRead, %function
1147011995 FtlRead:
1147111996 .fnstart
1147211997 @ args = 0, pretend = 0, frame = 0
1147311998 @ frame_needed = 0, uses_anonymous_args = 0
11474
- @ link register save eliminated.
11475
- ldr ip, .L1946
11476
- ldr ip, [ip, #-136]
11477
- ldr ip, [ip, #20]
11999
+ ldr ip, .L1948
12000
+ str lr, [sp, #-4]!
12001
+ .save {lr}
12002
+ ldr ip, [ip, #-160]
12003
+ ldr lr, [ip, #20]
12004
+ mov ip, lr
12005
+ ldr lr, [sp], #4
1147812006 bx ip
11479
-.L1947:
12007
+.L1949:
1148012008 .align 2
11481
-.L1946:
12009
+.L1948:
1148212010 .word .LANCHOR3
1148312011 .fnend
1148412012 .size FtlRead, .-FtlRead
1148512013 .align 2
1148612014 .global FtlDiscard
12015
+ .syntax unified
12016
+ .arm
12017
+ .fpu softvfp
1148712018 .type FtlDiscard, %function
1148812019 FtlDiscard:
1148912020 .fnstart
1149012021 @ args = 0, pretend = 0, frame = 0
1149112022 @ frame_needed = 0, uses_anonymous_args = 0
1149212023 @ link register save eliminated.
11493
- ldr r3, .L1949
11494
- ldr r3, [r3, #-136]
12024
+ ldr r3, .L1951
12025
+ ldr r3, [r3, #-160]
1149512026 ldr r3, [r3, #28]
1149612027 bx r3
11497
-.L1950:
12028
+.L1952:
1149812029 .align 2
11499
-.L1949:
12030
+.L1951:
1150012031 .word .LANCHOR3
1150112032 .fnend
1150212033 .size FtlDiscard, .-FtlDiscard
1150312034 .align 2
1150412035 .global rk_ftl_garbage_collect
12036
+ .syntax unified
12037
+ .arm
12038
+ .fpu softvfp
1150512039 .type rk_ftl_garbage_collect, %function
1150612040 rk_ftl_garbage_collect:
1150712041 .fnstart
1150812042 @ args = 0, pretend = 0, frame = 0
1150912043 @ frame_needed = 0, uses_anonymous_args = 0
1151012044 @ link register save eliminated.
11511
- ldr r3, .L1952
11512
- ldr r3, [r3, #-136]
12045
+ ldr r3, .L1954
12046
+ ldr r3, [r3, #-160]
1151312047 ldr r3, [r3, #52]
1151412048 bx r3
11515
-.L1953:
12049
+.L1955:
1151612050 .align 2
11517
-.L1952:
12051
+.L1954:
1151812052 .word .LANCHOR3
1151912053 .fnend
1152012054 .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
1152112055 .align 2
1152212056 .global ReadFlashInfo
12057
+ .syntax unified
12058
+ .arm
12059
+ .fpu softvfp
1152312060 .type ReadFlashInfo, %function
1152412061 ReadFlashInfo:
1152512062 .fnstart
1152612063 @ args = 0, pretend = 0, frame = 0
1152712064 @ frame_needed = 0, uses_anonymous_args = 0
1152812065 @ link register save eliminated.
11529
- ldr r3, .L1955
11530
- ldr r3, [r3, #-136]
12066
+ ldr r3, .L1957
12067
+ ldr r3, [r3, #-160]
1153112068 ldr r3, [r3, #56]
1153212069 bx r3 @ indirect register sibling call
11533
-.L1956:
12070
+.L1958:
1153412071 .align 2
11535
-.L1955:
12072
+.L1957:
1153612073 .word .LANCHOR3
1153712074 .fnend
1153812075 .size ReadFlashInfo, .-ReadFlashInfo
1153912076 .align 2
1154012077 .global rknand_print_hex
12078
+ .syntax unified
12079
+ .arm
12080
+ .fpu softvfp
1154112081 .type rknand_print_hex, %function
1154212082 rknand_print_hex:
1154312083 .fnstart
1154412084 @ args = 0, pretend = 0, frame = 0
1154512085 @ frame_needed = 0, uses_anonymous_args = 0
11546
- stmfd sp!, {r0, r1, r2, r3, r4, lr}
12086
+ mov ip, r2
12087
+ push {r0, r1, r2, r3, r4, lr}
1154712088 .save {lr}
1154812089 .pad #20
11549
- mov ip, r0
11550
- mul r3, r3, r2
11551
- str r2, [sp]
11552
- str r1, [sp, #4]
12090
+ mul r3, r3, ip
1155312091 mov r2, #0
11554
- ldr r0, .L1959
11555
- mov r1, ip
1155612092 str r2, [sp, #12]
11557
- str r3, [sp, #8]
12093
+ str ip, [sp]
12094
+ stmib sp, {r1, r3}
12095
+ mov r1, r0
1155812096 mov r3, #16
12097
+ ldr r0, .L1961
1155912098 bl print_hex_dump
1156012099 add sp, sp, #20
1156112100 @ sp needed
1156212101 ldr pc, [sp], #4
11563
-.L1960:
12102
+.L1962:
1156412103 .align 2
11565
-.L1959:
12104
+.L1961:
1156612105 .word .LC140
1156712106 .fnend
1156812107 .size rknand_print_hex, .-rknand_print_hex
1156912108 .align 2
1157012109 .global hynix_get_read_retry_default
12110
+ .syntax unified
12111
+ .arm
12112
+ .fpu softvfp
1157112113 .type hynix_get_read_retry_default, %function
1157212114 hynix_get_read_retry_default:
1157312115 .fnstart
11574
- @ args = 0, pretend = 0, frame = 32
12116
+ @ args = 0, pretend = 0, frame = 48
1157512117 @ frame_needed = 0, uses_anonymous_args = 0
11576
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
12118
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1157712119 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
11578
- cmp r0, #2
11579
- ldr r8, .L2072
11580
- .pad #36
11581
- sub sp, sp, #36
11582
- mvn r7, #81
11583
- mvn r6, #80
1158412120 mov r5, r0
11585
- ldr r4, [r8, #1176]
11586
- add r3, r4, #128
11587
- str r3, [sp]
11588
- strb r0, [r4, #112]
12121
+ ldr r6, .L2074
1158912122 mvn r3, #83
11590
- strb r7, [r4, #130]
12123
+ cmp r5, #2
12124
+ mvn r2, #81
12125
+ .pad #52
12126
+ sub sp, sp, #52
12127
+ ldr r4, [r6, #1040]
12128
+ strb r0, [r4, #112]
12129
+ mvn r0, #82
1159112130 strb r3, [r4, #128]
11592
- mvn r3, #82
11593
- strb r6, [r4, #131]
11594
- strb r3, [r4, #129]
11595
- bne .L1962
11596
- mvn r3, #88
11597
- strb r3, [r4, #128]
11598
- ldr r3, .L2072+4
11599
- mvn r1, #8
11600
- mov r6, #7
11601
- strb r1, [r3, #413]
11602
- b .L2023
11603
-.L1962:
11604
- cmp r0, #3
12131
+ mvn r3, #80
12132
+ add r1, r4, #128
12133
+ strb r0, [r4, #129]
12134
+ strb r2, [r4, #130]
12135
+ strb r3, [r4, #131]
1160512136 bne .L1964
11606
- add r1, r4, #127
12137
+ mvn r3, #88
12138
+ mov r10, #7
12139
+ strb r3, [r4, #128]
12140
+ mvn r2, #8
12141
+ ldr r3, .L2074+4
12142
+ strb r2, [r3, #407]
12143
+.L2068:
12144
+ mov fp, #4
12145
+ b .L1965
12146
+.L1964:
12147
+ cmp r5, #3
12148
+ bne .L1966
12149
+ add r2, r4, #127
1160712150 mov r3, #176
11608
-.L1965:
11609
- strb r3, [r1, #1]!
12151
+.L1967:
12152
+ strb r3, [r2, #1]!
1161012153 add r3, r3, #1
1161112154 uxtb r3, r3
1161212155 cmp r3, #184
11613
- bne .L1965
11614
- b .L2066
11615
-.L1964:
11616
- cmp r0, #4
11617
- bne .L1966
11618
- mvn r1, #51
11619
- strb r3, [r4, #133]
11620
- strb r1, [r4, #128]
11621
- mvn r1, #64
11622
- strb r7, [r4, #134]
11623
- strb r1, [r4, #129]
11624
- mvn r1, #85
11625
- strb r6, [r4, #135]
11626
- strb r1, [r4, #130]
11627
- mvn r1, #84
11628
- strb r1, [r4, #131]
11629
- mvn r1, #50
11630
- strb r1, [r4, #132]
11631
-.L2066:
11632
- mov r6, #8
11633
- mov fp, r6
11634
- b .L1963
11635
-.L1966:
11636
- cmp r0, #5
1163712156 bne .L1967
12157
+.L2069:
12158
+ mov r10, #8
12159
+ mov fp, r10
12160
+.L1965:
12161
+ sub r3, r5, #1
12162
+ cmp r3, #1
12163
+ bhi .L1973
12164
+ sub r9, fp, #1
12165
+ mov r8, #0
12166
+ uxtab r3, r1, r9
12167
+ str r3, [sp, #4]
12168
+.L1974:
12169
+ ldrb r2, [r6, #1109] @ zero_extendqisi2
12170
+ uxtb r3, r8
12171
+ cmp r2, r3
12172
+ bhi .L1979
12173
+.L1980:
12174
+ strb fp, [r4, #113]
12175
+ strb r10, [r4, #114]
12176
+ add sp, sp, #52
12177
+ @ sp needed
12178
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
12179
+.L1966:
12180
+ cmp r5, #4
12181
+ bne .L1968
12182
+ mvn ip, #51
12183
+ strb r0, [r4, #133]
12184
+ strb ip, [r4, #128]
12185
+ mvn ip, #64
12186
+ strb ip, [r4, #129]
12187
+ mvn ip, #85
12188
+ strb ip, [r4, #130]
12189
+ mvn ip, #84
12190
+ strb ip, [r4, #131]
12191
+ mvn ip, #50
12192
+ strb ip, [r4, #132]
12193
+ strb r2, [r4, #134]
12194
+ strb r3, [r4, #135]
12195
+ b .L2069
12196
+.L1968:
12197
+ cmp r5, #5
12198
+ bne .L1969
1163812199 mov r3, #56
11639
- mov r6, #8
12200
+ mov r10, #8
1164012201 strb r3, [r4, #128]
1164112202 mov r3, #57
1164212203 strb r3, [r4, #129]
....@@ -11644,12 +12205,12 @@
1164412205 strb r3, [r4, #130]
1164512206 mov r3, #59
1164612207 strb r3, [r4, #131]
11647
- b .L2023
11648
-.L1967:
11649
- cmp r0, #6
11650
- bne .L1968
12208
+ b .L2068
12209
+.L1969:
12210
+ cmp r5, #6
12211
+ bne .L1970
1165112212 mov r3, #14
11652
- mov r6, #12
12213
+ mov r10, #12
1165312214 strb r3, [r4, #128]
1165412215 mov r3, #15
1165512216 strb r3, [r4, #129]
....@@ -11657,105 +12218,87 @@
1165712218 strb r3, [r4, #130]
1165812219 mov r3, #17
1165912220 strb r3, [r4, #131]
11660
- b .L2023
11661
-.L1968:
11662
- cmp r0, #7
11663
- bne .L1969
11664
- add r1, r4, #127
11665
- mov r3, #176
12221
+ b .L2068
1166612222 .L1970:
11667
- strb r3, [r1, #1]!
12223
+ cmp r5, #7
12224
+ bne .L1971
12225
+ add r2, r4, #127
12226
+ mov r3, #176
12227
+.L1972:
12228
+ strb r3, [r2, #1]!
1166812229 add r3, r3, #1
1166912230 uxtb r3, r3
1167012231 cmp r3, #184
11671
- bne .L1970
12232
+ bne .L1972
1167212233 mvn r3, #43
11673
- mov r6, #12
12234
+ mov r10, #12
1167412235 strb r3, [r4, #136]
11675
- mov fp, #10
1167612236 mvn r3, #42
1167712237 strb r3, [r4, #137]
11678
- b .L1963
11679
-.L1969:
11680
- cmp r0, #8
11681
- mov r6, #7
11682
- bne .L2023
11683
- mov r3, #6
11684
- strb r6, [r4, #129]
11685
- strb r3, [r4, #128]
11686
- mov r6, #50
11687
- mov r3, #9
11688
- strb r0, [r4, #130]
11689
- strb r3, [r4, #131]
11690
- mov fp, #5
11691
- mov r3, #10
11692
- strb r3, [r4, #132]
11693
- b .L1963
11694
-.L2023:
11695
- mov fp, #4
11696
-.L1963:
11697
- sub r3, r5, #1
11698
- cmp r3, #1
11699
- bhi .L2062
11700
- ldr r1, .L2072+8
11701
- mov r9, #0
12238
+ mov fp, #10
12239
+ b .L1965
1170212240 .L1971:
11703
- ldrb ip, [r8, #1101] @ zero_extendqisi2
11704
- uxtb r3, r9
11705
- ldr r0, .L2072
11706
- cmp ip, r3
11707
- bls .L1978
11708
- add r3, r0, r3
12241
+ cmp r5, #8
12242
+ mov r3, #7
12243
+ movne r10, r3
12244
+ bne .L2068
12245
+ strb r3, [r4, #129]
12246
+ mov r3, #9
12247
+ mov r2, #6
12248
+ strb r3, [r4, #131]
12249
+ mov r3, #10
12250
+ strb r2, [r4, #128]
12251
+ strb r5, [r4, #130]
12252
+ mov r10, #50
12253
+ strb r3, [r4, #132]
12254
+ mov fp, #5
12255
+ b .L1965
12256
+.L1979:
12257
+ add r3, r6, r3
1170912258 mov r5, #160
11710
- ldr r0, [r0, #1040]
11711
- sub r10, fp, #1
11712
- ldrb r7, [r3, #1180] @ zero_extendqisi2
11713
- add r2, r4, #127
11714
- ldr ip, [sp]
11715
- mla r5, r5, r7, r4
11716
- add r7, r0, r7, asl #8
11717
- uxtab r10, ip, r10
11718
- mov ip, #55
12259
+ ldrb r3, [r3, #1144] @ zero_extendqisi2
12260
+ add r1, r4, #127
12261
+ ldr r7, [r6, #1044]
12262
+ mla r5, r5, r3, r4
12263
+ add r7, r7, r3, lsl #8
12264
+ mov r3, #55
1171912265 add r5, r5, #144
11720
- sub r3, r5, #1
11721
-.L1973:
11722
- str ip, [r7, #2056]
11723
- ldrb r0, [r2, #1]! @ zero_extendqisi2
11724
- str r1, [sp, #16]
11725
- str r3, [sp, #12]
11726
- str r0, [r7, #2052]
11727
- mov r0, #200
11728
- str ip, [sp, #8]
11729
- str r2, [sp, #4]
11730
- str r2, [sp, #20]
11731
- bl timer_delay_ns
11732
- ldr r0, [r7, #2048]
11733
- ldr r2, [sp, #4]
11734
- ldr r3, [sp, #12]
11735
- cmp r2, r10
11736
- ldr ip, [sp, #8]
11737
- ldr r1, [sp, #16]
11738
- strb r0, [r3, #1]!
11739
- bne .L1973
11740
- mov ip, r5
11741
- mov r0, #0
11742
-.L1974:
11743
- add r7, r1, r0
11744
- mov r3, #1
12266
+ sub r9, r5, #1
1174512267 .L1975:
11746
- ldrb lr, [r7, r3, asl #2] @ zero_extendqisi2
11747
- ldrb r10, [ip] @ zero_extendqisi2
11748
- add lr, lr, r10
11749
- strb lr, [ip, r3, asl #3]
12268
+ str r3, [r7, #2056]
12269
+ mov r0, #200
12270
+ ldrb r2, [r1, #1]! @ zero_extendqisi2
12271
+ str r3, [sp, #12]
12272
+ str r2, [r7, #2052]
12273
+ str r1, [sp, #8]
12274
+ bl ndelay
12275
+ ldr r3, [sp, #4]
12276
+ ldr r1, [sp, #8]
12277
+ ldr r2, [r7, #2048]
12278
+ cmp r3, r1
12279
+ ldr r3, [sp, #12]
12280
+ strb r2, [r9, #1]!
12281
+ bne .L1975
12282
+ ldr lr, .L2074+8
12283
+ mov r1, r5
12284
+ mov r2, #0
12285
+.L1976:
12286
+ mov r3, #1
12287
+ add ip, lr, r2
12288
+.L1977:
12289
+ ldrb r0, [ip, r3, lsl #2] @ zero_extendqisi2
12290
+ ldrb r7, [r1] @ zero_extendqisi2
12291
+ add r0, r0, r7
12292
+ strb r0, [r1, r3, lsl #3]
1175012293 add r3, r3, #1
1175112294 cmp r3, #7
11752
- bne .L1975
11753
- add r0, r0, #1
11754
- add ip, ip, #1
11755
- cmp r0, #4
11756
- bne .L1974
12295
+ bne .L1977
12296
+ add r2, r2, #1
12297
+ add r1, r1, #1
12298
+ cmp r2, #4
12299
+ bne .L1976
1175712300 mov r3, #0
11758
- add r9, r9, #1
12301
+ add r8, r8, #1
1175912302 strb r3, [r5, #16]
1176012303 strb r3, [r5, #24]
1176112304 strb r3, [r5, #32]
....@@ -11763,384 +12306,383 @@
1176312306 strb r3, [r5, #48]
1176412307 strb r3, [r5, #41]
1176512308 strb r3, [r5, #49]
11766
- b .L1971
11767
-.L2062:
12309
+ b .L1974
12310
+.L1973:
1176812311 sub r3, r5, #3
1176912312 cmp r3, #5
11770
- bhi .L1978
11771
- smulbb r2, fp, r6
11772
- mov r3, r2, asl #4
11773
- mov r2, r2, asr #1
11774
- str r3, [sp, #28]
11775
- mov r3, r2, asl #1
11776
- str r3, [sp, #8]
12313
+ bhi .L1980
12314
+ smulbb r3, fp, r10
12315
+ asr r2, r3, #1
12316
+ lsl r3, r3, #4
12317
+ str r3, [sp, #44]
12318
+ lsl r3, r2, #2
12319
+ str r2, [sp, #4]
12320
+ str r3, [sp, #36]
12321
+ lsl r3, r2, #1
12322
+ str r3, [sp, #20]
1177712323 mov r3, #0
11778
-.L2070:
11779
- str r3, [sp, #12]
11780
- ldr r3, .L2072
11781
- ldrb r2, [r3, #1101] @ zero_extendqisi2
11782
- ldrb r3, [sp, #12] @ zero_extendqisi2
12324
+.L2073:
12325
+ str r3, [sp, #16]
12326
+ ldr r3, .L2074
12327
+ ldrb r2, [r3, #1109] @ zero_extendqisi2
12328
+ ldrb r3, [sp, #16] @ zero_extendqisi2
1178312329 cmp r2, r3
11784
- bhi .L2022
11785
-.L1978:
11786
- strb fp, [r4, #113]
11787
- strb r6, [r4, #114]
11788
- add sp, sp, #36
11789
- @ sp needed
11790
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
11791
-.L2022:
11792
- ldr r2, .L2072
11793
- mov r10, #160
11794
- mov r9, #255
12330
+ bls .L1980
12331
+ ldr r2, .L2074
12332
+ mov r7, #255
1179512333 add r3, r2, r3
11796
- ldrb r3, [r3, #1180] @ zero_extendqisi2
11797
- mov r0, r3
11798
- str r3, [sp]
12334
+ ldrb r8, [r3, #1144] @ zero_extendqisi2
12335
+ mov r0, r8
1179912336 bl zftl_flash_exit_slc_mode
11800
- ldr r3, [sp]
11801
- mla r10, r10, r3, r4
11802
- add r3, r10, #144
11803
- str r3, [sp, #24]
11804
- ldr r3, .L2072
11805
- ldr r3, [r3, #1040]
11806
- str r3, [sp, #4]
11807
- ldr r3, [sp]
11808
- mov r8, r3, asl #8
11809
- ldr r3, [sp, #4]
11810
- add r7, r3, r8
11811
- str r9, [r7, #2056]
12337
+ mov r0, #160
12338
+ mla r0, r0, r8, r4
12339
+ add r3, r0, #144
12340
+ str r3, [sp, #32]
12341
+ ldr r3, .L2074
12342
+ ldr r9, [r3, #1044]
12343
+ add r6, r9, r8, lsl #8
12344
+ str r7, [r6, #2056]
1181212345 bl nandc_wait_flash_ready
1181312346 cmp r5, #8
11814
- bne .L1980
12347
+ bne .L1982
1181512348 add r3, r4, #144
1181612349 mov r2, #23
11817
- mov r1, #25
11818
- str r3, [sp, #24]
12350
+ str r3, [sp, #32]
1181912351 mov r3, #120
11820
- str r3, [r7, #2056]
12352
+ str r3, [r6, #2056]
1182112353 mov r3, #0
11822
- str r3, [r7, #2052]
11823
- str r3, [r7, #2052]
11824
- str r3, [r7, #2052]
11825
- str r2, [r7, #2056]
12354
+ str r3, [r6, #2052]
12355
+ mov r1, #25
12356
+ str r3, [r6, #2052]
12357
+ str r3, [r6, #2052]
12358
+ str r2, [r6, #2056]
1182612359 mov r2, #4
11827
- str r2, [r7, #2056]
11828
- str r1, [r7, #2056]
12360
+ str r2, [r6, #2056]
12361
+ str r1, [r6, #2056]
1182912362 mov r1, #218
11830
- str r1, [r7, #2056]
12363
+ str r1, [r6, #2056]
1183112364 mov r1, #21
11832
- str r3, [r7, #2056]
11833
- str r3, [r7, #2052]
11834
- str r3, [r7, #2052]
11835
- str r1, [r7, #2052]
11836
- str r2, [r7, #2052]
11837
- str r3, [r7, #2052]
11838
- b .L1981
11839
-.L1980:
11840
- cmp r5, #4
11841
- mov r3, #54
11842
- str r3, [r7, #2056]
11843
- moveq r3, #64
11844
- streq r9, [r7, #2052]
11845
- streq r3, [r7, #2048]
11846
- moveq r3, #204
11847
- beq .L2067
11848
-.L1982:
11849
- sub r3, r5, #5
11850
- cmp r3, #1
11851
- ldrlsb r3, [r4, #128] @ zero_extendqisi2
11852
- strls r3, [r7, #2052]
11853
- movls r3, #82
11854
- bls .L2068
11855
- cmp r5, #7
11856
- bne .L1983
11857
- mov r3, #174
11858
- str r3, [r7, #2052]
11859
- mov r3, #0
11860
- str r3, [r7, #2048]
11861
- mov r3, #176
11862
-.L2067:
11863
- str r3, [r7, #2052]
11864
- mov r3, #77
11865
-.L2068:
11866
- str r3, [r7, #2048]
12365
+ str r3, [r6, #2056]
12366
+ str r3, [r6, #2052]
12367
+ str r3, [r6, #2052]
12368
+ str r1, [r6, #2052]
12369
+ str r2, [r6, #2052]
12370
+ str r3, [r6, #2052]
1186712371 .L1983:
11868
- ldr r3, [sp, #4]
11869
- cmp r5, #6
11870
- add r8, r3, r8
11871
- mov r3, #22
11872
- str r3, [r8, #2056]
11873
- mov r3, #23
11874
- str r3, [r8, #2056]
11875
- mov r3, #4
11876
- str r3, [r8, #2056]
11877
- mov r3, #25
11878
- str r3, [r8, #2056]
11879
- mov r3, #0
11880
- str r3, [r8, #2056]
11881
- str r3, [r8, #2052]
11882
- str r3, [r8, #2052]
11883
- moveq r3, #31
11884
- str r3, [r8, #2052]
11885
- mov r3, #2
11886
- str r3, [r8, #2052]
11887
- mov r3, #0
11888
- str r3, [r8, #2052]
11889
-.L1981:
11890
- ldmia sp, {r2, r3}
11891
- sub r10, r5, #8
11892
- sub r8, r5, #5
11893
- clz r10, r10
11894
- add r3, r3, r2, asl #8
12372
+ add r3, r9, r8, lsl #8
1189512373 mov r2, #48
11896
- mov r10, r10, lsr #5
1189712374 str r2, [r3, #2056]
1189812375 bl nandc_wait_flash_ready
11899
- cmp r8, #1
11900
- movhi r3, #0
11901
- movls r3, #1
11902
- str r3, [sp, #16]
11903
- orrs r3, r3, r10
11904
- movne ip, #16
11905
- bne .L1987
12376
+ sub r3, r5, #5
12377
+ cmp r5, #8
12378
+ cmpne r3, #1
12379
+ str r3, [sp, #40]
12380
+ movls r2, #16
12381
+ bls .L1989
1190612382 cmp r5, #7
11907
- movne ip, #2
11908
- moveq ip, #32
11909
-.L1987:
11910
- ldr r3, .L2072+12
11911
- ldmia sp, {r1, r2}
11912
- ldr r3, [r3, #-128]
11913
- add r1, r2, r1, asl #8
11914
- mov r0, r3
11915
-.L1988:
11916
- ldr r2, [r1, #2048]
11917
- strb r2, [r0], #1
11918
- rsb r2, r3, r0
11919
- uxtb r2, r2
11920
- cmp r2, ip
11921
- bcc .L1988
11922
- cmp r10, #0
11923
- beq .L1989
11924
- mov r2, #0
11925
-.L1991:
11926
- ldrb ip, [r3, r2, asl #2] @ zero_extendqisi2
11927
- uxtb r0, r2
11928
- cmp ip, #50
11929
- beq .L1990
11930
- add ip, r3, r2, asl #2
11931
- ldrb ip, [ip, #1] @ zero_extendqisi2
11932
- cmp ip, #5
11933
- beq .L1990
11934
- add r2, r2, #1
11935
- cmp r2, #8
11936
- bne .L1991
11937
- b .L1992
11938
-.L1990:
11939
- cmp r0, #7
11940
- bne .L1993
11941
-.L1992:
11942
- ldr r0, .L2072+16
11943
- mov r1, #0
11944
- bl printk
11945
-.L1994:
11946
- b .L1994
12383
+ movne r2, #2
12384
+ moveq r2, #32
1194712385 .L1989:
11948
- cmp r5, #7
11949
- bne .L1995
11950
- mov r2, r10
11951
-.L1997:
11952
- ldrb ip, [r3, r2, asl #2] @ zero_extendqisi2
11953
- uxtb r0, r2
11954
- cmp ip, #12
11955
- beq .L1996
11956
- add ip, r3, r2, asl #2
11957
- ldrb ip, [ip, #1] @ zero_extendqisi2
11958
- cmp ip, #10
11959
- beq .L1996
12386
+ ldr r3, .L2074+12
12387
+ sub r2, r2, #1
12388
+ add r6, r9, r8, lsl #8
12389
+ ldr r3, [r3, #-120]
12390
+ sub r1, r3, #1
12391
+ uxtab r2, r3, r2
12392
+ mov r0, r1
12393
+.L1990:
12394
+ ldr ip, [r6, #2048]
12395
+ strb ip, [r0, #1]!
12396
+ cmp r0, r2
12397
+ bne .L1990
12398
+ cmp r5, #8
12399
+ bne .L1991
12400
+ mov r2, #0
12401
+.L1993:
12402
+ ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2
12403
+ uxtb r1, r2
12404
+ cmp r0, #50
12405
+ beq .L1992
12406
+ add r0, r3, r2, lsl #2
12407
+ ldrb r0, [r0, #1] @ zero_extendqisi2
12408
+ cmp r0, #5
12409
+ beq .L1992
1196012410 add r2, r2, #1
1196112411 cmp r2, #8
11962
- bne .L1997
11963
- b .L1998
12412
+ bne .L1993
12413
+.L1994:
12414
+ mov r1, #0
12415
+ ldr r0, .L2074+16
12416
+ bl printk
1196412417 .L1996:
11965
- cmp r0, #7
11966
- bne .L1993
11967
-.L1998:
11968
- ldr r0, .L2072+16
11969
- mov r1, #0
11970
- bl printk
11971
-.L1999:
11972
- b .L1999
11973
-.L1995:
11974
- cmp r5, #6
11975
- bne .L1993
11976
- sub r2, r3, #1
11977
- add r3, r3, #7
11978
-.L2000:
11979
- ldrb r0, [r2, #1]! @ zero_extendqisi2
11980
- cmp r0, #12
11981
- beq .L1993
11982
- ldrb r0, [r2, #8] @ zero_extendqisi2
11983
- cmp r0, #4
11984
- beq .L1993
11985
- cmp r2, r3
11986
- bne .L2000
11987
- ldr r0, .L2072+16
11988
- mov r1, #0
11989
- bl printk
11990
-.L2002:
11991
- b .L2002
11992
-.L1993:
11993
- ldr r3, .L2072+12
11994
- ldr r0, [sp, #28]
11995
- ldr r2, [r3, #-128]
11996
- add r0, r2, r0
11997
- mov r3, r2
11998
-.L2003:
11999
- cmp r3, r0
12000
- ldrne ip, [r1, #2048]
12001
- strneb ip, [r3], #1
12002
- bne .L2003
12418
+ b .L1996
12419
+.L1982:
12420
+ cmp r5, #4
12421
+ mov r3, #54
12422
+ str r3, [r6, #2056]
12423
+ bne .L1984
12424
+ mov r3, #64
12425
+ str r7, [r6, #2052]
12426
+ str r3, [r6, #2048]
12427
+ mov r3, #204
12428
+.L2070:
12429
+ str r3, [r6, #2052]
12430
+ mov r3, #77
1200312431 .L2071:
12004
- ldr r3, .L2072+12
12005
- mov r0, #8
12006
- ldr r1, [sp, #8]
12007
- ldr r3, [r3, #-128]
12008
- add r1, r3, r1
12009
- str r1, [sp, #20]
12010
-.L2006:
12011
- ldr ip, [sp, #8]
12012
- add lr, r1, ip
12432
+ str r3, [r6, #2048]
12433
+.L1985:
12434
+ add r3, r9, r8, lsl #8
12435
+ mov r2, #22
12436
+ cmp r5, #6
12437
+ str r2, [r3, #2056]
12438
+ mov r2, #23
12439
+ str r2, [r3, #2056]
12440
+ mov r2, #4
12441
+ str r2, [r3, #2056]
12442
+ mov r2, #25
12443
+ str r2, [r3, #2056]
12444
+ mov r2, #0
12445
+ str r2, [r3, #2056]
12446
+ str r2, [r3, #2052]
12447
+ str r2, [r3, #2052]
12448
+ moveq r2, #31
12449
+ str r2, [r3, #2052]
12450
+ mov r2, #2
12451
+ str r2, [r3, #2052]
12452
+ mov r2, #0
12453
+ str r2, [r3, #2052]
12454
+ b .L1983
12455
+.L1984:
12456
+ sub r3, r5, #5
12457
+ cmp r3, #1
12458
+ ldrbls r3, [r4, #128] @ zero_extendqisi2
12459
+ strls r3, [r6, #2052]
12460
+ movls r3, #82
12461
+ bls .L2071
12462
+ cmp r5, #7
12463
+ bne .L1985
12464
+ mov r3, #174
12465
+ str r3, [r6, #2052]
12466
+ mov r3, #0
12467
+ str r3, [r6, #2048]
12468
+ mov r3, #176
12469
+ b .L2070
12470
+.L1992:
12471
+ cmp r1, #6
12472
+ bhi .L1994
12473
+.L1995:
12474
+ ldr r3, .L2074+12
12475
+ ldr r2, [r3, #-120]
12476
+ mov r3, r2
1201312477 .L2005:
12014
- ldrh ip, [r1]
12015
- mvn ip, ip
12016
- strh ip, [r1], #2 @ movhi
12017
- cmp r1, lr
12018
- bne .L2005
12019
- ldr ip, [sp, #8]
12020
- subs r0, r0, #1
12021
- add r1, r1, ip
12022
- bne .L2006
12478
+ ldr r0, [sp, #44]
12479
+ sub r1, r3, r2
12480
+ cmp r0, r1
12481
+ bgt .L2006
12482
+ ldr r3, .L2074+12
12483
+ ldr r1, [r3, #-120]
12484
+ ldr r3, [sp, #20]
12485
+ add r0, r1, r3
12486
+ mov r3, #8
12487
+.L2008:
12488
+ mov lr, r0
12489
+ mov ip, #0
1202312490 .L2007:
12491
+ ldrh r7, [lr]
12492
+ add ip, ip, #1
12493
+ mvn r7, r7
12494
+ strh r7, [lr], #2 @ movhi
12495
+ ldr r7, [sp, #4]
12496
+ cmp r7, ip
12497
+ bgt .L2007
12498
+ ldr ip, [sp, #36]
12499
+ subs r3, r3, #1
12500
+ add r0, r0, ip
12501
+ bne .L2008
12502
+ str r1, [sp, #8]
12503
+ str r3, [sp, #12]
12504
+.L2009:
1202412505 mov ip, #0
1202512506 mov r0, ip
12026
-.L2010:
12027
- mov r1, #1
12028
- mov lr, #0
12029
- mov r1, r1, asl r0
12030
- mov r8, #16
12031
- mov r7, lr
12032
-.L2008:
12033
- ldrh r9, [r3, lr]
12034
- and r9, r9, r1
12035
- cmp r9, r1
12507
+.L2013:
12508
+ mov lr, #1
12509
+ mov r7, #16
12510
+ lsl lr, lr, r0
12511
+ str r7, [sp, #28]
12512
+ mov r7, #0
12513
+ str lr, [sp, #24]
12514
+ ldr lr, [sp, #8]
12515
+.L2011:
12516
+ ldrh r3, [lr]
12517
+ mov r1, r3
12518
+ ldr r3, [sp, #24]
12519
+ bics r3, r3, r1
12520
+ ldr r3, [sp, #20]
1203612521 addeq r7, r7, #1
12037
- ldr r9, [sp, #8]
12038
- subs r8, r8, #1
12039
- add lr, lr, r9
12040
- bne .L2008
12522
+ add lr, lr, r3
12523
+ ldr r3, [sp, #28]
12524
+ subs r3, r3, #1
12525
+ str r3, [sp, #28]
12526
+ bne .L2011
1204112527 cmp r7, #8
1204212528 add r0, r0, #1
12043
- orrhi ip, ip, r1
12529
+ ldrhi r3, [sp, #24]
12530
+ orrhi ip, ip, r3
1204412531 uxthhi ip, ip
1204512532 cmp r0, #16
12046
- bne .L2010
12047
- ldr r1, [sp, #20]
12533
+ bne .L2013
12534
+ ldr r3, [sp, #8]
1204812535 strh ip, [r3], #2 @ movhi
12536
+ str r3, [sp, #8]
12537
+ ldr r3, [sp, #12]
12538
+ add r3, r3, #1
12539
+ str r3, [sp, #12]
12540
+ ldr r1, [sp, #12]
12541
+ ldr r3, [sp, #4]
1204912542 cmp r3, r1
12050
- bne .L2007
12051
- ldr r3, .L2072+12
12052
- ldr r1, [r3, #-128]
12543
+ bgt .L2009
12544
+ ldr r3, .L2074+12
12545
+ ldr r1, [r3, #-120]
1205312546 mov r3, #0
1205412547 sub r0, r1, #4
1205512548 add ip, r1, #28
12056
-.L2012:
12549
+.L2016:
1205712550 ldr lr, [r0, #4]!
1205812551 cmp lr, #0
1205912552 addeq r3, r3, #1
12060
- cmp r0, ip
12061
- bne .L2012
12553
+ cmp ip, r0
12554
+ bne .L2016
1206212555 cmp r3, #7
12063
- ble .L2013
12064
- ldr r0, .L2072+20
12065
- mov r2, #1
12556
+ ble .L2017
12557
+ ldr r0, .L2074+20
1206612558 mov r3, #1024
12559
+ mov r2, #1
1206712560 bl rknand_print_hex
12068
- ldr r0, .L2072+16
1206912561 mov r1, #0
12562
+ ldr r0, .L2074+16
1207012563 bl printk
12071
-.L2014:
12072
- b .L2014
12073
-.L2013:
12074
- cmp r5, #6
12075
- moveq r0, #4
12076
- beq .L2015
12564
+.L2018:
12565
+ b .L2018
12566
+.L1991:
1207712567 cmp r5, #7
12078
- moveq r0, #10
12079
- beq .L2015
12080
- cmp r10, #0
12081
- moveq r0, #8
12082
- movne r0, #5
12083
-.L2015:
12084
- sub r9, fp, #1
12085
- ldr r1, [sp, #24]
12086
- mov ip, #0
12087
- uxtb r9, r9
12088
- add r9, r9, #1
12089
-.L2016:
12090
- mov r7, r1
12091
- mov r3, r2
12568
+ bne .L1997
12569
+ mov r2, #0
12570
+.L1999:
12571
+ ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2
12572
+ uxtb r1, r2
12573
+ cmp r0, #12
12574
+ beq .L1998
12575
+ add r0, r3, r2, lsl #2
12576
+ ldrb r0, [r0, #1] @ zero_extendqisi2
12577
+ cmp r0, #10
12578
+ beq .L1998
12579
+ add r2, r2, #1
12580
+ cmp r2, #8
12581
+ bne .L1999
12582
+.L2000:
12583
+ mov r1, #0
12584
+ ldr r0, .L2074+16
12585
+ bl printk
12586
+.L2001:
12587
+ b .L2001
12588
+.L1998:
12589
+ cmp r1, #6
12590
+ bls .L1995
12591
+ b .L2000
12592
+.L1997:
12593
+ cmp r5, #6
12594
+ bne .L1995
12595
+ add r3, r3, #7
12596
+.L2002:
12597
+ ldrb r2, [r1, #1]! @ zero_extendqisi2
12598
+ cmp r2, #12
12599
+ beq .L1995
12600
+ ldrb r2, [r1, #8] @ zero_extendqisi2
12601
+ cmp r2, #4
12602
+ beq .L1995
12603
+ cmp r1, r3
12604
+ bne .L2002
12605
+ mov r1, #0
12606
+ ldr r0, .L2074+16
12607
+ bl printk
12608
+.L2004:
12609
+ b .L2004
12610
+.L2006:
12611
+ ldr r1, [r6, #2048]
12612
+ strb r1, [r3], #1
12613
+ b .L2005
1209212614 .L2017:
12093
- ldrb lr, [r3], #1 @ zero_extendqisi2
12094
- strb lr, [r7], #1
12095
- rsb lr, r2, r3
12096
- uxtb lr, lr
12097
- cmp lr, fp
12098
- bcc .L2017
12099
- add ip, ip, #1
12100
- add r2, r2, r9
12101
- cmp ip, r6
12102
- add r1, r1, r0
12103
- blt .L2016
12104
- ldmia sp, {r2, r3}
12615
+ cmp r5, #6
12616
+ moveq ip, #4
12617
+ beq .L2019
12618
+ cmp r5, #7
12619
+ moveq ip, #10
12620
+ beq .L2019
12621
+ cmp r5, #8
12622
+ movne ip, #8
12623
+ moveq ip, #5
12624
+.L2019:
12625
+ sub r3, fp, #1
12626
+ ldr r0, [sp, #32]
12627
+ uxtb r3, r3
12628
+ mov lr, #0
12629
+ add r3, r3, #1
12630
+ str r3, [sp, #8]
12631
+.L2020:
12632
+ mov r3, r0
12633
+ mov r1, r2
12634
+.L2021:
12635
+ ldrb r7, [r1], #1 @ zero_extendqisi2
12636
+ strb r7, [r3], #1
12637
+ sub r7, r1, r2
12638
+ uxtb r7, r7
12639
+ cmp fp, r7
12640
+ bhi .L2021
12641
+ ldr r3, [sp, #8]
12642
+ add lr, lr, #1
12643
+ cmp r10, lr
12644
+ add r0, r0, ip
12645
+ add r2, r2, r3
12646
+ bgt .L2020
12647
+ add r7, r9, r8, lsl #8
1210512648 mov r8, #255
12106
- add r7, r3, r2, asl #8
1210712649 str r8, [r7, #2056]
1210812650 bl nandc_wait_flash_ready
12109
- ldr r3, [sp, #16]
12110
- cmp r3, #0
12111
- beq .L2019
12651
+ ldr r3, [sp, #40]
12652
+ cmp r3, #1
12653
+ bhi .L2023
1211212654 mov r3, #54
12655
+ mov r2, #22
1211312656 str r3, [r7, #2056]
1211412657 ldrb r3, [r4, #128] @ zero_extendqisi2
12115
- mov r2, #22
12116
- str r3, [r7, #2052]
12658
+ str r3, [r6, #2052]
1211712659 mov r3, #0
12118
- str r3, [r7, #2048]
12660
+ str r3, [r6, #2048]
1211912661 str r2, [r7, #2056]
1212012662 str r3, [r7, #2056]
12121
- str r3, [r7, #2052]
12122
- str r3, [r7, #2052]
12663
+ str r3, [r6, #2052]
12664
+ str r3, [r6, #2052]
1212312665 mov r3, #48
12124
- str r8, [r7, #2052]
12125
- str r8, [r7, #2052]
12126
- str r8, [r7, #2052]
12127
- b .L2069
12128
-.L2019:
12129
- cmp r10, #0
12130
- movne r3, #190
12131
- moveq r3, #56
12132
-.L2069:
12666
+ str r8, [r6, #2052]
12667
+ str r8, [r6, #2052]
12668
+ str r8, [r6, #2052]
12669
+.L2072:
1213312670 str r3, [r7, #2056]
1213412671 bl nandc_wait_flash_ready
12135
- ldr r3, [sp, #12]
12672
+ ldr r3, [sp, #16]
1213612673 add r3, r3, #1
12137
- b .L2070
12138
-.L2073:
12674
+ b .L2073
12675
+.L2023:
12676
+ cmp r5, #8
12677
+ moveq r3, #190
12678
+ movne r3, #56
12679
+ b .L2072
12680
+.L2075:
1213912681 .align 2
12140
-.L2072:
12682
+.L2074:
1214112683 .word .LANCHOR0
1214212684 .word .LANCHOR2
12143
- .word .LANCHOR2+396
12685
+ .word .LANCHOR2+390
1214412686 .word .LANCHOR3
1214512687 .word .LC141
1214612688 .word .LC142
....@@ -12148,495 +12690,494 @@
1214812690 .size hynix_get_read_retry_default, .-hynix_get_read_retry_default
1214912691 .align 2
1215012692 .global flash_get_read_retry_tbl
12693
+ .syntax unified
12694
+ .arm
12695
+ .fpu softvfp
1215112696 .type flash_get_read_retry_tbl, %function
1215212697 flash_get_read_retry_tbl:
1215312698 .fnstart
1215412699 @ args = 0, pretend = 0, frame = 0
1215512700 @ frame_needed = 0, uses_anonymous_args = 0
1215612701 @ link register save eliminated.
12157
- ldr r3, .L2076
12702
+ ldr r3, .L2078
1215812703 ldrb r0, [r3, #23] @ zero_extendqisi2
1215912704 sub r3, r0, #1
1216012705 cmp r3, #7
1216112706 bxhi lr
1216212707 b hynix_get_read_retry_default
12163
-.L2077:
12708
+.L2079:
1216412709 .align 2
12165
-.L2076:
12710
+.L2078:
1216612711 .word .LANCHOR2
1216712712 .fnend
1216812713 .size flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
1216912714 .align 2
1217012715 .global nandc_xfer_done
12716
+ .syntax unified
12717
+ .arm
12718
+ .fpu softvfp
1217112719 .type nandc_xfer_done, %function
1217212720 nandc_xfer_done:
1217312721 .fnstart
1217412722 @ args = 0, pretend = 0, frame = 8
1217512723 @ frame_needed = 0, uses_anonymous_args = 0
12176
- ldr r3, .L2127
12177
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
12178
- .save {r4, r5, r6, r7, lr}
12179
- .pad #12
12180
- mov r5, #0
12181
- ldrb r2, [r3, #1028] @ zero_extendqisi2
12182
- mov r4, r3
12183
- ldr r7, .L2127+4
12184
- cmp r2, #9
12185
- strb r5, [r7, #-124]
12186
- bne .L2079
12187
- ldr r6, [r3, #1040]
12724
+ push {r0, r1, r4, r5, r6, r7, r8, lr}
12725
+ .save {r4, r5, r6, r7, r8, lr}
12726
+ .pad #8
12727
+ mov r1, #0
12728
+ ldr r4, .L2129
12729
+ ldr r7, .L2129+4
12730
+ ldrb r3, [r4, #1028] @ zero_extendqisi2
12731
+ ldr r6, [r4, #1044]
12732
+ strb r1, [r7, #-116]
12733
+ cmp r3, #9
12734
+ bne .L2081
1218812735 ldr r3, [r6, #16]
1218912736 str r3, [sp]
12190
- ldr r3, [r6, #48]
12191
- ubfx r3, r3, #1, #1
12192
- cmp r3, r5
12193
- moveq r5, r3
12194
- moveq r7, r4
12195
- beq .L2081
12196
-.L2080:
12737
+ ldr r5, [r6, #48]
12738
+ ubfx r5, r5, #1, #1
12739
+ cmp r5, r1
12740
+ bne .L2082
12741
+ ldr r7, .L2129+8
12742
+ ldr r8, .L2129+12
12743
+.L2083:
12744
+ ldr r3, [sp]
12745
+ tst r3, #1048576
12746
+ beq .L2093
12747
+ ldr r3, [r4, #1220]
12748
+ cmp r3, #0
12749
+ beq .L2091
12750
+ ldr r1, [sp]
12751
+ mov r2, #1
12752
+ ldr r0, [r4, #1212]
12753
+ ubfx r1, r1, #22, #6
12754
+ lsl r1, r1, #10
12755
+ bl rknand_dma_unmap_single
12756
+ ldr r1, [sp]
12757
+ mov r2, #1
12758
+ ubfx r1, r1, #22, #6
12759
+ b .L2128
12760
+.L2082:
12761
+ mov r5, r1
12762
+.L2084:
1219712763 ldr r2, [r6, #64]
1219812764 ldr r3, [sp]
1219912765 ubfx r2, r2, #16, #6
1220012766 ubfx r3, r3, #22, #6
1220112767 cmp r2, r3
12202
- bge .L2083
12203
- ldr r3, [r4, #1040]
12768
+ bge .L2086
12769
+ ldr r3, [r4, #1044]
1220412770 ldr r3, [r3]
1220512771 str r3, [sp, #4]
1220612772 ldr r3, [sp, #4]
1220712773 tst r3, #8192
12208
- beq .L2082
12774
+ beq .L2085
1220912775 ldr r3, [sp, #4]
1221012776 tst r3, #131072
12211
- beq .L2082
12777
+ beq .L2085
1221212778 ldr r1, [sp, #4]
12213
- ldr r0, .L2127+8
12779
+ ldr r0, .L2129+16
1221412780 ubfx r1, r1, #17, #1
1221512781 bl printk
12216
- b .L2083
12217
-.L2082:
12782
+.L2086:
12783
+ ldr r3, [r4, #1220]
12784
+ cmp r3, #0
12785
+ beq .L2091
12786
+ ldr r1, [sp]
12787
+ mov r2, #0
12788
+ ldr r0, [r4, #1212]
12789
+ ubfx r1, r1, #22, #6
12790
+ lsl r1, r1, #10
12791
+ bl rknand_dma_unmap_single
12792
+ ldr r1, [sp]
12793
+ mov r2, #0
12794
+ ubfx r1, r1, #22, #6
12795
+.L2128:
12796
+ lsl r1, r1, #2
12797
+.L2126:
12798
+ ldr r0, [r4, #1216]
12799
+ bl rknand_dma_unmap_single
12800
+.L2091:
12801
+ mov r3, #0
12802
+ str r3, [r4, #1220]
12803
+ add sp, sp, #8
12804
+ @ sp needed
12805
+ pop {r4, r5, r6, r7, r8, pc}
12806
+.L2085:
1221812807 ldr r3, [sp]
1221912808 add r5, r5, #1
1222012809 ubfx r3, r3, #22, #6
12221
- cmp r5, r3, asl #12
12222
- bne .L2084
12810
+ cmp r5, r3, lsl #12
12811
+ bne .L2087
1222312812 ldr r2, [r6, #64]
1222412813 mov r1, r5
1222512814 ldr r3, [sp]
12226
- ldr r0, .L2127+12
12815
+ ldr r0, .L2129+20
1222712816 ubfx r2, r2, #16, #5
1222812817 ubfx r3, r3, #22, #6
1222912818 bl printk
1223012819 ldr r3, [sp, #4]
1223112820 tst r3, #8192
1223212821 mov r3, #1
12233
- strb r3, [r7, #-124]
12234
- bne .L2083
12235
- ldr r3, .L2127+16
12236
- ldr r0, .L2127+20
12822
+ strb r3, [r7, #-116]
12823
+ bne .L2086
12824
+ ldr r3, .L2129+24
12825
+ ldr r0, .L2129+28
1223712826 ldr r3, [r3, #4]
1223812827 blx r3
12239
- b .L2083
12240
-.L2084:
12241
- mov r0, #5
12828
+ b .L2086
12829
+.L2087:
1224212830 mov r1, #10
12831
+ mov r0, #5
1224312832 bl usleep_range
12244
- b .L2080
12245
-.L2083:
12246
- ldr r3, [r4, #1160]
12247
- ldr r5, .L2127
12248
- cmp r3, #0
12249
- beq .L2088
12250
- ldr r1, [sp]
12251
- mov r2, #0
12252
- ldr r0, [r5, #1152]
12253
- ubfx r1, r1, #22, #6
12254
- mov r1, r1, asl #10
12255
- bl rknand_dma_unmap_single
12256
- ldr r0, [r5, #1156]
12257
- ldr r1, [sp]
12258
- ubfx r1, r1, #22, #6
12259
- mov r1, r1, asl #2
12260
- b .L2126
12261
-.L2090:
12262
- ldr r3, [r4, #1040]
12833
+ b .L2084
12834
+.L2093:
12835
+ ldr r3, [r4, #1044]
1226312836 add r5, r5, #1
1226412837 ldr r3, [r3, #16]
1226512838 str r3, [sp]
12266
- bic r3, r5, #-16777216
12267
- cmp r3, #0
12268
- bne .L2089
12839
+ bics r3, r5, #-16777216
12840
+ bne .L2092
1226912841 ldr r2, [sp]
1227012842 mov r1, r5
1227112843 ldr r3, [r6, #64]
12272
- ldr r0, .L2127+24
12844
+ mov r0, r7
1227312845 ubfx r3, r3, #16, #6
1227412846 bl printk
12275
- ldr r0, .L2127+28
12276
- ldr r1, [r7, #1040]
12277
- mov r2, #4
1227812847 mov r3, #64
12848
+ mov r2, #4
12849
+ ldr r1, [r4, #1044]
12850
+ mov r0, r8
1227912851 bl rknand_print_hex
12280
-.L2089:
12281
- mov r0, #5
12852
+.L2092:
1228212853 mov r1, #10
12854
+ mov r0, #5
1228312855 bl usleep_range
12856
+ b .L2083
1228412857 .L2081:
12858
+ ldr r3, [r6, #8]
12859
+ str r3, [sp]
12860
+ ldr r5, [r6, #16]
12861
+ ubfx r5, r5, #1, #1
12862
+ cmp r5, #0
12863
+ bne .L2095
12864
+ ldr r7, .L2129+8
12865
+ ldr r8, .L2129+12
12866
+.L2096:
1228512867 ldr r3, [sp]
1228612868 tst r3, #1048576
12287
- beq .L2090
12288
- ldr r3, [r4, #1160]
12289
- ldr r5, .L2127
12869
+ beq .L2103
12870
+ ldr r3, [r4, #1220]
1229012871 cmp r3, #0
12291
- beq .L2088
12872
+ beq .L2091
1229212873 ldr r1, [sp]
1229312874 mov r2, #1
12294
- ldr r0, [r5, #1152]
12875
+ ldr r0, [r4, #1212]
1229512876 ubfx r1, r1, #22, #6
12296
- mov r1, r1, asl #10
12877
+ lsl r1, r1, #10
1229712878 bl rknand_dma_unmap_single
12298
- ldr r0, [r5, #1156]
1229912879 ldr r1, [sp]
12880
+ mov r2, #1
1230012881 ubfx r1, r1, #22, #6
12301
- mov r1, r1, asl #2
12302
- b .L2125
12303
-.L2079:
12304
- ldr r7, [r3, #1040]
12305
- ldr r3, [r7, #8]
12306
- str r3, [sp]
12307
- ldr r6, [r7, #16]
12308
- ubfx r6, r6, #1, #1
12309
- cmp r6, #0
12310
- moveq r5, r4
12311
- beq .L2093
12312
-.L2092:
12313
- ldr r2, [r7, #28]
12882
+ b .L2127
12883
+.L2095:
12884
+ ldr r7, .L2129+20
12885
+ mov r5, r1
12886
+ ldr r8, .L2129+12
12887
+.L2097:
12888
+ ldr r2, [r6, #28]
1231412889 ldr r3, [sp]
1231512890 ubfx r2, r2, #16, #5
1231612891 ubfx r3, r3, #22, #6
1231712892 cmp r2, r3
12318
- bge .L2095
12319
- ldr r3, [r4, #1040]
12893
+ bge .L2099
12894
+ ldr r3, [r4, #1044]
1232012895 ldr r3, [r3]
1232112896 str r3, [sp, #4]
1232212897 ldr r3, [sp, #4]
1232312898 tst r3, #8192
12324
- beq .L2094
12899
+ beq .L2098
1232512900 ldr r3, [sp, #4]
1232612901 tst r3, #131072
12327
- beq .L2094
12902
+ beq .L2098
1232812903 ldr r1, [sp, #4]
12329
- ldr r0, .L2127+32
12904
+ ldr r0, .L2129+32
1233012905 bl printk
12331
- b .L2095
12332
-.L2094:
12333
- add r5, r5, #1
12334
- bic r3, r5, #-16777216
12906
+.L2099:
12907
+ ldr r3, [r4, #1220]
1233512908 cmp r3, #0
12336
- bne .L2096
12337
- ldr r2, [r7, #28]
12909
+ beq .L2091
12910
+ ldr r1, [sp]
12911
+ mov r2, #0
12912
+ ldr r0, [r4, #1212]
12913
+ ubfx r1, r1, #22, #6
12914
+ lsl r1, r1, #10
12915
+ bl rknand_dma_unmap_single
12916
+ ldr r1, [sp]
12917
+ mov r2, #0
12918
+ ubfx r1, r1, #22, #6
12919
+.L2127:
12920
+ lsl r1, r1, #7
12921
+ b .L2126
12922
+.L2098:
12923
+ add r5, r5, #1
12924
+ bics r3, r5, #-16777216
12925
+ bne .L2100
12926
+ ldr r2, [r6, #28]
1233812927 mov r1, r5
1233912928 ldr r3, [sp]
12929
+ mov r0, r7
1234012930 ubfx r2, r2, #16, #5
12341
- ldr r0, .L2127+12
1234212931 ubfx r3, r3, #22, #6
1234312932 bl printk
12344
- ldr r0, .L2127+28
12345
- ldr r1, [r4, #1040]
12346
- mov r2, #4
1234712933 mov r3, #64
12934
+ mov r2, #4
12935
+ ldr r1, [r4, #1044]
12936
+ mov r0, r8
1234812937 bl rknand_print_hex
12349
-.L2096:
12350
- mov r0, #5
12938
+.L2100:
1235112939 mov r1, #10
12940
+ mov r0, #5
1235212941 bl usleep_range
12353
- b .L2092
12354
-.L2095:
12355
- ldr r3, [r4, #1160]
12356
- ldr r5, .L2127
12357
- cmp r3, #0
12358
- beq .L2088
12359
- ldr r1, [sp]
12360
- mov r2, #0
12361
- ldr r0, [r5, #1152]
12362
- ubfx r1, r1, #22, #6
12363
- mov r1, r1, asl #10
12364
- bl rknand_dma_unmap_single
12365
- ldr r0, [r5, #1156]
12366
- ldr r1, [sp]
12367
- ubfx r1, r1, #22, #6
12368
- mov r1, r1, asl #7
12369
-.L2126:
12370
- mov r2, #0
12371
- b .L2124
12372
-.L2099:
12373
- ldr r3, [r4, #1040]
12374
- add r6, r6, #1
12942
+ b .L2097
12943
+.L2103:
12944
+ ldr r3, [r4, #1044]
12945
+ add r5, r5, #1
1237512946 ldr r3, [r3, #8]
1237612947 str r3, [sp]
12377
- bic r3, r6, #-16777216
12378
- cmp r3, #0
12379
- bne .L2098
12948
+ bics r3, r5, #-16777216
12949
+ bne .L2102
1238012950 ldr r2, [sp]
12381
- mov r1, r6
12382
- ldr r3, [r7, #28]
12383
- ldr r0, .L2127+24
12951
+ mov r1, r5
12952
+ ldr r3, [r6, #28]
12953
+ mov r0, r7
1238412954 ubfx r3, r3, #16, #5
1238512955 bl printk
12386
- ldr r0, .L2127+28
12387
- ldr r1, [r5, #1040]
12388
- mov r2, #4
1238912956 mov r3, #64
12957
+ mov r2, #4
12958
+ ldr r1, [r4, #1044]
12959
+ mov r0, r8
1239012960 bl rknand_print_hex
12391
-.L2098:
12392
- mov r0, #5
12961
+.L2102:
1239312962 mov r1, #10
12963
+ mov r0, #5
1239412964 bl usleep_range
12395
-.L2093:
12396
- ldr r3, [sp]
12397
- tst r3, #1048576
12398
- beq .L2099
12399
- ldr r3, [r4, #1160]
12400
- ldr r5, .L2127
12401
- cmp r3, #0
12402
- beq .L2088
12403
- ldr r1, [sp]
12404
- mov r2, #1
12405
- ldr r0, [r5, #1152]
12406
- ubfx r1, r1, #22, #6
12407
- mov r1, r1, asl #10
12408
- bl rknand_dma_unmap_single
12409
- ldr r0, [r5, #1156]
12410
- ldr r1, [sp]
12411
- ubfx r1, r1, #22, #6
12412
- mov r1, r1, asl #7
12413
-.L2125:
12414
- mov r2, #1
12415
-.L2124:
12416
- bl rknand_dma_unmap_single
12417
-.L2088:
12418
- mov r3, #0
12419
- str r3, [r4, #1160]
12420
- add sp, sp, #12
12421
- @ sp needed
12422
- ldmfd sp!, {r4, r5, r6, r7, pc}
12423
-.L2128:
12965
+ b .L2096
12966
+.L2130:
1242412967 .align 2
12425
-.L2127:
12968
+.L2129:
1242612969 .word .LANCHOR0
1242712970 .word .LANCHOR3
12971
+ .word .LC145
12972
+ .word .LC146
1242812973 .word .LC143
1242912974 .word .LC144
1243012975 .word arm_delay_ops
1243112976 .word 644245000
12432
- .word .LC145
12433
- .word .LC146
1243412977 .word .LC147
1243512978 .fnend
1243612979 .size nandc_xfer_done, .-nandc_xfer_done
1243712980 .align 2
1243812981 .global nandc_xfer
12982
+ .syntax unified
12983
+ .arm
12984
+ .fpu softvfp
1243912985 .type nandc_xfer, %function
1244012986 nandc_xfer:
1244112987 .fnstart
1244212988 @ args = 4, pretend = 0, frame = 8
1244312989 @ frame_needed = 0, uses_anonymous_args = 0
12444
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
12990
+ push {r0, r1, r4, r5, r6, r7, r8, lr}
1244512991 .save {r4, r5, r6, r7, r8, lr}
1244612992 .pad #8
1244712993 mov r4, r1
12448
- ldr r7, [sp, #32]
12449
- mov r0, r1
12994
+ ldr r5, [sp, #32]
1245012995 mov r8, r2
12451
- mov r1, r2
1245212996 mov r6, r3
12453
- mov r2, r3
12454
- mov r3, r7
12997
+ mov r1, r8
12998
+ mov r2, r6
12999
+ mov r0, r4
13000
+ mov r3, r5
1245513001 bl nandc_xfer_start
1245613002 mov r0, r4
1245713003 bl nandc_xfer_done
1245813004 cmp r4, #0
1245913005 movne r0, #0
12460
- bne .L2159
12461
- ldr r5, .L2172
12462
- ldrb r3, [r5, #1028] @ zero_extendqisi2
13006
+ bne .L2132
13007
+ ldr r7, .L2170
13008
+ ldrb r3, [r7, #1028] @ zero_extendqisi2
1246313009 cmp r3, #9
12464
- bne .L2131
12465
- ldr ip, [r5, #1040]
12466
- mov r2, r8, lsr #2
12467
- mov r1, #1
12468
- mov lr, r4
13010
+ bne .L2133
13011
+ ldr r1, [r7, #1044]
13012
+ lsr r8, r8, #2
13013
+ mov r2, #1
1246913014 mov r0, r4
13015
+.L2134:
13016
+ cmp r4, r8
13017
+ bcc .L2138
13018
+ ldr r4, [r1]
13019
+ cmp r2, #0
13020
+ movne r0, #512
13021
+ and r3, r4, #139264
13022
+ cmp r3, #139264
13023
+ bne .L2140
13024
+ mov r1, r4
13025
+ ldr r0, .L2170+4
13026
+ bl printk
13027
+ ldr r3, [r7, #1044]
13028
+ mvn r0, #0
13029
+ orr r4, r4, #131072
13030
+ str r4, [r3]
13031
+.L2140:
13032
+ tst r4, #8192
13033
+ beq .L2141
13034
+ ldr r3, .L2170+8
13035
+ ldrb r3, [r3, #-116] @ zero_extendqisi2
13036
+ cmp r3, #0
13037
+ beq .L2141
13038
+ mov r1, r4
13039
+ ldr r0, .L2170+12
13040
+ bl printk
13041
+ ldr r3, [r7, #1044]
13042
+ mov r2, #1
13043
+ str r2, [r3, #16]
13044
+.L2169:
13045
+ mvn r0, #0
1247013046 .L2132:
12471
- cmp lr, r2
12472
- bcs .L2169
12473
- add r3, lr, #84
12474
- ldr r3, [ip, r3, asl #2]
13047
+ add sp, sp, #8
13048
+ @ sp needed
13049
+ pop {r4, r5, r6, r7, r8, pc}
13050
+.L2138:
13051
+ add r3, r4, #84
13052
+ ldr r3, [r1, r3, lsl #2]
1247513053 str r3, [sp, #4]
13054
+ ldr ip, [sp, #4]
1247613055 ldr r3, [sp, #4]
12477
- ldr r4, [sp, #4]
12478
- ubfx r4, r4, #26, #1
12479
- and r4, r4, r3, lsr #10
13056
+ ubfx r3, r3, #26, #1
13057
+ and r3, r3, ip, lsr #10
13058
+ and r2, r2, r3
1248013059 ldr r3, [sp, #4]
12481
- and r1, r1, r4
1248213060 tst r3, #4
12483
- bne .L2151
13061
+ bne .L2152
1248413062 ldr r3, [sp, #4]
1248513063 tst r3, #262144
12486
- bne .L2151
12487
- ldr r4, [sp, #4]
13064
+ bne .L2152
13065
+ ldr ip, [sp, #4]
1248813066 ldr r3, [sp, #4]
12489
- ubfx r4, r4, #3, #7
13067
+ ubfx ip, ip, #3, #7
1249013068 ubfx r3, r3, #19, #7
12491
- cmp r4, r3
13069
+ cmp ip, r3
1249213070 ldr r3, [sp, #4]
1249313071 ubfxgt r3, r3, #3, #7
1249413072 ubfxle r3, r3, #19, #7
1249513073 cmp r0, r3
1249613074 movcc r0, r3
12497
- b .L2133
12498
-.L2151:
13075
+.L2135:
13076
+ add r4, r4, #1
13077
+ b .L2134
13078
+.L2152:
1249913079 mvn r0, #0
13080
+ b .L2135
1250013081 .L2133:
12501
- add lr, lr, #1
12502
- b .L2132
12503
-.L2169:
12504
- ldr r3, [r5, #1040]
12505
- cmp r1, #0
12506
- movne r0, #512
12507
- ldr r4, [r3]
13082
+ ldrb r3, [r7, #1193] @ zero_extendqisi2
13083
+ lsr r0, r8, #1
13084
+ mov r2, r5
13085
+ mov r1, r4
13086
+ cmp r3, #25
13087
+ movcc lr, #64
13088
+ movcs lr, #128
13089
+.L2143:
13090
+ cmp r1, r0
13091
+ add ip, lr, r4
13092
+ add r2, r2, #4
13093
+ bcc .L2144
13094
+ ldr r1, [r7, #1044]
13095
+ mov r2, #0
13096
+ lsr r8, r8, #2
13097
+ mov r0, r2
13098
+.L2145:
13099
+ cmp r2, r8
13100
+ bcc .L2149
13101
+ mov r3, #0
13102
+ str r3, [r1, #16]
13103
+ ldr r4, [r1]
1250813104 and r3, r4, #139264
1250913105 cmp r3, #139264
12510
- bne .L2138
13106
+ bne .L2141
1251113107 mov r1, r4
12512
- ldr r0, .L2172+4
13108
+ ldr r0, .L2170+16
1251313109 bl printk
12514
- ldr r3, [r5, #1040]
12515
- mvn r0, #0
13110
+ ldr r3, [r7, #1044]
1251613111 orr r4, r4, #131072
1251713112 str r4, [r3]
12518
-.L2138:
12519
- tst r4, #8192
12520
- beq .L2139
12521
- ldr r3, .L2172+8
12522
- ldrb r3, [r3, #-124] @ zero_extendqisi2
12523
- cmp r3, #0
12524
- beq .L2139
12525
- ldr r0, .L2172+12
12526
- mov r1, r4
12527
- bl printk
12528
- ldr r3, [r5, #1040]
12529
- mov r2, #1
12530
- str r2, [r3, #16]
12531
- b .L2140
12532
-.L2131:
12533
- ldrb r3, [r5, #1172] @ zero_extendqisi2
12534
- mov r1, r8, lsr #1
12535
- mov r2, r4
12536
- cmp r3, #25
12537
- mov r3, r7
12538
- movcc ip, #64
12539
- movcs ip, #128
12540
-.L2142:
12541
- cmp r2, r1
12542
- add r0, r4, ip
12543
- add r3, r3, #4
12544
- bcs .L2170
12545
- ldr lr, [r5, #1140]
12546
- mov r4, r4, lsr #2
12547
- add r2, r2, #1
12548
- ldr r4, [lr, r4, asl #2]
12549
- mov lr, r4, lsr #8
12550
- strb r4, [r3, #-4]
12551
- strb lr, [r3, #-3]
12552
- mov lr, r4, lsr #16
12553
- mov r4, r4, lsr #24
12554
- strb lr, [r3, #-2]
12555
- strb r4, [r3, #-1]
12556
- mov r4, r0
12557
- b .L2142
12558
-.L2170:
12559
- ldr ip, [r5, #1040]
12560
- mov r1, #0
12561
- mov r2, r8, lsr #2
12562
- mov r0, r1
13113
+ b .L2169
1256313114 .L2144:
12564
- cmp r1, r2
12565
- bcs .L2171
12566
- add r3, r1, #8
12567
- ldr r3, [ip, r3, asl #2]
13115
+ ldr r3, [r7, #1200]
13116
+ bic r4, r4, #3
13117
+ add r1, r1, #1
13118
+ ldr r3, [r3, r4]
13119
+ strb r3, [r2, #-4]
13120
+ lsr r4, r3, #8
13121
+ strb r4, [r2, #-3]
13122
+ lsr r4, r3, #16
13123
+ lsr r3, r3, #24
13124
+ strb r4, [r2, #-2]
13125
+ mov r4, ip
13126
+ strb r3, [r2, #-1]
13127
+ b .L2143
13128
+.L2149:
13129
+ add r3, r2, #8
13130
+ ldr r3, [r1, r3, lsl #2]
1256813131 str r3, [sp, #4]
1256913132 ldr r3, [sp, #4]
1257013133 tst r3, #4
12571
- bne .L2154
13134
+ bne .L2155
1257213135 ldr r3, [sp, #4]
1257313136 tst r3, #32768
12574
- bne .L2154
12575
- ldr lr, [sp, #4]
12576
- ldr r8, [sp, #4]
12577
- ldr r3, [sp, #4]
12578
- ubfx lr, lr, #3, #5
13137
+ bne .L2155
13138
+ ldr ip, [sp, #4]
1257913139 ldr r4, [sp, #4]
12580
- ubfx r8, r8, #27, #1
12581
- ubfx r3, r3, #16, #5
12582
- ubfx r4, r4, #29, #1
12583
- orr lr, lr, r8, asl #5
12584
- orr r3, r3, r4, asl #5
12585
- cmp lr, r3
1258613140 ldr r3, [sp, #4]
12587
- ldrhi r4, [sp, #4]
13141
+ ldr lr, [sp, #4]
13142
+ ubfx ip, ip, #3, #5
13143
+ ubfx r4, r4, #27, #1
13144
+ ubfx r3, r3, #16, #5
13145
+ orr ip, ip, r4, lsl #5
13146
+ ubfx lr, lr, #29, #1
13147
+ orr r3, r3, lr, lsl #5
13148
+ cmp ip, r3
13149
+ ldr r3, [sp, #4]
13150
+ ldrhi ip, [sp, #4]
13151
+ ldrls ip, [sp, #4]
1258813152 ubfxhi r3, r3, #3, #5
12589
- ldrls r4, [sp, #4]
1259013153 ubfxls r3, r3, #16, #5
12591
- ubfxhi r4, r4, #27, #1
12592
- ubfxls r4, r4, #29, #1
12593
- orr r4, r3, r4, asl #5
12594
- cmp r0, r4
12595
- movcc r0, r4
13154
+ ubfxhi ip, ip, #27, #1
13155
+ ubfxls ip, ip, #29, #1
13156
+ orr r3, r3, ip, lsl #5
13157
+ cmp r0, r3
13158
+ movcc r0, r3
13159
+.L2146:
13160
+ add r2, r2, #1
1259613161 b .L2145
12597
-.L2154:
13162
+.L2155:
1259813163 mvn r0, #0
12599
-.L2145:
12600
- add r1, r1, #1
12601
- b .L2144
12602
-.L2171:
12603
- ldr r3, [r5, #1040]
12604
- mov r2, #0
12605
- str r2, [r3, #16]
12606
- ldr r4, [r3]
12607
- and r3, r4, #139264
12608
- cmp r3, #139264
12609
- bne .L2139
12610
- mov r1, r4
12611
- ldr r0, .L2172+16
12612
- bl printk
12613
- ldr r3, .L2172
12614
- orr r4, r4, #131072
12615
- ldr r3, [r3, #1040]
12616
- str r4, [r3]
12617
- b .L2140
12618
-.L2139:
13164
+ b .L2146
13165
+.L2141:
1261913166 cmn r0, #1
12620
- beq .L2159
12621
- ldr r3, [r7]
13167
+ beq .L2132
13168
+ ldr r3, [r5]
1262213169 cmn r3, #1
12623
- bne .L2159
12624
- ldr r3, [r7, #4]
13170
+ bne .L2132
13171
+ ldr r3, [r5, #4]
1262513172 cmn r3, #1
12626
- bne .L2159
13173
+ bne .L2132
1262713174 ldr r3, [r6]
1262813175 cmn r3, #1
1262913176 moveq r0, #512
12630
- b .L2159
12631
-.L2140:
12632
- mvn r0, #0
12633
-.L2159:
12634
- add sp, sp, #8
12635
- @ sp needed
12636
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
12637
-.L2173:
13177
+ b .L2132
13178
+.L2171:
1263813179 .align 2
12639
-.L2172:
13180
+.L2170:
1264013181 .word .LANCHOR0
1264113182 .word .LC148
1264213183 .word .LANCHOR3
....@@ -12646,712 +13187,670 @@
1264613187 .size nandc_xfer, .-nandc_xfer
1264713188 .align 2
1264813189 .global flash_read_page
13190
+ .syntax unified
13191
+ .arm
13192
+ .fpu softvfp
1264913193 .type flash_read_page, %function
1265013194 flash_read_page:
1265113195 .fnstart
1265213196 @ args = 4, pretend = 0, frame = 8
1265313197 @ frame_needed = 0, uses_anonymous_args = 0
12654
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13198
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1265513199 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1265613200 mov r6, r0
12657
- ldr r10, .L2190
13201
+ ldr r7, .L2188
1265813202 .pad #20
1265913203 sub sp, sp, #20
12660
- mvn r4, #0
1266113204 ubfx r9, r1, #24, #2
12662
- str r2, [sp, #12]
1266313205 mov r8, r3
12664
- ldrb r0, [r10, #1189] @ zero_extendqisi2
12665
- mov r7, r10
12666
- ldr r5, [r10, #1040]
12667
- mov r10, r6, asl #8
12668
- rsb r0, r0, #24
12669
- bic r4, r1, r4, asl r0
13206
+ str r2, [sp, #12]
13207
+ lsl r10, r6, #8
13208
+ ldrb r4, [r7, #1153] @ zero_extendqisi2
13209
+ ldr r5, [r7, #1044]
13210
+ rsb r0, r4, #24
13211
+ mvn r4, #0
13212
+ bic r4, r1, r4, lsl r0
1267013213 bl nandc_wait_flash_ready
1267113214 mov r0, r6
1267213215 bl nandc_cs
1267313216 cmp r9, #0
12674
- bne .L2175
13217
+ bne .L2173
1267513218 mov r0, r6
1267613219 bl zftl_flash_enter_slc_mode
12677
- b .L2176
12678
-.L2175:
12679
- ldr r2, [r7, #1096]
12680
- ldrb r2, [r2, #12] @ zero_extendqisi2
12681
- cmp r2, #3
12682
- bne .L2177
12683
- ldrb r2, [r7, #1196] @ zero_extendqisi2
12684
- cmp r2, #0
12685
- bne .L2177
12686
- ldrb r2, [r7, #1197] @ zero_extendqisi2
12687
- cmp r2, #0
12688
- addeq r2, r5, r10
12689
- streq r9, [r2, #2056]
12690
- beq .L2176
12691
-.L2177:
12692
- mov r0, r6
12693
- bl zftl_flash_exit_slc_mode
12694
-.L2176:
12695
- ldr r2, [r7, #1096]
13220
+.L2174:
13221
+ ldr r2, [r7, #1104]
1269613222 ldrb r1, [r2, #7] @ zero_extendqisi2
1269713223 cmp r1, #1
12698
- bne .L2178
13224
+ bne .L2176
1269913225 ldrb r1, [r2, #12] @ zero_extendqisi2
1270013226 cmp r1, #2
1270113227 addeq r1, r5, r10
1270213228 moveq r0, #38
1270313229 streq r0, [r1, #2056]
12704
-.L2178:
13230
+.L2176:
1270513231 add fp, r5, r10
1270613232 mov r1, #0
12707
- mov r0, #48
1270813233 str r1, [fp, #2056]
13234
+ mov r0, #48
1270913235 str r1, [fp, #2052]
1271013236 str r1, [fp, #2052]
1271113237 uxtb r1, r4
1271213238 str r1, [fp, #2052]
12713
- mov r1, r4, lsr #8
13239
+ lsr r1, r4, #8
1271413240 str r1, [fp, #2052]
12715
- mov r1, r4, lsr #16
13241
+ lsr r1, r4, #16
1271613242 str r1, [fp, #2052]
12717
- ldrb r1, [r7, #1188] @ zero_extendqisi2
13243
+ ldrb r1, [r7, #1152] @ zero_extendqisi2
1271813244 cmp r1, #0
12719
- movne r1, r4, lsr #24
13245
+ lsrne r1, r4, #24
1272013246 strne r1, [fp, #2052]
1272113247 add r1, r5, r10
1272213248 str r0, [r1, #2056]
12723
- ldrb r1, [r2, #12] @ zero_extendqisi2
12724
- adds r2, r9, #0
12725
- movne r2, #1
12726
- cmp r1, #3
12727
- movne r2, #0
13249
+ cmp r9, #0
13250
+ ldrb r2, [r2, #12] @ zero_extendqisi2
13251
+ sub r2, r2, #3
13252
+ clz r2, r2
13253
+ lsr r2, r2, #5
13254
+ moveq r2, #0
1272813255 cmp r2, #0
12729
- beq .L2180
12730
- ldrb r3, [r7, #1196] @ zero_extendqisi2
13256
+ beq .L2178
13257
+ ldrb r2, [r7, #1158] @ zero_extendqisi2
13258
+ cmp r2, #0
13259
+ bne .L2178
13260
+ ldrb r3, [r7, #1159] @ zero_extendqisi2
1273113261 cmp r3, #0
12732
- bne .L2180
12733
- ldr r3, .L2190
12734
- ldrb r3, [r3, #1197] @ zero_extendqisi2
12735
- cmp r3, #0
12736
- addeq r4, r4, r4, asl #1
13262
+ addeq r4, r4, r4, lsl #1
1273713263 subeq r0, r4, #1
1273813264 addeq r0, r0, r9
12739
- beq .L2189
12740
-.L2180:
13265
+ beq .L2187
13266
+.L2178:
1274113267 mov r0, r4
12742
-.L2189:
13268
+.L2187:
1274313269 bl nandc_set_seed
12744
- mov r4, #0
1274513270 bl nandc_wait_flash_ready
1274613271 add r3, r5, r10
12747
- mov r1, r4
1274813272 mov r2, #5
12749
- mov r0, r6
1275013273 str r2, [r3, #2056]
12751
- str r4, [fp, #2052]
13274
+ mov r1, #0
1275213275 mov r2, #224
12753
- str r4, [fp, #2052]
13276
+ str r1, [fp, #2052]
13277
+ mov r0, r6
13278
+ str r1, [fp, #2052]
1275413279 str r2, [r3, #2056]
12755
- ldrb r2, [sp, #56] @ zero_extendqisi2
1275613280 ldr r3, [sp, #12]
13281
+ ldrb r2, [sp, #56] @ zero_extendqisi2
1275713282 str r8, [sp]
1275813283 bl nandc_xfer
12759
- mov r5, r0
12760
- mov r0, r4
12761
- bl nandc_de_cs
12762
- mov r0, r5
13284
+ bl nandc_de_cs.constprop.35
1276313285 add sp, sp, #20
1276413286 @ sp needed
12765
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
12766
-.L2191:
13287
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13288
+.L2173:
13289
+ ldr r2, [r7, #1104]
13290
+ ldrb r2, [r2, #12] @ zero_extendqisi2
13291
+ cmp r2, #3
13292
+ bne .L2175
13293
+ ldrb r2, [r7, #1158] @ zero_extendqisi2
13294
+ cmp r2, #0
13295
+ bne .L2175
13296
+ ldrb r2, [r7, #1159] @ zero_extendqisi2
13297
+ cmp r2, #0
13298
+ addeq r2, r5, r10
13299
+ streq r9, [r2, #2056]
13300
+ beq .L2174
13301
+.L2175:
13302
+ mov r0, r6
13303
+ bl zftl_flash_exit_slc_mode
13304
+ b .L2174
13305
+.L2189:
1276713306 .align 2
12768
-.L2190:
13307
+.L2188:
1276913308 .word .LANCHOR0
1277013309 .fnend
1277113310 .size flash_read_page, .-flash_read_page
1277213311 .align 2
1277313312 .global micron_read_retrial
13313
+ .syntax unified
13314
+ .arm
13315
+ .fpu softvfp
1277413316 .type micron_read_retrial, %function
1277513317 micron_read_retrial:
1277613318 .fnstart
12777
- @ args = 4, pretend = 0, frame = 24
13319
+ @ args = 4, pretend = 0, frame = 16
1277813320 @ frame_needed = 0, uses_anonymous_args = 0
12779
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13321
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1278013322 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
12781
- .pad #36
12782
- sub sp, sp, #36
12783
- ldr r4, .L2220
12784
- mov r5, r0
12785
- str r3, [sp, #24]
12786
- mov r9, r1
12787
- str r2, [sp, #20]
12788
- mov r8, #0
12789
- ldrb r3, [r4, #1172] @ zero_extendqisi2
12790
- ldr r10, .L2220+4
12791
- add r3, r3, r3, asl #1
12792
- mov r3, r3, asr #2
12793
- str r3, [sp, #12]
12794
- bl nandc_wait_flash_ready
12795
- ldr r3, [r4, #1040]
13323
+ .pad #28
13324
+ sub sp, sp, #28
13325
+ ldr r4, .L2219
13326
+ mov r6, r0
13327
+ mov r10, r1
13328
+ mov r9, #0
1279613329 str r3, [sp, #16]
12797
-.L2193:
12798
- mov r0, r5
13330
+ ldrb r3, [r4, #1193] @ zero_extendqisi2
13331
+ str r2, [sp, #12]
13332
+ add r3, r3, r3, lsl #1
13333
+ asr r3, r3, #2
13334
+ str r3, [sp, #8]
13335
+ bl nandc_wait_flash_ready
13336
+ ldr r5, [r4, #1044]
13337
+ add r5, r5, r6, lsl #8
13338
+.L2191:
13339
+ ldr fp, .L2219+4
13340
+ mov r0, r6
1279913341 mov r7, #0
12800
- bl zftl_flash_enter_slc_mode
12801
- mov r0, r5
12802
- bl zftl_flash_exit_slc_mode
1280313342 mvn r4, #0
12804
- ldr r3, [sp, #16]
12805
- add r6, r3, r5, asl #8
12806
-.L2194:
12807
- ldrb r3, [r10, #-116] @ zero_extendqisi2
13343
+ bl zftl_flash_enter_slc_mode
13344
+ mov r0, r6
13345
+ bl zftl_flash_exit_slc_mode
13346
+.L2192:
13347
+ ldrb r3, [fp, #-108] @ zero_extendqisi2
1280813348 cmp r7, r3
12809
- bcs .L2198
13349
+ bcc .L2197
13350
+.L2196:
1281013351 mov r3, #239
1281113352 mov r0, #200
12812
- str r3, [r6, #2056]
13353
+ str r3, [r5, #2056]
1281313354 mov r3, #137
12814
- str r3, [r6, #2052]
12815
- add fp, r7, #1
12816
- bl timer_delay_ns
12817
- str fp, [r6, #2048]
13355
+ str r3, [r5, #2052]
13356
+ bl ndelay
1281813357 mov r3, #0
12819
- str r3, [r6, #2048]
12820
- str r3, [r6, #2048]
12821
- mov r0, r5
12822
- str r3, [r6, #2048]
12823
- mov r1, r9
12824
- ldr r3, [sp, #72]
12825
- ldr r2, [sp, #20]
13358
+ str r3, [r5, #2048]
13359
+ str r3, [r5, #2048]
13360
+ str r3, [r5, #2048]
13361
+ str r3, [r5, #2048]
13362
+ ldr r3, [sp, #8]
13363
+ cmp r4, r3
13364
+ bcc .L2198
13365
+ cmn r4, #1
13366
+ movne r4, #256
13367
+.L2198:
13368
+ cmn r4, #1
13369
+ movne r8, #0
13370
+ moveq r8, #1
13371
+ cmp r4, #256
13372
+ movne r1, r8
13373
+ orreq r1, r8, #1
13374
+ cmp r1, #0
13375
+ beq .L2199
13376
+ mov r1, r6
13377
+ str r4, [sp]
13378
+ mov r3, r7
13379
+ mov r2, r10
13380
+ ldr r0, .L2219+8
13381
+ bl printk
13382
+ eor r1, r9, #1
13383
+ ands r1, r8, r1
13384
+ beq .L2200
13385
+ mov r1, #3
13386
+ mov r0, r6
13387
+ bl mt_auto_read_calibration_config
13388
+ mov r9, #1
13389
+ b .L2191
13390
+.L2197:
13391
+ mov r3, #239
13392
+ mov r0, #200
13393
+ str r3, [r5, #2056]
13394
+ mov r3, #137
13395
+ str r3, [r5, #2052]
13396
+ bl ndelay
13397
+ add r3, r7, #1
13398
+ ldr r2, [sp, #12]
13399
+ str r3, [r5, #2048]
13400
+ mov r1, r10
13401
+ str r3, [sp, #20]
13402
+ mov r3, #0
13403
+ str r3, [r5, #2048]
13404
+ mov r0, r6
13405
+ str r3, [r5, #2048]
13406
+ str r3, [r5, #2048]
13407
+ ldr r3, [sp, #64]
1282613408 str r3, [sp]
12827
- ldr r3, [sp, #24]
13409
+ ldr r3, [sp, #16]
1282813410 bl flash_read_page
12829
- ldr r3, .L2220+8
13411
+ ldr r3, .L2219+12
13412
+ mov r8, r0
1283013413 ldr r3, [r3]
1283113414 tst r3, #4096
12832
- mov ip, r0
12833
- beq .L2195
13415
+ beq .L2193
1283413416 str r0, [sp]
12835
- mov r1, r7
12836
- str r0, [sp, #28]
12837
- mov r2, r9
12838
- ldr r0, .L2220+12
1283913417 mov r3, r4
13418
+ mov r2, r10
13419
+ mov r1, r7
13420
+ ldr r0, .L2219+16
1284013421 bl printk
12841
- ldr ip, [sp, #28]
12842
-.L2195:
12843
- cmn ip, #1
12844
- beq .L2196
12845
- ldr r3, [r10, #-128]
13422
+.L2193:
13423
+ cmn r8, #1
13424
+ beq .L2194
13425
+ ldr r3, [fp, #-120]
1284613426 cmn r4, #1
12847
- moveq r4, ip
12848
- str r3, [sp, #20]
12849
- ldr r3, [r10, #-120]
12850
- str r3, [sp, #24]
12851
- ldr r3, [sp, #12]
12852
- cmp ip, r3
12853
- bcc .L2205
12854
-.L2196:
12855
- mov r7, fp
12856
- b .L2194
12857
-.L2205:
12858
- mov r4, ip
12859
-.L2198:
12860
- ldr r3, [sp, #16]
12861
- mov r6, r5, asl #8
12862
- mov r0, #200
12863
- add fp, r3, r6
12864
- mov r3, #239
12865
- str r3, [fp, #2056]
12866
- mov r3, #137
12867
- str r3, [fp, #2052]
12868
- bl timer_delay_ns
12869
- mov r3, #0
12870
- str r3, [fp, #2048]
12871
- str r3, [fp, #2048]
12872
- str r3, [fp, #2048]
12873
- str r3, [fp, #2048]
12874
- ldr r3, [sp, #12]
12875
- cmp r4, r3
12876
- bcc .L2200
12877
- cmn r4, #1
12878
- movne r4, #256
12879
-.L2200:
12880
- cmn r4, #1
12881
- movne fp, #0
12882
- moveq fp, #1
12883
- cmp r4, #256
12884
- movne r3, fp
12885
- orreq r3, fp, #1
12886
- cmp r3, #0
12887
- beq .L2201
12888
- mov r3, r7
12889
- str r4, [sp]
12890
- ldr r0, .L2220+16
12891
- mov r1, r5
12892
- mov r2, r9
12893
- eor r7, r8, #1
12894
- bl printk
12895
- ands r7, fp, r7
12896
- beq .L2202
12897
- bl nandc_wait_flash_ready
12898
- ldr r3, .L2220
12899
- mov r0, #200
12900
- mov r8, #1
12901
- ldr r3, [r3, #1040]
12902
- add r6, r3, r6
12903
- mov r3, #239
12904
- str r3, [r6, #2056]
12905
- mov r3, #150
12906
- str r3, [r6, #2052]
12907
- bl timer_delay_ns
12908
- mov r3, #3
12909
- str r3, [r6, #2048]
12910
- mov r3, #0
12911
- str r3, [r6, #2048]
12912
- str r3, [r6, #2048]
12913
- str r3, [r6, #2048]
12914
- b .L2193
12915
-.L2202:
12916
- cmp r8, #0
12917
- beq .L2203
12918
- bl nandc_wait_flash_ready
12919
- ldr r3, .L2220
12920
- mov r0, #200
12921
- ldr r9, [r3, #1040]
12922
- mov r3, #239
12923
- add r5, r9, r5, asl #8
12924
- add r6, r9, r6
12925
- str r3, [r6, #2056]
12926
- mov r3, #150
12927
- str r3, [r5, #2052]
12928
- bl timer_delay_ns
12929
- cmn r4, #1
12930
- str r7, [r5, #2048]
12931
- movne r4, #256
12932
- str r7, [r5, #2048]
12933
- str r7, [r5, #2048]
12934
- str r7, [r5, #2048]
12935
- b .L2203
12936
-.L2201:
12937
- cmp r8, #0
12938
- beq .L2203
13427
+ moveq r4, r8
1293913428 str r3, [sp, #12]
12940
- bl nandc_wait_flash_ready
12941
- ldr r2, .L2220
12942
- mov r0, #200
12943
- mov r4, #256
12944
- ldr r9, [r2, #1040]
12945
- mov r2, #239
12946
- add r5, r9, r5, asl #8
12947
- add r6, r9, r6
12948
- str r2, [r6, #2056]
12949
- mov r2, #150
12950
- str r2, [r5, #2052]
12951
- bl timer_delay_ns
12952
- ldr r3, [sp, #12]
12953
- str r3, [r5, #2048]
12954
- str r3, [r5, #2048]
12955
- str r3, [r5, #2048]
12956
- str r3, [r5, #2048]
13429
+ ldr r3, [fp, #-112]
13430
+ str r3, [sp, #16]
13431
+ ldr r3, [sp, #8]
13432
+ cmp r8, r3
13433
+ bcc .L2203
13434
+.L2194:
13435
+ ldr r7, [sp, #20]
13436
+ b .L2192
1295713437 .L2203:
13438
+ mov r4, r8
13439
+ b .L2196
13440
+.L2200:
13441
+ cmp r9, #0
13442
+ beq .L2201
13443
+ mov r0, r6
13444
+ bl mt_auto_read_calibration_config
13445
+ cmn r4, #1
13446
+ movne r4, #256
13447
+.L2201:
1295813448 bl nandc_wait_flash_ready
1295913449 mov r0, r4
12960
- add sp, sp, #36
13450
+ add sp, sp, #28
1296113451 @ sp needed
12962
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
12963
-.L2221:
12964
- .align 2
13452
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13453
+.L2199:
13454
+ cmp r9, #0
13455
+ beq .L2201
13456
+ mov r0, r6
13457
+ mov r4, #256
13458
+ bl mt_auto_read_calibration_config
13459
+ b .L2201
1296513460 .L2220:
13461
+ .align 2
13462
+.L2219:
1296613463 .word .LANCHOR0
1296713464 .word .LANCHOR3
13465
+ .word .LC152
1296813466 .word .LANCHOR2
1296913467 .word .LC151
12970
- .word .LC152
1297113468 .fnend
1297213469 .size micron_read_retrial, .-micron_read_retrial
1297313470 .align 2
1297413471 .global toshiba_3d_read_retrial
13472
+ .syntax unified
13473
+ .arm
13474
+ .fpu softvfp
1297513475 .type toshiba_3d_read_retrial, %function
1297613476 toshiba_3d_read_retrial:
1297713477 .fnstart
12978
- @ args = 4, pretend = 0, frame = 16
13478
+ @ args = 4, pretend = 0, frame = 24
1297913479 @ frame_needed = 0, uses_anonymous_args = 0
12980
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13480
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1298113481 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
12982
- .pad #28
12983
- sub sp, sp, #28
12984
- ubfx r4, r1, #24, #2
13482
+ .pad #36
13483
+ sub sp, sp, #36
13484
+ ldr r7, .L2269
1298513485 mov r8, r0
12986
- mov fp, r3
12987
- mov r10, r1
12988
- str r2, [sp, #12]
12989
- bl nandc_wait_flash_ready
12990
- ldr r7, .L2270
13486
+ ubfx r4, r1, #24, #2
13487
+ mov r9, r1
13488
+ str r3, [sp, #20]
1299113489 add r6, r8, #8
12992
- ldr r3, [r7, #1040]
12993
- add r6, r3, r6, asl #8
12994
- str r3, [sp, #8]
12995
- ldrb r3, [r7, #1173] @ zero_extendqisi2
13490
+ str r2, [sp, #16]
13491
+ mov r5, #1
13492
+ bl nandc_wait_flash_ready
13493
+ ldr r3, [r7, #1044]
13494
+ str r3, [sp, #12]
13495
+ add r6, r3, r6, lsl #8
13496
+ ldrb r3, [r7, #1100] @ zero_extendqisi2
1299613497 cmp r3, #36
1299713498 movne r3, #56
1299813499 moveq r3, #46
12999
- movne r5, #10
13000
- moveq r5, #26
13500
+ str r3, [sp, #28]
13501
+ movne r3, #10
13502
+ moveq r3, #26
1300113503 cmp r4, #0
13002
- str r3, [sp, #16]
13504
+ str r3, [sp, #24]
1300313505 mvn r4, #0
13004
- bne .L2224
13005
- ldr r3, [sp, #8]
13006
- mov r9, #1
13007
- add r3, r3, r8, asl #8
13008
- str r3, [sp, #16]
13009
-.L2231:
13010
- ldr r3, .L2270
13011
- mov r0, r6
13012
- ldrb r3, [r3, #1173] @ zero_extendqisi2
13013
- cmp r3, #36
13014
- bne .L2225
13015
- mov r2, #0
13016
- mov r1, r9
13017
- bl toshiba_tlc_set_rr_para
13018
- mov r3, #93
13019
- ldr r2, [sp, #16]
13020
- str r3, [r2, #2056]
13021
- b .L2226
13022
-.L2225:
13023
- uxtb r1, r9
13024
- bl toshiba_3d_set_slc_rr_para
13025
-.L2226:
13026
- ldr r3, [sp, #64]
13027
- mov r0, r8
13028
- mov r1, r10
13029
- ldr r2, [sp, #12]
13030
- str r3, [sp]
13031
- mov r3, fp
13032
- bl flash_read_page
13033
- ldr r3, .L2270+4
13034
- ldr r3, [r3]
13035
- tst r3, #16
13036
- mov ip, r0
13037
- beq .L2227
13038
- mov r3, ip
13039
- ldr r0, .L2270+8
13040
- mov r1, r9
13041
- mov r2, r10
13042
- str ip, [sp, #20]
13043
- bl printk
13044
- ldr ip, [sp, #20]
13045
-.L2227:
13046
- cmn ip, #1
13047
- beq .L2228
13048
- ldr r3, .L2270+12
13049
- cmn r4, #1
13050
- moveq r4, ip
13051
- ldr r2, [r3, #-128]
13052
- ldr fp, [r3, #-120]
13053
- ldrb r3, [r7, #1172] @ zero_extendqisi2
13054
- str r2, [sp, #12]
13055
- add r3, r3, r3, asl #1
13056
- cmp ip, r3, asr #2
13057
- bcc .L2246
13058
-.L2228:
13059
- add r9, r9, #1
13060
- cmp r9, r5
13061
- bne .L2231
13062
- b .L2230
13063
-.L2246:
13064
- mov r5, r9
13065
- mov r4, ip
13506
+ ldr r3, [sp, #12]
13507
+ add fp, r3, r8, lsl #8
13508
+ bne .L2239
1306613509 .L2230:
13067
- ldr r3, .L2270
13068
- mov r1, #0
13069
- mov r0, r6
13070
- ldrb r3, [r3, #1173] @ zero_extendqisi2
13510
+ ldr r3, .L2269
13511
+ ldrb r3, [r3, #1100] @ zero_extendqisi2
1307113512 cmp r3, #36
13072
- moveq r2, r1
13073
- beq .L2269
13074
- bl toshiba_3d_set_slc_rr_para
13075
- b .L2233
13076
-.L2224:
13077
- ldr r3, [sp, #8]
13078
- mov r5, #1
13079
- add r9, r3, r8, asl #8
13080
-.L2240:
13081
- ldr r3, .L2270
13082
- mov r0, r6
13083
- ldrb r3, [r3, #1173] @ zero_extendqisi2
13084
- cmp r3, #36
13085
- bne .L2234
13513
+ bne .L2224
13514
+ mov r2, #0
1308613515 mov r1, r5
13087
- mov r2, #1
13516
+ mov r0, r6
1308813517 bl toshiba_tlc_set_rr_para
1308913518 mov r3, #93
13090
- b .L2268
13091
-.L2234:
13092
- uxtb r1, r5
13093
- bl toshiba_3d_set_tlc_rr_para
13094
- mov r3, #38
13095
-.L2268:
13096
- str r3, [r9, #2056]
13519
+ str r3, [fp, #2056]
13520
+.L2225:
13521
+ ldr r3, [sp, #72]
13522
+ mov r1, r9
13523
+ ldr r2, [sp, #16]
1309713524 mov r0, r8
13098
- ldr r3, [sp, #64]
13099
- mov r1, r10
13100
- ldr r2, [sp, #12]
1310113525 str r3, [sp]
13102
- mov r3, fp
13526
+ ldr r3, [sp, #20]
1310313527 bl flash_read_page
13104
- ldr r3, .L2270+4
13528
+ ldr r3, .L2269+4
13529
+ mov r10, r0
1310513530 ldr r3, [r3]
1310613531 tst r3, #16
13107
- mov ip, r0
13108
- beq .L2236
13109
- mov r3, ip
13110
- ldr r0, .L2270+16
13532
+ beq .L2226
13533
+ mov r3, r0
13534
+ mov r2, r9
1311113535 mov r1, r5
13112
- mov r2, r10
13113
- str ip, [sp, #20]
13536
+ ldr r0, .L2269+8
1311413537 bl printk
13115
- ldr ip, [sp, #20]
13116
-.L2236:
13117
- cmn ip, #1
13118
- beq .L2237
13119
- ldr r3, .L2270+12
13538
+.L2226:
13539
+ cmn r10, #1
13540
+ beq .L2227
13541
+ ldr r3, .L2269+12
1312013542 cmn r4, #1
13121
- moveq r4, ip
13122
- ldr r2, [r3, #-128]
13123
- ldr fp, [r3, #-120]
13124
- ldrb r3, [r7, #1172] @ zero_extendqisi2
13125
- str r2, [sp, #12]
13126
- add r3, r3, r3, asl #1
13127
- cmp ip, r3, asr #2
13128
- bcc .L2247
13129
-.L2237:
13130
- ldr r3, [sp, #16]
13543
+ moveq r4, r10
13544
+ ldr r2, [r3, #-120]
13545
+ ldr r3, [r3, #-112]
13546
+ str r2, [sp, #16]
13547
+ str r3, [sp, #20]
13548
+ ldrb r3, [r7, #1193] @ zero_extendqisi2
13549
+ add r3, r3, r3, lsl #1
13550
+ cmp r10, r3, asr #2
13551
+ bcc .L2245
13552
+.L2227:
13553
+ ldr r3, [sp, #24]
1313113554 add r5, r5, #1
13132
- cmp r5, r3
13133
- bne .L2240
13134
- b .L2239
13135
-.L2247:
13136
- mov r4, ip
13137
-.L2239:
13138
- ldr r3, .L2270
13139
- mov r0, r6
13555
+ cmp r3, r5
13556
+ bne .L2230
13557
+.L2229:
13558
+ ldr r3, .L2269
13559
+ ldrb r3, [r3, #1100] @ zero_extendqisi2
13560
+ cmp r3, #36
13561
+ moveq r2, #0
13562
+ beq .L2268
1314013563 mov r1, #0
13141
- ldrb r3, [r3, #1173] @ zero_extendqisi2
13564
+ mov r0, r6
13565
+ bl toshiba_3d_set_slc_rr_para
13566
+.L2232:
13567
+ ldr r3, .L2269
13568
+ ldrb r3, [r3, #1100] @ zero_extendqisi2
1314213569 cmp r3, #36
1314313570 bne .L2241
13144
- mov r2, #1
13145
-.L2269:
13146
- bl toshiba_tlc_set_rr_para
13147
- b .L2233
13148
-.L2241:
13149
- bl toshiba_3d_set_tlc_rr_para
13150
-.L2233:
13151
- ldr r3, .L2270
13152
- ldrb r3, [r3, #1173] @ zero_extendqisi2
13153
- cmp r3, #36
13154
- bne .L2242
13155
- ldr r3, [sp, #8]
13571
+ ldr r3, [sp, #12]
1315613572 mov r2, #85
13157
- add r3, r3, r8, asl #8
13573
+ add r3, r3, r8, lsl #8
1315813574 str r2, [r3, #2056]
1315913575 mov r2, #0
1316013576 str r2, [r3, #2052]
1316113577 str r2, [r3, #2048]
1316213578 mov r2, #255
1316313579 str r2, [r3, #2056]
13164
-.L2242:
13165
- ldrb r3, [r7, #1172] @ zero_extendqisi2
13166
- add r3, r3, r3, asl #1
13580
+.L2241:
13581
+ ldrb r3, [r7, #1193] @ zero_extendqisi2
13582
+ add r3, r3, r3, lsl #1
1316713583 cmp r4, r3, asr #2
13168
- bcc .L2243
13584
+ bcc .L2242
1316913585 cmn r4, #1
1317013586 movne r4, #256
13171
-.L2243:
13587
+.L2242:
1317213588 cmn r4, #1
1317313589 cmpne r4, #256
13174
- bne .L2244
13590
+ bne .L2243
1317513591 str r4, [sp]
13176
- mov r1, r8
13177
- ldr r0, .L2270+20
13178
- mov r2, r10
1317913592 mov r3, r5
13593
+ mov r2, r9
13594
+ mov r1, r8
13595
+ ldr r0, .L2269+16
1318013596 bl printk
13181
-.L2244:
13597
+.L2243:
1318213598 bl nandc_wait_flash_ready
1318313599 mov r0, r4
13184
- add sp, sp, #28
13600
+ add sp, sp, #36
1318513601 @ sp needed
13186
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13187
-.L2271:
13188
- .align 2
13602
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13603
+.L2224:
13604
+ uxtb r1, r5
13605
+ mov r0, r6
13606
+ bl toshiba_3d_set_slc_rr_para
13607
+ b .L2225
13608
+.L2245:
13609
+ mov r4, r10
13610
+ b .L2229
13611
+.L2239:
13612
+ ldr r3, .L2269
13613
+ ldrb r3, [r3, #1100] @ zero_extendqisi2
13614
+ cmp r3, #36
13615
+ bne .L2233
13616
+ mov r2, #1
13617
+ mov r1, r5
13618
+ mov r0, r6
13619
+ bl toshiba_tlc_set_rr_para
13620
+ mov r3, #93
13621
+.L2267:
13622
+ str r3, [fp, #2056]
13623
+ mov r1, r9
13624
+ ldr r3, [sp, #72]
13625
+ mov r0, r8
13626
+ ldr r2, [sp, #16]
13627
+ str r3, [sp]
13628
+ ldr r3, [sp, #20]
13629
+ bl flash_read_page
13630
+ ldr r3, .L2269+4
13631
+ mov r10, r0
13632
+ ldr r3, [r3]
13633
+ tst r3, #16
13634
+ beq .L2235
13635
+ mov r3, r0
13636
+ mov r2, r9
13637
+ mov r1, r5
13638
+ ldr r0, .L2269+20
13639
+ bl printk
13640
+.L2235:
13641
+ cmn r10, #1
13642
+ beq .L2236
13643
+ ldr r3, .L2269+12
13644
+ cmn r4, #1
13645
+ moveq r4, r10
13646
+ ldr r2, [r3, #-120]
13647
+ ldr r3, [r3, #-112]
13648
+ str r2, [sp, #16]
13649
+ str r3, [sp, #20]
13650
+ ldrb r3, [r7, #1193] @ zero_extendqisi2
13651
+ add r3, r3, r3, lsl #1
13652
+ cmp r10, r3, asr #2
13653
+ bcc .L2246
13654
+.L2236:
13655
+ ldr r3, [sp, #28]
13656
+ add r5, r5, #1
13657
+ cmp r3, r5
13658
+ bne .L2239
13659
+.L2238:
13660
+ ldr r3, .L2269
13661
+ ldrb r3, [r3, #1100] @ zero_extendqisi2
13662
+ cmp r3, #36
13663
+ bne .L2240
13664
+ mov r2, #1
13665
+.L2268:
13666
+ mov r1, #0
13667
+ mov r0, r6
13668
+ bl toshiba_tlc_set_rr_para
13669
+ b .L2232
13670
+.L2233:
13671
+ uxtb r1, r5
13672
+ mov r0, r6
13673
+ bl toshiba_3d_set_tlc_rr_para
13674
+ mov r3, #38
13675
+ b .L2267
13676
+.L2246:
13677
+ mov r4, r10
13678
+ b .L2238
13679
+.L2240:
13680
+ mov r1, #0
13681
+ mov r0, r6
13682
+ bl toshiba_3d_set_tlc_rr_para
13683
+ b .L2232
1318913684 .L2270:
13685
+ .align 2
13686
+.L2269:
1319013687 .word .LANCHOR0
1319113688 .word .LANCHOR2
1319213689 .word .LC153
1319313690 .word .LANCHOR3
13194
- .word .LC154
1319513691 .word .LC155
13692
+ .word .LC154
1319613693 .fnend
1319713694 .size toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
1319813695 .align 2
1319913696 .global toshiba_read_retrial
13697
+ .syntax unified
13698
+ .arm
13699
+ .fpu softvfp
1320013700 .type toshiba_read_retrial, %function
1320113701 toshiba_read_retrial:
1320213702 .fnstart
1320313703 @ args = 4, pretend = 0, frame = 24
1320413704 @ frame_needed = 0, uses_anonymous_args = 0
13205
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13705
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1320613706 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13707
+ mov r6, r0
1320713708 .pad #36
1320813709 sub sp, sp, #36
13209
- mov r5, r0
13210
- ldr r4, .L2305
13710
+ ldr r5, .L2303
13711
+ add r9, r6, #8
1321113712 str r3, [sp, #20]
13212
- add r9, r5, #8
1321313713 str r1, [sp, #12]
1321413714 str r2, [sp, #16]
1321513715 bl nandc_wait_flash_ready
13216
- mov r0, r5
13716
+ mov r0, r6
1321713717 bl zftl_flash_enter_slc_mode
13218
- mov r0, r5
13718
+ mov r0, r6
1321913719 bl zftl_flash_exit_slc_mode
13220
- ldrb r3, [r4, #1173] @ zero_extendqisi2
13221
- ldr r7, [r4, #1040]
13720
+ ldrb r3, [r5, #1100] @ zero_extendqisi2
13721
+ ldr r7, [r5, #1044]
1322213722 sub r3, r3, #67
1322313723 cmp r3, #1
13224
- add r9, r7, r9, asl #8
13225
- mov r3, r5, asl #8
13724
+ lsl r3, r6, #8
13725
+ add r9, r7, r9, lsl #8
1322613726 str r3, [sp, #24]
1322713727 movls r3, #0
1322813728 strls r3, [sp, #8]
13229
- bls .L2273
13230
- ldrb r6, [r4, #1135] @ zero_extendqisi2
13231
- cmp r6, #0
13232
- streq r6, [sp, #8]
13233
- beq .L2274
13729
+ bls .L2272
13730
+ ldrb r3, [r5, #1143] @ zero_extendqisi2
13731
+ cmp r3, #0
13732
+ beq .L2290
1323413733 mov r0, #1
1323513734 bl nandc_set_if_mode
1323613735 mov r3, #1
13736
+.L2290:
1323713737 str r3, [sp, #8]
13238
-.L2274:
13239
- ldr r3, [sp, #24]
13738
+ lsl r3, r6, #8
1324013739 mov r2, #92
1324113740 add r3, r7, r3
1324213741 str r2, [r3, #2056]
1324313742 mov r2, #197
1324413743 str r2, [r3, #2056]
13245
-.L2273:
13246
- ldr fp, .L2305+4
13744
+.L2272:
13745
+ ldr fp, .L2303+4
13746
+ lsl r3, r6, #8
1324713747 mov r8, #1
1324813748 mvn r10, #0
13249
- mov r3, r5, asl #8
1325013749 str r3, [sp, #28]
13251
-.L2275:
13252
- ldrb r3, [fp, #-116] @ zero_extendqisi2
13750
+.L2274:
13751
+ ldrb r3, [fp, #-108] @ zero_extendqisi2
1325313752 add r3, r3, #1
1325413753 cmp r8, r3
13255
- bcs .L2304
13256
- ldrb r3, [r4, #1173] @ zero_extendqisi2
13754
+ bcc .L2283
13755
+ mov r4, r10
13756
+.L2282:
13757
+ ldrb r3, [r5, #1100] @ zero_extendqisi2
13758
+ mov r1, #0
13759
+ mov r0, r9
13760
+ sub r3, r3, #67
13761
+ cmp r3, #1
13762
+ bhi .L2284
13763
+ bl sandisk_set_rr_para
13764
+.L2285:
13765
+ add r6, r7, r6, lsl #8
13766
+ mov r3, #255
13767
+ str r3, [r6, #2056]
13768
+ ldrb r3, [r5, #1193] @ zero_extendqisi2
13769
+ add r3, r3, r3, lsl #1
13770
+ cmp r4, r3, asr #2
13771
+ bcc .L2286
13772
+ cmn r4, #1
13773
+ movne r4, #256
13774
+.L2286:
13775
+ cmn r4, #1
13776
+ cmpne r4, #256
13777
+ bne .L2287
13778
+ str r4, [sp]
13779
+ mov r3, r8
13780
+ ldr r2, [sp, #12]
13781
+ mov r1, r8
13782
+ ldr r0, .L2303+8
13783
+ bl printk
13784
+.L2287:
13785
+ bl nandc_wait_flash_ready
13786
+ ldr r3, [sp, #8]
13787
+ cmp r3, #0
13788
+ beq .L2271
13789
+ mov r0, #4
13790
+ bl nandc_set_if_mode
13791
+.L2271:
13792
+ mov r0, r4
13793
+ add sp, sp, #36
13794
+ @ sp needed
13795
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13796
+.L2283:
13797
+ ldrb r3, [r5, #1100] @ zero_extendqisi2
1325713798 mov r0, r9
1325813799 uxtb r1, r8
1325913800 sub r3, r3, #67
1326013801 cmp r3, #1
13261
- bhi .L2276
13802
+ bhi .L2275
1326213803 bl sandisk_set_rr_para
13263
- b .L2277
1326413804 .L2276:
13265
- bl toshiba_set_rr_para
13266
-.L2277:
13267
- ldrb r3, [r4, #1173] @ zero_extendqisi2
13805
+ ldrb r3, [r5, #1100] @ zero_extendqisi2
1326813806 cmp r3, #34
13269
- bne .L2278
13270
- ldr r3, .L2305+4
13271
- ldrb r3, [r3, #-116] @ zero_extendqisi2
13807
+ bne .L2277
13808
+ ldr r3, .L2303+4
13809
+ ldrb r3, [r3, #-108] @ zero_extendqisi2
1327213810 sub r3, r3, #3
1327313811 cmp r8, r3
1327413812 ldreq r3, [sp, #28]
1327513813 moveq r2, #179
1327613814 addeq r3, r7, r3
1327713815 streq r2, [r3, #2056]
13278
-.L2278:
13816
+.L2277:
1327913817 ldr r3, [sp, #24]
1328013818 mov r2, #38
1328113819 add r1, sp, #12
13282
- mov r0, r5
13820
+ mov r0, r6
1328313821 add r3, r7, r3
1328413822 str r2, [r3, #2056]
1328513823 mov r2, #93
1328613824 str r2, [r3, #2056]
1328713825 ldr r3, [sp, #72]
1328813826 str r3, [sp]
13289
- ldmia r1, {r1, r2, r3}
13827
+ ldm r1, {r1, r2, r3}
1329013828 bl flash_read_page
1329113829 cmn r0, #1
13292
- mov r6, r0
13293
- beq .L2281
13294
- ldr r3, [fp, #-128]
13830
+ mov r4, r0
13831
+ beq .L2280
13832
+ ldr r3, [fp, #-120]
1329513833 cmn r10, #1
1329613834 moveq r10, r0
1329713835 str r3, [sp, #16]
13298
- ldr r3, [fp, #-120]
13836
+ ldr r3, [fp, #-112]
1329913837 str r3, [sp, #20]
13300
- ldrb r3, [r4, #1172] @ zero_extendqisi2
13301
- add r3, r3, r3, asl #1
13838
+ ldrb r3, [r5, #1193] @ zero_extendqisi2
13839
+ add r3, r3, r3, lsl #1
1330213840 cmp r0, r3, asr #2
13303
- bcc .L2283
13304
-.L2281:
13841
+ bcc .L2282
13842
+.L2280:
1330513843 add r8, r8, #1
13306
- b .L2275
13307
-.L2304:
13308
- mov r6, r10
13309
-.L2283:
13310
- ldrb r3, [r4, #1173] @ zero_extendqisi2
13311
- mov r0, r9
13312
- mov r1, #0
13313
- sub r3, r3, #67
13314
- cmp r3, #1
13315
- bhi .L2285
13316
- bl sandisk_set_rr_para
13317
- b .L2286
13318
-.L2285:
13844
+ b .L2274
13845
+.L2275:
1331913846 bl toshiba_set_rr_para
13320
-.L2286:
13321
- add r5, r7, r5, asl #8
13322
- mov r3, #255
13323
- str r3, [r5, #2056]
13324
- ldrb r3, [r4, #1172] @ zero_extendqisi2
13325
- add r3, r3, r3, asl #1
13326
- cmp r6, r3, asr #2
13327
- bcc .L2287
13328
- cmn r6, #1
13329
- movne r6, #256
13330
-.L2287:
13331
- cmn r6, #1
13332
- cmpne r6, #256
13333
- bne .L2288
13334
- str r6, [sp]
13335
- mov r1, r8
13336
- ldr r0, .L2305+8
13337
- mov r3, r8
13338
- ldr r2, [sp, #12]
13339
- bl printk
13340
-.L2288:
13341
- bl nandc_wait_flash_ready
13342
- ldr r3, [sp, #8]
13343
- cmp r3, #0
13344
- beq .L2289
13345
- mov r0, #4
13346
- bl nandc_set_if_mode
13347
-.L2289:
13348
- mov r0, r6
13349
- add sp, sp, #36
13350
- @ sp needed
13351
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13352
-.L2306:
13847
+ b .L2276
13848
+.L2284:
13849
+ bl toshiba_set_rr_para
13850
+ b .L2285
13851
+.L2304:
1335313852 .align 2
13354
-.L2305:
13853
+.L2303:
1335513854 .word .LANCHOR0
1335613855 .word .LANCHOR3
1335713856 .word .LC155
....@@ -13359,129 +13858,131 @@
1335913858 .size toshiba_read_retrial, .-toshiba_read_retrial
1336013859 .align 2
1336113860 .global ymtc_3d_read_retrial
13861
+ .syntax unified
13862
+ .arm
13863
+ .fpu softvfp
1336213864 .type ymtc_3d_read_retrial, %function
1336313865 ymtc_3d_read_retrial:
1336413866 .fnstart
1336513867 @ args = 4, pretend = 0, frame = 8
1336613868 @ frame_needed = 0, uses_anonymous_args = 0
13367
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13869
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1336813870 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13369
- mov r8, r0
13871
+ mov r7, r0
1337013872 .pad #20
1337113873 sub sp, sp, #20
13372
- ldr r6, .L2337
13373
- mov r9, r1
13374
- mov fp, r3
13375
- mov r10, r2
13874
+ mov r8, r1
13875
+ mov r9, r2
13876
+ mov r10, r3
1337613877 bl nandc_wait_flash_ready
13377
- mov r0, r8
13378
- add r7, r8, #8
13379
- bl zftl_flash_enter_slc_mode
13380
- mov r0, r8
13381
- bl zftl_flash_exit_slc_mode
13382
- ldr r3, [r6, #1040]
13383
- tst r9, #50331648
13384
- mvn r4, #0
13385
- add r7, r3, r7, asl #8
13386
- mov r5, #1
13387
- ldr ip, .L2337+4
13388
- bne .L2317
13389
-.L2312:
1339013878 mov r0, r7
13879
+ mvn r4, #0
13880
+ bl zftl_flash_enter_slc_mode
13881
+ mov r0, r7
13882
+ mov r5, #1
13883
+ bl zftl_flash_exit_slc_mode
13884
+ ldr r3, .L2334
13885
+ tst r8, #50331648
13886
+ add r2, r7, #8
13887
+ ldr fp, .L2334+4
13888
+ ldr r6, [r3, #1044]
13889
+ str r3, [sp, #12]
13890
+ add r6, r6, r2, lsl #8
13891
+ bne .L2315
13892
+.L2310:
1339113893 uxtb r1, r5
13392
- str ip, [sp, #12]
13894
+ mov r0, r6
1339313895 bl ymtc_3d_set_slc_rr_para
13394
- mov r0, r8
13395
- mov r1, r9
13396
- mov r2, r10
1339713896 ldr r3, [sp, #56]
13897
+ mov r2, r9
13898
+ mov r1, r8
13899
+ mov r0, r7
1339813900 str r3, [sp]
13399
- mov r3, fp
13901
+ mov r3, r10
1340013902 bl flash_read_page
1340113903 cmn r0, #1
13402
- ldr ip, [sp, #12]
13403
- beq .L2309
13404
- ldrb r3, [r6, #1172] @ zero_extendqisi2
13904
+ beq .L2307
13905
+ ldr r3, [sp, #12]
1340513906 cmn r4, #1
13406
- ldr r10, [ip, #-128]
1340713907 moveq r4, r0
13408
- ldr fp, [ip, #-120]
13409
- add r3, r3, r3, asl #1
13908
+ ldr r9, [fp, #-120]
13909
+ ldr r10, [fp, #-112]
13910
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
13911
+ add r3, r3, r3, lsl #1
1341013912 cmp r0, r3, asr #2
13411
- bcc .L2320
13412
-.L2309:
13913
+ bcc .L2318
13914
+.L2307:
1341313915 add r5, r5, #1
1341413916 cmp r5, #10
13415
- bne .L2312
13416
- b .L2311
13417
-.L2320:
13418
- mov r4, r0
13419
-.L2311:
13420
- mov r0, r7
13917
+ bne .L2310
13918
+.L2309:
1342113919 mov r1, #0
13920
+ mov r0, r6
1342213921 bl ymtc_3d_set_slc_rr_para
13423
- b .L2313
13424
-.L2336:
13425
- ldrb r3, [r6, #1172] @ zero_extendqisi2
13426
- cmn r4, #1
13427
- ldr r10, [ip, #-128]
13428
- moveq r4, r0
13429
- ldr fp, [ip, #-120]
13430
- add r3, r3, r3, asl #1
13431
- cmp r0, r3, asr #2
13432
- bcc .L2321
13433
-.L2314:
13434
- add r5, r5, #1
13435
- cmp r5, #51
13436
- beq .L2316
13437
-.L2317:
13438
- mov r0, r7
13439
- uxtb r1, r5
13440
- str ip, [sp, #12]
13441
- bl ymtc_3d_set_tlc_rr_para
13442
- mov r0, r8
13443
- mov r1, r9
13444
- mov r2, r10
13445
- ldr r3, [sp, #56]
13446
- str r3, [sp]
13447
- mov r3, fp
13448
- bl flash_read_page
13449
- cmn r0, #1
13450
- ldr ip, [sp, #12]
13451
- bne .L2336
13452
- b .L2314
13453
-.L2321:
13454
- mov r4, r0
13455
-.L2316:
13456
- mov r0, r7
13457
- mov r1, #0
13458
- bl ymtc_3d_set_tlc_rr_para
13459
-.L2313:
13460
- ldrb r3, [r6, #1172] @ zero_extendqisi2
13461
- add r3, r3, r3, asl #1
13922
+.L2311:
13923
+ ldr r3, [sp, #12]
13924
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
13925
+ add r3, r3, r3, lsl #1
1346213926 cmp r4, r3, asr #2
13463
- bcc .L2318
13927
+ bcc .L2316
1346413928 cmn r4, #1
1346513929 movne r4, #256
13466
-.L2318:
13930
+.L2316:
1346713931 cmn r4, #1
1346813932 cmpne r4, #256
13469
- bne .L2319
13933
+ bne .L2317
1347013934 str r4, [sp]
13471
- mov r1, r5
13472
- ldr r0, .L2337+8
13473
- mov r2, r9
1347413935 mov r3, r5
13936
+ mov r2, r8
13937
+ mov r1, r5
13938
+ ldr r0, .L2334+8
1347513939 bl printk
13476
-.L2319:
13940
+.L2317:
1347713941 bl nandc_wait_flash_ready
1347813942 mov r0, r4
1347913943 add sp, sp, #20
1348013944 @ sp needed
13481
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13482
-.L2338:
13945
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13946
+.L2318:
13947
+ mov r4, r0
13948
+ b .L2309
13949
+.L2315:
13950
+ uxtb r1, r5
13951
+ mov r0, r6
13952
+ bl ymtc_3d_set_tlc_rr_para
13953
+ ldr r3, [sp, #56]
13954
+ mov r2, r9
13955
+ mov r1, r8
13956
+ mov r0, r7
13957
+ str r3, [sp]
13958
+ mov r3, r10
13959
+ bl flash_read_page
13960
+ cmn r0, #1
13961
+ beq .L2312
13962
+ ldr r3, [sp, #12]
13963
+ cmn r4, #1
13964
+ moveq r4, r0
13965
+ ldr r9, [fp, #-120]
13966
+ ldr r10, [fp, #-112]
13967
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
13968
+ add r3, r3, r3, lsl #1
13969
+ cmp r0, r3, asr #2
13970
+ bcc .L2319
13971
+.L2312:
13972
+ add r5, r5, #1
13973
+ cmp r5, #51
13974
+ bne .L2315
13975
+.L2314:
13976
+ mov r1, #0
13977
+ mov r0, r6
13978
+ bl ymtc_3d_set_tlc_rr_para
13979
+ b .L2311
13980
+.L2319:
13981
+ mov r4, r0
13982
+ b .L2314
13983
+.L2335:
1348313984 .align 2
13484
-.L2337:
13985
+.L2334:
1348513986 .word .LANCHOR0
1348613987 .word .LANCHOR3
1348713988 .word .LC156
....@@ -13489,425 +13990,408 @@
1348913990 .size ymtc_3d_read_retrial, .-ymtc_3d_read_retrial
1349013991 .align 2
1349113992 .global samsung_read_retrial
13993
+ .syntax unified
13994
+ .arm
13995
+ .fpu softvfp
1349213996 .type samsung_read_retrial, %function
1349313997 samsung_read_retrial:
1349413998 .fnstart
1349513999 @ args = 4, pretend = 0, frame = 16
1349614000 @ frame_needed = 0, uses_anonymous_args = 0
13497
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14001
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1349814002 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14003
+ mov r9, r0
1349914004 .pad #28
1350014005 sub sp, sp, #28
13501
- mov r7, r0
13502
- mov r8, r1
13503
- str r3, [sp, #12]
13504
- str r2, [sp, #8]
13505
- bl nandc_wait_flash_ready
13506
- mov r0, r7
13507
- bl zftl_flash_enter_slc_mode
13508
- mov r0, r7
13509
- bl zftl_flash_exit_slc_mode
13510
- ldr r3, .L2377
13511
- tst r8, #50331648
13512
- ldr r4, [r3, #1040]
13513
- str r3, [sp, #16]
13514
- bne .L2340
13515
- mov r10, r7, asl #8
13516
- mvn r5, #0
13517
- add r9, r4, r10
13518
- mov r6, #1
13519
- mov fp, #239
13520
-.L2345:
13521
- str fp, [r9, #2056]
13522
- mov r3, #141
13523
- str r3, [r9, #2052]
13524
- ldr r3, .L2377+4
13525
- ldrsb r3, [r6, r3]
13526
- str r3, [r9, #2048]
13527
- mov r3, #0
13528
- str r3, [r9, #2048]
13529
- str r3, [r9, #2048]
13530
- str r3, [r9, #2048]
13531
- bl nandc_wait_flash_ready
13532
- mov r0, r7
13533
- mov r1, r8
13534
- ldr r3, [sp, #64]
13535
- ldr r2, [sp, #8]
13536
- str r3, [sp]
13537
- ldr r3, [sp, #12]
13538
- bl flash_read_page
13539
- ldr r3, .L2377+8
13540
- ldr r3, [r3]
13541
- tst r3, #16
13542
- mov ip, r0
13543
- beq .L2341
13544
- mov r3, ip
13545
- ldr r0, .L2377+12
13546
- mov r1, r6
13547
- mov r2, r8
13548
- str ip, [sp, #20]
13549
- bl printk
13550
- ldr ip, [sp, #20]
13551
-.L2341:
13552
- cmn ip, #1
13553
- beq .L2342
13554
- ldr r3, .L2377+16
13555
- cmn r5, #1
13556
- moveq r5, ip
13557
- ldr r2, [r3, #-128]
13558
- ldr r3, [r3, #-120]
13559
- str r2, [sp, #8]
13560
- str r3, [sp, #12]
13561
- ldr r3, [sp, #16]
13562
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13563
- add r3, r3, r3, asl #1
13564
- cmp ip, r3, asr #2
13565
- bcc .L2354
13566
-.L2342:
13567
- add r6, r6, #1
13568
- cmp r6, #26
13569
- bne .L2345
13570
- b .L2344
13571
-.L2354:
13572
- mov r5, ip
13573
-.L2344:
13574
- add r10, r4, r10
13575
- mov r3, #239
13576
- add r4, r4, r7, asl #8
13577
- str r3, [r10, #2056]
13578
- mov r3, #141
13579
- b .L2376
13580
-.L2340:
13581
- mov r3, r7, asl #8
13582
- ldr r9, .L2377+20
13583
- add r10, r4, r3
13584
- mvn r5, #0
13585
- mov r6, #1
13586
- str r3, [sp, #20]
13587
-.L2351:
13588
- mov r3, #239
13589
- str r3, [r10, #2056]
13590
- mov r3, #137
13591
- str r3, [r10, #2052]
13592
- ldrb r3, [r9, #4] @ zero_extendqisi2
13593
- str r3, [r10, #2048]
13594
- ldrb r3, [r9, #5] @ zero_extendqisi2
13595
- str r3, [r10, #2048]
13596
- ldrb r3, [r9, #6] @ zero_extendqisi2
13597
- str r3, [r10, #2048]
13598
- ldrb r3, [r9, #7] @ zero_extendqisi2
13599
- str r3, [r10, #2048]
13600
- bl nandc_wait_flash_ready
13601
- mov r0, r7
13602
- mov r1, r8
13603
- ldr r3, [sp, #64]
13604
- ldr r2, [sp, #8]
13605
- str r3, [sp]
13606
- ldr r3, [sp, #12]
13607
- bl flash_read_page
13608
- ldr r3, .L2377+8
13609
- ldr r3, [r3]
13610
- tst r3, #16
13611
- mov fp, r0
13612
- beq .L2347
13613
- ldr r0, .L2377+24
13614
- mov r1, r6
13615
- mov r2, r8
13616
- mov r3, fp
13617
- bl printk
13618
-.L2347:
13619
- cmn fp, #1
13620
- beq .L2348
13621
- ldr r3, .L2377+16
13622
- cmn r5, #1
13623
- moveq r5, fp
13624
- ldr r2, [r3, #-128]
13625
- ldr r3, [r3, #-120]
13626
- str r2, [sp, #8]
13627
- str r3, [sp, #12]
13628
- ldr r3, [sp, #16]
13629
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13630
- add r3, r3, r3, asl #1
13631
- cmp fp, r3, asr #2
13632
- bcc .L2355
13633
-.L2348:
13634
- add r6, r6, #1
13635
- add r9, r9, #4
13636
- cmp r6, #26
13637
- bne .L2351
13638
- b .L2350
13639
-.L2355:
13640
- mov r5, fp
13641
-.L2350:
13642
- ldr r3, [sp, #20]
13643
- mov r2, #239
13644
- add r3, r4, r3
13645
- add r4, r4, r7, asl #8
13646
- str r2, [r3, #2056]
13647
- mov r3, #137
13648
-.L2376:
13649
- str r3, [r4, #2052]
13650
- mov r3, #0
13651
- str r3, [r4, #2048]
13652
- str r3, [r4, #2048]
13653
- str r3, [r4, #2048]
13654
- str r3, [r4, #2048]
13655
- bl nandc_wait_flash_ready
13656
- ldr r3, [sp, #16]
13657
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13658
- add r3, r3, r3, asl #1
13659
- cmp r5, r3, asr #2
13660
- bcc .L2352
13661
- cmn r5, #1
13662
- movne r5, #256
13663
-.L2352:
13664
- cmn r5, #1
13665
- cmpne r5, #256
13666
- bne .L2353
13667
- str r5, [sp]
13668
- mov r1, r6
13669
- ldr r0, .L2377+28
13670
- mov r2, r8
13671
- mov r3, r6
13672
- bl printk
13673
-.L2353:
13674
- bl nandc_wait_flash_ready
13675
- mov r0, r5
13676
- add sp, sp, #28
13677
- @ sp needed
13678
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13679
-.L2378:
13680
- .align 2
13681
-.L2377:
13682
- .word .LANCHOR0
13683
- .word .LANCHOR1+1928
13684
- .word .LANCHOR2
13685
- .word .LC157
13686
- .word .LANCHOR3
13687
- .word .LANCHOR1+1956
13688
- .word .LC158
13689
- .word .LC159
13690
- .fnend
13691
- .size samsung_read_retrial, .-samsung_read_retrial
13692
- .align 2
13693
- .global hynix_read_retrial
13694
- .type hynix_read_retrial, %function
13695
-hynix_read_retrial:
13696
- .fnstart
13697
- @ args = 4, pretend = 0, frame = 16
13698
- @ frame_needed = 0, uses_anonymous_args = 0
13699
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13700
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14006
+ mov r7, r1
1370114007 mov fp, r3
13702
- ldr r3, .L2398
13703
- .pad #28
13704
- sub sp, sp, #28
13705
- mov r10, r2
13706
- mov r6, r0
13707
- mov r8, r1
13708
- mov r7, #0
13709
- ldr r2, [r3, #1176]
13710
- mvn r4, #0
13711
- str r3, [sp, #16]
13712
- add r3, r2, r0
13713
- str r3, [sp, #12]
13714
- ldrb r9, [r2, #114] @ zero_extendqisi2
13715
- ldrb r5, [r3, #120] @ zero_extendqisi2
14008
+ str r2, [sp, #16]
1371614009 bl nandc_wait_flash_ready
13717
- mov r0, r6
14010
+ mov r0, r9
1371814011 bl zftl_flash_enter_slc_mode
13719
- mov r0, r6
14012
+ mov r0, r9
1372014013 bl zftl_flash_exit_slc_mode
13721
- ldr ip, .L2398+4
13722
-.L2380:
13723
- cmp r7, r9
13724
- bcs .L2384
13725
- add r5, r5, #1
13726
- mov r0, r6
13727
- str ip, [sp, #20]
13728
- uxtb r5, r5
13729
- cmp r5, r9
13730
- movcs r5, #0
13731
- mov r1, r5
13732
- bl hynix_set_rr_para
13733
- mov r0, r6
13734
- mov r1, r8
13735
- mov r2, r10
14014
+ ldr r3, .L2374
14015
+ tst r7, #50331648
14016
+ ldr r2, [r3, #1044]
14017
+ str r3, [sp, #20]
14018
+ str r2, [sp, #12]
14019
+ bne .L2337
14020
+ lsl r10, r9, #8
14021
+ mvn r4, #0
14022
+ mov r5, #1
14023
+ add r6, r2, r10
14024
+.L2342:
14025
+ mov r3, #239
14026
+ str r3, [r6, #2056]
14027
+ mov r3, #141
14028
+ str r3, [r6, #2052]
14029
+ ldr r3, .L2374+4
14030
+ ldrsb r3, [r5, r3]
14031
+ str r3, [r6, #2048]
14032
+ mov r3, #0
14033
+ str r3, [r6, #2048]
14034
+ str r3, [r6, #2048]
14035
+ str r3, [r6, #2048]
14036
+ bl nandc_wait_flash_ready
1373614037 ldr r3, [sp, #64]
14038
+ mov r1, r7
14039
+ ldr r2, [sp, #16]
14040
+ mov r0, r9
1373714041 str r3, [sp]
1373814042 mov r3, fp
1373914043 bl flash_read_page
13740
- cmn r0, #1
13741
- ldr ip, [sp, #20]
13742
- beq .L2382
13743
- ldr r3, [sp, #16]
14044
+ ldr r3, .L2374+8
14045
+ mov r8, r0
14046
+ ldr r3, [r3]
14047
+ tst r3, #16
14048
+ beq .L2338
14049
+ mov r3, r0
14050
+ mov r2, r7
14051
+ mov r1, r5
14052
+ ldr r0, .L2374+12
14053
+ bl printk
14054
+.L2338:
14055
+ cmn r8, #1
14056
+ beq .L2339
14057
+ ldr r3, .L2374+16
1374414058 cmn r4, #1
13745
- ldr r10, [ip, #-128]
13746
- moveq r4, r0
13747
- ldr fp, [ip, #-120]
13748
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13749
- add r3, r3, r3, asl #1
13750
- cmp r0, r3, asr #2
13751
- bcc .L2388
13752
-.L2382:
13753
- add r7, r7, #1
13754
- b .L2380
13755
-.L2388:
13756
- mov r4, r0
13757
-.L2384:
14059
+ moveq r4, r8
14060
+ ldr r2, [r3, #-120]
14061
+ ldr fp, [r3, #-112]
14062
+ ldr r3, [sp, #20]
14063
+ str r2, [sp, #16]
14064
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
14065
+ add r3, r3, r3, lsl #1
14066
+ cmp r8, r3, asr #2
14067
+ bcc .L2351
14068
+.L2339:
14069
+ add r5, r5, #1
14070
+ cmp r5, #26
14071
+ bne .L2342
14072
+.L2341:
1375814073 ldr r3, [sp, #12]
13759
- strb r5, [r3, #120]
13760
- ldr r3, [sp, #16]
13761
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13762
- add r3, r3, r3, asl #1
14074
+ add r10, r3, r10
14075
+ mov r3, #239
14076
+ str r3, [r10, #2056]
14077
+ mov r3, #141
14078
+.L2373:
14079
+ str r3, [r6, #2052]
14080
+ mov r3, #0
14081
+ str r3, [r6, #2048]
14082
+ str r3, [r6, #2048]
14083
+ str r3, [r6, #2048]
14084
+ str r3, [r6, #2048]
14085
+ bl nandc_wait_flash_ready
14086
+ ldr r3, .L2374
14087
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
14088
+ add r3, r3, r3, lsl #1
1376314089 cmp r4, r3, asr #2
13764
- bcc .L2386
14090
+ bcc .L2349
1376514091 cmn r4, #1
1376614092 movne r4, #256
13767
-.L2386:
14093
+.L2349:
1376814094 cmn r4, #1
1376914095 cmpne r4, #256
13770
- bne .L2387
14096
+ bne .L2350
1377114097 str r4, [sp]
13772
- mov r1, r7
13773
- ldr r0, .L2398+8
13774
- mov r2, r8
13775
- mov r3, r7
14098
+ mov r3, r5
14099
+ mov r2, r7
14100
+ mov r1, r5
14101
+ ldr r0, .L2374+20
1377614102 bl printk
13777
-.L2387:
14103
+.L2350:
1377814104 bl nandc_wait_flash_ready
1377914105 mov r0, r4
1378014106 add sp, sp, #28
1378114107 @ sp needed
13782
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13783
-.L2399:
14108
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14109
+.L2351:
14110
+ mov r4, r8
14111
+ b .L2341
14112
+.L2337:
14113
+ lsl r3, r9, #8
14114
+ lsl r2, r9, #8
14115
+ ldr r8, .L2374+24
14116
+ str r3, [sp, #20]
14117
+ mvn r4, #0
14118
+ ldr r3, [sp, #12]
14119
+ mov r5, #1
14120
+ add r6, r3, r2
14121
+.L2348:
14122
+ mov r3, #239
14123
+ str r3, [r6, #2056]
14124
+ mov r3, #137
14125
+ str r3, [r6, #2052]
14126
+ ldrb r3, [r8, #4] @ zero_extendqisi2
14127
+ str r3, [r6, #2048]
14128
+ ldrb r3, [r8, #5] @ zero_extendqisi2
14129
+ str r3, [r6, #2048]
14130
+ ldrb r3, [r8, #6] @ zero_extendqisi2
14131
+ str r3, [r6, #2048]
14132
+ ldrb r3, [r8, #7] @ zero_extendqisi2
14133
+ str r3, [r6, #2048]
14134
+ bl nandc_wait_flash_ready
14135
+ ldr r3, [sp, #64]
14136
+ mov r1, r7
14137
+ ldr r2, [sp, #16]
14138
+ mov r0, r9
14139
+ str r3, [sp]
14140
+ mov r3, fp
14141
+ bl flash_read_page
14142
+ ldr r3, .L2374+8
14143
+ mov r10, r0
14144
+ ldr r3, [r3]
14145
+ tst r3, #16
14146
+ beq .L2344
14147
+ mov r3, r0
14148
+ mov r2, r7
14149
+ mov r1, r5
14150
+ ldr r0, .L2374+28
14151
+ bl printk
14152
+.L2344:
14153
+ cmn r10, #1
14154
+ beq .L2345
14155
+ ldr r3, .L2374+16
14156
+ cmn r4, #1
14157
+ moveq r4, r10
14158
+ ldr r2, [r3, #-120]
14159
+ ldr fp, [r3, #-112]
14160
+ ldr r3, .L2374
14161
+ str r2, [sp, #16]
14162
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
14163
+ add r3, r3, r3, lsl #1
14164
+ cmp r10, r3, asr #2
14165
+ bcc .L2352
14166
+.L2345:
14167
+ add r5, r5, #1
14168
+ add r8, r8, #4
14169
+ cmp r5, #26
14170
+ bne .L2348
14171
+.L2347:
14172
+ ldr r3, [sp, #12]
14173
+ ldr r2, [sp, #20]
14174
+ add r10, r3, r2
14175
+ mov r3, #239
14176
+ str r3, [r10, #2056]
14177
+ mov r3, #137
14178
+ b .L2373
14179
+.L2352:
14180
+ mov r4, r10
14181
+ b .L2347
14182
+.L2375:
1378414183 .align 2
13785
-.L2398:
14184
+.L2374:
1378614185 .word .LANCHOR0
14186
+ .word .LANCHOR1+1752
14187
+ .word .LANCHOR2
14188
+ .word .LC157
1378714189 .word .LANCHOR3
14190
+ .word .LC159
14191
+ .word .LANCHOR1+1778
14192
+ .word .LC158
14193
+ .fnend
14194
+ .size samsung_read_retrial, .-samsung_read_retrial
14195
+ .align 2
14196
+ .global hynix_read_retrial
14197
+ .syntax unified
14198
+ .arm
14199
+ .fpu softvfp
14200
+ .type hynix_read_retrial, %function
14201
+hynix_read_retrial:
14202
+ .fnstart
14203
+ @ args = 4, pretend = 0, frame = 8
14204
+ @ frame_needed = 0, uses_anonymous_args = 0
14205
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14206
+ .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14207
+ mov r10, r3
14208
+ ldr fp, .L2395
14209
+ mov r9, r2
14210
+ .pad #20
14211
+ sub sp, sp, #20
14212
+ mov r6, r0
14213
+ mov r8, r1
14214
+ mov r7, #0
14215
+ ldr r3, [fp, #1040]
14216
+ mvn r4, #0
14217
+ add r2, r3, r0
14218
+ ldrb r3, [r3, #114] @ zero_extendqisi2
14219
+ str r2, [sp, #12]
14220
+ ldrb r5, [r2, #120] @ zero_extendqisi2
14221
+ str r3, [sp, #8]
14222
+ bl nandc_wait_flash_ready
14223
+ mov r0, r6
14224
+ bl zftl_flash_enter_slc_mode
14225
+ mov r0, r6
14226
+ bl zftl_flash_exit_slc_mode
14227
+.L2377:
14228
+ ldr r3, [sp, #8]
14229
+ cmp r7, r3
14230
+ bcc .L2382
14231
+.L2381:
14232
+ ldr r3, [sp, #12]
14233
+ strb r5, [r3, #120]
14234
+ ldrb r3, [fp, #1193] @ zero_extendqisi2
14235
+ add r3, r3, r3, lsl #1
14236
+ cmp r4, r3, asr #2
14237
+ bcc .L2383
14238
+ cmn r4, #1
14239
+ movne r4, #256
14240
+.L2383:
14241
+ cmn r4, #1
14242
+ cmpne r4, #256
14243
+ bne .L2384
14244
+ str r4, [sp]
14245
+ mov r3, r7
14246
+ mov r2, r8
14247
+ mov r1, r7
14248
+ ldr r0, .L2395+4
14249
+ bl printk
14250
+.L2384:
14251
+ bl nandc_wait_flash_ready
14252
+ mov r0, r4
14253
+ add sp, sp, #20
14254
+ @ sp needed
14255
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14256
+.L2382:
14257
+ ldr r3, [sp, #8]
14258
+ add r5, r5, #1
14259
+ uxtb r5, r5
14260
+ mov r0, r6
14261
+ cmp r3, r5
14262
+ movls r5, #0
14263
+ mov r1, r5
14264
+ bl hynix_set_rr_para
14265
+ ldr r3, [sp, #56]
14266
+ mov r2, r9
14267
+ mov r1, r8
14268
+ mov r0, r6
14269
+ str r3, [sp]
14270
+ mov r3, r10
14271
+ bl flash_read_page
14272
+ cmn r0, #1
14273
+ beq .L2379
14274
+ ldr r3, .L2395+8
14275
+ cmn r4, #1
14276
+ moveq r4, r0
14277
+ ldr r9, [r3, #-120]
14278
+ ldr r10, [r3, #-112]
14279
+ ldrb r3, [fp, #1193] @ zero_extendqisi2
14280
+ add r3, r3, r3, lsl #1
14281
+ cmp r0, r3, asr #2
14282
+ bcc .L2385
14283
+.L2379:
14284
+ add r7, r7, #1
14285
+ b .L2377
14286
+.L2385:
14287
+ mov r4, r0
14288
+ b .L2381
14289
+.L2396:
14290
+ .align 2
14291
+.L2395:
14292
+ .word .LANCHOR0
1378814293 .word .LC160
14294
+ .word .LANCHOR3
1378914295 .fnend
1379014296 .size hynix_read_retrial, .-hynix_read_retrial
1379114297 .align 2
1379214298 .global flash_ddr_tuning_read
14299
+ .syntax unified
14300
+ .arm
14301
+ .fpu softvfp
1379314302 .type flash_ddr_tuning_read, %function
1379414303 flash_ddr_tuning_read:
1379514304 .fnstart
1379614305 @ args = 4, pretend = 0, frame = 24
1379714306 @ frame_needed = 0, uses_anonymous_args = 0
13798
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14307
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1379914308 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
13800
- .pad #36
13801
- sub sp, sp, #36
13802
- mov r8, r0
13803
- mov r10, r1
13804
- mov fp, r2
13805
- str r3, [sp, #16]
13806
- bl nandc_get_ddr_para
1380714309 mov r4, #0
1380814310 mov r5, r4
1380914311 mov r6, #1024
1381014312 mov r7, #6
13811
- mvn r9, #0
13812
- str r0, [sp, #24]
13813
- str r4, [sp, #20]
14313
+ mvn r10, #0
14314
+ .pad #36
14315
+ sub sp, sp, #36
14316
+ mov r8, r0
14317
+ mov fp, r1
14318
+ str r2, [sp, #16]
14319
+ str r3, [sp, #20]
14320
+ bl nandc_get_ddr_para
14321
+ str r0, [sp, #28]
14322
+ str r4, [sp, #24]
1381414323 str r4, [sp, #12]
13815
-.L2406:
14324
+.L2403:
1381614325 uxtb r0, r7
1381714326 bl nandc_set_ddr_para
13818
- mov r0, r8
13819
- mov r1, r10
13820
- mov r2, fp
1382114327 ldr r3, [sp, #72]
14328
+ mov r1, fp
14329
+ ldr r2, [sp, #16]
14330
+ mov r0, r8
1382214331 str r3, [sp]
13823
- ldr r3, [sp, #16]
14332
+ ldr r3, [sp, #20]
1382414333 bl flash_read_page
13825
- ldr r3, .L2427
14334
+ ldr r3, .L2424
14335
+ mov r9, r0
1382614336 ldr r3, [r3]
1382714337 tst r3, #16
13828
- mov ip, r0
13829
- beq .L2401
13830
- mov r3, ip
13831
- ldr r0, .L2427+4
14338
+ beq .L2398
14339
+ mov r3, r0
14340
+ mov r2, fp
1383214341 mov r1, r7
13833
- mov r2, r10
13834
- str ip, [sp, #28]
14342
+ ldr r0, .L2424+4
1383514343 bl printk
13836
- ldr ip, [sp, #28]
13837
-.L2401:
14344
+.L2398:
1383814345 add r3, r6, #1
13839
- cmp ip, r3
13840
- bhi .L2402
13841
- ldr r3, .L2427+8
13842
- ldr fp, [r3, #-128]
14346
+ cmp r9, r3
14347
+ bhi .L2399
14348
+ ldr r3, .L2424+8
1384314349 ldr r3, [r3, #-120]
1384414350 str r3, [sp, #16]
13845
- ldr r3, .L2427+12
13846
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13847
- cmp ip, r3, lsr #2
13848
- bcs .L2412
14351
+ ldr r3, .L2424+8
14352
+ ldr r3, [r3, #-112]
14353
+ str r3, [sp, #20]
14354
+ ldr r3, .L2424+12
14355
+ ldrb r3, [r3, #1193] @ zero_extendqisi2
14356
+ cmp r9, r3, lsr #2
14357
+ bcs .L2409
1384914358 add r5, r5, #1
1385014359 cmp r5, #7
13851
- bls .L2412
13852
- rsb r4, r5, r7
13853
- mov r6, ip
13854
- mov r9, #0
13855
- b .L2404
13856
-.L2402:
13857
- ldr r3, [sp, #12]
13858
- cmp r3, r5
13859
- bcs .L2413
13860
- cmp r5, #7
13861
- rsb r3, r5, r4
13862
- str r3, [sp, #20]
13863
- bhi .L2405
13864
- str r5, [sp, #12]
13865
- b .L2413
13866
-.L2412:
13867
- mov r4, r7
13868
- mov r6, ip
13869
- mov r9, #0
13870
- b .L2403
13871
-.L2413:
13872
- mov r5, #0
13873
-.L2403:
13874
- add r7, r7, #2
13875
- cmp r7, #50
13876
- bne .L2406
13877
-.L2404:
14360
+ bls .L2409
14361
+ sub r4, r7, r5
14362
+ mov r6, r9
14363
+ mov r10, #0
14364
+.L2401:
1387814365 ldr r2, [sp, #12]
13879
- ldr r3, [sp, #20]
13880
- cmp r2, r5
13881
- movhi r4, r3
13882
-.L2405:
14366
+ ldr r3, [sp, #24]
14367
+ cmp r5, r2
14368
+ movcc r4, r3
14369
+.L2402:
1388314370 cmp r4, #0
13884
- beq .L2407
13885
- ldr r3, .L2427+12
13886
- ldr r2, .L2427+16
13887
- ldrb r3, [r3, #1172] @ zero_extendqisi2
13888
- umull r2, r3, r3, r2
14371
+ beq .L2404
14372
+ ldr r3, .L2424+12
14373
+ ldrb r2, [r3, #1193] @ zero_extendqisi2
14374
+ ldr r3, .L2424+16
14375
+ umull r2, r3, r2, r3
1388914376 ubfx r3, r3, #1, #8
13890
- cmp r6, r3
13891
- bcs .L2407
13892
- ldr r0, .L2427+20
14377
+ cmp r3, r6
14378
+ bls .L2404
1389314379 mov r1, r4
14380
+ ldr r0, .L2424+20
1389414381 bl printk
1389514382 uxtb r0, r4
13896
- b .L2426
13897
-.L2407:
13898
- ldrb r0, [sp, #24] @ zero_extendqisi2
13899
-.L2426:
14383
+.L2423:
1390014384 bl nandc_set_ddr_para
13901
- cmn r9, #1
13902
- bne .L2409
13903
- ldr r5, .L2427+12
13904
- ldrb r3, [r5, #1232] @ zero_extendqisi2
13905
- mov r4, r5
14385
+ cmn r10, #1
14386
+ bne .L2397
14387
+ ldr r4, .L2424+12
14388
+ ldrb r3, [r4, #1192] @ zero_extendqisi2
14389
+ mov r5, r4
1390614390 tst r3, #1
13907
- beq .L2409
14391
+ beq .L2397
1390814392 mov r1, r8
13909
- mov r2, r10
13910
- ldr r0, .L2427+24
14393
+ mov r2, fp
14394
+ ldr r0, .L2424+24
1391114395 bl printk
1391214396 mov r0, r8
1391314397 bl flash_reset
....@@ -13915,51 +14399,75 @@
1391514399 bl flash_set_interface_mode
1391614400 mov r0, #1
1391714401 bl nandc_set_if_mode
13918
- add r3, r5, r8
13919
- mov r0, r8
14402
+ add r3, r4, r8
1392014403 mov r2, #2
13921
- strb r2, [r3, #1192]
13922
- bl zftl_flash_enter_slc_mode
13923
- mov r1, r10
13924
- mov r2, fp
1392514404 mov r0, r8
14405
+ strb r2, [r3, #1154]
14406
+ bl zftl_flash_enter_slc_mode
1392614407 ldr r3, [sp, #72]
14408
+ mov r1, fp
14409
+ ldr r2, [sp, #16]
14410
+ mov r0, r8
1392714411 str r3, [sp]
13928
- ldr r3, [sp, #16]
14412
+ ldr r3, [sp, #20]
1392914413 bl flash_read_page
13930
- mov r1, r8
13931
- mov r2, r10
14414
+ mov r2, fp
14415
+ mov r3, r0
1393214416 mov r6, r0
13933
- ldr r0, .L2427+28
13934
- mov r3, r6
14417
+ mov r1, r8
14418
+ ldr r0, .L2424+28
1393514419 bl printk
13936
- ldrb r3, [r5, #1172] @ zero_extendqisi2
14420
+ ldrb r3, [r4, #1193] @ zero_extendqisi2
1393714421 cmp r6, r3
13938
- bhi .L2414
13939
- ldr r2, .L2427+8
13940
- ldr r3, [r2, #-112]
14422
+ bhi .L2411
14423
+ ldr r2, .L2424+8
14424
+ ldr r3, [r2, #-104]
1394114425 add r3, r3, #1
13942
- str r3, [r2, #-112]
1394314426 cmp r3, #100
14427
+ str r3, [r2, #-104]
1394414428 movhi r3, #0
13945
- strhib r3, [r5, #1135]
13946
- bls .L2410
13947
- b .L2409
13948
-.L2414:
13949
- mov r6, r9
13950
-.L2410:
13951
- ldrb r0, [r4, #1232] @ zero_extendqisi2
14429
+ strbhi r3, [r4, #1143]
14430
+ bhi .L2397
14431
+.L2407:
14432
+ ldrb r0, [r5, #1192] @ zero_extendqisi2
1395214433 bl flash_set_interface_mode
13953
- ldrb r0, [r4, #1232] @ zero_extendqisi2
14434
+ ldrb r0, [r5, #1192] @ zero_extendqisi2
1395414435 bl nandc_set_if_mode
13955
-.L2409:
14436
+.L2397:
1395614437 mov r0, r6
1395714438 add sp, sp, #36
1395814439 @ sp needed
13959
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
13960
-.L2428:
14440
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14441
+.L2399:
14442
+ ldr r3, [sp, #12]
14443
+ cmp r5, r3
14444
+ bls .L2410
14445
+ cmp r5, #7
14446
+ sub r3, r4, r5
14447
+ str r3, [sp, #24]
14448
+ bhi .L2402
14449
+ str r5, [sp, #12]
14450
+.L2410:
14451
+ mov r5, #0
14452
+ b .L2400
14453
+.L2409:
14454
+ mov r4, r7
14455
+ mov r6, r9
14456
+ mov r10, #0
14457
+.L2400:
14458
+ add r7, r7, #2
14459
+ cmp r7, #50
14460
+ bne .L2403
14461
+ b .L2401
14462
+.L2404:
14463
+ ldrb r0, [sp, #28] @ zero_extendqisi2
14464
+ b .L2423
14465
+.L2411:
14466
+ mov r6, r10
14467
+ b .L2407
14468
+.L2425:
1396114469 .align 2
13962
-.L2427:
14470
+.L2424:
1396314471 .word .LANCHOR2
1396414472 .word .LC161
1396514473 .word .LANCHOR3
....@@ -13972,141 +14480,145 @@
1397214480 .size flash_ddr_tuning_read, .-flash_ddr_tuning_read
1397314481 .align 2
1397414482 .global flash_read_page_en
14483
+ .syntax unified
14484
+ .arm
14485
+ .fpu softvfp
1397514486 .type flash_read_page_en, %function
1397614487 flash_read_page_en:
1397714488 .fnstart
1397814489 @ args = 4, pretend = 0, frame = 0
1397914490 @ frame_needed = 0, uses_anonymous_args = 0
13980
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
14491
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1398114492 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1398214493 .pad #12
13983
- mov r7, r3
13984
- ldr r5, .L2460
14494
+ mov r8, r3
14495
+ ldr r5, .L2454
1398514496 mov r10, r0
1398614497 mov r4, r1
13987
- mov r8, r2
14498
+ mov r7, r2
1398814499 ldr r9, [sp, #48]
13989
- ldrb r3, [r5, #1101] @ zero_extendqisi2
14500
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
1399014501 cmp r3, r0
13991
- bhi .L2430
13992
- ldr r1, .L2460+4
14502
+ bhi .L2427
1399314503 movw r2, #431
13994
- ldr r0, .L2460+8
14504
+ ldr r1, .L2454+4
14505
+ ldr r0, .L2454+8
1399514506 bl printk
1399614507 bl dump_stack
13997
-.L2430:
13998
- add r2, r5, r10
13999
- ldr r3, .L2460
14000
- ldrb r6, [r2, #1180] @ zero_extendqisi2
14001
- ldrb r2, [r5, #1101] @ zero_extendqisi2
14002
- cmp r10, r2
14003
- bcc .L2431
14004
- ldr r3, .L2460+12
14005
- ldr r3, [r3]
14006
- tst r3, #64
14007
- beq .L2459
14008
- str r2, [sp]
14009
- mov r1, r6
14010
- ldr r0, .L2460+16
14508
+.L2427:
14509
+ add r3, r5, r10
14510
+ ldrb r6, [r3, #1144] @ zero_extendqisi2
14511
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
14512
+ cmp r10, r3
14513
+ bcc .L2428
14514
+ ldr r2, .L2454+12
14515
+ ldr r2, [r2]
14516
+ tst r2, #64
14517
+ bne .L2429
14518
+.L2453:
14519
+ mvn r0, #0
14520
+.L2426:
14521
+ add sp, sp, #12
14522
+ @ sp needed
14523
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14524
+.L2429:
14525
+ str r3, [sp]
1401114526 mov r2, r10
1401214527 mov r3, r4
14528
+ mov r1, r6
14529
+ ldr r0, .L2454+16
1401314530 bl printk
14014
-.L2459:
14015
- mvn r0, #0
14016
- b .L2456
14017
-.L2431:
14531
+ b .L2453
14532
+.L2428:
1401814533 tst r4, #50331648
14019
- bne .L2434
14020
- ldrb r2, [r3] @ zero_extendqisi2
14021
- cmp r2, #0
14022
- beq .L2435
14023
- ldrb r3, [r3, #1] @ zero_extendqisi2
14534
+ bne .L2431
14535
+ ldrb r3, [r5] @ zero_extendqisi2
1402414536 cmp r3, #0
14025
- beq .L2434
14026
-.L2435:
14537
+ beq .L2432
14538
+ ldrb r3, [r5, #1] @ zero_extendqisi2
14539
+ cmp r3, #0
14540
+ beq .L2431
14541
+.L2432:
1402714542 ldrh r10, [r5, #2]
1402814543 mov r0, r4
1402914544 mov r1, r10
1403014545 bl __aeabi_uidiv
14546
+ mov r1, r10
14547
+ mul fp, r10, r0
14548
+ mov r0, r4
14549
+ bl __aeabi_uidivmod
1403114550 ldrb r3, [r5, #1] @ zero_extendqisi2
14551
+ lsl r1, r1, #1
1403214552 cmp r3, #0
14033
- ldreq r3, .L2460
14034
- mul r0, r10, r0
14035
- rsb r4, r0, r4
14036
- mov r4, r4, asl #1
14037
- addeq r4, r3, r4
14038
- ldreqh r4, [r4, #4]
14039
- add r4, r4, r0
14040
-.L2434:
14553
+ addeq r1, r5, r1
14554
+ addne r4, r1, fp
14555
+ ldrheq r4, [r1, #4]
14556
+ addeq r4, r4, fp
14557
+.L2431:
1404114558 str r9, [sp]
14042
- mov r0, r6
14559
+ mov r3, r8
14560
+ mov r2, r7
1404314561 mov r1, r4
14044
- mov r2, r8
14045
- mov r3, r7
14562
+ mov r0, r6
1404614563 bl flash_read_page
1404714564 cmn r0, #1
14048
- bne .L2456
14049
- ldrb fp, [r5, #1168] @ zero_extendqisi2
14050
- ldr r10, .L2460
14051
- cmp fp, #0
14052
- bne .L2438
14053
-.L2441:
14054
- ldr r3, .L2460+20
14055
- ldr ip, [r3, #-108]
14056
- cmp ip, #0
14057
- bne .L2439
14058
- b .L2440
14059
-.L2438:
14060
- mov r3, #0
14061
- mov r0, r6
14062
- strb r3, [r10, #1168]
14063
- mov r1, r4
14064
- str r9, [sp]
14065
- mov r2, r8
14066
- mov r3, r7
14067
- bl flash_read_page
14068
- strb fp, [r10, #1168]
14069
- cmn r0, #1
14070
- beq .L2441
14071
- b .L2456
14072
-.L2439:
14073
- str r9, [sp]
14074
- mov r0, r6
14075
- mov r1, r4
14076
- mov r2, r8
14077
- mov r3, r7
14078
- blx ip
14079
- cmn r0, #1
14080
- bne .L2456
14081
-.L2440:
14082
- ldrb r3, [r5, #1168] @ zero_extendqisi2
14083
- mov r1, #0
14084
- ldr r0, .L2460+24
14565
+ bne .L2426
14566
+ ldrb r10, [r5, #1196] @ zero_extendqisi2
14567
+ cmp r10, #0
14568
+ bne .L2434
14569
+.L2437:
14570
+ ldr r3, .L2454+20
14571
+ ldr r10, [r3, #-100]
14572
+ cmp r10, #0
14573
+ bne .L2435
14574
+.L2436:
14575
+ ldrb r3, [r5, #1196] @ zero_extendqisi2
1408514576 mov r2, r4
14577
+ mov r1, #0
14578
+ ldr r0, .L2454+24
1408614579 str r3, [sp]
1408714580 mvn r3, #0
1408814581 bl printk
14089
- ldrb r3, [r5, #1135] @ zero_extendqisi2
14582
+ ldrb r3, [r5, #1143] @ zero_extendqisi2
1409014583 cmp r3, #0
14091
- beq .L2459
14584
+ beq .L2453
1409214585 str r9, [sp, #48]
14093
- mov r0, r6
14586
+ mov r3, r8
14587
+ mov r2, r7
1409414588 mov r1, r4
14095
- mov r2, r8
14096
- mov r3, r7
14589
+ mov r0, r6
1409714590 add sp, sp, #12
1409814591 @ sp needed
14099
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14592
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1410014593 b flash_ddr_tuning_read
14101
-.L2456:
14102
- add sp, sp, #12
14103
- @ sp needed
14104
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14105
-.L2461:
14594
+.L2434:
14595
+ mov r3, #0
14596
+ str r9, [sp]
14597
+ strb r3, [r5, #1196]
14598
+ mov r2, r7
14599
+ mov r3, r8
14600
+ mov r1, r4
14601
+ mov r0, r6
14602
+ bl flash_read_page
14603
+ cmn r0, #1
14604
+ strb r10, [r5, #1196]
14605
+ beq .L2437
14606
+ b .L2426
14607
+.L2435:
14608
+ str r9, [sp]
14609
+ mov r3, r8
14610
+ mov r2, r7
14611
+ mov r1, r4
14612
+ mov r0, r6
14613
+ blx r10
14614
+ cmn r0, #1
14615
+ bne .L2426
14616
+ b .L2436
14617
+.L2455:
1410614618 .align 2
14107
-.L2460:
14619
+.L2454:
1410814620 .word .LANCHOR0
14109
- .word .LANCHOR1+2060
14621
+ .word .LANCHOR1+1882
1411014622 .word .LC0
1411114623 .word .LANCHOR2
1411214624 .word .LC165
....@@ -14116,74 +14628,75 @@
1411614628 .size flash_read_page_en, .-flash_read_page_en
1411714629 .align 2
1411814630 .global flash_get_last_written_page
14631
+ .syntax unified
14632
+ .arm
14633
+ .fpu softvfp
1411914634 .type flash_get_last_written_page, %function
1412014635 flash_get_last_written_page:
1412114636 .fnstart
1412214637 @ args = 4, pretend = 0, frame = 8
1412314638 @ frame_needed = 0, uses_anonymous_args = 0
14124
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14639
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1412514640 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14126
- mov r9, r1
14127
- ldr r6, .L2473
14641
+ mov r8, r1
14642
+ ldr r5, .L2467
1412814643 .pad #20
1412914644 sub sp, sp, #20
14130
- ldr r1, .L2473+4
1413114645 mov r10, r0
1413214646 mov fp, r2
14133
- mov r8, r3
14134
- ldrh r7, [r6, #30]
14135
- ldrh r4, [r1, #-220]
14647
+ ldr r1, .L2467+4
14648
+ mov r9, r3
14649
+ ldrh r6, [r5, #30]
14650
+ ldrh r4, [r1, #-224]
1413614651 ldr r1, [sp, #56]
14652
+ mul r6, r8, r6
1413714653 sub r4, r4, #1
14138
- mul r7, r7, r9
14139
- uxth r4, r4
14140
- str r1, [sp]
14141
- sxtah r1, r7, r4
14142
- bl flash_read_page_en
14143
- cmp r0, #512
14144
- moveq ip, #0
14145
- bne .L2463
14146
-.L2464:
14147
- sxth r3, ip
14148
- sxth r2, r4
14149
- cmp r3, r2
14150
- bgt .L2463
14151
- add r3, r3, r2
14152
- mov r0, r10
14153
- mov r2, fp
14154
- str ip, [sp, #12]
14155
- add r3, r3, r3, lsr #31
14156
- mov r5, r3, asr #1
14157
- ldr r3, [sp, #56]
14158
- sxtah r1, r7, r5
14159
- str r3, [sp]
14160
- mov r3, r8
14161
- bl flash_read_page_en
14162
- cmp r0, #512
14163
- ldr ip, [sp, #12]
14164
- subeq r5, r5, #1
14165
- addne ip, r5, #1
14166
- uxtheq r4, r5
14167
- uxthne ip, ip
14168
- b .L2464
14169
-.L2463:
14170
- ldr r3, [r6]
1417114654 sxth r4, r4
14655
+ str r1, [sp]
14656
+ add r1, r4, r6
14657
+ bl flash_read_page_en
14658
+ cmp r0, #512
14659
+ str r5, [sp, #12]
14660
+ moveq r7, #0
14661
+ beq .L2458
14662
+.L2457:
14663
+ ldr r3, [sp, #12]
14664
+ ldr r3, [r3]
1417214665 tst r3, #4096
14173
- beq .L2468
14174
- ldr r0, .L2473+8
14175
- mov r1, r9
14666
+ beq .L2462
14667
+ ldr r3, [r9]
1417614668 mov r2, r4
14177
- ldr r3, [r8]
14669
+ mov r1, r8
14670
+ ldr r0, .L2467+8
1417814671 bl printk
14179
-.L2468:
14672
+.L2462:
1418014673 mov r0, r4
1418114674 add sp, sp, #20
1418214675 @ sp needed
14183
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14184
-.L2474:
14676
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14677
+.L2461:
14678
+ add r5, r7, r4
14679
+ ldr r3, [sp, #56]
14680
+ add r5, r5, r5, lsr #31
14681
+ mov r2, fp
14682
+ mov r0, r10
14683
+ asr r5, r5, #1
14684
+ str r3, [sp]
14685
+ mov r3, r9
14686
+ sxtah r1, r6, r5
14687
+ bl flash_read_page_en
14688
+ cmp r0, #512
14689
+ subeq r4, r5, #1
14690
+ addne r5, r5, #1
14691
+ sxtheq r4, r4
14692
+ sxthne r7, r5
14693
+.L2458:
14694
+ cmp r7, r4
14695
+ ble .L2461
14696
+ b .L2457
14697
+.L2468:
1418514698 .align 2
14186
-.L2473:
14699
+.L2467:
1418714700 .word .LANCHOR2
1418814701 .word .LANCHOR3
1418914702 .word .LC167
....@@ -14191,471 +14704,273 @@
1419114704 .size flash_get_last_written_page, .-flash_get_last_written_page
1419214705 .align 2
1419314706 .global flash_get_last_written_page_ext
14707
+ .syntax unified
14708
+ .arm
14709
+ .fpu softvfp
1419414710 .type flash_get_last_written_page_ext, %function
1419514711 flash_get_last_written_page_ext:
1419614712 .fnstart
1419714713 @ args = 0, pretend = 0, frame = 0
1419814714 @ frame_needed = 0, uses_anonymous_args = 0
14199
- stmfd sp!, {r0, r1, r4, lr}
14200
- .save {r4, lr}
14201
- .pad #8
14202
- mov lr, r2
14203
- ldr r2, .L2477
14204
- mov r4, r1
14205
- ldr r1, .L2477+4
14206
- mov ip, r0
14207
- ldrb r2, [r2, #1189] @ zero_extendqisi2
14208
- ldrh r1, [r1, #-12]
14209
- rsb r2, r2, #24
14715
+ ldr ip, .L2471
14716
+ push {r0, r1, r2, lr}
14717
+ .save {lr}
14718
+ .pad #12
14719
+ ldr lr, .L2471+4
14720
+ ldrb ip, [ip, #1153] @ zero_extendqisi2
14721
+ ldrh lr, [lr, #-2]
1421014722 str r3, [sp]
14211
- rsb r2, r1, r2
14723
+ mov r3, r2
14724
+ rsb ip, ip, #24
14725
+ mov r2, r1
14726
+ sub ip, ip, lr
1421214727 mvn r1, #0
14213
- mov r0, r0, asr r2
14214
- bic r1, ip, r1, asl r2
14215
- mov r3, lr
14216
- mov r2, r4
14217
- uxtb r0, r0
14728
+ asr lr, r0, ip
14729
+ bic r1, r0, r1, lsl ip
14730
+ uxtb r0, lr
1421814731 bl flash_get_last_written_page
14219
- add sp, sp, #8
14732
+ add sp, sp, #12
1422014733 @ sp needed
14221
- ldmfd sp!, {r4, pc}
14222
-.L2478:
14734
+ ldr pc, [sp], #4
14735
+.L2472:
1422314736 .align 2
14224
-.L2477:
14737
+.L2471:
1422514738 .word .LANCHOR0
14226
- .word .LANCHOR3-3120
14739
+ .word .LANCHOR3-3136
1422714740 .fnend
1422814741 .size flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
1422914742 .align 2
1423014743 .global flash_ddr_para_scan
14744
+ .syntax unified
14745
+ .arm
14746
+ .fpu softvfp
1423114747 .type flash_ddr_para_scan, %function
1423214748 flash_ddr_para_scan:
1423314749 .fnstart
1423414750 @ args = 0, pretend = 0, frame = 0
1423514751 @ frame_needed = 0, uses_anonymous_args = 0
14236
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
14752
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
1423714753 .save {r4, r5, r6, r7, r8, r9, lr}
1423814754 .pad #12
14239
- mov r8, r0
14240
- ldr r4, .L2486
14241
- mov r7, r1
14755
+ mov r7, r0
14756
+ ldr r4, .L2480
1424214757 mov r6, #1
14243
- ldr r5, .L2486+4
14758
+ mov r8, r1
1424414759 mov r9, #4
14245
- ldrb r0, [r4, #1232] @ zero_extendqisi2
14246
- strb r6, [r4, #1135]
14760
+ ldr r5, .L2480+4
14761
+ ldrb r0, [r4, #1192] @ zero_extendqisi2
14762
+ strb r6, [r4, #1143]
1424714763 bl flash_set_interface_mode
14248
- ldrb r0, [r4, #1232] @ zero_extendqisi2
14764
+ ldrb r0, [r4, #1192] @ zero_extendqisi2
1424914765 bl nandc_set_if_mode
14250
- mov r1, r7
14251
- ldr r2, [r5, #-104]
14252
- mov r0, r8
14253
- ldr r3, [r5, #-100]
14766
+ ldr r3, [r5, #-96]
14767
+ mov r1, r8
14768
+ ldr r2, [r5, #-92]
14769
+ mov r0, r7
1425414770 str r9, [sp]
1425514771 bl flash_ddr_tuning_read
14256
- ldr r3, [r5, #-100]
14257
- mov r0, r8
14258
- mov r1, r7
14259
- ldr r2, [r5, #-104]
14772
+ ldr r3, [r5, #-96]
14773
+ mov r1, r8
1426014774 str r9, [sp]
14775
+ mov r0, r7
14776
+ ldr r2, [r5, #-92]
1426114777 bl flash_read_page
14262
- mov r3, r4
1426314778 cmn r0, #1
14264
- bne .L2480
14265
- ldrb r2, [r4, #1232] @ zero_extendqisi2
14779
+ mov r3, r4
14780
+ bne .L2474
14781
+ ldrb r2, [r4, #1192] @ zero_extendqisi2
1426614782 tst r2, #1
14267
- beq .L2480
14783
+ beq .L2474
1426814784 mov r0, r6
1426914785 bl flash_set_interface_mode
1427014786 mov r0, r6
1427114787 bl nandc_set_if_mode
1427214788 mov r3, #0
14273
- strb r3, [r4, #1135]
14274
- b .L2481
14275
-.L2480:
14276
- mov r2, #1
14277
- strb r2, [r3, #1135]
14278
-.L2481:
14789
+ strb r3, [r4, #1143]
14790
+.L2475:
1427914791 mov r0, #0
1428014792 add sp, sp, #12
1428114793 @ sp needed
14282
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
14283
-.L2487:
14794
+ pop {r4, r5, r6, r7, r8, r9, pc}
14795
+.L2474:
14796
+ mov r2, #1
14797
+ strb r2, [r3, #1143]
14798
+ b .L2475
14799
+.L2481:
1428414800 .align 2
14285
-.L2486:
14801
+.L2480:
1428614802 .word .LANCHOR0
1428714803 .word .LANCHOR3
1428814804 .fnend
1428914805 .size flash_ddr_para_scan, .-flash_ddr_para_scan
14290
- .global __aeabi_uidivmod
14291
- .section .text.unlikely
14292
- .align 2
14293
- .type id_block_read_data.constprop.31, %function
14294
-id_block_read_data.constprop.31:
14295
- .fnstart
14296
- @ args = 0, pretend = 0, frame = 112
14297
- @ frame_needed = 0, uses_anonymous_args = 0
14298
- ldr r3, .L2519
14299
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14300
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14301
- .pad #124
14302
- sub sp, sp, #124
14303
- ldr r4, .L2519+4
14304
- mov r6, r2
14305
- str r1, [sp, #24]
14306
- mov r5, #0
14307
- ldrb r2, [r3, #13] @ zero_extendqisi2
14308
- mov r7, #4
14309
- ldrh r1, [r3, #30]
14310
- mov r10, r5
14311
- ldrb r3, [r4, #1168] @ zero_extendqisi2
14312
- str r0, [sp, #40]
14313
- mul r1, r1, r2
14314
- str r3, [sp, #44]
14315
- str r2, [sp, #28]
14316
- strb r5, [r4, #1168]
14317
- bl __aeabi_uidivmod
14318
- ldr r3, [sp, #40]
14319
- str r1, [sp, #12]
14320
- rsb r3, r1, r3
14321
- str r3, [sp, #32]
14322
- and r3, r1, #3
14323
- str r3, [sp, #16]
14324
-.L2489:
14325
- ldr r3, [sp, #24]
14326
- cmp r5, r3
14327
- bcs .L2518
14328
- ldr r3, [sp, #16]
14329
- mov r1, r7
14330
- rsb r3, r3, r7
14331
- uxth r3, r3
14332
- str r3, [sp, #20]
14333
- ldr r3, [sp, #12]
14334
- add r0, r5, r3
14335
- bl __aeabi_uidiv
14336
- ldrb r1, [r4, #1102] @ zero_extendqisi2
14337
- cmp r1, #0
14338
- uxth r0, r0
14339
- mov r3, r0, asl #1
14340
- add r2, r4, r3
14341
- ldrh r2, [r2, #4]
14342
- moveq r0, r2
14343
- beq .L2491
14344
- ldrb r2, [r4, #1] @ zero_extendqisi2
14345
- cmp r2, #0
14346
- movne r0, r3
14347
-.L2491:
14348
- ldr r2, [sp, #32]
14349
- ldr r3, [sp, #28]
14350
- ldr r1, [sp, #16]
14351
- mla r3, r3, r0, r2
14352
- str r3, [sp, #36]
14353
- ldr r3, .L2519+4
14354
- ldr r2, [sp, #36]
14355
- ldrb r9, [r3, #1100] @ zero_extendqisi2
14356
- add r0, r2, r1
14357
- ldr r3, [r3, #1096]
14358
- ldrb r1, [r3, #9] @ zero_extendqisi2
14359
- bl __aeabi_uidiv
14360
- ldr r3, .L2519+4
14361
- ldrb r3, [r3, #1172] @ zero_extendqisi2
14362
- mov fp, r0
14363
- mov r0, r9
14364
- str r3, [sp, #48]
14365
- bl nandc_bch_sel
14366
-.L2492:
14367
- str r7, [sp]
14368
- mov r0, #0
14369
- mov r1, fp
14370
- mov r2, r6
14371
- add r3, sp, #56
14372
- bl flash_read_page
14373
- cmn r0, #1
14374
- mov r8, r0
14375
- bne .L2499
14376
- ldrb ip, [r4, #1168] @ zero_extendqisi2
14377
- cmp ip, #0
14378
- bne .L2494
14379
-.L2497:
14380
- ldr r3, .L2519+8
14381
- ldr ip, [r3, #-108]
14382
- cmp ip, #0
14383
- bne .L2495
14384
- b .L2496
14385
-.L2494:
14386
- mov r0, #0
14387
- str r7, [sp]
14388
- mov r1, fp
14389
- mov r2, r6
14390
- add r3, sp, #56
14391
- str ip, [sp, #52]
14392
- strb r0, [r4, #1168]
14393
- bl flash_read_page
14394
- ldr ip, [sp, #52]
14395
- cmn r0, #1
14396
- strb ip, [r4, #1168]
14397
- beq .L2497
14398
- b .L2517
14399
-.L2495:
14400
- str r7, [sp]
14401
- mov r0, #0
14402
- mov r1, fp
14403
- mov r2, r6
14404
- add r3, sp, #56
14405
- blx ip
14406
- cmn r0, #1
14407
- bne .L2517
14408
-.L2496:
14409
- ldrb r3, [r4, #1135] @ zero_extendqisi2
14410
- cmp r3, #0
14411
- beq .L2499
14412
- str r7, [sp]
14413
- mov r0, #0
14414
- mov r1, fp
14415
- mov r2, r6
14416
- add r3, sp, #56
14417
- bl flash_ddr_tuning_read
14418
-.L2517:
14419
- mov r8, r0
14420
-.L2499:
14421
- subs r9, r9, #16
14422
- movne r9, #1
14423
- cmn r8, #1
14424
- movne r9, #0
14425
- cmp r9, #0
14426
- beq .L2500
14427
- mov r0, #16
14428
- mov r9, #16
14429
- bl nandc_bch_sel
14430
- b .L2492
14431
-.L2500:
14432
- ldr r0, [sp, #48]
14433
- bl nandc_bch_sel
14434
- cmn r8, #1
14435
- mvneq r10, #0
14436
- ldr r3, [sp, #32]
14437
- ldr r2, [sp, #40]
14438
- cmp r5, #0
14439
- cmpeq r3, r2
14440
- moveq r3, #1
14441
- movne r3, #0
14442
- cmp r10, #0
14443
- movne r3, #0
14444
- andeq r3, r3, #1
14445
- cmp r3, #0
14446
- beq .L2502
14447
- ldr r3, [r6]
14448
- ldr r2, .L2519+12
14449
- cmp r3, r2
14450
- bne .L2502
14451
- ldr r3, [sp, #24]
14452
- ldr r2, [sp, #20]
14453
- ldrb r7, [r6, #17] @ zero_extendqisi2
14454
- add r3, r3, r2
14455
- str r3, [sp, #24]
14456
- b .L2503
14457
-.L2502:
14458
- ldr r3, [sp, #20]
14459
- mov r2, r5
14460
- ldr r0, .L2519+16
14461
- ldr r1, [sp, #36]
14462
- add r6, r6, r3, asl #9
14463
- ldr r3, [sp, #60]
14464
- str r3, [sp]
14465
- ldr r3, [sp, #56]
14466
- bl printk
14467
- mov r3, #0
14468
- str r3, [sp, #16]
14469
-.L2503:
14470
- ldr r3, [sp, #20]
14471
- add r5, r3, r5
14472
- uxth r5, r5
14473
- b .L2489
14474
-.L2518:
14475
- ldr r3, .L2519+4
14476
- mov r0, r10
14477
- ldrb r2, [sp, #44] @ zero_extendqisi2
14478
- strb r2, [r3, #1168]
14479
- add sp, sp, #124
14480
- @ sp needed
14481
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14482
-.L2520:
14483
- .align 2
14484
-.L2519:
14485
- .word .LANCHOR2
14486
- .word .LANCHOR0
14487
- .word .LANCHOR3
14488
- .word 1179535694
14489
- .word .LC168
14490
- .fnend
14491
- .size id_block_read_data.constprop.31, .-id_block_read_data.constprop.31
14492
- .text
1449314806 .align 2
1449414807 .global flash_prog_page
14808
+ .syntax unified
14809
+ .arm
14810
+ .fpu softvfp
1449514811 .type flash_prog_page, %function
1449614812 flash_prog_page:
1449714813 .fnstart
1449814814 @ args = 4, pretend = 0, frame = 8
1449914815 @ frame_needed = 0, uses_anonymous_args = 0
14500
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14816
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1450114817 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1450214818 mov fp, r3
14503
- ldr r7, .L2533
14504
- mov r4, r0
14819
+ ldr r6, .L2494
1450514820 .pad #20
1450614821 sub sp, sp, #20
14507
- mvn r5, #0
14508
- mov r8, r1
14509
- mov r10, r2
14510
- ldrb r3, [r7, #1189] @ zero_extendqisi2
14511
- add r9, r0, #8
14512
- ldr r6, [r7, #1040]
14822
+ mov r4, r0
14823
+ mov r7, r1
14824
+ str r2, [sp, #12]
14825
+ mvn r2, #0
14826
+ ldrb r3, [r6, #1153] @ zero_extendqisi2
14827
+ add r8, r0, #8
14828
+ ldr r5, [r6, #1044]
1451314829 rsb r3, r3, #24
14514
- bic r5, r1, r5, asl r3
14830
+ bic r10, r1, r2, lsl r3
14831
+ add r8, r5, r8, lsl #8
1451514832 bl nandc_wait_flash_ready
1451614833 mov r0, r4
14517
- add r9, r6, r9, asl #8
1451814834 bl hynix_reconfig_rr_para
1451914835 mov r0, r4
1452014836 bl nandc_cs
14521
- tst r8, #50331648
14837
+ tst r7, #50331648
1452214838 mov r0, r4
14523
- bne .L2522
14839
+ bne .L2483
1452414840 bl zftl_flash_enter_slc_mode
14525
- b .L2523
14526
-.L2522:
14527
- bl zftl_flash_exit_slc_mode
14528
-.L2523:
14529
- mov ip, r4, asl #8
14530
- mov r2, #128
14531
- add r3, r6, ip
14532
- mov r0, r5
14533
- str ip, [sp, #12]
14534
- str r2, [r3, #2056]
14535
- mov r2, #0
14536
- str r2, [r3, #2052]
14537
- str r2, [r3, #2052]
14538
- uxtb r2, r5
14539
- str r2, [r3, #2052]
14540
- mov r2, r5, lsr #8
14541
- str r2, [r3, #2052]
14542
- mov r2, r5, lsr #16
14543
- str r2, [r3, #2052]
14544
- ldrb r2, [r7, #1188] @ zero_extendqisi2
14545
- cmp r2, #0
14546
- movne r2, r5, lsr #24
14547
- strne r2, [r3, #2052]
14841
+.L2484:
14842
+ lsl r9, r4, #8
14843
+ mov r1, #128
14844
+ mov r0, r10
14845
+ add r2, r5, r9
14846
+ add r5, r5, r9
14847
+ str r1, [r2, #2056]
14848
+ mov r1, #0
14849
+ str r1, [r2, #2052]
14850
+ str r1, [r2, #2052]
14851
+ uxtb r1, r10
14852
+ str r1, [r2, #2052]
14853
+ lsr r1, r10, #8
14854
+ str r1, [r2, #2052]
14855
+ lsr r1, r10, #16
14856
+ str r1, [r2, #2052]
14857
+ ldrb r1, [r6, #1152] @ zero_extendqisi2
14858
+ cmp r1, #0
14859
+ lsrne r1, r10, #24
14860
+ strne r1, [r2, #2052]
1454814861 bl nandc_set_seed
14549
- ldr r3, .L2533+4
14862
+ ldr r3, .L2494+4
1455014863 mov r1, #1
1455114864 mov r0, r4
1455214865 ldrb r2, [r3, #13] @ zero_extendqisi2
14553
- mov r3, r10
14866
+ ldr r3, [sp, #12]
1455414867 str fp, [sp]
1455514868 bl nandc_xfer
1455614869 mov r3, #16
14557
- ldr ip, [sp, #12]
14558
- add ip, r6, ip
14559
- str r3, [ip, #2056]
14870
+ str r3, [r5, #2056]
1456014871 bl nandc_iqr_wait_flash_ready
1456114872 bl nandc_wait_flash_ready
14562
- mov r0, r9
14873
+ mov r0, r8
1456314874 bl flash_read_status
14564
- mov r5, r0
14565
- mov r0, r4
14566
- bl nandc_de_cs
14567
- ands r2, r5, #4
14568
- beq .L2525
14569
- ldr r0, .L2533+8
14570
- mov r1, r8
14875
+ bl nandc_de_cs.constprop.35
14876
+ ands r0, r0, #4
14877
+ beq .L2482
14878
+ mov r2, r0
14879
+ mov r1, r7
14880
+ ldr r0, .L2494+8
1457114881 bl printk
14572
- mvn r2, #0
14573
-.L2525:
14574
- mov r0, r2
14882
+ mvn r0, #0
14883
+.L2482:
1457514884 add sp, sp, #20
1457614885 @ sp needed
14577
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14578
-.L2534:
14886
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14887
+.L2483:
14888
+ bl zftl_flash_exit_slc_mode
14889
+ b .L2484
14890
+.L2495:
1457914891 .align 2
14580
-.L2533:
14892
+.L2494:
1458114893 .word .LANCHOR0
1458214894 .word .LANCHOR2
14583
- .word .LC169
14895
+ .word .LC168
1458414896 .fnend
1458514897 .size flash_prog_page, .-flash_prog_page
1458614898 .align 2
1458714899 .global flash_test_blk
14900
+ .syntax unified
14901
+ .arm
14902
+ .fpu softvfp
1458814903 .type flash_test_blk, %function
1458914904 flash_test_blk:
1459014905 .fnstart
1459114906 @ args = 0, pretend = 0, frame = 0
1459214907 @ frame_needed = 0, uses_anonymous_args = 0
14593
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
14908
+ push {r0, r1, r2, r4, r5, r6, r7, lr}
1459414909 .save {r4, r5, r6, r7, lr}
1459514910 .pad #12
1459614911 mov r6, r0
14597
- ldr r4, .L2546
14912
+ ldr r4, .L2507
1459814913 mov r5, r1
1459914914 mov r2, #32
1460014915 mov r1, #165
14601
- ldr r0, [r4, #-128]
14602
- bl ftl_memset
14603
- mov r1, #90
14604
- mov r2, #8
1460514916 ldr r0, [r4, #-120]
1460614917 bl ftl_memset
14607
- ldr r3, .L2546+4
14918
+ mov r2, #8
14919
+ mov r1, #90
14920
+ ldr r0, [r4, #-112]
14921
+ bl ftl_memset
14922
+ ldr r3, .L2507+4
1460814923 mov r0, r6
1460914924 ldrh r3, [r3, #2]
14610
- mul r5, r3, r5
14925
+ mul r5, r5, r3
1461114926 mov r1, r5
1461214927 bl flash_erase_block
1461314928 cmn r0, #1
14614
- bne .L2536
14615
-.L2538:
14929
+ bne .L2497
14930
+.L2499:
1461614931 mvn r4, #0
14617
- b .L2537
14618
-.L2536:
14619
- ldr r7, .L2546+8
14620
- mov r0, r6
14932
+.L2498:
1462114933 mov r1, r5
14622
- ldrb r3, [r7, #13] @ zero_extendqisi2
14623
- str r3, [sp]
14624
- ldr r2, [r4, #-128]
14625
- ldr r3, [r4, #-120]
14626
- bl flash_prog_page
14627
- cmn r0, #1
14628
- beq .L2538
14629
- ldrb r3, [r7, #13] @ zero_extendqisi2
1463014934 mov r0, r6
14631
- mov r1, r5
14632
- str r3, [sp]
14633
- ldr r2, [r4, #-128]
14634
- ldr r3, [r4, #-120]
14635
- bl flash_read_page_en
14636
- cmn r0, #1
14637
- beq .L2538
14638
- ldr r3, [r4, #-128]
14639
- ldr r2, [r3]
14640
- ldr r3, .L2546+12
14641
- cmp r2, r3
14642
- bne .L2538
14643
- ldr r3, [r4, #-120]
14644
- ldr r4, .L2546+16
14645
- ldr r3, [r3]
14646
- subs r4, r3, r4
14647
- mvnne r4, #0
14648
-.L2537:
14649
- mov r0, r6
14650
- mov r1, r5
1465114935 bl flash_erase_block
1465214936 mov r0, r4
1465314937 add sp, sp, #12
1465414938 @ sp needed
14655
- ldmfd sp!, {r4, r5, r6, r7, pc}
14656
-.L2547:
14939
+ pop {r4, r5, r6, r7, pc}
14940
+.L2497:
14941
+ ldr r7, .L2507+8
14942
+ mov r1, r5
14943
+ mov r0, r6
14944
+ ldrb r3, [r7, #13] @ zero_extendqisi2
14945
+ str r3, [sp]
14946
+ ldr r3, [r4, #-112]
14947
+ ldr r2, [r4, #-120]
14948
+ bl flash_prog_page
14949
+ cmn r0, #1
14950
+ beq .L2499
14951
+ ldrb r3, [r7, #13] @ zero_extendqisi2
14952
+ mov r1, r5
14953
+ mov r0, r6
14954
+ str r3, [sp]
14955
+ ldr r3, [r4, #-112]
14956
+ ldr r2, [r4, #-120]
14957
+ bl flash_read_page_en
14958
+ cmn r0, #1
14959
+ beq .L2499
14960
+ ldr r3, [r4, #-120]
14961
+ ldr r2, [r3]
14962
+ ldr r3, .L2507+12
14963
+ cmp r2, r3
14964
+ bne .L2499
14965
+ ldr r3, [r4, #-112]
14966
+ ldr r4, [r3]
14967
+ ldr r3, .L2507+16
14968
+ subs r4, r4, r3
14969
+ mvnne r4, #0
14970
+ b .L2498
14971
+.L2508:
1465714972 .align 2
14658
-.L2546:
14973
+.L2507:
1465914974 .word .LANCHOR3
1466014975 .word .LANCHOR0
1466114976 .word .LANCHOR2
....@@ -14665,48 +14980,51 @@
1466514980 .size flash_test_blk, .-flash_test_blk
1466614981 .align 2
1466714982 .global flash_start_one_pass_page_prog
14983
+ .syntax unified
14984
+ .arm
14985
+ .fpu softvfp
1466814986 .type flash_start_one_pass_page_prog, %function
1466914987 flash_start_one_pass_page_prog:
1467014988 .fnstart
1467114989 @ args = 12, pretend = 0, frame = 0
1467214990 @ frame_needed = 0, uses_anonymous_args = 0
14673
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
14991
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
1467414992 .save {r4, r5, r6, r7, r8, r9, r10, lr}
1467514993 .pad #8
14994
+ mov r9, r3
14995
+ ldr r6, .L2519
1467614996 mov r10, r0
14677
- ldr r6, .L2558
14997
+ lsl r7, r9, #8
1467814998 mov r0, r3
1467914999 ldr r5, [sp, #40]
14680
- mov r9, r3
1468115000 mov r8, r2
14682
- mov r7, r9, asl #8
14683
- ldr r4, [r6, #1040]
15001
+ ldr r4, [r6, #1044]
1468415002 bl nandc_cs
1468515003 cmp r10, #0
14686
- mov r0, r5
14687
- add r2, r4, r7
15004
+ mov r2, #128
1468815005 addne r3, r4, r7
14689
- add r4, r4, r7
15006
+ mov r0, r5
1469015007 strne r10, [r3, #2056]
14691
- mov r3, #128
14692
- str r3, [r2, #2056]
14693
- mov r3, #0
14694
- str r3, [r2, #2052]
14695
- str r3, [r2, #2052]
14696
- uxtb r3, r5
14697
- str r3, [r2, #2052]
14698
- mov r3, r5, lsr #8
14699
- str r3, [r2, #2052]
14700
- mov r3, r5, lsr #16
14701
- str r3, [r2, #2052]
14702
- ldrb r3, [r6, #1188] @ zero_extendqisi2
14703
- cmp r3, #0
14704
- movne r3, r5, lsr #24
14705
- strne r3, [r2, #2052]
15008
+ add r3, r4, r7
15009
+ str r2, [r3, #2056]
15010
+ mov r2, #0
15011
+ str r2, [r3, #2052]
15012
+ add r4, r4, r7
15013
+ str r2, [r3, #2052]
15014
+ uxtb r2, r5
15015
+ str r2, [r3, #2052]
15016
+ lsr r2, r5, #8
15017
+ str r2, [r3, #2052]
15018
+ lsr r2, r5, #16
15019
+ str r2, [r3, #2052]
15020
+ ldrb r2, [r6, #1152] @ zero_extendqisi2
15021
+ cmp r2, #0
15022
+ lsrne r2, r5, #24
15023
+ strne r2, [r3, #2052]
1470615024 bl nandc_set_seed
14707
- ldr r3, .L2558+4
14708
- mov r0, r9
15025
+ ldr r3, .L2519+4
1470915026 mov r1, #1
15027
+ mov r0, r9
1471015028 ldrb r2, [r3, #13] @ zero_extendqisi2
1471115029 ldr r3, [sp, #48]
1471215030 str r3, [sp]
....@@ -14715,129 +15033,132 @@
1471515033 str r8, [r4, #2056]
1471615034 add sp, sp, #8
1471715035 @ sp needed
14718
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
14719
-.L2559:
15036
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
15037
+.L2520:
1472015038 .align 2
14721
-.L2558:
15039
+.L2519:
1472215040 .word .LANCHOR0
1472315041 .word .LANCHOR2
1472415042 .fnend
1472515043 .size flash_start_one_pass_page_prog, .-flash_start_one_pass_page_prog
1472615044 .align 2
1472715045 .global flash_dual_page_prog
15046
+ .syntax unified
15047
+ .arm
15048
+ .fpu softvfp
1472815049 .type flash_dual_page_prog, %function
1472915050 flash_dual_page_prog:
1473015051 .fnstart
1473115052 @ args = 12, pretend = 0, frame = 0
1473215053 @ frame_needed = 0, uses_anonymous_args = 0
14733
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15054
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1473415055 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
14735
- mov r9, r3
14736
- ldr r4, .L2573
14737
- add r8, r0, #8
14738
- ldr r6, .L2573+4
15056
+ mov r10, r3
15057
+ ldr r3, .L2534
15058
+ mov r9, r2
15059
+ add r2, r0, #8
1473915060 .pad #20
1474015061 sub sp, sp, #20
14741
- mov r5, r0
15062
+ ldr r6, .L2534+4
15063
+ mov r4, r0
15064
+ ldrb r5, [r3, #1153] @ zero_extendqisi2
1474215065 mov r7, r1
14743
- ldr r3, [r4, #1040]
14744
- mov r10, r2
15066
+ ldr r8, [r3, #1044]
1474515067 ubfx fp, r1, #24, #2
14746
- add r8, r3, r8, asl #8
14747
- ldrb r3, [r4, #1189] @ zero_extendqisi2
14748
- mvn r4, #0
14749
- rsb r3, r3, #24
14750
- bic r4, r1, r4, asl r3
15068
+ rsb r3, r5, #24
15069
+ mvn r5, #0
15070
+ bic r5, r1, r5, lsl r3
1475115071 ldr r3, [r6]
15072
+ add r8, r8, r2, lsl #8
1475215073 tst r3, #16
14753
- beq .L2561
14754
- ldr r0, .L2573+8
14755
- mov r2, fp
15074
+ beq .L2522
1475615075 ldr r3, [sp, #64]
15076
+ mov r2, fp
15077
+ ldr r0, .L2534+8
1475715078 bl printk
14758
-.L2561:
15079
+.L2522:
1475915080 bl nandc_wait_flash_ready
14760
- mov r0, r5
15081
+ mov r0, r4
1476115082 bl nandc_cs
1476215083 cmp fp, #0
14763
- mov r0, r5
14764
- bne .L2562
15084
+ mov r0, r4
15085
+ bne .L2523
1476515086 bl zftl_flash_enter_slc_mode
14766
- b .L2563
14767
-.L2562:
14768
- bl zftl_flash_exit_slc_mode
14769
-.L2563:
14770
- mov r0, #0
15087
+.L2524:
15088
+ mov r1, #0
15089
+ mov r3, r4
1477115090 mov r2, #16
14772
- mov r1, r0
14773
- mov r3, r5
14774
- stmia sp, {r4, r10}
14775
- add r4, r4, #1
14776
- str r9, [sp, #8]
15091
+ mov r0, r1
15092
+ stm sp, {r5, r9, r10}
15093
+ add r5, r5, #1
1477715094 bl flash_start_one_pass_page_prog
1477815095 bl nandc_wait_flash_ready
14779
- mov r0, #0
14780
- mov r2, #16
14781
- mov r1, r0
14782
- ldr r3, [sp, #56]
14783
- str r4, [sp]
14784
- str r3, [sp, #4]
1478515096 ldr r3, [sp, #60]
15097
+ mov r1, #0
15098
+ mov r2, #16
15099
+ mov r0, r1
15100
+ str r5, [sp]
1478615101 str r3, [sp, #8]
14787
- mov r3, r5
15102
+ ldr r3, [sp, #56]
15103
+ str r3, [sp, #4]
15104
+ mov r3, r4
1478815105 bl flash_start_one_pass_page_prog
1478915106 bl nandc_wait_flash_ready
1479015107 mov r0, r8
1479115108 bl flash_read_status
14792
- mov r4, r0
14793
- mov r0, r5
14794
- bl nandc_de_cs
14795
- ands r2, r4, #4
14796
- beq .L2564
15109
+ bl nandc_de_cs.constprop.35
15110
+ ands r0, r0, #4
15111
+ beq .L2521
1479715112 ldr r3, [r6]
1479815113 tst r3, #4096
14799
- beq .L2565
14800
- ldr r0, .L2573+12
15114
+ beq .L2526
15115
+ mov r2, r0
1480115116 mov r1, r7
15117
+ ldr r0, .L2534+12
1480215118 bl printk
14803
-.L2565:
14804
- mvn r2, #0
14805
-.L2564:
14806
- mov r0, r2
15119
+.L2526:
15120
+ mvn r0, #0
15121
+.L2521:
1480715122 add sp, sp, #20
1480815123 @ sp needed
14809
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
14810
-.L2574:
15124
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
15125
+.L2523:
15126
+ bl zftl_flash_exit_slc_mode
15127
+ b .L2524
15128
+.L2535:
1481115129 .align 2
14812
-.L2573:
15130
+.L2534:
1481315131 .word .LANCHOR0
1481415132 .word .LANCHOR2
14815
- .word .LC170
1481615133 .word .LC169
15134
+ .word .LC168
1481715135 .fnend
1481815136 .size flash_dual_page_prog, .-flash_dual_page_prog
1481915137 .align 2
1482015138 .global ymtc_flash_tlc_page_prog
15139
+ .syntax unified
15140
+ .arm
15141
+ .fpu softvfp
1482115142 .type ymtc_flash_tlc_page_prog, %function
1482215143 ymtc_flash_tlc_page_prog:
1482315144 .fnstart
1482415145 @ args = 0, pretend = 0, frame = 0
1482515146 @ frame_needed = 0, uses_anonymous_args = 0
14826
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr}
15147
+ push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, lr}
1482715148 .save {r4, r5, r6, r7, r8, r9, r10, lr}
1482815149 .pad #16
14829
- mov r8, r3
14830
- ldr r4, .L2582
15150
+ mov r10, r3
15151
+ ldr r3, .L2543
1483115152 mov r6, #1
14832
- add r7, r0, #8
1483315153 mov r5, r0
14834
- mov r9, r2
14835
- mov r10, r1
14836
- ldr r3, [r4, #1040]
14837
- ldrb r4, [r4, #1189] @ zero_extendqisi2
14838
- add r7, r3, r7, asl #8
15154
+ mov r8, r2
15155
+ add r2, r0, #8
15156
+ mov r9, r1
15157
+ ldrb r4, [r3, #1153] @ zero_extendqisi2
15158
+ ldr r7, [r3, #1044]
1483915159 rsb r4, r4, #24
14840
- mov r4, r6, asl r4
15160
+ lsl r4, r6, r4
15161
+ add r7, r7, r2, lsl #8
1484115162 sub r4, r4, #1
1484215163 and r4, r4, r1
1484315164 bl nandc_wait_flash_ready
....@@ -14845,179 +15166,180 @@
1484515166 bl nandc_cs
1484615167 mov r0, r5
1484715168 bl zftl_flash_exit_slc_mode
14848
- mov r1, r6
14849
- mov r2, #26
1485015169 mov r3, r5
15170
+ mov r2, #26
15171
+ mov r1, r6
15172
+ stm sp, {r4, r8, r10}
1485115173 mov r0, #0
14852
- stmia sp, {r4, r9}
14853
- str r8, [sp, #8]
1485415174 bl flash_start_one_pass_page_prog
1485515175 bl nandc_wait_flash_ready
1485615176 add r3, r4, r6
14857
- mov r1, r6
1485815177 mov r2, #26
15178
+ mov r1, r6
15179
+ str r3, [sp]
1485915180 mov r0, #0
14860
- add r4, r4, #2
14861
- stmia sp, {r3, r9}
1486215181 mov r3, r5
14863
- str r8, [sp, #8]
15182
+ stmib sp, {r8, r10}
15183
+ add r4, r4, #2
1486415184 bl flash_start_one_pass_page_prog
1486515185 bl nandc_wait_flash_ready
15186
+ mov r3, r5
1486615187 mov r2, #16
1486715188 mov r1, r6
14868
- mov r3, r5
1486915189 mov r0, #0
14870
- stmia sp, {r4, r9}
14871
- str r8, [sp, #8]
15190
+ stmib sp, {r8, r10}
15191
+ str r4, [sp]
1487215192 bl flash_start_one_pass_page_prog
1487315193 bl nandc_iqr_wait_flash_ready
1487415194 bl nandc_wait_flash_ready
1487515195 mov r0, r7
1487615196 bl flash_read_status
14877
- mov r4, r0
14878
- mov r0, r5
14879
- bl nandc_de_cs
14880
- ands r2, r4, #4
14881
- beq .L2576
14882
- ldr r3, .L2582+4
15197
+ bl nandc_de_cs.constprop.35
15198
+ ands r0, r0, #4
15199
+ beq .L2536
15200
+ ldr r3, .L2543+4
1488315201 ldr r3, [r3]
1488415202 tst r3, #4096
14885
- beq .L2577
14886
- ldr r0, .L2582+8
14887
- mov r1, r10
15203
+ beq .L2538
15204
+ mov r2, r0
15205
+ mov r1, r9
15206
+ ldr r0, .L2543+8
1488815207 bl printk
14889
-.L2577:
14890
- mvn r2, #0
14891
-.L2576:
14892
- mov r0, r2
15208
+.L2538:
15209
+ mvn r0, #0
15210
+.L2536:
1489315211 add sp, sp, #16
1489415212 @ sp needed
14895
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
14896
-.L2583:
15213
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
15214
+.L2544:
1489715215 .align 2
14898
-.L2582:
15216
+.L2543:
1489915217 .word .LANCHOR0
1490015218 .word .LANCHOR2
14901
- .word .LC171
15219
+ .word .LC170
1490215220 .fnend
1490315221 .size ymtc_flash_tlc_page_prog, .-ymtc_flash_tlc_page_prog
1490415222 .section .text.unlikely
1490515223 .align 2
14906
- .type fw_flash_page_prog.constprop.30, %function
14907
-fw_flash_page_prog.constprop.30:
15224
+ .syntax unified
15225
+ .arm
15226
+ .fpu softvfp
15227
+ .type fw_flash_page_prog.constprop.29, %function
15228
+fw_flash_page_prog.constprop.29:
1490815229 .fnstart
1490915230 @ args = 0, pretend = 0, frame = 0
1491015231 @ frame_needed = 0, uses_anonymous_args = 0
14911
- stmfd sp!, {r4, r5, r6, r7, r8, r9, lr}
15232
+ push {r4, r5, r6, r7, r8, r9, lr}
1491215233 .save {r4, r5, r6, r7, r8, r9, lr}
1491315234 mov r6, r1
14914
- ldr r4, .L2590
15235
+ ldr r4, .L2551
1491515236 .pad #20
1491615237 sub sp, sp, #20
14917
- mov r5, r2
14918
- ldr r3, [r4, #1096]
15238
+ mov r7, r2
15239
+ ldr r3, [r4, #1104]
1491915240 ldrb r1, [r3, #9] @ zero_extendqisi2
1492015241 bl __aeabi_uidiv
14921
- ldrb r8, [r4, #1172] @ zero_extendqisi2
14922
- mov r7, r0
14923
- ldrb r0, [r4, #1100] @ zero_extendqisi2
15242
+ mov r5, r0
15243
+ ldrb r0, [r4, #1108] @ zero_extendqisi2
15244
+ ldrb r8, [r4, #1193] @ zero_extendqisi2
1492415245 bl nandc_bch_sel
14925
- ldr r3, .L2590+4
15246
+ ldr r3, .L2551+4
1492615247 ldrb r2, [r3, #11] @ zero_extendqisi2
1492715248 cmp r2, #9
14928
- bne .L2585
14929
- ldrb r4, [r4, #1102] @ zero_extendqisi2
15249
+ bne .L2546
15250
+ ldrb r4, [r4, #1110] @ zero_extendqisi2
1493015251 cmp r4, #0
14931
- bne .L2585
15252
+ bne .L2546
1493215253 ldrb r3, [r3, #16] @ zero_extendqisi2
1493315254 cmp r3, #3
14934
- bne .L2586
14935
- mov r0, r4
14936
- mov r1, r7
15255
+ bne .L2547
15256
+ mov r3, r7
1493715257 mov r2, r6
14938
- mov r3, r5
15258
+ mov r1, r5
15259
+ mov r0, r4
1493915260 bl ymtc_flash_tlc_page_prog
14940
- b .L2589
14941
-.L2586:
14942
- ldr r9, .L2590+8
14943
- mov r1, #255
14944
- mov r2, #16384
14945
- ldr r0, [r9, #-128]
14946
- bl ftl_memset
14947
- ldr r3, [r9, #-128]
14948
- mov r0, r4
14949
- mov r1, r7
14950
- mov r2, r6
14951
- str r3, [sp]
14952
- str r3, [sp, #4]
14953
- mov r3, #4
14954
- str r3, [sp, #8]
14955
- mov r3, r5
14956
- bl flash_dual_page_prog
14957
- b .L2589
14958
-.L2585:
14959
- mov r3, #4
14960
- mov r0, #0
14961
- str r3, [sp]
14962
- mov r1, r7
14963
- mov r2, r6
14964
- mov r3, r5
14965
- bl flash_prog_page
14966
-.L2589:
15261
+.L2550:
1496715262 mov r4, r0
1496815263 mov r0, r8
1496915264 bl nandc_bch_sel
1497015265 mov r0, r4
1497115266 add sp, sp, #20
1497215267 @ sp needed
14973
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
14974
-.L2591:
15268
+ pop {r4, r5, r6, r7, r8, r9, pc}
15269
+.L2547:
15270
+ ldr r9, .L2551+8
15271
+ mov r2, #16384
15272
+ mov r1, #255
15273
+ ldr r0, [r9, #-120]
15274
+ bl ftl_memset
15275
+ ldr r3, [r9, #-120]
15276
+ mov r2, #4
15277
+ str r2, [sp, #8]
15278
+ mov r1, r5
15279
+ mov r2, r6
15280
+ mov r0, r4
15281
+ str r3, [sp, #4]
15282
+ str r3, [sp]
15283
+ mov r3, r7
15284
+ bl flash_dual_page_prog
15285
+ b .L2550
15286
+.L2546:
15287
+ mov r3, #4
15288
+ mov r2, r6
15289
+ str r3, [sp]
15290
+ mov r1, r5
15291
+ mov r3, r7
15292
+ mov r0, #0
15293
+ bl flash_prog_page
15294
+ b .L2550
15295
+.L2552:
1497515296 .align 2
14976
-.L2590:
15297
+.L2551:
1497715298 .word .LANCHOR0
1497815299 .word .LANCHOR2
1497915300 .word .LANCHOR3
1498015301 .fnend
14981
- .size fw_flash_page_prog.constprop.30, .-fw_flash_page_prog.constprop.30
15302
+ .size fw_flash_page_prog.constprop.29, .-fw_flash_page_prog.constprop.29
1498215303 .text
1498315304 .align 2
1498415305 .global flash_start_tlc_page_prog
15306
+ .syntax unified
15307
+ .arm
15308
+ .fpu softvfp
1498515309 .type flash_start_tlc_page_prog, %function
1498615310 flash_start_tlc_page_prog:
1498715311 .fnstart
1498815312 @ args = 12, pretend = 0, frame = 0
1498915313 @ frame_needed = 0, uses_anonymous_args = 0
14990
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
15314
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1499115315 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1499215316 .pad #12
14993
- mov r4, r3
14994
- ldr r3, .L2600
14995
- mov r8, r2
15317
+ mov r6, r3
15318
+ ldr r4, .L2561
1499615319 add r5, sp, #48
1499715320 mov fp, r0
1499815321 mov r7, r1
14999
- ldrb r2, [r3, #1101] @ zero_extendqisi2
15000
- mov r6, r3
15001
- ldmia r5, {r5, r9, r10}
15002
- cmp r2, r4
15003
- bhi .L2593
15004
- ldr r1, .L2600+4
15322
+ mov r8, r2
15323
+ ldm r5, {r5, r9, r10}
15324
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
15325
+ cmp r3, r6
15326
+ bhi .L2554
1500515327 mov r2, #868
15006
- ldr r0, .L2600+8
15328
+ ldr r1, .L2561+4
15329
+ ldr r0, .L2561+8
1500715330 bl printk
1500815331 bl dump_stack
15009
-.L2593:
15010
- ldrb r2, [r6, #1101] @ zero_extendqisi2
15011
- ldr r3, .L2600
15012
- cmp r2, r4
15013
- bls .L2592
15014
- add r4, r3, r4
15015
- ldrb r6, [r4, #1180] @ zero_extendqisi2
15016
- ldr r4, [r3, #1040]
15332
+.L2554:
15333
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
15334
+ cmp r3, r6
15335
+ bls .L2553
15336
+ add r6, r4, r6
15337
+ ldr r4, [r4, #1044]
15338
+ ldrb r6, [r6, #1144] @ zero_extendqisi2
1501715339 mov r0, r6
1501815340 bl nandc_cs
15341
+ lsl r3, r6, #8
1501915342 cmp fp, #0
15020
- mov r3, r6, asl #8
1502115343 addne r2, r4, r3
1502215344 add r4, r4, r3
1502315345 mov r3, #128
....@@ -15029,153 +15351,116 @@
1502915351 str r3, [r4, #2052]
1503015352 uxtb r3, r5
1503115353 str r3, [r4, #2052]
15032
- mov r3, r5, lsr #8
15354
+ lsr r3, r5, #8
1503315355 str r3, [r4, #2052]
15034
- mov r3, r5, lsr #16
15035
- add r5, r5, r5, asl #1
15356
+ lsr r3, r5, #16
15357
+ add r5, r5, r5, lsl #1
1503615358 str r3, [r4, #2052]
1503715359 sub r0, r5, #1
1503815360 add r0, r0, r7
1503915361 bl nandc_set_seed
15040
- ldr r3, .L2600+12
15041
- mov r0, r6
15362
+ ldr r3, .L2561+12
1504215363 mov r1, #1
15364
+ mov r0, r6
1504315365 ldrb r2, [r3, #13] @ zero_extendqisi2
1504415366 mov r3, r9
1504515367 str r10, [sp]
1504615368 bl nandc_xfer
1504715369 str r8, [r4, #2056]
15048
- mov r0, r6
1504915370 add sp, sp, #12
1505015371 @ sp needed
15051
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15052
- b nandc_de_cs
15053
-.L2592:
15372
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15373
+ b nandc_de_cs.constprop.35
15374
+.L2553:
1505415375 add sp, sp, #12
1505515376 @ sp needed
15056
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
15057
-.L2601:
15377
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
15378
+.L2562:
1505815379 .align 2
15059
-.L2600:
15380
+.L2561:
1506015381 .word .LANCHOR0
15061
- .word .LANCHOR1+2080
15382
+ .word .LANCHOR1+1901
1506215383 .word .LC0
1506315384 .word .LANCHOR2
1506415385 .fnend
1506515386 .size flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
1506615387 .align 2
15388
+ .syntax unified
15389
+ .arm
15390
+ .fpu softvfp
1506715391 .type queue_tlc_prog_cmd, %function
1506815392 queue_tlc_prog_cmd:
1506915393 .fnstart
1507015394 @ args = 0, pretend = 0, frame = 0
1507115395 @ frame_needed = 0, uses_anonymous_args = 0
15072
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
15396
+ push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
1507315397 .save {r4, r5, r6, r7, r8, lr}
1507415398 .pad #16
15075
- mov r8, #1
15076
- ldr r2, .L2607
15399
+ mov r8, r1
15400
+ ldr r1, .L2568
15401
+ mov r7, #1
1507715402 mov r6, r0
15078
- ldr r3, [r0]
15079
- mov r7, r1
15080
- ldrb r4, [r2, #1189] @ zero_extendqisi2
15081
- ldr r0, [r3, #24]
15082
- rsb r1, r4, #24
15083
- ldrb r2, [r2, #1197] @ zero_extendqisi2
15084
- mov r4, r8, asl r4
15085
- mov r5, r8, asl r1
15403
+ ldr r2, [r0]
15404
+ ldrb r3, [r1, #1153] @ zero_extendqisi2
15405
+ ldr ip, [r2, #24]
15406
+ rsb r0, r3, #24
15407
+ lsl r4, r7, r3
15408
+ ldrb r3, [r1, #1159] @ zero_extendqisi2
15409
+ lsl r5, r7, r0
1508615410 sub r4, r4, #1
15087
- cmp r2, #0
15088
- and r4, r4, r0, lsr r1
15411
+ and r4, r4, ip, lsr r0
15412
+ cmp r3, #0
1508915413 sub r5, r5, #1
15090
- and r5, r5, r0
15414
+ and r5, r5, ip
1509115415 uxtb r4, r4
15092
- beq .L2603
15416
+ beq .L2564
1509315417 mov r0, r4
1509415418 bl zftl_flash_exit_slc_mode
1509515419 ldr r3, [r6]
15096
- mov r1, r8
15420
+ mov r1, r7
1509715421 mov r0, #0
15098
- str r5, [sp]
15099
- ldr r2, [r3, #4]
15100
- str r2, [sp, #4]
15422
+ ldr r2, [r3, #12]
15423
+ str r2, [sp, #8]
1510115424 mov r2, #26
15102
- ldr r3, [r3, #12]
15103
- str r3, [sp, #8]
15425
+ ldr r3, [r3, #4]
15426
+ str r5, [sp]
15427
+ str r3, [sp, #4]
1510415428 mov r3, r4
1510515429 bl flash_start_one_pass_page_prog
1510615430 bl nandc_iqr_wait_flash_ready
1510715431 bl nandc_wait_flash_ready
1510815432 ldr r3, [r6, #4]
15109
- add r2, r5, r8
15110
- mov r1, r8
15433
+ mov r1, r7
1511115434 mov r0, #0
15435
+ ldr r2, [r3, #12]
15436
+ str r2, [sp, #8]
15437
+ mov r2, #26
15438
+ ldr r3, [r3, #4]
15439
+ str r3, [sp, #4]
15440
+ add r3, r5, r7
15441
+ str r3, [sp]
15442
+ mov r3, r4
15443
+ bl flash_start_one_pass_page_prog
15444
+ bl nandc_iqr_wait_flash_ready
15445
+ bl nandc_wait_flash_ready
15446
+ ldr r3, [r6, #8]
1511215447 add r5, r5, #2
15113
- str r2, [sp]
15114
- ldr r2, [r3, #4]
15115
- str r2, [sp, #4]
15116
- mov r2, #26
15117
- ldr r3, [r3, #12]
15118
- str r3, [sp, #8]
15119
- mov r3, r4
15120
- bl flash_start_one_pass_page_prog
15121
- bl nandc_iqr_wait_flash_ready
15122
- bl nandc_wait_flash_ready
15123
- ldr r3, [r6, #8]
15448
+ mov r1, r7
1512415449 mov r0, #0
15125
- mov r1, r8
15126
- str r5, [sp]
15127
- ldr r2, [r3, #4]
15128
- str r2, [sp, #4]
15450
+ ldr r2, [r3, #12]
15451
+ str r2, [sp, #8]
1512915452 mov r2, #16
15130
- ldr r3, [r3, #12]
15131
- str r3, [sp, #8]
15453
+ ldr r3, [r3, #4]
15454
+ str r5, [sp]
15455
+ str r3, [sp, #4]
1513215456 mov r3, r4
1513315457 bl flash_start_one_pass_page_prog
15134
- b .L2604
15135
-.L2603:
15136
- ldrb r0, [r3, #44] @ zero_extendqisi2
15137
- mov r1, r8
15138
- str r5, [sp]
15139
- ldr r2, [r3, #4]
15140
- str r2, [sp, #4]
15141
- mov r2, #26
15142
- ldr r3, [r3, #12]
15143
- str r3, [sp, #8]
15144
- mov r3, r4
15145
- bl flash_start_tlc_page_prog
15146
- bl nandc_iqr_wait_flash_ready
15147
- bl nandc_wait_flash_ready
15148
- ldmia r6, {r2, r3}
15149
- mov r1, #2
15150
- ldrb r0, [r2, #44] @ zero_extendqisi2
15151
- str r5, [sp]
15152
- ldr r2, [r3, #4]
15153
- str r2, [sp, #4]
15154
- mov r2, #26
15155
- ldr r3, [r3, #12]
15156
- str r3, [sp, #8]
15157
- mov r3, r4
15158
- bl flash_start_tlc_page_prog
15159
- bl nandc_iqr_wait_flash_ready
15160
- bl nandc_wait_flash_ready
15161
- ldr r3, [r6, #8]
15162
- ldr r2, [r6]
15163
- mov r1, #3
15164
- ldrb r0, [r2, #44] @ zero_extendqisi2
15165
- str r5, [sp]
15166
- ldr r2, [r3, #4]
15167
- str r2, [sp, #4]
15168
- mov r2, #16
15169
- ldr r3, [r3, #12]
15170
- str r3, [sp, #8]
15171
- mov r3, r4
15172
- bl flash_start_tlc_page_prog
15173
-.L2604:
15174
- cmp r7, #0
15175
- beq .L2602
15458
+.L2565:
15459
+ cmp r8, #0
15460
+ beq .L2563
1517615461 ldr r1, [r6]
1517715462 mov r3, #4
15178
- ldr r0, .L2607+4
15463
+ ldr r0, .L2568+4
1517915464 strb r3, [r1, #42]
1518015465 mov r3, #1
1518115466 strb r3, [r1, #43]
....@@ -15183,242 +15468,288 @@
1518315468 strb r3, [r1]
1518415469 add sp, sp, #16
1518515470 @ sp needed
15186
- ldmfd sp!, {r4, r5, r6, r7, r8, lr}
15471
+ pop {r4, r5, r6, r7, r8, lr}
1518715472 b buf_add_tail
15188
-.L2602:
15473
+.L2564:
15474
+ ldr r3, [r2, #12]
15475
+ mov r1, r7
15476
+ ldrb r0, [r2, #44] @ zero_extendqisi2
15477
+ str r3, [sp, #8]
15478
+ ldr r3, [r2, #4]
15479
+ mov r2, #26
15480
+ str r5, [sp]
15481
+ str r3, [sp, #4]
15482
+ mov r3, r4
15483
+ bl flash_start_tlc_page_prog
15484
+ bl nandc_iqr_wait_flash_ready
15485
+ bl nandc_wait_flash_ready
15486
+ ldm r6, {r2, r3}
15487
+ mov r1, #2
15488
+ ldrb r0, [r2, #44] @ zero_extendqisi2
15489
+ ldr r2, [r3, #12]
15490
+ str r2, [sp, #8]
15491
+ mov r2, #26
15492
+ ldr r3, [r3, #4]
15493
+ str r5, [sp]
15494
+ str r3, [sp, #4]
15495
+ mov r3, r4
15496
+ bl flash_start_tlc_page_prog
15497
+ bl nandc_iqr_wait_flash_ready
15498
+ bl nandc_wait_flash_ready
15499
+ ldr r3, [r6, #8]
15500
+ mov r1, #3
15501
+ ldr r2, [r6]
15502
+ ldrb r0, [r2, #44] @ zero_extendqisi2
15503
+ ldr r2, [r3, #12]
15504
+ str r2, [sp, #8]
15505
+ mov r2, #16
15506
+ ldr r3, [r3, #4]
15507
+ str r5, [sp]
15508
+ str r3, [sp, #4]
15509
+ mov r3, r4
15510
+ bl flash_start_tlc_page_prog
15511
+ b .L2565
15512
+.L2563:
1518915513 add sp, sp, #16
1519015514 @ sp needed
15191
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
15192
-.L2608:
15515
+ pop {r4, r5, r6, r7, r8, pc}
15516
+.L2569:
1519315517 .align 2
15194
-.L2607:
15518
+.L2568:
1519515519 .word .LANCHOR0
15196
- .word .LANCHOR0+2775
15520
+ .word .LANCHOR0+2770
1519715521 .fnend
1519815522 .size queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
1519915523 .align 2
1520015524 .global sblk_3d_tlc_dump_prog
15525
+ .syntax unified
15526
+ .arm
15527
+ .fpu softvfp
1520115528 .type sblk_3d_tlc_dump_prog, %function
1520215529 sblk_3d_tlc_dump_prog:
1520315530 .fnstart
1520415531 @ args = 0, pretend = 0, frame = 0
1520515532 @ frame_needed = 0, uses_anonymous_args = 0
15206
- stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
15533
+ push {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
1520715534 .save {r4, r5, r6, r7, r8, lr}
1520815535 .pad #16
1520915536 mov r7, #1
15210
- ldr r3, .L2613
15537
+ ldr r2, .L2574
1521115538 mov r5, r0
15212
- ldr r1, [r0, #24]
15213
- ldrb r4, [r3, #1189] @ zero_extendqisi2
15214
- ldrb r8, [r3, #1197] @ zero_extendqisi2
15215
- rsb r2, r4, #24
15216
- mov r4, r7, asl r4
15539
+ ldr r0, [r0, #24]
15540
+ ldrb r3, [r2, #1153] @ zero_extendqisi2
15541
+ ldrb r8, [r2, #1159] @ zero_extendqisi2
15542
+ rsb r1, r3, #24
15543
+ lsl r4, r7, r3
15544
+ lsl r6, r7, r1
1521715545 sub r4, r4, #1
15218
- mov r6, r7, asl r2
15219
- and r4, r4, r1, lsr r2
1522015546 cmp r8, #0
15547
+ and r4, r4, r0, lsr r1
1522115548 sub r6, r6, #1
15222
- and r6, r6, r1
15549
+ and r6, r6, r0
1522315550 uxtb r4, r4
15224
- beq .L2610
15551
+ beq .L2571
1522515552 mov r0, r4
1522615553 bl zftl_flash_exit_slc_mode
15227
- ldr r3, [r5, #4]
15228
- mov r1, r7
15229
- mov r2, #26
15230
- mov r0, #0
15231
- str r3, [sp, #4]
1523215554 ldr r3, [r5, #12]
15555
+ mov r2, #26
15556
+ mov r1, r7
15557
+ mov r0, #0
1523315558 str r6, [sp]
1523415559 str r3, [sp, #8]
15560
+ ldr r3, [r5, #4]
15561
+ str r3, [sp, #4]
1523515562 mov r3, r4
1523615563 bl flash_start_one_pass_page_prog
1523715564 bl nandc_iqr_wait_flash_ready
1523815565 bl nandc_wait_flash_ready
15566
+ ldr r3, [r5, #12]
15567
+ mov r2, #26
15568
+ mov r1, r7
15569
+ mov r0, #0
15570
+ str r3, [sp, #8]
15571
+ ldr r3, [r5, #4]
15572
+ str r3, [sp, #4]
1523915573 add r3, r6, r7
15240
- mov r1, r7
15241
- mov r2, #26
15242
- mov r0, #0
15243
- add r6, r6, #2
1524415574 str r3, [sp]
15245
- ldr r3, [r5, #4]
15246
- str r3, [sp, #4]
15247
- ldr r3, [r5, #12]
15248
- str r3, [sp, #8]
1524915575 mov r3, r4
1525015576 bl flash_start_one_pass_page_prog
1525115577 bl nandc_iqr_wait_flash_ready
1525215578 bl nandc_wait_flash_ready
15253
- ldr r3, [r5, #4]
15579
+ ldr r3, [r5, #12]
15580
+ add r6, r6, #2
15581
+ str r6, [sp]
15582
+ mov r2, #16
15583
+ mov r1, r7
1525415584 mov r0, #0
15255
- mov r1, r7
15256
- mov r2, #16
15257
- str r3, [sp, #4]
15258
- ldr r3, [r5, #12]
15259
- str r6, [sp]
1526015585 str r3, [sp, #8]
15586
+ ldr r3, [r5, #4]
15587
+ str r3, [sp, #4]
1526115588 mov r3, r4
1526215589 bl flash_start_one_pass_page_prog
15263
- b .L2611
15264
-.L2610:
15265
- str r6, [sp]
15266
- mov r1, r7
15267
- ldr r3, [r0, #4]
15268
- mov r2, #26
15269
- str r3, [sp, #4]
15270
- ldr r3, [r0, #12]
15271
- mov r0, r8
15272
- str r3, [sp, #8]
15273
- mov r3, r4
15274
- bl flash_start_tlc_page_prog
15590
+.L2572:
1527515591 bl nandc_iqr_wait_flash_ready
1527615592 bl nandc_wait_flash_ready
15277
- ldr r3, [r5, #4]
15278
- mov r1, #2
15279
- mov r2, #26
15280
- mov r0, r8
15281
- str r3, [sp, #4]
15282
- ldr r3, [r5, #12]
15283
- str r6, [sp]
15284
- str r3, [sp, #8]
15285
- mov r3, r4
15286
- bl flash_start_tlc_page_prog
15287
- bl nandc_iqr_wait_flash_ready
15288
- bl nandc_wait_flash_ready
15289
- ldr r3, [r5, #4]
15290
- mov r0, r8
15291
- mov r1, #3
15292
- mov r2, #16
15293
- str r3, [sp, #4]
15294
- ldr r3, [r5, #12]
15295
- str r6, [sp]
15296
- str r3, [sp, #8]
15297
- mov r3, r4
15298
- bl flash_start_tlc_page_prog
15299
-.L2611:
15300
- bl nandc_iqr_wait_flash_ready
15301
- bl nandc_wait_flash_ready
15302
- ldr r0, [r5, #24]
1530315593 mov r1, #64
15594
+ ldr r0, [r5, #24]
1530415595 add sp, sp, #16
1530515596 @ sp needed
15306
- ldmfd sp!, {r4, r5, r6, r7, r8, lr}
15597
+ pop {r4, r5, r6, r7, r8, lr}
1530715598 b flash_wait_device_ready
15308
-.L2614:
15599
+.L2571:
15600
+ ldr r3, [r5, #12]
15601
+ mov r1, r7
15602
+ mov r2, #26
15603
+ mov r0, r8
15604
+ str r6, [sp]
15605
+ str r3, [sp, #8]
15606
+ ldr r3, [r5, #4]
15607
+ str r3, [sp, #4]
15608
+ mov r3, r4
15609
+ bl flash_start_tlc_page_prog
15610
+ bl nandc_iqr_wait_flash_ready
15611
+ bl nandc_wait_flash_ready
15612
+ ldr r3, [r5, #12]
15613
+ mov r2, #26
15614
+ mov r1, #2
15615
+ mov r0, r8
15616
+ str r6, [sp]
15617
+ str r3, [sp, #8]
15618
+ ldr r3, [r5, #4]
15619
+ str r3, [sp, #4]
15620
+ mov r3, r4
15621
+ bl flash_start_tlc_page_prog
15622
+ bl nandc_iqr_wait_flash_ready
15623
+ bl nandc_wait_flash_ready
15624
+ ldr r3, [r5, #12]
15625
+ mov r2, #16
15626
+ str r6, [sp]
15627
+ mov r1, #3
15628
+ mov r0, r8
15629
+ str r3, [sp, #8]
15630
+ ldr r3, [r5, #4]
15631
+ str r3, [sp, #4]
15632
+ mov r3, r4
15633
+ bl flash_start_tlc_page_prog
15634
+ b .L2572
15635
+.L2575:
1530915636 .align 2
15310
-.L2613:
15637
+.L2574:
1531115638 .word .LANCHOR0
1531215639 .fnend
1531315640 .size sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
1531415641 .align 2
1531515642 .global flash_start_3d_mlc_page_prog
15643
+ .syntax unified
15644
+ .arm
15645
+ .fpu softvfp
1531615646 .type flash_start_3d_mlc_page_prog, %function
1531715647 flash_start_3d_mlc_page_prog:
1531815648 .fnstart
1531915649 @ args = 4, pretend = 0, frame = 0
1532015650 @ frame_needed = 0, uses_anonymous_args = 0
15321
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
15651
+ push {r0, r1, r4, r5, r6, r7, r8, lr}
1532215652 .save {r4, r5, r6, r7, r8, lr}
1532315653 .pad #8
1532415654 mov r8, r3
15325
- ldr r3, .L2619
15326
- mov r5, r2
15655
+ ldr r4, .L2580
1532715656 mov r7, r0
15328
- mov r4, r1
15329
- ldrb r2, [r3, #1101] @ zero_extendqisi2
15330
- mov r6, r3
15331
- cmp r2, r1
15332
- bhi .L2616
15333
- ldr r1, .L2619+4
15657
+ mov r5, r1
15658
+ mov r6, r2
15659
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
15660
+ cmp r3, r1
15661
+ bhi .L2577
1533415662 movw r2, #903
15335
- ldr r0, .L2619+8
15663
+ ldr r1, .L2580+4
15664
+ ldr r0, .L2580+8
1533615665 bl printk
1533715666 bl dump_stack
15338
-.L2616:
15339
- ldrb r2, [r6, #1101] @ zero_extendqisi2
15340
- ldr r3, .L2619
15341
- cmp r2, r4
15342
- bls .L2615
15343
- add r4, r3, r4
15344
- ldrb r6, [r4, #1180] @ zero_extendqisi2
15345
- ldr r4, [r3, #1040]
15346
- add r4, r4, r6, asl #8
15347
- mov r0, r6
15667
+.L2577:
15668
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
15669
+ cmp r3, r5
15670
+ bls .L2576
15671
+ add r5, r4, r5
15672
+ ldr r4, [r4, #1044]
15673
+ ldrb r5, [r5, #1144] @ zero_extendqisi2
15674
+ mov r0, r5
15675
+ add r4, r4, r5, lsl #8
1534815676 bl nandc_cs
1534915677 mov r3, #128
15350
- mov r0, r5
15678
+ mov r0, r6
1535115679 str r3, [r4, #2056]
1535215680 mov r3, #0
1535315681 str r3, [r4, #2052]
1535415682 str r3, [r4, #2052]
15355
- uxtb r3, r5
15683
+ uxtb r3, r6
1535615684 str r3, [r4, #2052]
15357
- mov r3, r5, lsr #8
15685
+ lsr r3, r6, #8
1535815686 str r3, [r4, #2052]
15359
- mov r3, r5, lsr #16
15687
+ lsr r3, r6, #16
1536015688 str r3, [r4, #2052]
1536115689 bl nandc_set_seed
15362
- ldr r3, .L2619+12
15363
- mov r0, r6
15690
+ ldr r3, .L2580+12
1536415691 mov r1, #1
15692
+ mov r0, r5
1536515693 ldrb r2, [r3, #13] @ zero_extendqisi2
1536615694 ldr r3, [sp, #32]
1536715695 str r3, [sp]
1536815696 mov r3, r8
1536915697 bl nandc_xfer
1537015698 str r7, [r4, #2056]
15371
-.L2615:
15699
+.L2576:
1537215700 add sp, sp, #8
1537315701 @ sp needed
15374
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
15375
-.L2620:
15702
+ pop {r4, r5, r6, r7, r8, pc}
15703
+.L2581:
1537615704 .align 2
15377
-.L2619:
15705
+.L2580:
1537815706 .word .LANCHOR0
15379
- .word .LANCHOR1+2108
15707
+ .word .LANCHOR1+1927
1538015708 .word .LC0
1538115709 .word .LANCHOR2
1538215710 .fnend
1538315711 .size flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
1538415712 .align 2
1538515713 .global sblk_mlc_dump_prog
15714
+ .syntax unified
15715
+ .arm
15716
+ .fpu softvfp
1538615717 .type sblk_mlc_dump_prog, %function
1538715718 sblk_mlc_dump_prog:
1538815719 .fnstart
1538915720 @ args = 0, pretend = 0, frame = 0
1539015721 @ frame_needed = 0, uses_anonymous_args = 0
15391
- ldr r3, .L2627
15392
- stmfd sp!, {r0, r1, r4, r5, r6, lr}
15722
+ ldr r3, .L2588
15723
+ push {r0, r1, r4, r5, r6, lr}
1539315724 .save {r4, r5, r6, lr}
1539415725 .pad #8
15395
- mov r4, #1
15396
- ldrb r1, [r3, #1189] @ zero_extendqisi2
1539715726 mov r5, r0
15398
- ldr r2, [r0, #24]
15399
- rsb r3, r1, #24
15400
- mov r6, r4, asl r3
15401
- mov r4, r4, asl r1
15727
+ ldr r1, [r0, #24]
15728
+ ldrb r4, [r3, #1153] @ zero_extendqisi2
15729
+ mov r3, #1
15730
+ rsb r2, r4, #24
15731
+ lsl r4, r3, r4
15732
+ lsl r6, r3, r2
1540215733 sub r4, r4, #1
1540315734 sub r6, r6, #1
15404
- and r4, r4, r2, lsr r3
15405
- and r6, r6, r2
15735
+ and r4, r4, r1, lsr r2
15736
+ and r6, r6, r1
1540615737 uxtb r4, r4
1540715738 mov r0, r4
1540815739 bl zftl_flash_exit_slc_mode
15409
- ldr r3, .L2627+4
15740
+ ldr r3, .L2588+4
1541015741 ldr r3, [r3]
1541115742 tst r3, #4096
15412
- beq .L2622
15743
+ beq .L2583
1541315744 ldr r2, [r5, #24]
1541415745 mov r1, r6
15415
- ldr r0, .L2627+8
15746
+ ldr r0, .L2588+8
1541615747 add r3, r2, #1
1541715748 bl printk
15418
-.L2622:
15749
+.L2583:
1541915750 ldr r3, [r5, #12]
15420
- mov r1, r4
1542115751 mov r2, r6
15752
+ mov r1, r4
1542215753 mov r0, #16
1542315754 str r3, [sp]
1542415755 ldr r3, [r5, #4]
....@@ -15437,100 +15768,87 @@
1543715768 mov r1, #64
1543815769 ldr r0, [r5, #24]
1543915770 bl flash_wait_device_ready
15440
- mov r5, r0
15441
- mov r0, r4
15442
- bl nandc_de_cs
15443
- mov r0, r5
15771
+ bl nandc_de_cs.constprop.35
1544415772 add sp, sp, #8
1544515773 @ sp needed
15446
- ldmfd sp!, {r4, r5, r6, pc}
15447
-.L2628:
15774
+ pop {r4, r5, r6, pc}
15775
+.L2589:
1544815776 .align 2
15449
-.L2627:
15777
+.L2588:
1545015778 .word .LANCHOR0
1545115779 .word .LANCHOR2
15452
- .word .LC172
15780
+ .word .LC171
1545315781 .fnend
1545415782 .size sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
1545515783 .align 2
1545615784 .global flash_start_page_prog
15785
+ .syntax unified
15786
+ .arm
15787
+ .fpu softvfp
1545715788 .type flash_start_page_prog, %function
1545815789 flash_start_page_prog:
1545915790 .fnstart
1546015791 @ args = 0, pretend = 0, frame = 8
1546115792 @ frame_needed = 0, uses_anonymous_args = 0
15462
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15793
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1546315794 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15464
- mov fp, r3
15465
- ldr r6, .L2644
15466
- mvn r3, #0
1546715795 mov r10, r2
15796
+ ldr r5, .L2605
15797
+ mov fp, r3
15798
+ mov r8, r1
1546815799 .pad #20
1546915800 sub sp, sp, #20
15470
- mov r8, r1
15471
- ldrb r4, [r6, #1189] @ zero_extendqisi2
15472
- ldrb r2, [r6, #1101] @ zero_extendqisi2
15473
- rsb r7, r4, #24
15474
- str r0, [sp, #8]
15475
- mvn r4, r3, asl r4
15476
- and r5, r4, r1, lsr r7
15477
- uxtb r9, r5
15801
+ str r0, [sp, #12]
15802
+ ldrb r2, [r5, #1153] @ zero_extendqisi2
15803
+ rsb r4, r2, #24
15804
+ lsr r3, r1, r4
15805
+ mvn r1, #0
15806
+ bic r3, r3, r1, lsl r2
15807
+ ldrb r2, [r5, #1109] @ zero_extendqisi2
15808
+ uxtb r9, r3
1547815809 cmp r2, r9
15479
- bhi .L2630
15480
- ldr r1, .L2644+4
15810
+ bhi .L2591
1548115811 mov r2, #956
15482
- ldr r0, .L2644+8
15812
+ ldr r1, .L2605+4
15813
+ ldr r0, .L2605+8
1548315814 bl printk
1548415815 bl dump_stack
15485
-.L2630:
15486
- ldrb r1, [r6, #1101] @ zero_extendqisi2
15487
- ldr r2, .L2644
15488
- cmp r1, r9
15489
- bls .L2629
15490
- add r1, r2, r9
15491
- mvn r4, #0
15492
- str r2, [sp, #12]
15493
- bic r4, r8, r4, asl r7
15494
- ldrb r5, [r1, #1180] @ zero_extendqisi2
15495
- ldr r7, [r2, #1040]
15816
+.L2591:
15817
+ ldrb r2, [r5, #1109] @ zero_extendqisi2
15818
+ cmp r2, r9
15819
+ bls .L2590
15820
+ mvn r2, #0
15821
+ ldr r7, [r5, #1044]
15822
+ bic r4, r8, r2, lsl r4
15823
+ add r2, r5, r9
15824
+ ldrb r6, [r2, #1144] @ zero_extendqisi2
1549615825 bl nandc_rdy_status
1549715826 cmp r0, #0
15498
- ldr r2, [sp, #12]
15499
- bne .L2632
15500
- ldrb r2, [r2, #1101] @ zero_extendqisi2
15827
+ bne .L2593
15828
+ ldrb r2, [r5, #1109] @ zero_extendqisi2
1550115829 cmp r2, #1
15502
- bne .L2633
15830
+ bne .L2594
1550315831 bl nandc_wait_flash_ready
15504
- b .L2632
15505
-.L2633:
15506
- mov r0, r9
15507
- mov r1, r4
15508
- mov r2, #64
15509
- bl flash_wait_device_ready_raw
15510
-.L2632:
15511
- mov r0, r5
15832
+.L2593:
15833
+ mov r0, r6
1551215834 bl hynix_reconfig_rr_para
15513
- mov r0, r5
15835
+ mov r0, r6
1551415836 bl nandc_cs
1551515837 tst r8, #50331648
15516
- bne .L2634
15838
+ bne .L2595
1551715839 mov r0, r4
1551815840 bl slc_phy_page_address_calc
15519
- ldrb r3, [r6] @ zero_extendqisi2
15520
- cmp r3, #0
15841
+ ldrb r3, [r5] @ zero_extendqisi2
1552115842 mov r4, r0
15522
- beq .L2635
15523
- mov r0, r5
15843
+ cmp r3, #0
15844
+ beq .L2596
15845
+ mov r0, r6
1552415846 bl zftl_flash_enter_slc_mode
15525
- b .L2635
15526
-.L2634:
15527
- mov r0, r5
15528
- bl zftl_flash_exit_slc_mode
15529
-.L2635:
15530
- mov r8, r5, asl #8
15847
+.L2596:
15848
+ lsl r8, r6, #8
1553115849 mov r2, #128
15532
- add r3, r7, r8
1553315850 mov r0, r4
15851
+ add r3, r7, r8
1553415852 add r7, r7, r8
1553515853 str r2, [r3, #2056]
1553615854 mov r2, #0
....@@ -15538,1909 +15856,1919 @@
1553815856 str r2, [r3, #2052]
1553915857 uxtb r2, r4
1554015858 str r2, [r3, #2052]
15541
- mov r2, r4, lsr #8
15859
+ lsr r2, r4, #8
1554215860 str r2, [r3, #2052]
15543
- mov r2, r4, lsr #16
15861
+ lsr r2, r4, #16
1554415862 str r2, [r3, #2052]
15545
- ldrb r2, [r6, #1188] @ zero_extendqisi2
15863
+ ldrb r2, [r5, #1152] @ zero_extendqisi2
1554615864 cmp r2, #0
15547
- movne r2, r4, lsr #24
15865
+ lsrne r2, r4, #24
1554815866 strne r2, [r3, #2052]
1554915867 bl nandc_set_seed
15550
- ldr r3, .L2644+12
15551
- mov r0, r5
15868
+ ldr r3, .L2605+12
1555215869 mov r1, #1
15870
+ mov r0, r6
1555315871 ldrb r2, [r3, #13] @ zero_extendqisi2
1555415872 mov r3, r10
1555515873 str fp, [sp]
1555615874 bl nandc_xfer
15557
- mov r0, r5
15558
- ldr r3, [sp, #8]
15875
+ ldr r3, [sp, #12]
1555915876 str r3, [r7, #2056]
1556015877 add sp, sp, #20
1556115878 @ sp needed
15562
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15563
- b nandc_de_cs
15564
-.L2629:
15879
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15880
+ b nandc_de_cs.constprop.35
15881
+.L2594:
15882
+ mov r2, #64
15883
+ mov r1, r4
15884
+ mov r0, r9
15885
+ bl flash_wait_device_ready_raw
15886
+ b .L2593
15887
+.L2595:
15888
+ mov r0, r6
15889
+ bl zftl_flash_exit_slc_mode
15890
+ b .L2596
15891
+.L2590:
1556515892 add sp, sp, #20
1556615893 @ sp needed
15567
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
15568
-.L2645:
15894
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
15895
+.L2606:
1556915896 .align 2
15570
-.L2644:
15897
+.L2605:
1557115898 .word .LANCHOR0
15572
- .word .LANCHOR1+2140
15899
+ .word .LANCHOR1+1956
1557315900 .word .LC0
1557415901 .word .LANCHOR2
1557515902 .fnend
1557615903 .size flash_start_page_prog, .-flash_start_page_prog
1557715904 .align 2
15905
+ .syntax unified
15906
+ .arm
15907
+ .fpu softvfp
1557815908 .type queue_prog_cmd, %function
1557915909 queue_prog_cmd:
1558015910 .fnstart
1558115911 @ args = 0, pretend = 0, frame = 0
1558215912 @ frame_needed = 0, uses_anonymous_args = 0
15583
- stmfd sp!, {r4, r5, r6, lr}
15584
- .save {r4, r5, r6, lr}
15913
+ push {r4, r5, r6, r7, r8, lr}
15914
+ .save {r4, r5, r6, r7, r8, lr}
1558515915 mov r4, r0
15586
- ldr r2, [r4, #4]
15916
+ ldr r3, [r0, #12]
15917
+ ldr r2, [r0, #4]
15918
+ ldr r1, [r0, #24]
1558715919 mov r0, #16
15588
- ldr r3, [r4, #12]
15589
- ldr r1, [r4, #24]
1559015920 bl flash_start_page_prog
15591
- ldr r2, .L2655
15921
+ ldr r2, .L2616
1559215922 ldr r0, [r4, #24]
15593
- ldrb r3, [r2, #2775] @ zero_extendqisi2
15923
+ ldrb r3, [r2, #2770] @ zero_extendqisi2
1559415924 cmp r3, #255
15595
- beq .L2647
15596
- ldrb ip, [r2, #1189] @ zero_extendqisi2
15925
+ beq .L2608
15926
+ ldrb ip, [r2, #1153] @ zero_extendqisi2
1559715927 mvn r1, #0
1559815928 mov r5, #48
15599
- rsb r6, ip, #24
15600
- mvn r1, r1, asl ip
15929
+ movw r8, #1256
15930
+ movw r6, #1274
15931
+ rsb r7, ip, #24
15932
+ mvn r1, r1, lsl ip
1560115933 uxth r1, r1
15602
- and r0, r1, r0, asr r6
15603
-.L2649:
15604
- mla lr, r5, r3, r2
15605
- ldr ip, [lr, #1260]
15606
- and ip, r1, ip, lsr r6
15607
- cmp r0, ip
15608
- bne .L2648
15609
- add ip, lr, #1264
15610
- ldrb lr, [lr, #1278] @ zero_extendqisi2
15611
- add ip, ip, #12
15612
- cmp lr, #7
15613
- moveq r3, #3
15614
- streqb r3, [ip, #2]
15615
- beq .L2647
15616
-.L2648:
15617
- mla r3, r5, r3, r2
15618
- ldrb r3, [r3, #1236] @ zero_extendqisi2
15619
- cmp r3, #255
15620
- bne .L2649
15621
-.L2647:
15934
+ and r0, r1, r0, asr r7
15935
+.L2610:
15936
+ mla ip, r5, r3, r2
15937
+ ldr lr, [ip, r8]
15938
+ and lr, r1, lr, lsr r7
15939
+ cmp r0, lr
15940
+ bne .L2609
15941
+ add lr, ip, r6
15942
+ ldrb ip, [ip, r6] @ zero_extendqisi2
15943
+ cmp ip, #7
15944
+ bne .L2609
15945
+ mov r3, #3
15946
+ strb r3, [lr]
15947
+.L2608:
1562215948 mov r3, #3
1562315949 mov r1, r4
1562415950 strb r3, [r4, #42]
1562515951 mov r3, #1
15626
- ldr r0, .L2655+4
1562715952 strb r3, [r4, #43]
1562815953 mvn r3, #0
1562915954 strb r3, [r4]
15630
- ldmfd sp!, {r4, r5, r6, lr}
15955
+ ldr r0, .L2616+4
15956
+ pop {r4, r5, r6, r7, r8, lr}
1563115957 b buf_add_tail
15632
-.L2656:
15958
+.L2609:
15959
+ mla r3, r5, r3, r2
15960
+ ldrb r3, [r3, #1232] @ zero_extendqisi2
15961
+ cmp r3, #255
15962
+ bne .L2610
15963
+ b .L2608
15964
+.L2617:
1563315965 .align 2
15634
-.L2655:
15966
+.L2616:
1563515967 .word .LANCHOR0
15636
- .word .LANCHOR0+2775
15968
+ .word .LANCHOR0+2770
1563715969 .fnend
1563815970 .size queue_prog_cmd, .-queue_prog_cmd
1563915971 .align 2
1564015972 .global flash_complete_plane_page_read
15973
+ .syntax unified
15974
+ .arm
15975
+ .fpu softvfp
1564115976 .type flash_complete_plane_page_read, %function
1564215977 flash_complete_plane_page_read:
1564315978 .fnstart
1564415979 @ args = 0, pretend = 0, frame = 0
1564515980 @ frame_needed = 0, uses_anonymous_args = 0
15646
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
15981
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
1564715982 .save {r4, r5, r6, r7, r8, r9, r10, lr}
1564815983 .pad #8
15649
- mvn r3, #0
15650
- ldr r8, .L2687
15651
- mov r10, r0
15652
- mov r6, r1
15653
- mov r7, r2
15654
- ldrb r4, [r8, #1189] @ zero_extendqisi2
15655
- rsb r9, r4, #24
15656
- mvn r4, r3, asl r4
15657
- and r4, r4, r0, lsr r9
15658
- ldrb r3, [r8, #1101] @ zero_extendqisi2
15659
- uxtb r5, r4
15660
- cmp r3, r5
15661
- bhi .L2658
15662
- ldr r1, .L2687+4
15984
+ mov r10, r2
15985
+ ldr r5, .L2649
15986
+ mvn r2, #0
15987
+ mov r6, r0
15988
+ mov r9, r1
15989
+ ldrb r3, [r5, #1153] @ zero_extendqisi2
15990
+ rsb r4, r3, #24
15991
+ lsr r7, r0, r4
15992
+ bic r7, r7, r2, lsl r3
15993
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
15994
+ uxtb r7, r7
15995
+ cmp r3, r7
15996
+ bhi .L2619
1566315997 movw r2, #1070
15664
- ldr r0, .L2687+8
15998
+ ldr r1, .L2649+4
15999
+ ldr r0, .L2649+8
1566516000 bl printk
1566616001 bl dump_stack
15667
-.L2658:
15668
- ldrb r2, [r8, #1101] @ zero_extendqisi2
15669
- ldr r3, .L2687
15670
- cmp r2, r5
15671
- mvnls r0, #0
15672
- bls .L2659
15673
- add r5, r3, r5
15674
- mvn r4, #0
15675
- bic r4, r10, r4, asl r9
15676
- ubfx r10, r10, #24, #2
15677
- ldrb r9, [r5, #1180] @ zero_extendqisi2
15678
- ldr r5, [r3, #1040]
15679
- mov r0, r9
16002
+.L2619:
16003
+ ldrb r3, [r5, #1109] @ zero_extendqisi2
16004
+ mvn r0, #0
16005
+ cmp r3, r7
16006
+ bls .L2618
16007
+ add r7, r5, r7
16008
+ bic r4, r6, r0, lsl r4
16009
+ ldrb r8, [r7, #1144] @ zero_extendqisi2
16010
+ ubfx r6, r6, #24, #2
16011
+ ldr r7, [r5, #1044]
16012
+ mov r0, r8
1568016013 bl nandc_cs
15681
- cmp r10, #0
15682
- bne .L2660
16014
+ cmp r6, #0
16015
+ bne .L2621
1568316016 mov r0, r4
1568416017 bl slc_phy_page_address_calc
1568516018 mov r4, r0
15686
-.L2660:
15687
- ldrb r3, [r8, #1119] @ zero_extendqisi2
15688
- uxtb ip, r4
15689
- mov r0, r4, lsr #8
15690
- ldrb r1, [r8, #1188] @ zero_extendqisi2
16019
+.L2621:
16020
+ ldrb r3, [r5, #1127] @ zero_extendqisi2
16021
+ uxtb lr, r4
16022
+ lsr ip, r4, #8
16023
+ ldrb r0, [r5, #1152] @ zero_extendqisi2
1569116024 cmp r3, #1
15692
- mov r3, r9, asl #8
15693
- addeq r2, r5, r3
15694
- moveq lr, #6
15695
- beq .L2686
15696
- ldr r2, .L2687
15697
- ldr r2, [r2, #1096]
16025
+ lsl r3, r8, #8
16026
+ moveq r1, #6
16027
+ addeq r2, r7, r3
16028
+ beq .L2648
16029
+ ldr r2, [r5, #1104]
1569816030 ldrb r2, [r2, #12] @ zero_extendqisi2
1569916031 cmp r2, #3
15700
- add r2, r5, r3
15701
- bne .L2664
15702
- mov lr, #5
15703
-.L2686:
15704
- add r3, r5, r3
15705
- str lr, [r2, #2056]
15706
- mov lr, #0
15707
- cmp r1, lr
15708
- str lr, [r2, #2052]
15709
- movne r1, r4, lsr #24
15710
- str lr, [r2, #2052]
15711
- str ip, [r2, #2052]
15712
- str r0, [r2, #2052]
15713
- mov r0, r4, lsr #16
15714
- str r0, [r2, #2052]
15715
- strne r1, [r2, #2052]
15716
- mov r2, #224
15717
- str r2, [r3, #2056]
15718
- b .L2663
15719
-.L2664:
15720
- add r5, r5, r3
15721
- mov lr, #0
15722
- cmp r1, lr
15723
- str lr, [r2, #2056]
15724
- mov r3, #5
15725
- str lr, [r2, #2052]
15726
- movne r1, r4, lsr #24
15727
- str lr, [r2, #2052]
15728
- str ip, [r2, #2052]
15729
- str r0, [r2, #2052]
15730
- mov r0, r4, lsr #16
15731
- str r0, [r2, #2052]
15732
- strne r1, [r2, #2052]
15733
- str r3, [r5, #2056]
15734
- mov r3, #0
15735
- str r3, [r2, #2052]
15736
- str r3, [r2, #2052]
15737
- mov r3, #224
15738
- str r3, [r5, #2056]
15739
-.L2663:
15740
- ldr r2, [r8, #1096]
15741
- ldr r3, .L2687
15742
- ldrb r1, [r2, #12] @ zero_extendqisi2
15743
- adds r2, r10, #0
15744
- movne r2, #1
15745
- cmp r1, #3
15746
- movne r2, #0
15747
- cmp r2, #0
15748
- beq .L2667
15749
- ldrb r2, [r3, #1196] @ zero_extendqisi2
15750
- cmp r2, #0
15751
- bne .L2667
15752
- ldrb r3, [r3, #1197] @ zero_extendqisi2
15753
- cmp r3, #0
15754
- subeq r0, r10, #1
15755
- addeq r4, r4, r4, asl #1
15756
- addeq r0, r0, r4
15757
- beq .L2683
15758
-.L2667:
15759
- mov r0, r4
15760
-.L2683:
15761
- bl nandc_set_seed
15762
- ldr r3, .L2687+12
16032
+ add r2, r7, r3
16033
+ bne .L2625
16034
+ mov r1, #5
16035
+.L2648:
16036
+ str r1, [r2, #2056]
1576316037 mov r1, #0
15764
- mov r0, r9
15765
- ldrb r2, [r3, #13] @ zero_extendqisi2
15766
- mov r3, r6
15767
- str r7, [sp]
15768
- bl nandc_xfer
15769
- mov r4, r0
15770
- mov r0, r9
15771
- bl nandc_de_cs
16038
+ str r1, [r2, #2052]
16039
+ cmp r0, #0
16040
+ str r1, [r2, #2052]
16041
+ lsr r1, r4, #16
16042
+ str lr, [r2, #2052]
16043
+ add r3, r7, r3
16044
+ str ip, [r2, #2052]
16045
+ str r1, [r2, #2052]
16046
+ lsrne r1, r4, #24
16047
+ strne r1, [r2, #2052]
16048
+.L2644:
16049
+ mov r2, #224
16050
+ cmp r6, #0
16051
+ str r2, [r3, #2056]
16052
+ ldr r3, [r5, #1104]
16053
+ ldrb r3, [r3, #12] @ zero_extendqisi2
16054
+ sub r3, r3, #3
16055
+ clz r3, r3
16056
+ lsr r3, r3, #5
16057
+ moveq r3, #0
16058
+ cmp r3, #0
16059
+ beq .L2628
16060
+ ldrb r3, [r5, #1158] @ zero_extendqisi2
16061
+ cmp r3, #0
16062
+ bne .L2628
16063
+ ldrb r3, [r5, #1159] @ zero_extendqisi2
16064
+ cmp r3, #0
16065
+ addeq r4, r4, r4, lsl #1
16066
+ subeq r6, r6, #1
16067
+ addeq r0, r4, r6
16068
+ beq .L2645
16069
+.L2628:
1577216070 mov r0, r4
15773
-.L2659:
16071
+.L2645:
16072
+ bl nandc_set_seed
16073
+ ldr r3, .L2649+12
16074
+ mov r1, #0
16075
+ mov r0, r8
16076
+ ldrb r2, [r3, #13] @ zero_extendqisi2
16077
+ mov r3, r9
16078
+ str r10, [sp]
16079
+ bl nandc_xfer
16080
+ bl nandc_de_cs.constprop.35
16081
+.L2618:
1577416082 add sp, sp, #8
1577516083 @ sp needed
15776
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
15777
-.L2688:
16084
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
16085
+.L2625:
16086
+ mov r1, #0
16087
+ cmp r0, #0
16088
+ str r1, [r2, #2056]
16089
+ add r3, r7, r3
16090
+ str r1, [r2, #2052]
16091
+ str r1, [r2, #2052]
16092
+ lsr r1, r4, #16
16093
+ str lr, [r2, #2052]
16094
+ str ip, [r2, #2052]
16095
+ str r1, [r2, #2052]
16096
+ lsrne r1, r4, #24
16097
+ strne r1, [r2, #2052]
16098
+ mov r1, #5
16099
+ str r1, [r3, #2056]
16100
+ mov r1, #0
16101
+ str r1, [r2, #2052]
16102
+ str r1, [r2, #2052]
16103
+ b .L2644
16104
+.L2650:
1577816105 .align 2
15779
-.L2687:
16106
+.L2649:
1578016107 .word .LANCHOR0
15781
- .word .LANCHOR1+2164
16108
+ .word .LANCHOR1+1978
1578216109 .word .LC0
1578316110 .word .LANCHOR2
1578416111 .fnend
1578516112 .size flash_complete_plane_page_read, .-flash_complete_plane_page_read
1578616113 .align 2
1578716114 .global flash_complete_page_read
16115
+ .syntax unified
16116
+ .arm
16117
+ .fpu softvfp
1578816118 .type flash_complete_page_read, %function
1578916119 flash_complete_page_read:
1579016120 .fnstart
1579116121 @ args = 0, pretend = 0, frame = 8
1579216122 @ frame_needed = 0, uses_anonymous_args = 0
15793
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16123
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1579416124 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
15795
- mov r6, #1
15796
- ldr r5, .L2724
16125
+ mov r3, #1
16126
+ ldr r4, .L2683
16127
+ mov fp, r2
1579716128 .pad #20
1579816129 sub sp, sp, #20
15799
- mov r9, r0
1580016130 mov r10, r1
15801
- mov fp, r2
15802
- ldrb r7, [r5, #1189] @ zero_extendqisi2
15803
- rsb r3, r7, #24
15804
- mov r7, r6, asl r7
15805
- sub r7, r7, #1
15806
- mov r4, r6, asl r3
15807
- and r7, r7, r0, lsr r3
15808
- ldrb r3, [r5, #1101] @ zero_extendqisi2
15809
- sub r4, r4, #1
16131
+ str r0, [sp, #12]
1581016132 ubfx r6, r0, #24, #2
16133
+ ldrb r7, [r4, #1153] @ zero_extendqisi2
16134
+ rsb r2, r7, #24
16135
+ lsl r7, r3, r7
16136
+ lsl r5, r3, r2
16137
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
16138
+ sub r7, r7, #1
16139
+ sub r5, r5, #1
16140
+ and r7, r7, r0, lsr r2
16141
+ and r5, r5, r0
1581116142 uxtb r7, r7
15812
- and r4, r4, r0
1581316143 cmp r3, r7
15814
- bhi .L2690
15815
- ldr r1, .L2724+4
16144
+ bhi .L2652
1581616145 mov r2, #1232
15817
- ldr r0, .L2724+8
16146
+ ldr r1, .L2683+4
16147
+ ldr r0, .L2683+8
1581816148 bl printk
1581916149 bl dump_stack
15820
-.L2690:
15821
- add r7, r5, r7
15822
- ldr r3, [r5, #1040]
15823
- ldrb r8, [r7, #1180] @ zero_extendqisi2
15824
- str r3, [sp, #12]
15825
- mov r0, r8
16150
+.L2652:
16151
+ add r7, r4, r7
16152
+ ldrb r9, [r7, #1144] @ zero_extendqisi2
16153
+ ldr r7, [r4, #1044]
16154
+ mov r0, r9
1582616155 bl nandc_cs
1582716156 cmp r6, #0
15828
- bne .L2691
15829
- mov r0, r4
16157
+ bne .L2653
16158
+ mov r0, r5
1583016159 bl slc_phy_page_address_calc
15831
- mov r4, r0
15832
-.L2691:
15833
- ldr r7, .L2724+12
15834
- ldrb r3, [r7, #16] @ zero_extendqisi2
16160
+ mov r5, r0
16161
+.L2653:
16162
+ ldr r8, .L2683+12
16163
+ ldrb r3, [r8, #16] @ zero_extendqisi2
1583516164 cmp r3, #3
15836
- bne .L2692
15837
- ldr r3, [sp, #12]
15838
- mov r2, #5
15839
- add r3, r3, r8, asl #8
15840
- str r2, [r3, #2056]
15841
- mov r2, #0
15842
- str r2, [r3, #2052]
15843
- str r2, [r3, #2052]
15844
- uxtb r2, r4
15845
- str r2, [r3, #2052]
15846
- mov r2, r4, lsr #8
15847
- str r2, [r3, #2052]
15848
- mov r2, r4, lsr #16
15849
- str r2, [r3, #2052]
15850
- mov r2, #224
15851
- str r2, [r3, #2056]
15852
-.L2692:
15853
- ldr r2, [r5, #1096]
15854
- ldr r3, .L2724
15855
- ldrb r1, [r2, #12] @ zero_extendqisi2
15856
- adds r2, r6, #0
15857
- movne r2, #1
15858
- cmp r1, #3
15859
- movne r2, #0
15860
- cmp r2, #0
15861
- beq .L2693
15862
- ldrb r2, [r3, #1196] @ zero_extendqisi2
15863
- cmp r2, #0
15864
- bne .L2693
15865
- ldrb r3, [r3, #1197] @ zero_extendqisi2
16165
+ bne .L2654
16166
+ add r7, r7, r9, lsl #8
16167
+ mov r3, #5
16168
+ str r3, [r7, #2056]
16169
+ mov r3, #0
16170
+ str r3, [r7, #2052]
16171
+ str r3, [r7, #2052]
16172
+ uxtb r3, r5
16173
+ str r3, [r7, #2052]
16174
+ lsr r3, r5, #8
16175
+ str r3, [r7, #2052]
16176
+ lsr r3, r5, #16
16177
+ str r3, [r7, #2052]
16178
+ mov r3, #224
16179
+ str r3, [r7, #2056]
16180
+.L2654:
16181
+ ldr r3, [r4, #1104]
16182
+ cmp r6, #0
16183
+ ldrb r3, [r3, #12] @ zero_extendqisi2
16184
+ sub r3, r3, #3
16185
+ clz r3, r3
16186
+ lsr r3, r3, #5
16187
+ moveq r3, #0
1586616188 cmp r3, #0
16189
+ beq .L2655
16190
+ ldrb r3, [r4, #1158] @ zero_extendqisi2
16191
+ cmp r3, #0
16192
+ bne .L2655
16193
+ ldrb r3, [r4, #1159] @ zero_extendqisi2
16194
+ cmp r3, #0
16195
+ addeq r3, r5, r5, lsl #1
1586716196 subeq r0, r6, #1
15868
- addeq r3, r4, r4, asl #1
1586916197 addeq r0, r0, r3
15870
- beq .L2723
15871
-.L2693:
15872
- mov r0, r4
15873
-.L2723:
16198
+ beq .L2682
16199
+.L2655:
16200
+ mov r0, r5
16201
+.L2682:
1587416202 bl nandc_set_seed
15875
- ldrb r2, [r7, #13] @ zero_extendqisi2
15876
- mov r0, r8
15877
- mov r1, #0
16203
+ ldrb r2, [r8, #13] @ zero_extendqisi2
1587816204 mov r3, r10
1587916205 str fp, [sp]
16206
+ mov r1, #0
16207
+ mov r0, r9
1588016208 bl nandc_xfer
1588116209 cmn r0, #1
15882
- bne .L2695
15883
- ldrb ip, [r5, #1168] @ zero_extendqisi2
15884
- cmp ip, #0
15885
- beq .L2696
15886
- ldr r2, .L2724
16210
+ bne .L2657
16211
+ ldrb r7, [r4, #1196] @ zero_extendqisi2
16212
+ cmp r7, #0
16213
+ beq .L2658
1588716214 mov r3, #0
15888
- mov r0, r8
15889
- orr r1, r4, r6, asl #24
15890
- str ip, [sp, #12]
15891
- strb r3, [r2, #1168]
1589216215 mov r2, r10
15893
- ldr r3, .L2724+12
15894
- ldrb r3, [r3, #13] @ zero_extendqisi2
16216
+ strb r3, [r4, #1196]
16217
+ orr r1, r5, r6, lsl #24
16218
+ ldrb r3, [r8, #13] @ zero_extendqisi2
16219
+ mov r0, r9
1589516220 str r3, [sp]
1589616221 mov r3, fp
1589716222 bl flash_read_page
15898
- ldr r3, .L2724
1589916223 cmp r6, #0
15900
- ldr ip, [sp, #12]
15901
- strb ip, [r3, #1168]
15902
- bne .L2697
15903
-.L2704:
15904
- ldrb r3, [r5] @ zero_extendqisi2
16224
+ strb r7, [r4, #1196]
16225
+ bne .L2659
16226
+.L2664:
16227
+ ldrb r3, [r4] @ zero_extendqisi2
1590516228 cmp r3, #0
15906
- beq .L2697
15907
- ldr r3, .L2724
15908
- ldrb r3, [r3, #1172] @ zero_extendqisi2
15909
- add r3, r3, r3, asl #1
16229
+ beq .L2659
16230
+ ldrb r3, [r4, #1193] @ zero_extendqisi2
16231
+ add r3, r3, r3, lsl #1
1591016232 cmp r0, r3, asr #2
15911
- blt .L2697
15912
- ldrb r3, [r7, #23] @ zero_extendqisi2
16233
+ blt .L2659
16234
+ ldrb r3, [r8, #23] @ zero_extendqisi2
1591316235 sub r3, r3, #4
1591416236 cmp r3, #4
1591516237 movls r0, #256
15916
- b .L2711
15917
-.L2697:
16238
+.L2651:
16239
+ add sp, sp, #20
16240
+ @ sp needed
16241
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
16242
+.L2659:
1591816243 cmn r0, #1
15919
- bne .L2711
15920
-.L2705:
15921
- ldr r3, .L2724+16
15922
- ldr ip, [r3, #-108]
15923
- cmp ip, #0
15924
- bne .L2700
15925
-.L2703:
15926
- ldrb r3, [r5, #1168] @ zero_extendqisi2
16244
+ bne .L2651
16245
+.L2665:
16246
+ ldr r3, .L2683+16
16247
+ ldr r7, [r3, #-100]
16248
+ cmp r7, #0
16249
+ bne .L2661
16250
+.L2663:
16251
+ ldrb r3, [r4, #1196] @ zero_extendqisi2
1592716252 mov r1, #0
15928
- ldr r0, .L2724+20
15929
- mov r2, r9
16253
+ ldr r2, [sp, #12]
16254
+ ldr r0, .L2683+20
1593016255 str r3, [sp]
1593116256 mvn r3, #0
1593216257 bl printk
15933
- ldrb r3, [r5, #1135] @ zero_extendqisi2
16258
+ ldrb r3, [r4, #1143] @ zero_extendqisi2
1593416259 cmp r3, #0
1593516260 mvneq r0, #0
15936
- beq .L2711
15937
- ldrb r3, [r7, #13] @ zero_extendqisi2
15938
- mov r0, r8
15939
- orr r1, r4, r6, asl #24
16261
+ beq .L2651
16262
+ ldrb r3, [r8, #13] @ zero_extendqisi2
1594016263 mov r2, r10
16264
+ orr r1, r5, r6, lsl #24
16265
+ mov r0, r9
1594116266 str r3, [sp]
1594216267 mov r3, fp
1594316268 bl flash_ddr_tuning_read
15944
- b .L2711
15945
-.L2700:
15946
- ldrb r3, [r7, #13] @ zero_extendqisi2
15947
- mov r0, r8
15948
- orr r1, r4, r6, asl #24
16269
+ b .L2651
16270
+.L2661:
16271
+ ldrb r3, [r8, #13] @ zero_extendqisi2
1594916272 mov r2, r10
16273
+ orr r1, r5, r6, lsl #24
16274
+ mov r0, r9
1595016275 str r3, [sp]
1595116276 mov r3, fp
15952
- blx ip
16277
+ blx r7
1595316278 cmn r0, #1
15954
- bne .L2711
15955
- b .L2703
15956
-.L2695:
16279
+ bne .L2651
16280
+ b .L2663
16281
+.L2658:
1595716282 cmp r6, #0
15958
- beq .L2704
15959
- b .L2711
15960
-.L2696:
16283
+ beq .L2664
16284
+ b .L2665
16285
+.L2657:
1596116286 cmp r6, #0
15962
- beq .L2704
15963
- b .L2705
15964
-.L2711:
15965
- add sp, sp, #20
15966
- @ sp needed
15967
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
15968
-.L2725:
16287
+ bne .L2651
16288
+ b .L2664
16289
+.L2684:
1596916290 .align 2
15970
-.L2724:
16291
+.L2683:
1597116292 .word .LANCHOR0
15972
- .word .LANCHOR1+2196
16293
+ .word .LANCHOR1+2009
1597316294 .word .LC0
1597416295 .word .LANCHOR2
1597516296 .word .LANCHOR3
15976
- .word .LC173
16297
+ .word .LC172
1597716298 .fnend
1597816299 .size flash_complete_page_read, .-flash_complete_page_read
1597916300 .align 2
16301
+ .syntax unified
16302
+ .arm
16303
+ .fpu softvfp
1598016304 .type queue_wait_first_req_completed, %function
1598116305 queue_wait_first_req_completed:
1598216306 .fnstart
1598316307 @ args = 0, pretend = 0, frame = 8
1598416308 @ frame_needed = 0, uses_anonymous_args = 0
15985
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16309
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1598616310 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1598716311 .pad #20
1598816312 sub sp, sp, #20
15989
- ldr r4, .L2816
15990
- ldrb r5, [r4, #2775] @ zero_extendqisi2
16313
+ ldr r4, .L2779
16314
+ ldrb r5, [r4, #2770] @ zero_extendqisi2
1599116315 cmp r5, #255
15992
- beq .L2760
15993
- mov r7, #48
15994
- mla r2, r7, r5, r4
15995
- ldrb r3, [r2, #1278] @ zero_extendqisi2
15996
- ldr r6, [r2, #1260]
16316
+ bne .L2686
16317
+.L2719:
16318
+ mov r7, #0
16319
+ b .L2685
16320
+.L2686:
16321
+ mov r8, #48
16322
+ mla r2, r8, r5, r4
16323
+ ldrb r3, [r2, #1274] @ zero_extendqisi2
16324
+ ldr r7, [r2, #1256]
1599716325 sub r2, r3, #1
1599816326 cmp r2, #10
1599916327 ldrls pc, [pc, r2, asl #2]
16000
- b .L2760
16001
-.L2730:
16002
- .word .L2729
16003
- .word .L2731
16004
- .word .L2732
16005
- .word .L2732
16006
- .word .L2732
16007
- .word .L2732
16008
- .word .L2733
16009
- .word .L2734
16010
- .word .L2735
16011
- .word .L2732
16012
- .word .L2735
16013
-.L2729:
16014
- mla r7, r7, r5, r4
16328
+ b .L2719
16329
+.L2689:
16330
+ .word .L2688
16331
+ .word .L2690
16332
+ .word .L2691
16333
+ .word .L2691
16334
+ .word .L2691
16335
+ .word .L2691
16336
+ .word .L2692
16337
+ .word .L2693
16338
+ .word .L2694
16339
+ .word .L2691
16340
+ .word .L2694
16341
+.L2688:
16342
+ mla r8, r8, r5, r4
1601516343 bl nandc_wait_flash_ready
16016
- ldr r3, [r7, #1244]
16017
- ldr r1, [r7, #1240]
16344
+ ldr r3, [r8, #1240]
16345
+ ldr r1, [r8, #1236]
1601816346 cmp r3, #0
16019
- beq .L2736
16020
- ldr r2, .L2816
16021
- ldrb r0, [r7, #1276] @ zero_extendqisi2
16022
- ldrb r2, [r2, #2772] @ zero_extendqisi2
16347
+ beq .L2695
16348
+ ldr r2, .L2779+4
16349
+ ldrb r0, [r8, #1272] @ zero_extendqisi2
16350
+ ldrb r2, [r2, #-2546] @ zero_extendqisi2
1602316351 cmp r0, r2
1602416352 moveq r1, r3
16025
-.L2736:
16353
+.L2695:
1602616354 mov r3, #48
16027
- mov r0, r6
16028
- mla r5, r3, r5, r4
16029
- ldr r2, [r5, #1248]
16355
+ mov r0, r7
16356
+ mla r4, r3, r5, r4
16357
+ ldr r2, [r4, #1244]
1603016358 bl flash_complete_page_read
16359
+ str r0, [r4, #1268]
16360
+.L2778:
1603116361 mov r3, #13
16032
- strb r3, [r5, #1278]
16033
- ldrb r3, [r5, #1238] @ zero_extendqisi2
16362
+ strb r3, [r4, #1274]
16363
+ ldrb r3, [r4, #1234] @ zero_extendqisi2
1603416364 orr r3, r3, #8
16035
- strb r3, [r5, #1238]
16036
- str r0, [r5, #1272]
16037
- b .L2760
16038
-.L2731:
16365
+ strb r3, [r4, #1234]
16366
+ b .L2719
16367
+.L2690:
1603916368 bl nandc_wait_flash_ready
16040
- mla r3, r7, r5, r4
16041
- ldrb r6, [r3, #1236] @ zero_extendqisi2
16042
- ldr r2, [r3, #1244]
16043
- ldr r10, [r3, #1240]
16044
- mla r7, r7, r6, r4
16369
+ mla r3, r8, r5, r4
16370
+ ldrb r6, [r3, #1232] @ zero_extendqisi2
16371
+ ldr r2, [r3, #1240]
16372
+ ldr r9, [r3, #1236]
16373
+ mla r8, r8, r6, r4
1604516374 cmp r2, #0
16046
- ldr r8, [r7, #1240]
16047
- beq .L2737
16048
- ldrb r1, [r3, #1276] @ zero_extendqisi2
16049
- ldr r3, .L2816
16050
- ldrb r3, [r3, #2772] @ zero_extendqisi2
16375
+ ldr r10, [r8, #1236]
16376
+ beq .L2696
16377
+ ldrb r1, [r3, #1272] @ zero_extendqisi2
16378
+ ldr r3, .L2779+4
16379
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
16380
+ cmp r1, r3
16381
+ moveq r9, r2
16382
+.L2696:
16383
+ mov r3, #48
16384
+ mla r3, r3, r6, r4
16385
+ ldr r2, [r3, #1240]
16386
+ cmp r2, #0
16387
+ beq .L2697
16388
+ ldrb r1, [r3, #1272] @ zero_extendqisi2
16389
+ ldr r3, .L2779+4
16390
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
1605116391 cmp r1, r3
1605216392 moveq r10, r2
16053
-.L2737:
16054
- mov r3, #48
16055
- mla r3, r3, r6, r4
16393
+.L2697:
16394
+ mov r7, #48
16395
+ mov r1, r9
16396
+ mla r3, r7, r5, r4
16397
+ mla r7, r7, r6, r4
1605616398 ldr r2, [r3, #1244]
16057
- cmp r2, #0
16058
- beq .L2738
16059
- ldrb r1, [r3, #1276] @ zero_extendqisi2
16060
- ldr r3, .L2816
16061
- ldrb r3, [r3, #2772] @ zero_extendqisi2
16062
- cmp r1, r3
16063
- moveq r8, r2
16064
-.L2738:
16065
- mov r9, #48
16066
- mov r1, r10
16067
- mla r3, r9, r5, r4
16068
- mla r9, r9, r6, r4
16069
- add fp, r3, #1232
16070
- add fp, fp, #12
16071
- ldr r2, [r3, #1248]
16072
- ldr r0, [r3, #1260]
16399
+ ldr r0, [r3, #1256]
1607316400 str r3, [sp, #12]
1607416401 bl flash_complete_plane_page_read
16075
- ldr r2, [r9, #1248]
16076
- mov r1, r8
16077
- mov r7, r0
16078
- ldr r0, [r9, #1260]
16402
+ ldr r2, [r7, #1244]
16403
+ mov r8, r0
16404
+ mov r1, r10
16405
+ ldr r0, [r7, #1256]
1607916406 bl flash_complete_plane_page_read
16080
- cmn r7, #1
16081
- mov r9, r0
16082
- beq .L2739
16407
+ cmn r8, #1
16408
+ mov fp, r0
16409
+ beq .L2698
1608316410 ldr r3, [sp, #12]
16084
- ldr r3, [r3, #1256]
16085
- cmn r3, #1
16086
- beq .L2740
16087
- ldr r2, [fp, #4]
16088
- ldr r2, [r2, #4]
16089
- cmp r3, r2
16090
- beq .L2740
16091
-.L2739:
16092
- mov fp, #48
16093
- ldrb r0, [r4, #1189] @ zero_extendqisi2
16094
- mla fp, fp, r5, r4
16095
- ldrb lr, [r4, #2772] @ zero_extendqisi2
16096
- rsb r1, r0, #24
16097
- mvn r3, #0
16098
- mvn r3, r3, asl r0
16099
- add ip, fp, #1232
16100
- add ip, ip, #12
16101
- str ip, [sp, #12]
16102
- ldr r2, [fp, #1260]
16103
- str lr, [sp]
16104
- and r0, r3, r2, lsr r1
16105
- bic r1, r2, r3, asl r1
16106
- mov r2, r10
16107
- ldr r3, [fp, #1248]
16108
- uxtb r0, r0
16109
- bl flash_read_page_en
16110
- ldr r2, [fp, #1256]
16411
+ ldr r2, [r3, #1252]
1611116412 cmn r2, #1
16112
- mov r7, r0
16113
- beq .L2741
16114
- ldr ip, [sp, #12]
16115
- ldr r3, [ip, #4]
16413
+ beq .L2699
16414
+ ldr r3, [r3, #1244]
16415
+ ldr r3, [r3, #4]
16416
+ cmp r2, r3
16417
+ beq .L2699
16418
+.L2698:
16419
+ mov r7, #48
16420
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
16421
+ mla r7, r7, r5, r4
16422
+ mvn ip, #0
16423
+ mvn ip, ip, lsl r3
16424
+ rsb r1, r3, #24
16425
+ ldr lr, [r7, #1256]
16426
+ mov r2, r9
16427
+ ldr r3, .L2779+4
16428
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
16429
+ and r0, ip, lr, lsr r1
16430
+ bic r1, lr, ip, lsl r1
16431
+ uxtb r0, r0
16432
+ str r3, [sp]
16433
+ ldr r3, [r7, #1244]
16434
+ bl flash_read_page_en
16435
+ ldr r2, [r7, #1252]
16436
+ mov r8, r0
16437
+ cmn r2, #1
16438
+ beq .L2700
16439
+ ldr r3, [r7, #1244]
1611616440 ldr r1, [r3, #4]
1611716441 cmp r2, r1
16118
- beq .L2741
16119
- ldr r0, .L2816+4
16442
+ beq .L2700
16443
+ ldr r0, .L2779+8
1612016444 ldr r0, [r0]
1612116445 tst r0, #64
16122
- beq .L2741
16446
+ beq .L2700
1612316447 str r1, [sp]
16124
- ldr r0, .L2816+8
16125
- ldr r1, [fp, #1260]
16448
+ ldr r0, .L2779+12
1612616449 ldr r3, [r3]
16450
+ ldr r1, [r7, #1256]
1612716451 bl printk
16128
-.L2741:
16452
+.L2700:
1612916453 mov r3, #48
1613016454 mla r3, r3, r5, r4
16131
- ldr r2, [r3, #1256]
16455
+ ldr r2, [r3, #1252]
1613216456 cmn r2, #1
16133
- beq .L2740
16134
- ldr r3, [r3, #1248]
16457
+ beq .L2699
16458
+ ldr r3, [r3, #1244]
1613516459 ldr r3, [r3, #4]
1613616460 cmp r2, r3
16137
- beq .L2740
16138
- ldr r1, .L2816+12
16461
+ beq .L2699
1613916462 movw r2, #431
16140
- ldr r0, .L2816+16
16463
+ ldr r1, .L2779+16
16464
+ ldr r0, .L2779+20
1614116465 bl printk
1614216466 bl dump_stack
16143
-.L2740:
16467
+.L2699:
1614416468 mov r3, #48
1614516469 mov r2, #13
1614616470 mla r5, r3, r5, r4
16147
- cmn r9, #1
16148
- strb r2, [r5, #1278]
16149
- ldrb r2, [r5, #1238] @ zero_extendqisi2
16150
- str r7, [r5, #1272]
16471
+ cmn fp, #1
16472
+ strb r2, [r5, #1274]
16473
+ ldrb r2, [r5, #1234] @ zero_extendqisi2
16474
+ str r8, [r5, #1268]
1615116475 orr r2, r2, #8
16152
- strb r2, [r5, #1238]
16153
- beq .L2742
16154
- ldr r2, .L2816
16155
- mla r3, r3, r6, r2
16156
- ldr r2, [r3, #1256]
16476
+ strb r2, [r5, #1234]
16477
+ beq .L2701
16478
+ mla r3, r3, r6, r4
16479
+ ldr r2, [r3, #1252]
1615716480 cmn r2, #1
16158
- beq .L2744
16159
- ldr r3, [r3, #1248]
16481
+ beq .L2703
16482
+ ldr r3, [r3, #1244]
1616016483 ldr r3, [r3, #4]
1616116484 cmp r2, r3
16162
- beq .L2744
16163
-.L2742:
16485
+ beq .L2703
16486
+.L2701:
1616416487 mov r5, #48
16165
- ldrb r0, [r4, #1189] @ zero_extendqisi2
16488
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
1616616489 mla r5, r5, r6, r4
16167
- rsb r1, r0, #24
16168
- ldrb ip, [r4, #2772] @ zero_extendqisi2
16169
- mvn r3, #0
16170
- mvn r3, r3, asl r0
16171
- add r9, r5, #1232
16172
- add r9, r9, #12
16173
- ldr r2, [r5, #1260]
16174
- str ip, [sp]
16175
- and r0, r3, r2, lsr r1
16176
- bic r1, r2, r3, asl r1
16177
- mov r2, r8
16178
- ldr r3, [r5, #1248]
16490
+ mvn ip, #0
16491
+ mvn ip, ip, lsl r3
16492
+ rsb r1, r3, #24
16493
+ ldr lr, [r5, #1256]
16494
+ mov r2, r10
16495
+ ldr r3, .L2779+4
16496
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
16497
+ and r0, ip, lr, lsr r1
16498
+ bic r1, lr, ip, lsl r1
1617916499 uxtb r0, r0
16500
+ str r3, [sp]
16501
+ ldr r3, [r5, #1244]
1618016502 bl flash_read_page_en
16181
- ldr r2, [r5, #1256]
16503
+ ldr r2, [r5, #1252]
1618216504 cmn r2, #1
16183
- beq .L2746
16184
- ldr r3, [r9, #4]
16505
+ beq .L2705
16506
+ ldr r3, [r5, #1244]
1618516507 ldr r1, [r3, #4]
1618616508 cmp r2, r1
16187
- beq .L2746
16188
- ldr r0, .L2816+4
16509
+ beq .L2705
16510
+ ldr r0, .L2779+8
1618916511 ldr r0, [r0]
1619016512 tst r0, #64
16191
- beq .L2746
16513
+ beq .L2705
1619216514 str r1, [sp]
16193
- ldr r0, .L2816+8
16194
- ldr r1, [r5, #1260]
16515
+ ldr r0, .L2779+12
1619516516 ldr r3, [r3]
16517
+ ldr r1, [r5, #1256]
1619616518 bl printk
16197
-.L2746:
16519
+.L2705:
1619816520 mov r3, #48
1619916521 mla r3, r3, r6, r4
16200
- ldr r2, [r3, #1256]
16522
+ ldr r2, [r3, #1252]
1620116523 cmn r2, #1
16202
- beq .L2744
16203
- ldr r3, [r3, #1248]
16524
+ beq .L2703
16525
+ ldr r3, [r3, #1244]
1620416526 ldr r3, [r3, #4]
1620516527 cmp r2, r3
16206
- beq .L2744
16207
- ldr r1, .L2816+12
16528
+ beq .L2703
1620816529 movw r2, #450
16209
- ldr r0, .L2816+16
16530
+ ldr r1, .L2779+16
16531
+ ldr r0, .L2779+20
1621016532 bl printk
1621116533 bl dump_stack
16212
-.L2744:
16534
+.L2703:
1621316535 mov r3, #48
1621416536 mla r4, r3, r6, r4
16215
- mov r3, #13
16216
- strb r3, [r4, #1278]
16217
- ldrb r3, [r4, #1238] @ zero_extendqisi2
16218
- str r7, [r4, #1272]
16219
- orr r3, r3, #8
16220
- strb r3, [r4, #1238]
16221
- b .L2760
16222
-.L2732:
16537
+ str r8, [r4, #1268]
16538
+ b .L2778
16539
+.L2691:
1622316540 bl nandc_iqr_wait_flash_ready
16224
- mov r0, r6
16541
+ mov r0, r7
1622516542 mov r1, #64
1622616543 bl flash_wait_device_ready
1622716544 tst r0, #64
1622816545 mov r7, r0
16229
- beq .L2760
16230
- ands r6, r0, #5
16546
+ beq .L2719
16547
+ ands r2, r0, #5
1623116548 mov r3, #48
16232
- beq .L2748
16233
- mla r5, r3, r5, r4
16234
- ldr r0, .L2816+20
16549
+ beq .L2707
16550
+ mla r4, r3, r5, r4
1623516551 mov r3, #12
16236
- mov r2, r7
16237
- mov r6, r7
16238
- strb r3, [r5, #1278]
16239
- ldrb r1, [r5, #1237] @ zero_extendqisi2
16552
+ mov r2, r0
16553
+ ldr r0, .L2779+24
16554
+ strb r3, [r4, #1274]
16555
+ ldrb r1, [r4, #1233] @ zero_extendqisi2
1624016556 str r3, [sp]
16241
- ldr r3, [r5, #1260]
16557
+ ldr r3, [r4, #1256]
1624216558 bl printk
16559
+.L2777:
1624316560 mvn r3, #0
16244
- str r3, [r5, #1272]
16245
- b .L2728
16246
-.L2748:
16561
+ str r3, [r4, #1268]
16562
+ b .L2685
16563
+.L2707:
1624716564 mul r3, r3, r5
16248
- mov r2, #13
16249
- ldr ip, .L2816
16250
- add r7, r4, r3
16251
- strb r2, [r7, #1278]
16252
- ldr r2, [r4, #2804]
16253
- str r6, [r7, #1272]
16254
- ldr r1, [r2, #156]
16255
- ldr r2, .L2816+24
16256
- cmp r1, r2
16257
- bne .L2760
16258
- ldr r2, .L2816+28
16259
- add r3, r3, r2
16260
- ldrh r3, [r3, #2]
16261
- cmp r3, #0
16262
- bne .L2760
16263
- ldrb r0, [ip, #1189] @ zero_extendqisi2
16264
- mvn r3, #0
16265
- ldr r2, [r7, #1260]
16266
- rsb r1, r0, #24
16267
- ldr r8, .L2816+32
16268
- ldrb ip, [ip, #2772] @ zero_extendqisi2
16269
- mvn r3, r3, asl r0
16270
- and r0, r3, r2, lsr r1
16271
- bic r1, r2, r3, asl r1
16272
- str ip, [sp]
16273
- uxtb r0, r0
16274
- ldr r3, [r8, #-100]
16275
- ldr r2, [r8, #-104]
16276
- bl flash_read_page_en
16277
- cmn r0, #1
16278
- mov r3, r0
16279
- beq .L2749
16280
- ldr r1, [r7, #1248]
16281
- ldr r2, [r8, #-100]
16282
- ldr r1, [r1]
16283
- ldr r2, [r2]
16284
- cmp r1, r2
16285
- beq .L2760
16286
-.L2749:
16287
- mov r2, #48
16288
- ldr r0, .L2816+36
16289
- mla r5, r2, r5, r4
16290
- ldrb r2, [r4, #1168] @ zero_extendqisi2
16291
- ldrb r1, [r5, #1237] @ zero_extendqisi2
16292
- str r2, [sp]
16293
- ldr r2, [r5, #1260]
16294
- bl printk
16295
- mvn r3, #0
16296
- str r3, [r5, #1272]
16297
- b .L2728
16298
-.L2735:
16299
- ldr r2, .L2816+40
16300
- cmp r3, #11
16301
- mov r1, #48
16302
- ldrb r3, [r4, #1189] @ zero_extendqisi2
16303
- mvn r7, #0
16304
- movne r9, #3
16305
- mla ip, r1, r5, r2
16306
- rsb lr, r3, #24
16307
- mvn r3, r7, asl r3
16308
- and r0, r3, r6, lsr lr
16309
- moveq r9, #10
16310
- mov r10, r3
16311
- uxth r0, r0
16312
-.L2751:
16313
- ldrb r8, [ip] @ zero_extendqisi2
16314
- cmp r8, #255
16315
- beq .L2815
16316
- mul r3, r1, r8
16317
- ldr r7, .L2816
16318
- add ip, r2, r3
16319
- add r3, r4, r3
16320
- ldrb fp, [r3, #1278] @ zero_extendqisi2
16321
- cmp fp, r9
16322
- bne .L2751
16323
- ldr r3, [r3, #1260]
16324
- and r3, r10, r3, lsr lr
16325
- cmp r0, r3
16326
- bne .L2751
16327
- bl nandc_iqr_wait_flash_ready
16328
- mov r0, r6
16329
- mov r1, #64
16330
- bl flash_wait_device_ready
16331
- tst r0, #64
16332
- mov r6, r0
16333
- beq .L2814
16334
- ands r2, r0, #15
16335
- mov r3, #48
16336
- mul r3, r3, r5
16337
- beq .L2755
16338
- add r7, r7, r3
16339
- mov r9, #12
16340
- ldr r0, .L2816+44
16341
- mov r2, r6
16342
- ldrb r1, [r7, #1237] @ zero_extendqisi2
16343
- str r9, [sp]
16344
- ldr r3, [r7, #1260]
16345
- bl printk
16346
- mvn r3, #0
16347
- strb r9, [r7, #1278]
16348
- str r3, [r7, #1272]
16349
- b .L2754
16350
-.L2755:
16351
- add r6, r7, r3
1635216565 mov r1, #13
16353
- str r2, [r6, #1272]
16354
- ldr r2, [r7, #2804]
16355
- strb r1, [r6, #1278]
16566
+ add r7, r4, r3
16567
+ str r2, [r7, #1268]
16568
+ ldr r2, [r4, #2800]
16569
+ strb r1, [r7, #1274]
1635616570 ldr r1, [r2, #156]
16357
- ldr r2, .L2816+24
16571
+ ldr r2, .L2779+28
1635816572 cmp r1, r2
16359
- bne .L2814
16360
- ldr r2, .L2816+40
16573
+ bne .L2719
16574
+ ldr r2, .L2779+32
1636116575 add r3, r2, r3
1636216576 ldrh r3, [r3, #34]
1636316577 cmp r3, #0
16364
- bne .L2814
16365
- ldr r2, [r6, #1260]
16366
- mvn r3, #0
16367
- ldrb r0, [r7, #1189] @ zero_extendqisi2
16368
- ldr r9, .L2816+32
16369
- rsb r1, r0, #24
16370
- ldrb ip, [r7, #2772] @ zero_extendqisi2
16371
- mvn r3, r3, asl r0
16372
- and r0, r3, r2, lsr r1
16373
- bic r1, r2, r3, asl r1
16374
- str ip, [sp]
16578
+ bne .L2719
16579
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
16580
+ mvn ip, #0
16581
+ ldr lr, [r7, #1256]
16582
+ ldr r6, .L2779+4
16583
+ rsb r1, r3, #24
16584
+ mvn ip, ip, lsl r3
16585
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
16586
+ and r0, ip, lr, lsr r1
16587
+ bic r1, lr, ip, lsl r1
16588
+ str r3, [sp]
1637516589 uxtb r0, r0
16376
- ldr r3, [r9, #-100]
16377
- ldr r2, [r9, #-104]
16590
+ ldr r3, [r6, #-96]
16591
+ ldr r2, [r6, #-92]
1637816592 bl flash_read_page_en
1637916593 cmn r0, #1
1638016594 mov r3, r0
16381
- beq .L2757
16382
- ldr r1, [r6, #1248]
16383
- ldr r2, [r9, #-100]
16595
+ beq .L2708
16596
+ ldr r1, [r7, #1244]
16597
+ ldr r2, [r6, #-96]
1638416598 ldr r1, [r1]
1638516599 ldr r2, [r2]
1638616600 cmp r1, r2
16387
- beq .L2814
16388
-.L2757:
16389
- mov r6, #48
16390
- ldrb r2, [r4, #1168] @ zero_extendqisi2
16391
- mla r6, r6, r5, r4
16392
- ldr r0, .L2816+48
16393
- ldrb r1, [r6, #1237] @ zero_extendqisi2
16601
+ beq .L2719
16602
+.L2708:
16603
+ mov r2, #48
16604
+ ldr r0, .L2779+36
16605
+ mla r5, r2, r5, r4
16606
+ ldrb r2, [r4, #1196] @ zero_extendqisi2
16607
+ ldrb r1, [r5, #1233] @ zero_extendqisi2
1639416608 str r2, [sp]
16395
- ldr r2, [r6, #1260]
16609
+ ldr r2, [r5, #1256]
1639616610 bl printk
1639716611 mvn r3, #0
16398
- str r3, [r6, #1272]
16399
-.L2814:
16400
- mov r6, #0
16401
-.L2754:
16402
- mov r3, #48
16403
- mla r5, r3, r5, r4
16404
- mla r4, r3, r8, r4
16405
- ldrb r2, [r5, #1278] @ zero_extendqisi2
16406
- ldr r3, [r5, #1272]
16407
- strb r2, [r4, #1278]
16408
- str r3, [r4, #1272]
16409
- b .L2728
16410
-.L2815:
16411
- mvn r6, #0
16412
- b .L2728
16413
-.L2733:
16414
- mov r0, r6
16415
- mov r1, #32
16416
- bl flash_wait_device_ready
16417
- tst r0, #32
16418
- beq .L2760
16419
- ands r6, r0, #15
16420
- mov r3, #48
16421
- mlaeq r5, r3, r5, r4
16422
- movne r2, #12
16423
- mlane r3, r3, r5, r4
16424
- moveq r3, #13
16425
- movne r6, r0
16426
- streqb r3, [r5, #1278]
16427
- streq r6, [r5, #1272]
16428
- strneb r2, [r3, #1278]
16429
- mvnne r2, #0
16430
- strne r2, [r3, #1272]
16431
- b .L2728
16432
-.L2734:
16433
- mov r0, r6
16612
+ str r3, [r5, #1268]
16613
+ b .L2719
16614
+.L2694:
16615
+ ldrb r1, [r4, #1153] @ zero_extendqisi2
16616
+ mvn r2, #0
16617
+ cmp r3, #11
16618
+ ldr r9, .L2779+32
16619
+ moveq r3, #10
16620
+ movne r3, #3
16621
+ rsb r0, r1, #24
16622
+ mov lr, r3
16623
+ mvn r2, r2, lsl r1
16624
+ add r3, r5, r5, lsl #1
16625
+ and r1, r2, r7, lsr r0
16626
+ add r3, r9, r3, lsl #4
16627
+ uxth r1, r1
16628
+ mov r6, #48
16629
+ movw r10, #1256
16630
+.L2710:
16631
+ ldrb r8, [r3] @ zero_extendqisi2
16632
+ cmp r8, #255
16633
+ mvneq r7, #0
16634
+ beq .L2685
16635
+.L2717:
16636
+ mla ip, r6, r8, r4
16637
+ movw fp, #1274
16638
+ add r3, r8, r8, lsl #1
16639
+ ldrb fp, [ip, fp] @ zero_extendqisi2
16640
+ add r3, r9, r3, lsl #4
16641
+ cmp fp, lr
16642
+ bne .L2710
16643
+ ldr ip, [ip, r10]
16644
+ and ip, r2, ip, lsr r0
16645
+ cmp r1, ip
16646
+ bne .L2710
16647
+ bl nandc_iqr_wait_flash_ready
16648
+ mov r0, r7
1643416649 mov r1, #64
1643516650 bl flash_wait_device_ready
1643616651 tst r0, #64
16437
- movne r3, #48
16438
- mlane r5, r3, r5, r4
16439
- movne r3, #7
16440
- strne r0, [r5, #1272]
16441
- strneb r3, [r5, #1278]
16442
-.L2760:
16443
- mov r6, #0
16444
-.L2728:
16445
- mov r0, r6
16652
+ mov r7, r0
16653
+ bne .L2712
16654
+.L2776:
16655
+ mov r7, #0
16656
+ b .L2713
16657
+.L2712:
16658
+ ands r3, r0, #15
16659
+ mul r6, r6, r5
16660
+ beq .L2714
16661
+ add r6, r4, r6
16662
+ mov r9, #12
16663
+ ldrb r1, [r6, #1233] @ zero_extendqisi2
16664
+ mov r2, r0
16665
+ str r9, [sp]
16666
+ ldr r0, .L2779+40
16667
+ ldr r3, [r6, #1256]
16668
+ bl printk
16669
+ mvn r3, #0
16670
+ strb r9, [r6, #1274]
16671
+ str r3, [r6, #1268]
16672
+.L2713:
16673
+ mov r3, #48
16674
+ mla r5, r3, r5, r4
16675
+ mla r8, r3, r8, r4
16676
+ ldrb r2, [r5, #1274] @ zero_extendqisi2
16677
+ ldr r3, [r5, #1268]
16678
+ strb r2, [r8, #1274]
16679
+ str r3, [r8, #1268]
16680
+.L2685:
16681
+ mov r0, r7
1644616682 add sp, sp, #20
1644716683 @ sp needed
16448
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
16449
-.L2817:
16684
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
16685
+.L2714:
16686
+ add r7, r4, r6
16687
+ mov r2, #13
16688
+ str r3, [r7, #1268]
16689
+ ldr r3, [r4, #2800]
16690
+ strb r2, [r7, #1274]
16691
+ ldr r2, [r3, #156]
16692
+ ldr r3, .L2779+28
16693
+ cmp r2, r3
16694
+ bne .L2776
16695
+ add r6, r9, r6
16696
+ ldrh r3, [r6, #34]
16697
+ cmp r3, #0
16698
+ bne .L2776
16699
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
16700
+ mvn ip, #0
16701
+ ldr lr, [r7, #1256]
16702
+ ldr r6, .L2779+4
16703
+ rsb r1, r3, #24
16704
+ mvn ip, ip, lsl r3
16705
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
16706
+ and r0, ip, lr, lsr r1
16707
+ bic r1, lr, ip, lsl r1
16708
+ str r3, [sp]
16709
+ uxtb r0, r0
16710
+ ldr r3, [r6, #-96]
16711
+ ldr r2, [r6, #-92]
16712
+ bl flash_read_page_en
16713
+ cmn r0, #1
16714
+ mov r3, r0
16715
+ beq .L2716
16716
+ ldr r1, [r7, #1244]
16717
+ ldr r2, [r6, #-96]
16718
+ ldr r1, [r1]
16719
+ ldr r2, [r2]
16720
+ cmp r1, r2
16721
+ beq .L2776
16722
+.L2716:
16723
+ mov r6, #48
16724
+ ldrb r2, [r4, #1196] @ zero_extendqisi2
16725
+ mla r6, r6, r5, r4
16726
+ ldr r0, .L2779+44
16727
+ ldrb r1, [r6, #1233] @ zero_extendqisi2
16728
+ str r2, [sp]
16729
+ ldr r2, [r6, #1256]
16730
+ bl printk
16731
+ mvn r3, #0
16732
+ str r3, [r6, #1268]
16733
+ b .L2776
16734
+.L2692:
16735
+ mov r0, r7
16736
+ mov r1, #32
16737
+ bl flash_wait_device_ready
16738
+ tst r0, #32
16739
+ mov r7, r0
16740
+ beq .L2719
16741
+ ands r2, r0, #15
16742
+ mov r3, #48
16743
+ mla r4, r3, r5, r4
16744
+ movne r3, #12
16745
+ strbne r3, [r4, #1274]
16746
+ bne .L2777
16747
+.L2718:
16748
+ mov r3, #13
16749
+ str r2, [r4, #1268]
16750
+ strb r3, [r4, #1274]
16751
+ b .L2719
16752
+.L2693:
16753
+ mov r1, #64
16754
+ mov r0, r7
16755
+ bl flash_wait_device_ready
16756
+ tst r0, #64
16757
+ movne r3, #48
16758
+ mlane r4, r3, r5, r4
16759
+ movne r3, #7
16760
+ strne r0, [r4, #1268]
16761
+ strbne r3, [r4, #1274]
16762
+ b .L2719
16763
+.L2780:
1645016764 .align 2
16451
-.L2816:
16765
+.L2779:
1645216766 .word .LANCHOR0
16453
- .word .LANCHOR2
16454
- .word .LC174
16455
- .word .LANCHOR1+2224
16456
- .word .LC0
16457
- .word .LC175
16458
- .word 1145785929
16459
- .word .LANCHOR0+1268
1646016767 .word .LANCHOR3
16768
+ .word .LANCHOR2
16769
+ .word .LC173
16770
+ .word .LANCHOR1+2034
16771
+ .word .LC0
16772
+ .word .LC174
16773
+ .word 1145785929
16774
+ .word .LANCHOR0+1232
16775
+ .word .LC175
1646116776 .word .LC176
16462
- .word .LANCHOR0+1236
1646316777 .word .LC177
16464
- .word .LC178
1646516778 .fnend
1646616779 .size queue_wait_first_req_completed, .-queue_wait_first_req_completed
1646716780 .align 2
1646816781 .global sblk_prog_page
16782
+ .syntax unified
16783
+ .arm
16784
+ .fpu softvfp
1646916785 .type sblk_prog_page, %function
1647016786 sblk_prog_page:
1647116787 .fnstart
1647216788 @ args = 0, pretend = 0, frame = 8
1647316789 @ frame_needed = 0, uses_anonymous_args = 0
16474
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
16790
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1647516791 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1647616792 .pad #12
1647716793 mov r4, r0
1647816794 ldrh r3, [r0, #34]
1647916795 mov r5, r1
1648016796 cmp r3, #0
16481
- beq .L2819
16482
- ldr r3, .L2850
16797
+ beq .L2782
16798
+ ldr r3, .L2812
1648316799 ldr r3, [r3]
1648416800 tst r3, #256
16485
- beq .L2819
16486
- ldr r0, .L2850+4
16487
- mov r2, r5
16488
- ldr r1, [r4, #24]
16801
+ beq .L2782
16802
+ mov r2, r1
16803
+ ldr r1, [r0, #24]
16804
+ ldr r0, .L2812+4
1648916805 bl printk
16490
-.L2819:
16491
- ldr r8, .L2850+8
16806
+.L2782:
16807
+ ldr r8, .L2812+8
1649216808 mov r6, #0
16493
- mov r9, r8
16494
-.L2820:
16809
+ ldr fp, .L2812+12
16810
+.L2783:
1649516811 cmp r5, #0
16496
- beq .L2847
16497
- ldrb r3, [r4] @ zero_extendqisi2
16498
- ldr r7, [r4, #24]
16499
- str r3, [sp, #4]
16500
-.L2821:
16501
- mov r0, r7
16502
- mov r1, #1
16503
- bl queue_lun_state
16504
- cmp r0, #0
16505
- beq .L2849
16506
- bl queue_wait_first_req_completed
16507
- bl queue_remove_completed_req
16508
- b .L2821
16509
-.L2849:
16510
- cmp r5, #1
16511
- beq .L2823
16512
- ldrb r3, [r8, #1233] @ zero_extendqisi2
16513
- cmp r3, #0
16514
- beq .L2823
16515
- ldrb r3, [r8, #1197] @ zero_extendqisi2
16516
- cmp r3, #0
16517
- beq .L2824
16518
-.L2823:
16519
- mov r0, r4
16520
- bl queue_prog_cmd
16521
- b .L2825
16522
-.L2824:
16523
- ldrb r3, [r8, #1189] @ zero_extendqisi2
16524
- mvn fp, #0
16525
- rsb ip, r3, #24
16526
- mov ip, r7, lsr ip
16527
- bic fp, ip, fp, asl r3
16528
- ldrb r3, [r4] @ zero_extendqisi2
16529
- cmp r3, #255
16530
- uxth fp, fp
16531
- bne .L2826
16532
- ldr r1, .L2850+12
16533
- movw r2, #697
16534
- ldr r0, .L2850+16
16535
- bl printk
16536
- bl dump_stack
16537
-.L2826:
16538
- ldrb r3, [r4] @ zero_extendqisi2
16539
- mov r2, #48
16540
- mov r10, #1
16541
- mla r3, r2, r3, r9
16542
- ldrb r2, [r9, #1189] @ zero_extendqisi2
16543
- ldr ip, [r3, #1260]
16544
- rsb r3, r2, #24
16545
- mov r2, r10, asl r2
16546
- sub r2, r2, #1
16547
- and r2, r2, ip, lsr r3
16548
- uxth r2, r2
16549
- cmp fp, r2
16550
- bne .L2827
16551
- ldr r2, .L2850+20
16552
- ldrh fp, [r2]
16553
- ldr r2, .L2850+24
16554
- rsb r3, fp, r3
16555
- mov r0, r10, asl fp
16556
- mov r3, r10, asl r3
16557
- sub r0, r0, #1
16558
- ldrb lr, [r2, #-3130] @ zero_extendqisi2
16559
- sub r3, r3, #1
16560
- uxth r0, r0
16561
- sub lr, lr, #1
16562
- uxth r3, r3
16563
- uxth r1, lr
16564
- and r2, r1, r7, lsr fp
16565
- and r1, r1, ip, lsr fp
16566
- and r2, r2, r3
16567
- and r3, r3, r1
16568
- subs fp, r2, r3
16569
- and r7, r7, r0
16570
- and ip, ip, r0
16571
- movne fp, #1
16572
- cmp r7, ip
16573
- movne fp, #0
16574
- cmp fp, #0
16575
- beq .L2828
16576
- cmp r6, lr
16577
- beq .L2827
16578
- mov r0, #17
16579
- ldr r1, [r4, #24]
16580
- ldr r2, [r4, #4]
16581
- add r6, r6, r10
16582
- ldr r3, [r4, #12]
16583
- bl flash_start_page_prog
16584
- mov r3, #9
16585
- strb r10, [r4, #43]
16586
- mov r1, r4
16587
- strb r3, [r4, #42]
16588
- mvn r3, #0
16589
- ldr r0, .L2850+28
16590
- strb r3, [r4]
16591
- bl buf_add_tail
16592
- b .L2825
16593
-.L2828:
16594
- mov r0, r4
16595
- mov r6, fp
16596
- bl queue_prog_cmd
16597
- b .L2825
16598
-.L2827:
16599
- mov r0, r4
16600
- mov r6, #0
16601
- bl queue_prog_cmd
16602
-.L2825:
16603
- subs r5, r5, #1
16604
- ldrne r3, .L2850+32
16605
- movne r4, #48
16606
- ldrne r2, [sp, #4]
16607
- mlane r4, r4, r2, r3
16608
- bne .L2820
16609
-.L2847:
16812
+ bne .L2794
16813
+.L2810:
1661016814 mov r0, #0
1661116815 add sp, sp, #12
1661216816 @ sp needed
16613
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
16614
-.L2851:
16817
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
16818
+.L2794:
16819
+ ldrb r9, [r4] @ zero_extendqisi2
16820
+ ldr r7, [r4, #24]
16821
+.L2784:
16822
+ mov r1, #1
16823
+ mov r0, r7
16824
+ bl queue_lun_state
16825
+ cmp r0, #0
16826
+ bne .L2785
16827
+ cmp r5, #1
16828
+ beq .L2786
16829
+ ldrb r3, [r8, #1194] @ zero_extendqisi2
16830
+ cmp r3, #0
16831
+ beq .L2786
16832
+ ldrb r3, [r8, #1159] @ zero_extendqisi2
16833
+ cmp r3, #0
16834
+ beq .L2787
16835
+.L2786:
16836
+ mov r0, r4
16837
+ bl queue_prog_cmd
16838
+.L2788:
16839
+ subs r5, r5, #1
16840
+ beq .L2810
16841
+ ldr r4, .L2812+16
16842
+ add r9, r9, r9, lsl #1
16843
+ add r4, r4, r9, lsl #4
16844
+ b .L2783
16845
+.L2785:
16846
+ bl queue_wait_first_req_completed
16847
+ bl queue_remove_completed_req
16848
+ b .L2784
16849
+.L2787:
16850
+ ldrb r2, [r8, #1153] @ zero_extendqisi2
16851
+ mvn r3, #0
16852
+ rsb r1, r2, #24
16853
+ mvn r3, r3, lsl r2
16854
+ ldrb r2, [r4] @ zero_extendqisi2
16855
+ and r3, r3, r7, lsr r1
16856
+ cmp r2, #255
16857
+ uxth r3, r3
16858
+ bne .L2789
16859
+ movw r2, #697
16860
+ ldr r1, .L2812+20
16861
+ ldr r0, .L2812+24
16862
+ str r3, [sp, #4]
16863
+ bl printk
16864
+ bl dump_stack
16865
+ ldr r3, [sp, #4]
16866
+.L2789:
16867
+ ldrb r2, [r4] @ zero_extendqisi2
16868
+ mov r1, #48
16869
+ mov r10, #1
16870
+ mla r2, r1, r2, r8
16871
+ ldrb r1, [r8, #1153] @ zero_extendqisi2
16872
+ ldr r0, [r2, #1256]
16873
+ rsb r2, r1, #24
16874
+ lsl r1, r10, r1
16875
+ sub r1, r1, #1
16876
+ and r1, r1, r0, lsr r2
16877
+ uxth r1, r1
16878
+ cmp r3, r1
16879
+ bne .L2790
16880
+ ldr r3, .L2812+28
16881
+ ldrb lr, [fp, #-3136] @ zero_extendqisi2
16882
+ ldrh ip, [r3, #-2]
16883
+ sub lr, lr, #1
16884
+ sub r3, r2, ip
16885
+ lsl r3, r10, r3
16886
+ lsl r2, r10, ip
16887
+ sub r3, r3, #1
16888
+ sub r2, r2, #1
16889
+ and r3, r3, lr
16890
+ uxth r2, r2
16891
+ uxth r3, r3
16892
+ and r1, r3, r7, lsr ip
16893
+ and r3, r3, r0, lsr ip
16894
+ and ip, r2, r7
16895
+ subs r7, r1, r3
16896
+ and r2, r2, r0
16897
+ movne r7, #1
16898
+ cmp ip, r2
16899
+ movne r7, #0
16900
+ cmp r7, #0
16901
+ beq .L2790
16902
+ cmp r6, lr
16903
+ beq .L2790
16904
+ ldr r3, [r4, #12]
16905
+ mov r0, #17
16906
+ ldr r2, [r4, #4]
16907
+ add r6, r6, r10
16908
+ ldr r1, [r4, #24]
16909
+ bl flash_start_page_prog
16910
+ mov r3, #9
16911
+ strb r10, [r4, #43]
16912
+ strb r3, [r4, #42]
16913
+ mvn r3, #0
16914
+ strb r3, [r4]
16915
+ mov r1, r4
16916
+ ldr r0, .L2812+32
16917
+ bl buf_add_tail
16918
+ b .L2788
16919
+.L2790:
16920
+ mov r0, r4
16921
+ mov r6, #0
16922
+ bl queue_prog_cmd
16923
+ b .L2788
16924
+.L2813:
1661516925 .align 2
16616
-.L2850:
16926
+.L2812:
1661716927 .word .LANCHOR2
16618
- .word .LC179
16928
+ .word .LC178
1661916929 .word .LANCHOR0
16620
- .word .LANCHOR1+2256
16621
- .word .LC0
16622
- .word .LANCHOR3-3132
1662316930 .word .LANCHOR3
16624
- .word .LANCHOR0+2775
16625
- .word .LANCHOR0+1236
16931
+ .word .LANCHOR0+1232
16932
+ .word .LANCHOR1+2065
16933
+ .word .LC0
16934
+ .word .LANCHOR3-3136
16935
+ .word .LANCHOR0+2770
1662616936 .fnend
1662716937 .size sblk_prog_page, .-sblk_prog_page
1662816938 .align 2
1662916939 .global sblk_wait_write_queue_completed
16940
+ .syntax unified
16941
+ .arm
16942
+ .fpu softvfp
1663016943 .type sblk_wait_write_queue_completed, %function
1663116944 sblk_wait_write_queue_completed:
1663216945 .fnstart
1663316946 @ args = 0, pretend = 0, frame = 0
1663416947 @ frame_needed = 0, uses_anonymous_args = 0
16635
- stmfd sp!, {r4, lr}
16948
+ push {r4, lr}
1663616949 .save {r4, lr}
16637
- ldr r4, .L2857
16638
-.L2853:
16639
- ldrb r3, [r4, #2775] @ zero_extendqisi2
16950
+ ldr r4, .L2818
16951
+.L2815:
16952
+ ldrb r3, [r4, #2770] @ zero_extendqisi2
1664016953 cmp r3, #255
16641
- beq .L2856
16954
+ bne .L2816
16955
+ pop {r4, pc}
16956
+.L2816:
1664216957 bl queue_wait_first_req_completed
1664316958 bl queue_remove_completed_req
16644
- b .L2853
16645
-.L2856:
16646
- ldmfd sp!, {r4, pc}
16647
-.L2858:
16959
+ b .L2815
16960
+.L2819:
1664816961 .align 2
16649
-.L2857:
16962
+.L2818:
1665016963 .word .LANCHOR0
1665116964 .fnend
1665216965 .size sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
1665316966 .align 2
1665416967 .global ftl_flush
16968
+ .syntax unified
16969
+ .arm
16970
+ .fpu softvfp
1665516971 .type ftl_flush, %function
1665616972 ftl_flush:
1665716973 .fnstart
1665816974 @ args = 0, pretend = 0, frame = 0
1665916975 @ frame_needed = 0, uses_anonymous_args = 0
16660
- stmfd sp!, {r3, r4, r5, lr}
16661
- .save {r3, r4, r5, lr}
16662
- ldr r3, .L2865
16663
- ldr r5, .L2865+4
16664
- ldrb r1, [r3, #2801] @ zero_extendqisi2
16665
- mov r4, r3
16976
+ push {r4, r5, r6, lr}
16977
+ .save {r4, r5, r6, lr}
16978
+ ldr r4, .L2826
16979
+ ldr r5, .L2826+4
16980
+ ldrb r1, [r4, #2797] @ zero_extendqisi2
1666616981 cmp r1, #0
16667
- beq .L2860
16668
- ldrb r2, [r5, #-96] @ zero_extendqisi2
16669
- mov r0, #48
16670
- ldr r3, .L2865+8
16671
- mla r0, r0, r2, r3
16982
+ beq .L2821
16983
+ ldrb r3, [r5, #-88] @ zero_extendqisi2
16984
+ add r0, r4, #1232
16985
+ add r3, r3, r3, lsl #1
16986
+ add r0, r0, r3, lsl #4
1667216987 bl sblk_prog_page
16673
-.L2860:
16988
+.L2821:
1667416989 mvn r3, #0
16675
- strb r3, [r5, #-96]
16990
+ strb r3, [r5, #-88]
1667616991 mov r3, #0
16677
- strb r3, [r4, #2801]
16992
+ strb r3, [r4, #2797]
1667816993 bl sblk_wait_write_queue_completed
1667916994 bl ftl_write_completed
1668016995 movw r0, #65535
16681
- ldmfd sp!, {r3, r4, r5, lr}
16996
+ pop {r4, r5, r6, lr}
1668216997 b ftl_vpn_decrement
16683
-.L2866:
16998
+.L2827:
1668416999 .align 2
16685
-.L2865:
17000
+.L2826:
1668617001 .word .LANCHOR0
1668717002 .word .LANCHOR3
16688
- .word .LANCHOR0+1236
1668917003 .fnend
1669017004 .size ftl_flush, .-ftl_flush
1669117005 .align 2
1669217006 .global zftl_cache_flush
17007
+ .syntax unified
17008
+ .arm
17009
+ .fpu softvfp
1669317010 .type zftl_cache_flush, %function
1669417011 zftl_cache_flush:
1669517012 .fnstart
1669617013 @ args = 0, pretend = 0, frame = 0
1669717014 @ frame_needed = 0, uses_anonymous_args = 0
16698
- stmfd sp!, {r3, lr}
16699
- .save {r3, lr}
16700
- ldr r3, .L2872
16701
- ldrb r3, [r3, #2801] @ zero_extendqisi2
17015
+ ldr r3, .L2836
17016
+ ldrb r3, [r3, #2797] @ zero_extendqisi2
1670217017 cmp r3, #0
16703
- ldmeqfd sp!, {r3, pc}
17018
+ bxeq lr
17019
+ push {r4, lr}
17020
+ .save {r4, lr}
1670417021 bl timer_get_time
16705
- ldr r3, .L2872+4
16706
- ldr r3, [r3, #-92]
17022
+ ldr r3, .L2836+4
17023
+ ldr r3, [r3, #-84]
1670717024 add r3, r3, #100
1670817025 cmp r0, r3
16709
- ldmlsfd sp!, {r3, pc}
16710
- ldmfd sp!, {r3, lr}
17026
+ popls {r4, pc}
17027
+ pop {r4, lr}
1671117028 b ftl_flush
16712
-.L2873:
17029
+.L2837:
1671317030 .align 2
16714
-.L2872:
17031
+.L2836:
1671517032 .word .LANCHOR0
1671617033 .word .LANCHOR3
1671717034 .fnend
1671817035 .size zftl_cache_flush, .-zftl_cache_flush
1671917036 .align 2
1672017037 .global ftl_read_page
17038
+ .syntax unified
17039
+ .arm
17040
+ .fpu softvfp
1672117041 .type ftl_read_page, %function
1672217042 ftl_read_page:
1672317043 .fnstart
1672417044 @ args = 4, pretend = 0, frame = 0
1672517045 @ frame_needed = 0, uses_anonymous_args = 0
16726
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
17046
+ push {r4, r5, r6, r7, r8, lr}
1672717047 .save {r4, r5, r6, r7, r8, lr}
16728
- mov r7, r0
16729
- mov r6, r1
16730
- mov r5, r2
16731
- mov r4, r3
17048
+ mov r4, r0
1673217049 ldr r8, [sp, #24]
17050
+ mov r5, r1
17051
+ mov r6, r2
17052
+ mov r7, r3
1673317053 bl sblk_wait_write_queue_completed
16734
- mov r0, r7
16735
- mov r1, r6
16736
- mov r2, r5
16737
- mov r3, r4
17054
+ mov r3, r7
1673817055 str r8, [sp, #24]
16739
- ldmfd sp!, {r4, r5, r6, r7, r8, lr}
17056
+ mov r2, r6
17057
+ mov r1, r5
17058
+ mov r0, r4
17059
+ pop {r4, r5, r6, r7, r8, lr}
1674017060 b flash_read_page_en
1674117061 .fnend
1674217062 .size ftl_read_page, .-ftl_read_page
1674317063 .align 2
1674417064 .global ftl_read_ppa_page
17065
+ .syntax unified
17066
+ .arm
17067
+ .fpu softvfp
1674517068 .type ftl_read_ppa_page, %function
1674617069 ftl_read_ppa_page:
1674717070 .fnstart
1674817071 @ args = 0, pretend = 0, frame = 0
1674917072 @ frame_needed = 0, uses_anonymous_args = 0
16750
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
17073
+ push {r0, r1, r4, r5, r6, r7, r8, lr}
1675117074 .save {r4, r5, r6, r7, r8, lr}
1675217075 .pad #8
1675317076 mov r8, r3
16754
- ldr r3, .L2878
16755
- mov r7, r1
16756
- mov r6, r2
16757
- mvn r2, #0
17077
+ ldr r3, .L2842
1675817078 mov r5, r0
16759
- ldrb r1, [r3, #1189] @ zero_extendqisi2
16760
- rsb r4, r1, #24
16761
- mvn r2, r2, asl r1
16762
- and r4, r2, r0, lsr r4
16763
- bl sblk_wait_write_queue_completed
16764
- mov r1, r5
17079
+ mvn r4, #0
17080
+ mov r6, r1
17081
+ mov r7, r2
17082
+ ldrb r0, [r3, #1153] @ zero_extendqisi2
17083
+ rsb r3, r0, #24
17084
+ mvn r4, r4, lsl r0
17085
+ and r4, r4, r5, lsr r3
1676517086 uxtb r4, r4
16766
- mov r2, r7
16767
- mov r3, r6
16768
- mov r0, r4
17087
+ bl sblk_wait_write_queue_completed
17088
+ mov r3, r7
1676917089 str r8, [sp]
17090
+ mov r2, r6
17091
+ mov r1, r5
17092
+ mov r0, r4
1677017093 bl flash_read_page_en
1677117094 add sp, sp, #8
1677217095 @ sp needed
16773
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
16774
-.L2879:
17096
+ pop {r4, r5, r6, r7, r8, pc}
17097
+.L2843:
1677517098 .align 2
16776
-.L2878:
17099
+.L2842:
1677717100 .word .LANCHOR0
1677817101 .fnend
1677917102 .size ftl_read_ppa_page, .-ftl_read_ppa_page
1678017103 .align 2
1678117104 .global sblk_read_page
17105
+ .syntax unified
17106
+ .arm
17107
+ .fpu softvfp
1678217108 .type sblk_read_page, %function
1678317109 sblk_read_page:
1678417110 .fnstart
16785
- @ args = 0, pretend = 0, frame = 16
17111
+ @ args = 0, pretend = 0, frame = 8
1678617112 @ frame_needed = 0, uses_anonymous_args = 0
16787
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17113
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1678817114 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16789
- .pad #20
16790
- sub sp, sp, #20
16791
- ldr r10, .L2908
16792
- mov r8, r0
16793
- mov r6, r1
17115
+ .pad #12
17116
+ mov r10, r0
17117
+ mov r7, r1
1679417118 mov r4, r0
1679517119 mov r5, r1
16796
-.L2881:
17120
+.L2845:
1679717121 cmp r5, #0
16798
- beq .L2904
16799
- ldrb fp, [r4] @ zero_extendqisi2
16800
- ldr r9, [r4, #24]
16801
-.L2882:
16802
- mov r0, r9
17122
+ bne .L2855
17123
+.L2868:
17124
+ ldr r4, .L2870
17125
+.L2856:
17126
+ cmp r7, #0
17127
+ bne .L2858
17128
+ mov r0, r7
17129
+ add sp, sp, #12
17130
+ @ sp needed
17131
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17132
+.L2855:
17133
+ ldrb r8, [r4] @ zero_extendqisi2
17134
+ ldr fp, [r4, #24]
17135
+.L2846:
1680317136 mov r1, #0
17137
+ mov r0, fp
1680417138 bl queue_lun_state
1680517139 cmp r0, #0
16806
- beq .L2906
16807
- bl queue_wait_first_req_completed
16808
- bl queue_remove_completed_req
16809
- b .L2882
16810
-.L2906:
17140
+ bne .L2847
1681117141 cmp r5, #1
16812
- beq .L2888
16813
- ldr r3, .L2908+4
16814
- ldrb r3, [r3, #-88] @ zero_extendqisi2
17142
+ beq .L2852
17143
+ ldr r3, .L2870+4
17144
+ ldrb r3, [r3, #-80] @ zero_extendqisi2
1681517145 cmp r3, #0
16816
- beq .L2888
16817
- ldr r3, .L2908
16818
- mvn lr, #0
16819
- ldrb r2, [r3, #1189] @ zero_extendqisi2
16820
- rsb r3, r2, #24
16821
- mov r3, r9, lsr r3
16822
- bic lr, r3, lr, asl r2
16823
- uxth r3, lr
16824
- str r3, [sp, #4]
16825
- ldrb r3, [r4] @ zero_extendqisi2
16826
- cmp r3, #255
16827
- bne .L2887
16828
- ldr r1, .L2908+8
16829
- movw r2, #782
16830
- ldr r0, .L2908+12
16831
- bl printk
16832
- bl dump_stack
16833
-.L2887:
16834
- ldrb r3, [r4] @ zero_extendqisi2
16835
- mov r2, #48
16836
- ldrb r0, [r10, #1189] @ zero_extendqisi2
16837
- mvn ip, #0
16838
- mul r3, r2, r3
16839
- rsb r2, r0, #24
16840
- add r7, r10, r3
16841
- ldr r1, [r7, #1260]
16842
- mov r2, r1, lsr r2
16843
- bic r2, r2, ip, asl r0
16844
- ldr r0, [sp, #4]
16845
- uxth r2, r2
16846
- cmp r0, r2
16847
- bne .L2888
16848
- ldr r2, .L2908+16
16849
- ldrh r2, [r2]
16850
- add r9, r2, r9
16851
- cmp r1, r9
16852
- bne .L2888
16853
- ldr r0, [r4, #24]
16854
- mvn r9, #0
16855
- str r3, [sp, #12]
16856
- add r5, r5, r9
16857
- ldrb fp, [r7, #1236] @ zero_extendqisi2
16858
- bl flash_start_plane_read
16859
- mov ip, #2
16860
- mov r2, #0
16861
- strb ip, [r4, #42]
16862
- mov r1, r4
16863
- strb r2, [r4, #43]
16864
- ldr r0, .L2908+20
16865
- strb r9, [r4]
16866
- str ip, [sp, #8]
16867
- str r2, [sp, #4]
16868
- bl buf_add_tail
16869
- ldr r1, .L2908+24
16870
- strb r9, [r7, #1236]
16871
- ldr r0, .L2908+20
16872
- ldr ip, [sp, #8]
16873
- ldr r2, [sp, #4]
16874
- ldr r3, [sp, #12]
16875
- strb ip, [r7, #1278]
16876
- strb r2, [r7, #1279]
16877
- add r1, r1, r3
16878
- bl buf_add_tail
16879
- b .L2886
16880
-.L2888:
17146
+ bne .L2849
17147
+.L2852:
1688117148 mov r0, r4
1688217149 bl queue_read_cmd
16883
-.L2886:
16884
- subs r5, r5, #1
16885
- ldrne r3, .L2908+24
16886
- movne r4, #48
16887
- mlane r4, r4, fp, r3
16888
- bne .L2881
16889
-.L2904:
16890
- ldr r4, .L2908+24
16891
- mov r5, #48
16892
-.L2892:
16893
- cmp r6, #0
16894
- beq .L2907
16895
- ldrb r3, [r8, #42] @ zero_extendqisi2
16896
- cmp r3, #13
16897
- bne .L2893
16898
- ldrb r3, [r8] @ zero_extendqisi2
16899
- sub r6, r6, #1
16900
- cmp r3, #255
16901
- mlane r8, r5, r3, r4
16902
-.L2893:
17150
+ b .L2850
17151
+.L2847:
1690317152 bl queue_wait_first_req_completed
1690417153 bl queue_remove_completed_req
16905
- b .L2892
16906
-.L2907:
16907
- mov r0, r6
16908
- add sp, sp, #20
16909
- @ sp needed
16910
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
16911
-.L2909:
17154
+ b .L2846
17155
+.L2849:
17156
+ ldr r3, .L2870+8
17157
+ ldrb r2, [r3, #1153] @ zero_extendqisi2
17158
+ mvn r3, #0
17159
+ rsb r1, r2, #24
17160
+ mvn r3, r3, lsl r2
17161
+ ldrb r2, [r4] @ zero_extendqisi2
17162
+ and r3, r3, fp, lsr r1
17163
+ cmp r2, #255
17164
+ uxth r3, r3
17165
+ bne .L2851
17166
+ movw r2, #782
17167
+ ldr r1, .L2870+12
17168
+ ldr r0, .L2870+16
17169
+ str r3, [sp]
17170
+ bl printk
17171
+ bl dump_stack
17172
+ ldr r3, [sp]
17173
+.L2851:
17174
+ ldr r2, .L2870+8
17175
+ mov r6, #48
17176
+ ldrb r9, [r4] @ zero_extendqisi2
17177
+ ldrb ip, [r2, #1153] @ zero_extendqisi2
17178
+ mla r6, r6, r9, r2
17179
+ mvn r2, #0
17180
+ mvn r2, r2, lsl ip
17181
+ rsb r0, ip, #24
17182
+ ldr r1, [r6, #1256]
17183
+ and r2, r2, r1, lsr r0
17184
+ uxth r2, r2
17185
+ cmp r3, r2
17186
+ bne .L2852
17187
+ ldr r3, .L2870+20
17188
+ ldrh r3, [r3]
17189
+ add fp, r3, fp
17190
+ cmp r1, fp
17191
+ bne .L2852
17192
+ ldr r0, [r4, #24]
17193
+ mvn fp, #0
17194
+ ldrb r8, [r6, #1232] @ zero_extendqisi2
17195
+ add r9, r9, r9, lsl #1
17196
+ add r5, r5, fp
17197
+ bl flash_start_plane_read
17198
+ mov r2, #2
17199
+ mov r3, #0
17200
+ strb r2, [r4, #42]
17201
+ mov r1, r4
17202
+ strb r3, [r4, #43]
17203
+ ldr r0, .L2870+24
17204
+ strb fp, [r4]
17205
+ str r2, [sp, #4]
17206
+ str r3, [sp]
17207
+ bl buf_add_tail
17208
+ ldr r1, .L2870
17209
+ ldr r2, [sp, #4]
17210
+ ldr r3, [sp]
17211
+ strb fp, [r6, #1232]
17212
+ strb r2, [r6, #1274]
17213
+ add r1, r1, r9, lsl #4
17214
+ strb r3, [r6, #1275]
17215
+ ldr r0, .L2870+24
17216
+ bl buf_add_tail
17217
+.L2850:
17218
+ subs r5, r5, #1
17219
+ beq .L2868
17220
+ ldr r4, .L2870
17221
+ add r8, r8, r8, lsl #1
17222
+ add r4, r4, r8, lsl #4
17223
+ b .L2845
17224
+.L2858:
17225
+ ldrb r3, [r10, #42] @ zero_extendqisi2
17226
+ cmp r3, #13
17227
+ bne .L2857
17228
+ ldrb r3, [r10] @ zero_extendqisi2
17229
+ sub r7, r7, #1
17230
+ cmp r3, #255
17231
+ addne r3, r3, r3, lsl #1
17232
+ addne r10, r4, r3, lsl #4
17233
+.L2857:
17234
+ bl queue_wait_first_req_completed
17235
+ bl queue_remove_completed_req
17236
+ b .L2856
17237
+.L2871:
1691217238 .align 2
16913
-.L2908:
16914
- .word .LANCHOR0
17239
+.L2870:
17240
+ .word .LANCHOR0+1232
1691517241 .word .LANCHOR3
16916
- .word .LANCHOR1+2272
17242
+ .word .LANCHOR0
17243
+ .word .LANCHOR1+2080
1691717244 .word .LC0
16918
- .word .LANCHOR3-3066
16919
- .word .LANCHOR0+2775
16920
- .word .LANCHOR0+1236
17245
+ .word .LANCHOR3-3074
17246
+ .word .LANCHOR0+2770
1692117247 .fnend
1692217248 .size sblk_read_page, .-sblk_read_page
1692317249 .align 2
1692417250 .global gc_check_data_one_wl
17251
+ .syntax unified
17252
+ .arm
17253
+ .fpu softvfp
1692517254 .type gc_check_data_one_wl, %function
1692617255 gc_check_data_one_wl:
1692717256 .fnstart
16928
- @ args = 0, pretend = 0, frame = 8
17257
+ @ args = 0, pretend = 0, frame = 0
1692917258 @ frame_needed = 0, uses_anonymous_args = 0
16930
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17259
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1693117260 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
16932
- .pad #36
16933
- sub sp, sp, #36
16934
- ldr r6, .L2946
16935
- ldr r3, [r6, #2836]
16936
- ldr r9, [r6, #1092]
17261
+ .pad #28
17262
+ sub sp, sp, #28
17263
+ ldr r5, .L2906
17264
+ ldr r3, [r5, #2832]
17265
+ ldr r10, [r5, #1096]
1693717266 cmp r3, #0
16938
- bne .L2911
17267
+ bne .L2873
1693917268 mov r0, #1
1694017269 bl buf_alloc
16941
- str r0, [r6, #2836]
16942
-.L2911:
16943
- ldr r4, [r6, #2836]
17270
+ str r0, [r5, #2832]
17271
+.L2873:
17272
+ ldr r4, [r5, #2832]
1694417273 cmp r4, #0
16945
- bne .L2912
16946
- ldr r1, .L2946+4
17274
+ bne .L2874
1694717275 movw r2, #729
16948
- ldr r0, .L2946+8
17276
+ ldr r1, .L2906+4
17277
+ ldr r0, .L2906+8
1694917278 bl printk
1695017279 bl dump_stack
16951
-.L2912:
16952
- ldr fp, .L2946+12
16953
- add r10, r9, #96
16954
- mov r8, #0
16955
- mov ip, fp
16956
-.L2913:
16957
- ldrb r3, [r9, #89] @ zero_extendqisi2
16958
- ldr r5, .L2946+16
16959
- cmp r8, r3
16960
- bge .L2944
16961
- mov r7, #1
16962
-.L2924:
16963
- ldrh r3, [r5, #16]
16964
- cmp r7, r3
16965
- bgt .L2945
16966
- ldr r2, .L2946+20
16967
- ldrb r1, [fp, #-3124] @ zero_extendqisi2
16968
- ldrh r3, [r10]
16969
- ldrh r2, [r2]
17280
+.L2874:
17281
+ ldr r7, .L2906+12
17282
+ add fp, r10, #96
17283
+ mov r9, #0
17284
+.L2875:
17285
+ ldrb r3, [r10, #89] @ zero_extendqisi2
17286
+ ldr r6, .L2906+16
17287
+ cmp r9, r3
17288
+ bge .L2886
17289
+ mov r8, #1
17290
+ b .L2887
17291
+.L2885:
17292
+ ldr r2, .L2906+20
17293
+ ldrb r1, [r7, #-3128] @ zero_extendqisi2
17294
+ ldrh r3, [fp]
17295
+ ldrh r2, [r2, #-2]
1697017296 cmp r1, #2
1697117297 mul r2, r2, r3
16972
- beq .L2914
16973
- ldr r3, .L2946
16974
- ldrb r3, [r3, #1196] @ zero_extendqisi2
17298
+ beq .L2876
17299
+ ldrb r3, [r5, #1158] @ zero_extendqisi2
1697517300 cmp r3, #0
16976
- beq .L2915
16977
-.L2914:
16978
- ldrh r3, [r5, #12]
17301
+ beq .L2877
17302
+.L2876:
17303
+ ldrh r3, [r6, #12]
1697917304 sub r3, r3, #1
1698017305 add r3, r3, r2
16981
- add r3, r3, r7
16982
- orr r3, r3, r1, asl #24
16983
- b .L2943
16984
-.L2915:
16985
- ldr r3, .L2946+16
16986
- cmp r1, #3
16987
- ldrh r3, [r3, #12]
16988
- addne r2, r2, r3
16989
- strne r2, [r4, #24]
16990
- bne .L2916
16991
- ldr r1, .L2946
16992
- ldrb r1, [r1, #1197] @ zero_extendqisi2
16993
- cmp r1, #0
16994
- addne r3, r3, r3, asl #1
16995
- addeq r3, r2, r3
16996
- subne r3, r3, #1
16997
- orreq r3, r3, r7, asl #24
16998
- addne r3, r3, r2
16999
- addne r3, r3, r7
17000
- orrne r3, r3, #50331648
17001
-.L2943:
17306
+ add r3, r3, r8
17307
+ orr r3, r3, r1, lsl #24
17308
+.L2905:
1700217309 str r3, [r4, #24]
17003
-.L2916:
17004
- mov r0, r4
1700517310 mov r1, #1
17006
- str ip, [sp, #28]
17311
+ mov r0, r4
1700717312 bl sblk_read_page
1700817313 ldr r2, [r4, #36]
1700917314 cmn r2, #1
17010
- ldr ip, [sp, #28]
17011
- beq .L2919
17012
- ldr r0, [ip, #-172]
17013
- ldrh r1, [r5, #18]
17315
+ beq .L2881
17316
+ ldr r0, [r7, #-132]
17317
+ ldrh r1, [r6, #18]
1701417318 ldr r3, [r4, #12]
17015
- ldr lr, [r0, r1, asl #2]
17319
+ ldr ip, [r0, r1, lsl #2]
1701617320 ldr r0, [r3, #4]
17017
- cmp lr, r0
17018
- bne .L2919
17019
- ldr r0, [fp, #-168]
17321
+ cmp ip, r0
17322
+ bne .L2881
17323
+ ldr r0, [r7, #-128]
1702017324 ldr r3, [r3, #8]
17021
- ldr r1, [r0, r1, asl #2]
17325
+ ldr r1, [r0, r1, lsl #2]
1702217326 cmp r1, r3
17023
- beq .L2920
17024
-.L2919:
17025
- ldrh r3, [r5, #18]
17026
- ldr r1, [ip, #-172]
17027
- mov r0, r3, asl #2
17028
- ldr r3, [r1, r3, asl #2]
17327
+ beq .L2882
17328
+.L2881:
17329
+ ldrh r3, [r6, #18]
17330
+ ldr r1, [r7, #-132]
17331
+ lsl r0, r3, #2
17332
+ ldr r3, [r1, r3, lsl #2]
1702917333 cmn r3, #1
17030
- beq .L2920
17031
- ldr r1, .L2946+24
17334
+ beq .L2882
17335
+ ldr r1, .L2906+24
1703217336 ldr r1, [r1]
1703317337 tst r1, #1024
17034
- beq .L2921
17035
- ldr ip, .L2946+12
17338
+ beq .L2883
1703617339 ldr r1, [r4, #12]
17037
- ldr ip, [ip, #-168]
17038
- ldr r0, [ip, r0]
17039
- str r0, [sp]
17040
- ldr r0, [r1]
17041
- str r0, [sp, #4]
17042
- ldr r0, [r1, #4]
17043
- str r0, [sp, #8]
17044
- ldr r0, [r1, #8]
17045
- str r0, [sp, #12]
17046
- ldr r1, [r1, #12]
17047
- ldr r0, .L2946+28
17048
- str r1, [sp, #16]
17340
+ ldr ip, [r1, #12]
17341
+ str ip, [sp, #16]
17342
+ ldr ip, [r1, #8]
17343
+ str ip, [sp, #12]
17344
+ ldr ip, [r1, #4]
17345
+ str ip, [sp, #8]
17346
+ ldr r1, [r1]
17347
+ str r1, [sp, #4]
17348
+ ldr r1, [r7, #-128]
17349
+ ldr r1, [r1, r0]
17350
+ ldr r0, .L2906+28
17351
+ str r1, [sp]
1704917352 ldr r1, [r4, #24]
1705017353 bl printk
17051
-.L2921:
17052
- ldrh r3, [r9, #80]
17354
+.L2883:
17355
+ ldrh r3, [r10, #80]
1705317356 mov r1, #0
17054
- ldr r2, [r6, #1088]
17055
- mov r3, r3, asl #1
17357
+ ldr r2, [r5, #1092]
17358
+ lsl r3, r3, #1
1705617359 strh r1, [r2, r3] @ movhi
17057
- ldr r2, [r6, #1092]
17360
+ ldr r2, [r5, #1096]
1705817361 ldr r3, [r2, #556]
1705917362 add r3, r3, #1
1706017363 str r3, [r2, #556]
17061
- ldr r3, [r6, #2804]
17364
+ ldr r3, [r5, #2800]
1706217365 ldr r2, [r3, #156]
17063
- ldr r3, .L2946+32
17366
+ ldr r3, .L2906+32
1706417367 cmp r2, r3
17065
- bne .L2927
17066
- ldr r3, .L2946+12
17067
- ldrb r3, [r3, #-2536] @ zero_extendqisi2
17368
+ bne .L2890
17369
+ ldrb r3, [r7, #-2542] @ zero_extendqisi2
1706817370 cmp r3, r1
17069
- bne .L2927
17070
- ldr r3, .L2946+12
17071
- ldrb r3, [r3, #-3122] @ zero_extendqisi2
17371
+ bne .L2890
17372
+ ldrb r3, [r7, #-3126] @ zero_extendqisi2
1707217373 cmp r3, r1
17073
- bne .L2927
17374
+ bne .L2890
1707417375 ldr r0, [r4, #24]
1707517376 bl ftl_mask_bad_block
17076
- b .L2927
17077
-.L2920:
17078
- ldrh r3, [r5, #18]
17079
- add r7, r7, #1
17080
- add r3, r3, #1
17081
- strh r3, [r5, #18] @ movhi
17082
- b .L2924
17083
-.L2945:
17084
- add r8, r8, #1
17085
- add r10, r10, #2
17086
- b .L2913
17087
-.L2944:
17088
- ldrh r3, [r5, #12]
17089
- add r2, r3, #1
17090
- strh r2, [r5, #12] @ movhi
17091
- ldr r2, .L2946+12
17092
- ldrb r0, [r2, #-3122] @ zero_extendqisi2
17093
- cmp r0, #0
17094
- addne r3, r3, #2
17095
- strneh r3, [r5, #12] @ movhi
17096
- movne r0, #0
17097
- b .L2922
17098
-.L2927:
17377
+.L2890:
1709917378 mvn r0, #0
17100
-.L2922:
17101
- add sp, sp, #36
17379
+ b .L2872
17380
+.L2877:
17381
+ ldrh r3, [r6, #12]
17382
+ cmp r1, #3
17383
+ addne r3, r3, r2
17384
+ bne .L2905
17385
+ ldrb r1, [r5, #1159] @ zero_extendqisi2
17386
+ cmp r1, #0
17387
+ addne r3, r3, r3, lsl #1
17388
+ addeq r3, r3, r2
17389
+ orreq r3, r3, r8, lsl #24
17390
+ subne r3, r3, #1
17391
+ addne r3, r3, r2
17392
+ addne r3, r3, r8
17393
+ orrne r3, r3, #50331648
17394
+ b .L2905
17395
+.L2882:
17396
+ ldrh r3, [r6, #18]
17397
+ add r8, r8, #1
17398
+ add r3, r3, #1
17399
+ strh r3, [r6, #18] @ movhi
17400
+.L2887:
17401
+ ldrh r3, [r6, #16]
17402
+ cmp r8, r3
17403
+ ble .L2885
17404
+ add r9, r9, #1
17405
+ add fp, fp, #2
17406
+ b .L2875
17407
+.L2886:
17408
+ ldrh r3, [r6, #12]
17409
+ add r2, r3, #1
17410
+ strh r2, [r6, #12] @ movhi
17411
+ ldr r2, .L2906+12
17412
+ ldrb r0, [r2, #-3126] @ zero_extendqisi2
17413
+ cmp r0, #0
17414
+ movne r0, #0
17415
+ addne r3, r3, #2
17416
+ strhne r3, [r6, #12] @ movhi
17417
+.L2884:
17418
+.L2872:
17419
+ add sp, sp, #28
1710217420 @ sp needed
17103
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17104
-.L2947:
17421
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17422
+.L2907:
1710517423 .align 2
17106
-.L2946:
17424
+.L2906:
1710717425 .word .LANCHOR0
17108
- .word .LANCHOR1+2288
17426
+ .word .LANCHOR1+2095
1710917427 .word .LC0
1711017428 .word .LANCHOR3
17111
- .word .LANCHOR0+2828
17112
- .word .LANCHOR3-3066
17429
+ .word .LANCHOR0+2824
17430
+ .word .LANCHOR3-3072
1711317431 .word .LANCHOR2
17114
- .word .LC180
17432
+ .word .LC179
1711517433 .word 1145785929
1711617434 .fnend
1711717435 .size gc_check_data_one_wl, .-gc_check_data_one_wl
1711817436 .align 2
1711917437 .global sblk_tlc_prog_one_page
17438
+ .syntax unified
17439
+ .arm
17440
+ .fpu softvfp
1712017441 .type sblk_tlc_prog_one_page, %function
1712117442 sblk_tlc_prog_one_page:
1712217443 .fnstart
1712317444 @ args = 0, pretend = 0, frame = 0
1712417445 @ frame_needed = 0, uses_anonymous_args = 0
17125
- stmfd sp!, {r4, r5, r6, lr}
17446
+ push {r4, r5, r6, lr}
1712617447 .save {r4, r5, r6, lr}
1712717448 mov r4, r0
1712817449 ldr r3, [r0]
1712917450 ldr r6, [r3, #24]
17130
-.L2949:
17131
- mov r0, r6
17451
+.L2909:
1713217452 mov r1, #1
17453
+ mov r0, r6
1713317454 bl queue_lun_state
1713417455 subs r5, r0, #0
17135
- beq .L2952
17136
- bl queue_wait_first_req_completed
17137
- bl queue_remove_completed_req
17138
- b .L2949
17139
-.L2952:
17456
+ bne .L2910
1714017457 mov r0, r4
1714117458 mov r1, #1
1714217459 bl queue_tlc_prog_cmd
1714317460 mov r0, r5
17144
- ldmfd sp!, {r4, r5, r6, pc}
17461
+ pop {r4, r5, r6, pc}
17462
+.L2910:
17463
+ bl queue_wait_first_req_completed
17464
+ bl queue_remove_completed_req
17465
+ b .L2909
1714517466 .fnend
1714617467 .size sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
1714717468 .align 2
1714817469 .global sblk_xlc_prog_pages
17470
+ .syntax unified
17471
+ .arm
17472
+ .fpu softvfp
1714917473 .type sblk_xlc_prog_pages, %function
1715017474 sblk_xlc_prog_pages:
1715117475 .fnstart
1715217476 @ args = 0, pretend = 0, frame = 0
1715317477 @ frame_needed = 0, uses_anonymous_args = 0
17154
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17478
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1715517479 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17480
+ mov r5, r0
17481
+ ldr r3, [r0]
1715617482 .pad #20
1715717483 sub sp, sp, #20
17158
- ldr r3, [r0]
17159
- mov r5, r0
1716017484 mov r7, r1
17161
- mov r10, r2
17485
+ mov fp, r2
1716217486 ldr r4, [r3, #24]
17163
-.L2954:
17164
- mov r0, r4
17487
+.L2913:
1716517488 mov r1, #1
17489
+ mov r0, r4
1716617490 bl queue_lun_state
17167
- subs r9, r0, #0
17168
- beq .L2966
17169
- bl queue_wait_first_req_completed
17170
- bl queue_remove_completed_req
17171
- b .L2954
17172
-.L2966:
17173
- cmp r10, #2
17174
- bne .L2956
17175
- ldr r2, .L2968
17491
+ subs r10, r0, #0
17492
+ bne .L2914
17493
+ cmp fp, #2
17494
+ bne .L2915
17495
+ ldr r1, .L2925
1717617496 ldr lr, [r7]
17177
- ldrb r3, [r2, #1233] @ zero_extendqisi2
17497
+ ldrb r3, [r1, #1194] @ zero_extendqisi2
1717817498 cmp r3, #0
1717917499 ldreq r4, [lr, #24]
17180
- beq .L2961
17181
- ldr r3, [r5]
17182
- mov fp, #1
17183
- ldrb r4, [r2, #1189] @ zero_extendqisi2
17184
- ldrb r2, [r2, #1197] @ zero_extendqisi2
17185
- ldr r0, [r3, #24]
17186
- rsb r1, r4, #24
17187
- mov r4, fp, asl r4
17188
- mov ip, fp, asl r1
17500
+ beq .L2920
17501
+ ldrb r3, [r1, #1153] @ zero_extendqisi2
17502
+ mov r9, #1
17503
+ ldr r2, [r5]
17504
+ ldr lr, [lr, #24]
17505
+ rsb r0, r3, #24
17506
+ ldr ip, [r2, #24]
17507
+ lsl r4, r9, r3
17508
+ ldrb r3, [r1, #1159] @ zero_extendqisi2
17509
+ lsl r6, r9, r0
1718917510 sub r4, r4, #1
17190
- ldr r6, [lr, #24]
17191
- and r4, r4, r0, lsr r1
17192
- cmp r2, #0
17193
- sub ip, ip, #1
17194
- and r8, ip, r0
17195
- and r6, r6, ip
17511
+ sub r6, r6, #1
17512
+ and r4, r4, ip, lsr r0
17513
+ cmp r3, #0
17514
+ and r8, ip, r6
1719617515 uxtb r4, r4
17197
- beq .L2958
17516
+ and r6, r6, lr
17517
+ beq .L2917
1719817518 mov r0, r4
1719917519 bl zftl_flash_exit_slc_mode
1720017520 ldr r3, [r5]
17201
- mov r1, fp
17202
- mov r0, r9
17203
- str r8, [sp]
17204
- ldr r2, [r3, #4]
17205
- str r2, [sp, #4]
17521
+ mov r1, r9
17522
+ mov r0, r10
17523
+ ldr r2, [r3, #12]
17524
+ str r2, [sp, #8]
1720617525 mov r2, #17
17207
- ldr r3, [r3, #12]
17208
- str r3, [sp, #8]
17526
+ ldr r3, [r3, #4]
17527
+ str r8, [sp]
17528
+ str r3, [sp, #4]
1720917529 mov r3, r4
1721017530 bl flash_start_one_pass_page_prog
1721117531 bl nandc_wait_flash_ready
1721217532 ldr r3, [r7]
17213
- mov r1, fp
17214
- mov r0, r9
17215
- str r6, [sp]
17216
- ldr r2, [r3, #4]
17217
- str r2, [sp, #4]
17533
+ mov r1, r9
17534
+ mov r0, r10
17535
+ ldr r2, [r3, #12]
17536
+ str r2, [sp, #8]
1721817537 mov r2, #26
17219
- ldr r3, [r3, #12]
17220
- str r3, [sp, #8]
17538
+ ldr r3, [r3, #4]
17539
+ str r6, [sp]
17540
+ str r3, [sp, #4]
1722117541 mov r3, r4
1722217542 bl flash_start_one_pass_page_prog
1722317543 bl nandc_wait_flash_ready
1722417544 ldr r3, [r5, #4]
17225
- add r2, r8, fp
17226
- mov r1, r10
17227
- mov r0, r9
17545
+ mov r1, fp
17546
+ mov r0, r10
17547
+ ldr r2, [r3, #12]
17548
+ str r2, [sp, #8]
17549
+ mov r2, #17
17550
+ ldr r3, [r3, #4]
17551
+ str r3, [sp, #4]
17552
+ add r3, r8, r9
17553
+ str r3, [sp]
17554
+ mov r3, r4
17555
+ bl flash_start_one_pass_page_prog
17556
+ bl nandc_wait_flash_ready
17557
+ ldr r3, [r7, #4]
17558
+ mov r1, fp
17559
+ mov r0, r10
1722817560 add r8, r8, #2
17229
- str r2, [sp]
17230
- ldr r2, [r3, #4]
17231
- str r2, [sp, #4]
17232
- mov r2, #17
17233
- ldr r3, [r3, #12]
17234
- str r3, [sp, #8]
17561
+ ldr r2, [r3, #12]
17562
+ str r2, [sp, #8]
17563
+ mov r2, #26
17564
+ ldr r3, [r3, #4]
17565
+ str r3, [sp, #4]
17566
+ add r3, r6, r9
17567
+ str r3, [sp]
1723517568 mov r3, r4
1723617569 bl flash_start_one_pass_page_prog
1723717570 bl nandc_wait_flash_ready
17238
- ldr r3, [r7, #4]
17239
- add r2, r6, fp
17240
- mov r1, r10
17241
- mov r0, r9
17571
+ ldr r3, [r5, #8]
17572
+ mov r1, #3
17573
+ mov r0, r10
1724217574 add r6, r6, #2
17243
- str r2, [sp]
17244
- ldr r2, [r3, #4]
17245
- str r2, [sp, #4]
17246
- mov r2, #26
17247
- ldr r3, [r3, #12]
17248
- str r3, [sp, #8]
17249
- mov r3, r4
17250
- bl flash_start_one_pass_page_prog
17251
- bl nandc_wait_flash_ready
17252
- ldr r3, [r5, #8]
17253
- mov r0, r9
17254
- mov r1, #3
17255
- str r8, [sp]
17256
- ldr r2, [r3, #4]
17257
- str r2, [sp, #4]
17575
+ ldr r2, [r3, #12]
17576
+ str r2, [sp, #8]
1725817577 mov r2, #17
17259
- ldr r3, [r3, #12]
17260
- str r3, [sp, #8]
17578
+ ldr r3, [r3, #4]
17579
+ str r8, [sp]
17580
+ str r3, [sp, #4]
1726117581 mov r3, r4
1726217582 bl flash_start_one_pass_page_prog
1726317583 bl nandc_wait_flash_ready
1726417584 ldr r3, [r7, #8]
17265
- mov r0, r9
1726617585 mov r1, #3
17267
- str r6, [sp]
17268
- ldr r2, [r3, #4]
17269
- str r2, [sp, #4]
17586
+ mov r0, r10
17587
+ ldr r2, [r3, #12]
17588
+ str r2, [sp, #8]
1727017589 mov r2, #16
17271
- ldr r3, [r3, #12]
17272
- str r3, [sp, #8]
17590
+ ldr r3, [r3, #4]
17591
+ str r6, [sp]
17592
+ str r3, [sp, #4]
1727317593 mov r3, r4
1727417594 bl flash_start_one_pass_page_prog
17275
- b .L2959
17276
-.L2958:
17277
- ldrb r0, [r3, #44] @ zero_extendqisi2
17278
- mov r1, fp
17279
- str r8, [sp]
17280
- ldr r2, [r3, #4]
17281
- str r2, [sp, #4]
17282
- mov r2, #17
17283
- ldr r3, [r3, #12]
17284
- str r3, [sp, #8]
17285
- mov r3, r4
17286
- bl flash_start_tlc_page_prog
17287
- bl nandc_wait_flash_ready
17288
- ldr r3, [r7]
17289
- ldr r2, [r5]
17290
- mov r1, fp
17291
- ldrb r0, [r2, #44] @ zero_extendqisi2
17292
- str r6, [sp]
17293
- ldr r2, [r3, #4]
17294
- str r2, [sp, #4]
17295
- mov r2, #26
17296
- ldr r3, [r3, #12]
17297
- str r3, [sp, #8]
17298
- mov r3, r4
17299
- bl flash_start_tlc_page_prog
17300
- bl nandc_wait_flash_ready
17301
- ldmia r5, {r2, r3}
17302
- mov r1, r10
17303
- ldrb r0, [r2, #44] @ zero_extendqisi2
17304
- str r8, [sp]
17305
- ldr r2, [r3, #4]
17306
- str r2, [sp, #4]
17307
- mov r2, #17
17308
- ldr r3, [r3, #12]
17309
- str r3, [sp, #8]
17310
- mov r3, r4
17311
- bl flash_start_tlc_page_prog
17312
- bl nandc_wait_flash_ready
17313
- ldr r3, [r7, #4]
17314
- ldr r2, [r5]
17315
- mov r1, r10
17316
- ldrb r0, [r2, #44] @ zero_extendqisi2
17317
- str r6, [sp]
17318
- ldr r2, [r3, #4]
17319
- str r2, [sp, #4]
17320
- mov r2, #26
17321
- ldr r3, [r3, #12]
17322
- str r3, [sp, #8]
17323
- mov r3, r4
17324
- bl flash_start_tlc_page_prog
17325
- bl nandc_wait_flash_ready
17326
- ldr r3, [r5, #8]
17327
- ldr r2, [r5]
17328
- mov r1, #3
17329
- ldrb r0, [r2, #44] @ zero_extendqisi2
17330
- str r8, [sp]
17331
- ldr r2, [r3, #4]
17332
- str r2, [sp, #4]
17333
- mov r2, #17
17334
- ldr r3, [r3, #12]
17335
- str r3, [sp, #8]
17336
- mov r3, r4
17337
- bl flash_start_tlc_page_prog
17338
- bl nandc_wait_flash_ready
17339
- ldr r3, [r7, #8]
17340
- ldr r2, [r5]
17341
- mov r1, #3
17342
- ldrb r0, [r2, #44] @ zero_extendqisi2
17343
- str r6, [sp]
17344
- ldr r2, [r3, #4]
17345
- str r2, [sp, #4]
17346
- mov r2, #16
17347
- ldr r3, [r3, #12]
17348
- str r3, [sp, #8]
17349
- mov r3, r4
17350
- bl flash_start_tlc_page_prog
17351
-.L2959:
17595
+.L2918:
1735217596 ldr r1, [r5]
1735317597 mov r3, #5
17354
- ldr r0, .L2968+4
17598
+ ldr r0, .L2925+4
1735517599 strb r3, [r1, #42]
1735617600 mov r3, #1
1735717601 strb r3, [r1, #43]
1735817602 mvn r3, #0
1735917603 strb r3, [r1]
1736017604 bl buf_add_tail
17361
- b .L2960
17362
-.L2961:
17363
- mov r0, r4
17364
- mov r1, #1
17365
- bl queue_lun_state
17366
- subs r6, r0, #0
17367
- beq .L2967
17368
- bl queue_wait_first_req_completed
17369
- bl queue_remove_completed_req
17370
- b .L2961
17371
-.L2967:
17372
- mov r0, r5
17373
- mov r1, #1
17374
- bl queue_tlc_prog_cmd
17375
- mov r0, r7
17376
- mov r1, r6
17377
- bl queue_tlc_prog_cmd
17378
-.L2963:
17379
- mov r0, r4
17380
- mov r1, #1
17381
- bl queue_lun_state
17382
- cmp r0, #0
17383
- beq .L2960
17384
- bl queue_wait_first_req_completed
17385
- bl queue_remove_completed_req
17386
- b .L2963
17387
-.L2956:
17388
- mov r0, r5
17389
- mov r1, #1
17390
- bl queue_tlc_prog_cmd
17391
-.L2960:
17605
+.L2919:
1739217606 mov r0, #0
1739317607 add sp, sp, #20
1739417608 @ sp needed
17395
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17396
-.L2969:
17609
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17610
+.L2914:
17611
+ bl queue_wait_first_req_completed
17612
+ bl queue_remove_completed_req
17613
+ b .L2913
17614
+.L2917:
17615
+ ldr r3, [r2, #12]
17616
+ mov r1, r9
17617
+ ldrb r0, [r2, #44] @ zero_extendqisi2
17618
+ str r3, [sp, #8]
17619
+ ldr r3, [r2, #4]
17620
+ mov r2, #17
17621
+ str r8, [sp]
17622
+ str r3, [sp, #4]
17623
+ mov r3, r4
17624
+ bl flash_start_tlc_page_prog
17625
+ bl nandc_wait_flash_ready
17626
+ ldr r3, [r7]
17627
+ mov r1, r9
17628
+ ldr r2, [r5]
17629
+ ldrb r0, [r2, #44] @ zero_extendqisi2
17630
+ ldr r2, [r3, #12]
17631
+ str r2, [sp, #8]
17632
+ mov r2, #26
17633
+ ldr r3, [r3, #4]
17634
+ str r6, [sp]
17635
+ str r3, [sp, #4]
17636
+ mov r3, r4
17637
+ bl flash_start_tlc_page_prog
17638
+ bl nandc_wait_flash_ready
17639
+ ldm r5, {r2, r3}
17640
+ mov r1, fp
17641
+ ldrb r0, [r2, #44] @ zero_extendqisi2
17642
+ ldr r2, [r3, #12]
17643
+ str r2, [sp, #8]
17644
+ mov r2, #17
17645
+ ldr r3, [r3, #4]
17646
+ str r8, [sp]
17647
+ str r3, [sp, #4]
17648
+ mov r3, r4
17649
+ bl flash_start_tlc_page_prog
17650
+ bl nandc_wait_flash_ready
17651
+ ldr r3, [r7, #4]
17652
+ mov r1, fp
17653
+ ldr r2, [r5]
17654
+ ldrb r0, [r2, #44] @ zero_extendqisi2
17655
+ ldr r2, [r3, #12]
17656
+ str r2, [sp, #8]
17657
+ mov r2, #26
17658
+ ldr r3, [r3, #4]
17659
+ str r6, [sp]
17660
+ str r3, [sp, #4]
17661
+ mov r3, r4
17662
+ bl flash_start_tlc_page_prog
17663
+ bl nandc_wait_flash_ready
17664
+ ldr r3, [r5, #8]
17665
+ mov r1, #3
17666
+ ldr r2, [r5]
17667
+ ldrb r0, [r2, #44] @ zero_extendqisi2
17668
+ ldr r2, [r3, #12]
17669
+ str r2, [sp, #8]
17670
+ mov r2, #17
17671
+ ldr r3, [r3, #4]
17672
+ str r8, [sp]
17673
+ str r3, [sp, #4]
17674
+ mov r3, r4
17675
+ bl flash_start_tlc_page_prog
17676
+ bl nandc_wait_flash_ready
17677
+ ldr r3, [r7, #8]
17678
+ mov r1, #3
17679
+ ldr r2, [r5]
17680
+ ldrb r0, [r2, #44] @ zero_extendqisi2
17681
+ ldr r2, [r3, #12]
17682
+ str r2, [sp, #8]
17683
+ mov r2, #16
17684
+ ldr r3, [r3, #4]
17685
+ str r6, [sp]
17686
+ str r3, [sp, #4]
17687
+ mov r3, r4
17688
+ bl flash_start_tlc_page_prog
17689
+ b .L2918
17690
+.L2921:
17691
+ bl queue_wait_first_req_completed
17692
+ bl queue_remove_completed_req
17693
+.L2920:
17694
+ mov r1, #1
17695
+ mov r0, r4
17696
+ bl queue_lun_state
17697
+ subs r6, r0, #0
17698
+ bne .L2921
17699
+ mov r1, #1
17700
+ mov r0, r5
17701
+ bl queue_tlc_prog_cmd
17702
+ mov r1, r6
17703
+ mov r0, r7
17704
+ bl queue_tlc_prog_cmd
17705
+.L2922:
17706
+ mov r1, #1
17707
+ mov r0, r4
17708
+ bl queue_lun_state
17709
+ cmp r0, #0
17710
+ beq .L2919
17711
+ bl queue_wait_first_req_completed
17712
+ bl queue_remove_completed_req
17713
+ b .L2922
17714
+.L2915:
17715
+ mov r1, #1
17716
+ mov r0, r5
17717
+ bl queue_tlc_prog_cmd
17718
+ b .L2919
17719
+.L2926:
1739717720 .align 2
17398
-.L2968:
17721
+.L2925:
1739917722 .word .LANCHOR0
17400
- .word .LANCHOR0+2775
17723
+ .word .LANCHOR0+2770
1740117724 .fnend
1740217725 .size sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
1740317726 .align 2
1740417727 .global sblk_3d_mlc_prog_pages
17728
+ .syntax unified
17729
+ .arm
17730
+ .fpu softvfp
1740517731 .type sblk_3d_mlc_prog_pages, %function
1740617732 sblk_3d_mlc_prog_pages:
1740717733 .fnstart
1740817734 @ args = 0, pretend = 0, frame = 0
1740917735 @ frame_needed = 0, uses_anonymous_args = 0
17410
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
17411
- .save {r4, r5, r6, r7, r8, r9, lr}
17412
- .pad #12
17413
- add r5, r0, #8
17414
- ldr r9, .L2978
17736
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
17737
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
17738
+ .pad #8
1741517739 mov r7, r1
17740
+ ldr r9, .L2933
17741
+ add r5, r0, #8
1741617742 mov r8, #1
17417
-.L2971:
17743
+ ldr r10, .L2933+4
17744
+.L2928:
1741817745 cmp r7, #0
17419
- beq .L2976
17746
+ bne .L2931
17747
+ mov r0, r7
17748
+ add sp, sp, #8
17749
+ @ sp needed
17750
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
17751
+.L2931:
1742017752 ldr r3, [r5, #-8]
1742117753 ldr r4, [r3, #24]
17422
-.L2972:
17423
- mov r0, r4
17754
+.L2929:
1742417755 mov r1, #1
17756
+ mov r0, r4
1742517757 bl queue_lun_state
1742617758 cmp r0, #0
17427
- beq .L2977
17428
- bl queue_wait_first_req_completed
17429
- bl queue_remove_completed_req
17430
- b .L2972
17431
-.L2977:
17759
+ bne .L2930
1743217760 ldr r3, [r5, #-8]
1743317761 sub r7, r7, #1
17434
- ldrb r4, [r9, #1189] @ zero_extendqisi2
1743517762 add r5, r5, #8
17436
- ldr r2, [r3, #24]
17437
- rsb r3, r4, #24
17438
- mov r4, r8, asl r4
17439
- mov r6, r8, asl r3
17763
+ ldr r1, [r3, #24]
17764
+ ldrb r3, [r9, #1153] @ zero_extendqisi2
17765
+ rsb r2, r3, #24
17766
+ lsl r4, r8, r3
17767
+ lsl r6, r8, r2
1744017768 sub r4, r4, #1
1744117769 sub r6, r6, #1
17442
- and r4, r4, r2, lsr r3
17443
- and r6, r6, r2
17770
+ and r4, r4, r1, lsr r2
17771
+ and r6, r6, r1
1744417772 uxtb r4, r4
1744517773 mov r0, r4
1744617774 bl zftl_flash_exit_slc_mode
....@@ -17461,638 +17789,642 @@
1746117789 add r2, r6, #1
1746217790 ldr r3, [r3, #4]
1746317791 bl flash_start_3d_mlc_page_prog
17464
- mov r0, r4
17465
- bl nandc_de_cs
17792
+ bl nandc_de_cs.constprop.35
1746617793 ldr r1, [r5, #-16]
1746717794 mov r3, #4
17468
- ldr r0, .L2978+4
17795
+ mov r0, r10
1746917796 strb r3, [r1, #42]
1747017797 mvn r3, #0
1747117798 strb r8, [r1, #43]
1747217799 strb r3, [r1]
1747317800 bl buf_add_tail
17474
- b .L2971
17475
-.L2976:
17476
- mov r0, r7
17477
- add sp, sp, #12
17478
- @ sp needed
17479
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
17480
-.L2979:
17801
+ b .L2928
17802
+.L2930:
17803
+ bl queue_wait_first_req_completed
17804
+ bl queue_remove_completed_req
17805
+ b .L2929
17806
+.L2934:
1748117807 .align 2
17482
-.L2978:
17808
+.L2933:
1748317809 .word .LANCHOR0
17484
- .word .LANCHOR0+2775
17810
+ .word .LANCHOR0+2770
1748517811 .fnend
1748617812 .size sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
1748717813 .align 2
1748817814 .global flash_prog_page_en
17815
+ .syntax unified
17816
+ .arm
17817
+ .fpu softvfp
1748917818 .type flash_prog_page_en, %function
1749017819 flash_prog_page_en:
1749117820 .fnstart
1749217821 @ args = 8, pretend = 0, frame = 16
1749317822 @ frame_needed = 0, uses_anonymous_args = 0
17494
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
17823
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1749517824 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1749617825 .pad #28
1749717826 sub sp, sp, #28
17498
- mov r8, r3
17499
- ldr r6, .L3010
17500
- ldrb r3, [sp, #68] @ zero_extendqisi2
17501
- mov r7, r0
17827
+ mov r10, r3
17828
+ ldr r4, .L2966
17829
+ mov r8, r0
1750217830 mov r5, r1
17503
- mov r9, r2
17504
- ubfx r4, r1, #24, #2
17505
- str r3, [sp, #16]
17506
- ldrb r3, [r6, #1101] @ zero_extendqisi2
17831
+ ldrb r3, [sp, #68] @ zero_extendqisi2
17832
+ mov fp, r2
17833
+ ubfx r7, r1, #24, #2
17834
+ str r3, [sp, #20]
17835
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
1750717836 cmp r3, r0
17508
- bhi .L2981
17509
- ldr r1, .L3010+4
17837
+ bhi .L2936
1751017838 movw r2, #642
17511
- ldr r0, .L3010+8
17839
+ ldr r1, .L2966+4
17840
+ ldr r0, .L2966+8
1751217841 bl printk
1751317842 bl dump_stack
17514
-.L2981:
17515
- ldrb r2, [r6, #1101] @ zero_extendqisi2
17516
- ldr r3, .L3010
17517
- cmp r2, r7
17843
+.L2936:
17844
+ ldrb r3, [r4, #1109] @ zero_extendqisi2
17845
+ cmp r3, r8
1751817846 mvnls r0, #0
17519
- bls .L2982
17520
- add r2, r3, r7
17521
- cmp r4, #0
17522
- ldrb r10, [r2, #1180] @ zero_extendqisi2
17523
- bne .L2994
17524
- ldrb r2, [r3] @ zero_extendqisi2
17525
- cmp r2, #0
17526
- beq .L2984
17527
- ldrb r3, [r3, #1] @ zero_extendqisi2
17528
- cmp r3, #0
17529
- beq .L2994
17530
-.L2984:
17531
- ldrh fp, [r6, #2]
17532
- mov r0, r5
17533
- mov r1, fp
17534
- bl __aeabi_uidiv
17535
- ldrb r3, [r6, #1] @ zero_extendqisi2
17536
- cmp r3, #0
17537
- ldreq r3, .L3010
17538
- mul r0, fp, r0
17539
- rsb r4, r0, r5
17540
- mov r4, r4, asl #1
17541
- addeq r4, r3, r4
17542
- ldreqh r4, [r4, #4]
17543
- add r4, r4, r0
17544
- b .L2983
17545
-.L2994:
17546
- mov r4, r5
17547
-.L2983:
17548
- ldr fp, .L3010+12
17549
- ldr r6, .L3010+16
17550
-.L2989:
17551
- ldr r3, [fp]
17552
- tst r3, #16
17553
- beq .L2986
17554
- ldr r0, .L3010+20
17555
- mov r1, r10
17556
- mov r2, r5
17557
- mov r3, r4
17558
- bl printk
17559
-.L2986:
17560
- ldr r3, [sp, #64]
17561
- mov r0, r10
17562
- mov r1, r4
17563
- mov r2, r9
17564
- str r3, [sp]
17565
- mov r3, r8
17566
- bl flash_prog_page
17567
- ldr r3, [sp, #16]
17568
- mov ip, r0
17569
- cmp r3, #0
17570
- beq .L2987
17571
- ldr r3, [sp, #64]
17572
- mov r1, r5
17573
- str r0, [sp, #20]
17574
- mov r0, r7
17575
- str r3, [sp]
17576
- ldr r3, [r6, #-100]
17577
- ldr r2, [r6, #-104]
17578
- bl flash_read_page_en
17579
- sub r3, r0, #512
17580
- cmp r0, #512
17581
- cmnne r0, #1
17582
- clz r3, r3
17583
- mov r3, r3, lsr #5
17847
+ bls .L2935
17848
+ add r3, r4, r8
17849
+ cmp r7, #0
17850
+ ldrb r3, [r3, #1144] @ zero_extendqisi2
1758417851 str r3, [sp, #12]
17585
- beq .L2988
17586
- ldr r3, [r6, #-104]
17587
- ldr r2, [r9]
17588
- ldr ip, [sp, #20]
17589
- ldr r3, [r3]
17590
- cmp r2, r3
17591
- bne .L2988
17592
- ldr r3, [r6, #-100]
17593
- ldr r2, [r8]
17594
- ldr r3, [r3]
17595
- cmp r2, r3
17596
- beq .L2987
17597
-.L2988:
17598
- mov r2, #4
17599
- ldr r0, .L3010+24
17600
- mov r3, r2
17601
- mov r1, r9
17602
- bl rknand_print_hex
17603
- mov r2, #4
17604
- mov r3, r2
17605
- ldr r0, .L3010+28
17606
- mov r1, r8
17607
- bl rknand_print_hex
17608
- mov r2, #4
17609
- mov r3, r2
17610
- ldr r0, .L3010+32
17611
- ldr r1, [r6, #-100]
17612
- bl rknand_print_hex
17613
- mov r2, #4
17614
- mov r3, r2
17615
- ldr r0, .L3010+36
17616
- ldr r1, [r6, #-104]
17617
- bl rknand_print_hex
17618
- ldr r3, [sp, #12]
17852
+ bne .L2949
17853
+ ldrb r3, [r4] @ zero_extendqisi2
1761917854 cmp r3, #0
17620
- bne .L2989
17621
-.L2991:
17622
- mov r1, r5
17623
- ldr r0, .L3010+40
17855
+ beq .L2939
17856
+ ldrb r3, [r4, #1] @ zero_extendqisi2
17857
+ cmp r3, #0
17858
+ beq .L2949
17859
+.L2939:
17860
+ ldrh r7, [r4, #2]
17861
+ mov r0, r5
17862
+ mov r1, r7
17863
+ bl __aeabi_uidiv
17864
+ mov r1, r7
17865
+ mul r6, r7, r0
17866
+ mov r0, r5
17867
+ bl __aeabi_uidivmod
17868
+ ldrb r3, [r4, #1] @ zero_extendqisi2
17869
+ lsl r1, r1, #1
17870
+ cmp r3, #0
17871
+ addeq r4, r4, r1
17872
+ ldrheq r1, [r4, #4]
17873
+ add r6, r1, r6
17874
+.L2938:
17875
+ ldr r4, .L2966+12
17876
+ ldr r7, .L2966+16
17877
+.L2944:
17878
+ ldr r3, [r4]
17879
+ tst r3, #16
17880
+ beq .L2941
17881
+ mov r3, r6
17882
+ mov r2, r5
17883
+ ldr r1, [sp, #12]
17884
+ ldr r0, .L2966+20
1762417885 bl printk
17625
- ldr r1, .L3010+4
17886
+.L2941:
17887
+ ldr r3, [sp, #64]
17888
+ mov r2, fp
17889
+ mov r1, r6
17890
+ ldr r0, [sp, #12]
17891
+ str r3, [sp]
17892
+ mov r3, r10
17893
+ bl flash_prog_page
17894
+ ldr r3, [sp, #20]
17895
+ str r0, [sp, #16]
17896
+ cmp r3, #0
17897
+ beq .L2942
17898
+ ldr r3, [sp, #64]
17899
+ mov r1, r5
17900
+ mov r0, r8
17901
+ str r3, [sp]
17902
+ ldr r3, [r7, #-96]
17903
+ ldr r2, [r7, #-92]
17904
+ bl flash_read_page_en
17905
+ cmn r0, #1
17906
+ cmpne r0, #512
17907
+ mov r9, r0
17908
+ beq .L2943
17909
+ ldr r3, [r7, #-92]
17910
+ ldr r2, [fp]
17911
+ ldr r3, [r3]
17912
+ cmp r2, r3
17913
+ bne .L2943
17914
+ ldr r3, [r7, #-96]
17915
+ ldr r2, [r10]
17916
+ ldr r3, [r3]
17917
+ cmp r2, r3
17918
+ beq .L2942
17919
+.L2943:
17920
+ mov r3, #4
17921
+ mov r1, fp
17922
+ mov r2, r3
17923
+ ldr r0, .L2966+24
17924
+ bl rknand_print_hex
17925
+ mov r3, #4
17926
+ mov r1, r10
17927
+ mov r2, r3
17928
+ ldr r0, .L2966+28
17929
+ bl rknand_print_hex
17930
+ mov r3, #4
17931
+ ldr r1, [r7, #-96]
17932
+ mov r2, r3
17933
+ ldr r0, .L2966+32
17934
+ bl rknand_print_hex
17935
+ mov r3, #4
17936
+ ldr r1, [r7, #-92]
17937
+ mov r2, r3
17938
+ ldr r0, .L2966+36
17939
+ bl rknand_print_hex
17940
+ cmp r9, #512
17941
+ beq .L2944
17942
+.L2946:
17943
+ mov r1, r5
17944
+ ldr r0, .L2966+40
17945
+ bl printk
17946
+ mvn r4, #0
1762617947 movw r2, #685
17627
- ldr r0, .L3010+8
17948
+ ldr r1, .L2966+4
17949
+ ldr r0, .L2966+8
1762817950 bl printk
1762917951 bl dump_stack
17630
- mvn ip, #0
17631
- b .L2990
17632
-.L2987:
17633
- cmn ip, #1
17634
- beq .L2991
17635
-.L2990:
17636
- mov r0, ip
17637
-.L2982:
17952
+.L2945:
17953
+ mov r0, r4
17954
+.L2935:
1763817955 add sp, sp, #28
1763917956 @ sp needed
17640
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17641
-.L3011:
17957
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17958
+.L2949:
17959
+ mov r6, r5
17960
+ b .L2938
17961
+.L2942:
17962
+ ldr r4, [sp, #16]
17963
+ cmn r4, #1
17964
+ bne .L2945
17965
+ b .L2946
17966
+.L2967:
1764217967 .align 2
17643
-.L3010:
17968
+.L2966:
1764417969 .word .LANCHOR0
17645
- .word .LANCHOR1+2312
17970
+ .word .LANCHOR1+2116
1764617971 .word .LC0
1764717972 .word .LANCHOR2
1764817973 .word .LANCHOR3
17974
+ .word .LC180
1764917975 .word .LC181
1765017976 .word .LC182
1765117977 .word .LC183
1765217978 .word .LC184
1765317979 .word .LC185
17654
- .word .LC186
1765517980 .fnend
1765617981 .size flash_prog_page_en, .-flash_prog_page_en
1765717982 .align 2
1765817983 .global ftl_prog_page
17984
+ .syntax unified
17985
+ .arm
17986
+ .fpu softvfp
1765917987 .type ftl_prog_page, %function
1766017988 ftl_prog_page:
1766117989 .fnstart
1766217990 @ args = 4, pretend = 0, frame = 0
1766317991 @ frame_needed = 0, uses_anonymous_args = 0
17664
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
17992
+ push {r0, r1, r2, r4, r5, r6, r7, lr}
1766517993 .save {r4, r5, r6, r7, lr}
1766617994 .pad #12
17667
- mov r4, r3
17668
- mov r7, r0
17995
+ mov r4, r0
17996
+ mov r7, r3
1766917997 mov r5, r1
1767017998 mov r6, r2
1767117999 bl sblk_wait_write_queue_completed
17672
- mov r0, r7
17673
- mov r1, r5
18000
+ mov r3, #1
18001
+ mov r0, r4
18002
+ str r3, [sp, #4]
1767418003 mov r2, r6
1767518004 ldr r3, [sp, #32]
18005
+ mov r1, r5
1767618006 str r3, [sp]
17677
- mov r3, #1
17678
- str r3, [sp, #4]
17679
- mov r3, r4
18007
+ mov r3, r7
1768018008 bl flash_prog_page_en
1768118009 cmn r0, #1
1768218010 mov r4, r0
17683
- bne .L3013
17684
- ldr r1, .L3015
18011
+ bne .L2968
18012
+ ldr r1, .L2971
1768518013 movw r2, #2678
17686
- ldr r0, .L3015+4
18014
+ ldr r0, .L2971+4
1768718015 bl printk
1768818016 bl dump_stack
17689
- ldr r0, .L3015+8
1769018017 mov r1, r5
18018
+ ldr r0, .L2971+8
1769118019 bl printk
17692
-.L3013:
18020
+.L2968:
1769318021 mov r0, r4
1769418022 add sp, sp, #12
1769518023 @ sp needed
17696
- ldmfd sp!, {r4, r5, r6, r7, pc}
17697
-.L3016:
18024
+ pop {r4, r5, r6, r7, pc}
18025
+.L2972:
1769818026 .align 2
17699
-.L3015:
17700
- .word .LANCHOR1+2332
18027
+.L2971:
18028
+ .word .LANCHOR1+2135
1770118029 .word .LC0
17702
- .word .LC186
18030
+ .word .LC185
1770318031 .fnend
1770418032 .size ftl_prog_page, .-ftl_prog_page
1770518033 .align 2
1770618034 .global ftl_info_flush
18035
+ .syntax unified
18036
+ .arm
18037
+ .fpu softvfp
1770718038 .type ftl_info_flush, %function
1770818039 ftl_info_flush:
1770918040 .fnstart
1771018041 @ args = 0, pretend = 0, frame = 8
1771118042 @ frame_needed = 0, uses_anonymous_args = 0
17712
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18043
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1771318044 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1771418045 mov r1, #0
17715
- ldr r6, .L3052
18046
+ ldr r4, .L3010
1771618047 .pad #20
1771718048 sub sp, sp, #20
17718
- mov r10, r0
17719
- ldr r0, .L3052+4
17720
- ldr r4, .L3052+8
18049
+ mov r9, r0
1772118050 mov r8, #0
17722
- ldrb r2, [r6, #2772] @ zero_extendqisi2
17723
- ldr r9, .L3052+12
17724
- mov r7, r4
17725
- mov r2, r2, asl #1
18051
+ ldr r6, .L3010+4
18052
+ ldrb r2, [r4, #-2546] @ zero_extendqisi2
18053
+ ldr r0, [r4, #-76]
18054
+ ldr r10, .L3010+8
18055
+ ldr r7, .L3010+12
18056
+ lsl r2, r2, #1
1772618057 bl ftl_memset
17727
- ldr r3, [r6, #2804]
18058
+ ldr r3, [r6, #2800]
1772818059 ldrh r2, [r3, #74]
1772918060 cmp r2, #1
1773018061 movhi r2, #0
17731
- strhih r2, [r3, #150] @ movhi
17732
-.L3029:
17733
- ldrh r3, [r4, #202]
17734
- ldr r2, [r6, #2804]
17735
- ldrb r1, [r6, #2772] @ zero_extendqisi2
17736
- str r3, [sp, #12]
18062
+ strhhi r2, [r3, #150] @ movhi
18063
+.L2987:
18064
+ ldr r3, .L3010+16
18065
+ ldr r2, [r6, #2800]
18066
+ ldrb r5, [r4, #-56] @ zero_extendqisi2
18067
+ ldrh fp, [r3]
18068
+ ldrh r3, [r4, #-54]
18069
+ str r3, [sp, #8]
1773718070 ldr r3, [r2, #4]
17738
- ldr r0, [r4, #204]
17739
- mov r1, r1, asl #9
1774018071 add r3, r3, #1
1774118072 str r3, [r2, #4]
17742
- ldrb r5, [r4, #200] @ zero_extendqisi2
17743
- str r3, [r4, #-52]
17744
- ldrh fp, [r9]
17745
- str r10, [r4, #-56]
18073
+ ldr r3, [r4, #-76]
18074
+ str r9, [r3]
18075
+ ldr r2, [r6, #2800]
18076
+ ldrb r1, [r4, #-2546] @ zero_extendqisi2
18077
+ ldr r3, [r4, #-76]
18078
+ ldr r2, [r2, #4]
18079
+ ldr r0, [r4, #-52]
18080
+ lsl r1, r1, #9
18081
+ str r3, [sp, #12]
18082
+ str r2, [r3, #4]
1774618083 bl js_hash
17747
- ldr r3, .L3052+16
17748
- ldr r3, [r3]
18084
+ ldr r3, [sp, #12]
18085
+ str r0, [r3, #8]
18086
+ ldr r3, [r10]
1774918087 tst r3, #4096
17750
- str r0, [r4, #-48]
17751
- beq .L3019
17752
- ldr r3, .L3052
17753
- ldr r0, .L3052+20
17754
- ldrb r1, [r4, #200] @ zero_extendqisi2
17755
- ldr r3, [r3, #2804]
17756
- ldrh r2, [r4, #202]
18088
+ beq .L2975
18089
+ ldr r3, [r6, #2800]
18090
+ ldrh r2, [r4, #-54]
18091
+ ldrb r1, [r4, #-56] @ zero_extendqisi2
1775718092 ldr r3, [r3, #4]
18093
+ ldr r0, .L3010+20
1775818094 bl printk
17759
-.L3019:
17760
- ldr r3, .L3052+24
17761
- ldrh r0, [r7, #202]
18095
+.L2975:
18096
+ ldr r3, .L3010+24
18097
+ ldrh r0, [r4, #-54]
1776218098 ldrh r3, [r3]
1776318099 cmp r3, r0
17764
- bhi .L3020
17765
-.L3025:
17766
- ldrb r3, [r7, #201] @ zero_extendqisi2
18100
+ bhi .L2976
18101
+ ldr fp, .L3010+28
18102
+ ldr r5, .L3010+32
18103
+.L2983:
18104
+ ldrb r3, [r4, #-55] @ zero_extendqisi2
1776718105 add r3, r3, #1
1776818106 uxtb r3, r3
17769
- strb r3, [r7, #201]
1777018107 cmp r3, #7
17771
- bls .L3021
18108
+ strb r3, [r4, #-55]
18109
+ bls .L2977
1777218110 mov r3, #8
17773
-.L3024:
17774
- ldr r2, [r6, #1176]
17775
- sub r5, r3, #8
18111
+.L2982:
18112
+ ldr r2, [r6, #1040]
18113
+ sub r8, r3, #8
18114
+ uxth r8, r8
1777618115 add r2, r2, r3
17777
- uxth r5, r5
1777818116 ldrb r1, [r2, #32] @ zero_extendqisi2
1777918117 add r2, r1, #127
1778018118 uxtb r2, r2
1778118119 cmp r2, #125
17782
- bhi .L3022
17783
- ldr r1, .L3052+28
18120
+ bhi .L2978
1778418121 movw r2, #846
17785
- ldr r0, .L3052+32
18122
+ mov r1, fp
18123
+ mov r0, r5
1778618124 bl printk
1778718125 bl dump_stack
17788
- b .L3023
17789
-.L3022:
17790
- cmp r1, #255
17791
- bne .L3023
17792
- add r3, r3, #1
17793
- cmp r3, #16
17794
- bne .L3024
17795
- mov r5, #8
17796
-.L3023:
18126
+.L2981:
18127
+ strb r8, [r4, #-55]
1779718128 mov r8, #1
17798
- strb r5, [r7, #201]
17799
-.L3021:
17800
- ldr r3, [r6, #1176]
17801
- ldrb r2, [r7, #201] @ zero_extendqisi2
18129
+.L2977:
18130
+ ldr r3, [r6, #1040]
18131
+ ldrb r2, [r4, #-55] @ zero_extendqisi2
1780218132 add r3, r3, r2
1780318133 ldrb r3, [r3, #40] @ zero_extendqisi2
1780418134 cmp r3, #255
17805
- strb r3, [r7, #200]
17806
- beq .L3025
17807
- ldrh r5, [r9]
18135
+ strb r3, [r4, #-56]
18136
+ beq .L2983
18137
+ ldrh r5, [r7, #-2]
1780818138 mov r0, #0
17809
- mul r5, r5, r3
18139
+ mul r5, r3, r5
1781018140 mov r1, r5
1781118141 bl flash_erase_block
17812
- ldr r3, .L3052
18142
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
1781318143 mov r1, r5
18144
+ ldr r2, [r4, #-52]
1781418145 mov r0, #0
17815
- ldrb r3, [r3, #2772] @ zero_extendqisi2
1781618146 str r3, [sp]
17817
- ldr r3, .L3052+4
17818
- ldr r2, [r4, #204]
18147
+ ldr r3, [r4, #-76]
1781918148 bl ftl_prog_page
1782018149 mov r3, #1
17821
- strh r3, [r4, #202] @ movhi
1782218150 add r5, r5, r3
17823
- b .L3026
17824
-.L3020:
17825
- ldr r3, [sp, #12]
18151
+ strh r3, [r4, #-54] @ movhi
18152
+.L2984:
18153
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
18154
+ mov r1, r5
18155
+ ldr r2, [r4, #-52]
18156
+ mov r0, #0
18157
+ str r3, [sp]
18158
+ ldr r3, [r4, #-76]
18159
+ bl ftl_prog_page
18160
+ ldrh r3, [r4, #-54]
18161
+ cmn r0, #1
18162
+ add r3, r3, #1
18163
+ strh r3, [r4, #-54] @ movhi
18164
+ beq .L2985
18165
+ ldrb r3, [r4, #-48] @ zero_extendqisi2
18166
+ cmp r3, #0
18167
+ beq .L2986
18168
+.L2985:
18169
+ mov r3, #0
18170
+ strb r3, [r4, #-48]
18171
+ b .L2987
18172
+.L2978:
18173
+ cmp r1, #255
18174
+ bne .L2981
18175
+ add r3, r3, #1
18176
+ cmp r3, #16
18177
+ bne .L2982
18178
+ mov r8, #8
18179
+ b .L2981
18180
+.L2976:
18181
+ ldr r3, [sp, #8]
1782618182 cmp r0, #0
1782718183 mla r5, fp, r5, r3
17828
- bne .L3026
18184
+ bne .L2984
1782918185 mov r1, r5
1783018186 bl flash_erase_block
17831
-.L3026:
17832
- ldrb r3, [r6, #2772] @ zero_extendqisi2
17833
- mov r0, #0
17834
- ldr fp, .L3052+8
17835
- mov r1, r5
17836
- str r3, [sp]
17837
- sub r3, fp, #56
17838
- ldr r2, [r7, #204]
17839
- bl ftl_prog_page
17840
- ldrh r3, [r7, #202]
17841
- add r3, r3, #1
17842
- strh r3, [r7, #202] @ movhi
17843
- cmn r0, #1
17844
- beq .L3027
17845
- ldrb r3, [r4, #208] @ zero_extendqisi2
17846
- cmp r3, #0
17847
- beq .L3028
17848
-.L3027:
17849
- mov r3, #0
17850
- strb r3, [r7, #208]
17851
- b .L3029
17852
-.L3028:
18187
+ b .L2984
18188
+.L2986:
1785318189 cmp r8, #1
17854
- beq .L3030
17855
-.L3038:
17856
- ldr r3, .L3052+8
17857
- ldrb r3, [r3, #200] @ zero_extendqisi2
18190
+ beq .L2988
18191
+.L2996:
18192
+ ldrb r3, [r4, #-56] @ zero_extendqisi2
1785818193 cmp r3, #255
17859
- bne .L3032
17860
- ldr r1, .L3052+28
18194
+ bne .L2990
1786118195 movw r2, #890
17862
- ldr r0, .L3052+32
18196
+ ldr r1, .L3010+28
18197
+ ldr r0, .L3010+32
1786318198 bl printk
1786418199 bl dump_stack
17865
- b .L3032
17866
-.L3030:
17867
- ldrb r4, [fp, #201] @ zero_extendqisi2
17868
- add r4, r4, #1
17869
-.L3033:
17870
- cmp r4, #7
17871
- bhi .L3038
17872
- ldr r3, [r6, #1176]
17873
- add r3, r3, r4
17874
- ldrb r5, [r3, #40] @ zero_extendqisi2
17875
- add r3, r5, #127
17876
- uxtb r3, r3
17877
- cmp r3, #125
17878
- bhi .L3034
17879
- ldr r1, .L3052+28
17880
- movw r2, #881
17881
- ldr r0, .L3052+32
17882
- bl printk
17883
- bl dump_stack
17884
- b .L3035
17885
-.L3034:
17886
- cmp r5, #255
17887
- beq .L3036
17888
-.L3035:
17889
- ldr r3, .L3052+12
17890
- mov r0, #0
17891
- ldrh r1, [r3]
17892
- mul r1, r1, r5
17893
- bl flash_erase_block
17894
-.L3036:
17895
- add r4, r4, #1
17896
- uxth r4, r4
17897
- b .L3033
17898
-.L3032:
18200
+.L2990:
1789918201 mov r0, #0
1790018202 add sp, sp, #20
1790118203 @ sp needed
17902
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
17903
-.L3053:
18204
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
18205
+.L2988:
18206
+ ldrb r5, [r4, #-55] @ zero_extendqisi2
18207
+ ldr r8, .L3010+28
18208
+ ldr r9, .L3010+32
18209
+ add r5, r5, #1
18210
+.L2991:
18211
+ cmp r5, #7
18212
+ bhi .L2996
18213
+ ldr r3, [r6, #1040]
18214
+ add r3, r3, r5
18215
+ ldrb r10, [r3, #40] @ zero_extendqisi2
18216
+ add r3, r10, #127
18217
+ uxtb r3, r3
18218
+ cmp r3, #125
18219
+ bhi .L2992
18220
+ movw r2, #881
18221
+ mov r1, r8
18222
+ mov r0, r9
18223
+ bl printk
18224
+ bl dump_stack
18225
+.L2993:
18226
+ ldrh r1, [r7, #-2]
18227
+ mov r0, #0
18228
+ mul r1, r10, r1
18229
+ bl flash_erase_block
18230
+ b .L2994
18231
+.L2992:
18232
+ cmp r10, #255
18233
+ bne .L2993
18234
+.L2994:
18235
+ add r5, r5, #1
18236
+ uxth r5, r5
18237
+ b .L2991
18238
+.L3011:
1790418239 .align 2
17905
-.L3052:
17906
- .word .LANCHOR0
17907
- .word .LANCHOR3-56
18240
+.L3010:
1790818241 .word .LANCHOR3
17909
- .word .LANCHOR3-3066
18242
+ .word .LANCHOR0
1791018243 .word .LANCHOR2
17911
- .word .LC187
18244
+ .word .LANCHOR3-3072
18245
+ .word .LANCHOR3-3074
18246
+ .word .LC186
1791218247 .word .LANCHOR3-3096
17913
- .word .LANCHOR1+2348
18248
+ .word .LANCHOR1+2149
1791418249 .word .LC0
1791518250 .fnend
1791618251 .size ftl_info_flush, .-ftl_info_flush
1791718252 .align 2
1791818253 .global ftl_info_blk_init
18254
+ .syntax unified
18255
+ .arm
18256
+ .fpu softvfp
1791918257 .type ftl_info_blk_init, %function
1792018258 ftl_info_blk_init:
1792118259 .fnstart
17922
- @ args = 0, pretend = 0, frame = 16
18260
+ @ args = 0, pretend = 0, frame = 8
1792318261 @ frame_needed = 0, uses_anonymous_args = 0
17924
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18262
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1792518263 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1792618264 mov r3, #1
17927
- ldr r4, .L3087
18265
+ ldr r4, .L3043
1792818266 mov r6, #0
17929
- ldr r5, .L3087+4
1793018267 mov r1, r6
1793118268 mov r2, #16384
17932
- .pad #28
17933
- sub sp, sp, #28
17934
- strb r3, [r4, #208]
17935
- mov r10, r4
17936
- strb r3, [r4, #210]
17937
- movw r3, #1076
17938
- ldr r0, [r4, #204]
18269
+ ldr r5, .L3043+4
18270
+ .pad #20
18271
+ sub sp, sp, #20
18272
+ strb r3, [r4, #-48]
18273
+ strb r3, [r4, #-46]
18274
+ movw r3, #1080
18275
+ ldr r0, [r4, #-52]
1793918276 ldrh r3, [r5, r3]
17940
- strb r6, [r4, #209]
17941
- str r0, [r5, #1080]
17942
- add r3, r0, r3, asl #2
17943
- str r3, [r5, #2804]
18277
+ strb r6, [r4, #-47]
18278
+ str r0, [r5, #1084]
18279
+ ldr r10, .L3043+8
18280
+ add r3, r0, r3, lsl #2
18281
+ ldr r9, .L3043+12
18282
+ str r3, [r5, #2800]
1794418283 bl ftl_memset
1794518284 mov r1, r6
17946
- ldr r0, [r4, #212]
1794718285 mov r2, #16384
18286
+ ldr r0, [r4, #-44]
1794818287 bl ftl_memset
17949
- ldr r3, [r5, #1176]
17950
- ldr fp, .L3087+8
17951
- strb r6, [r4, #201]
17952
- ldrb r3, [r3, #40] @ zero_extendqisi2
17953
- strh r6, [r4, #202] @ movhi
18288
+ ldr r3, [r5, #1040]
18289
+ strb r6, [r4, #-55]
18290
+ strh r6, [r4, #-54] @ movhi
1795418291 mov r6, #7
17955
- strb r3, [r4, #200]
17956
-.L3059:
17957
- ldr r3, [r5, #1176]
17958
- uxth r7, r6
17959
- ldr ip, .L3087+4
17960
- add r3, r3, r6
1796118292 ldrb r3, [r3, #40] @ zero_extendqisi2
17962
- cmp r3, #255
17963
- beq .L3055
17964
- ldr r2, .L3087+12
18293
+ strb r3, [r4, #-56]
18294
+.L3014:
18295
+ ldr r3, [r5, #1040]
18296
+ sxth r8, r6
18297
+ add r3, r3, r6
18298
+ ldrb r7, [r3, #40] @ zero_extendqisi2
18299
+ cmp r7, #255
18300
+ bne .L3013
18301
+.L3018:
18302
+ subs r6, r6, #1
18303
+ bcs .L3014
18304
+ mov r7, r6
18305
+ mov r8, #0
18306
+.L3015:
18307
+ ldr r6, .L3043+8
18308
+ ldr r3, [r6]
18309
+ tst r3, #4096
18310
+ beq .L3019
18311
+ ldr r3, [r5, #2800]
18312
+ mov r2, #4800
18313
+ mov r1, r7
18314
+ ldr r0, .L3043+16
18315
+ ldr r3, [r3]
18316
+ bl printk
18317
+.L3019:
18318
+ cmn r7, #1
18319
+ bne .L3020
18320
+ mov r2, #16384
18321
+ mov r1, #0
18322
+ ldr r0, [r4, #-52]
18323
+ bl ftl_memset
18324
+ ldr r3, [r5, #2800]
18325
+ ldr r2, .L3043+12
18326
+ str r2, [r3]
18327
+ ldr r2, .L3043+20
18328
+ ldr r3, [r5, #2800]
18329
+ str r2, [r3, #12]
18330
+.L3042:
18331
+ mov r0, r7
18332
+.L3012:
18333
+ add sp, sp, #20
18334
+ @ sp needed
18335
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
18336
+.L3013:
18337
+ ldr r3, .L3043+24
1796518338 mov r0, #0
17966
- str ip, [sp, #12]
17967
- ldrh r9, [r2]
17968
- ldr r2, [r4, #204]
17969
- mul r9, r9, r3
17970
- ldrb r3, [ip, #2772] @ zero_extendqisi2
18339
+ ldr r2, [r4, #-52]
18340
+ ldrh r3, [r3]
18341
+ mul r7, r7, r3
18342
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
1797118343 str r3, [sp]
17972
- ldr r3, .L3087+16
17973
- mov r1, r9
18344
+ mov r1, r7
18345
+ ldr r3, [r4, #-76]
1797418346 bl ftl_read_page
1797518347 cmn r0, #1
17976
- mov r8, r0
17977
- ldr ip, [sp, #12]
17978
- bne .L3056
17979
- ldrb r3, [ip, #2772] @ zero_extendqisi2
18348
+ mov fp, r0
18349
+ bne .L3016
18350
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
18351
+ add r1, r7, #1
18352
+ ldr r2, [r4, #-52]
1798018353 mov r0, #0
17981
- add r1, r9, #1
1798218354 str r3, [sp]
17983
- ldr r3, .L3087+16
17984
- ldr r2, [r10, #204]
18355
+ ldr r3, [r4, #-76]
1798518356 bl ftl_read_page
17986
- mov r8, r0
17987
-.L3056:
17988
- ldr r3, .L3087+20
17989
- ldr r3, [r3]
18357
+ mov fp, r0
18358
+.L3016:
18359
+ ldr r3, [r10]
1799018360 tst r3, #4096
17991
- beq .L3057
17992
- ldr r3, [r5, #2804]
18361
+ beq .L3017
18362
+ ldr r3, [r5, #2800]
18363
+ mov r2, fp
1799318364 mov r1, r6
17994
- ldr r0, .L3087+24
17995
- mov r2, r8
18365
+ ldr r0, .L3043+28
1799618366 ldr r3, [r3]
1799718367 str r3, [sp]
1799818368 movw r3, #749
1799918369 bl printk
18000
-.L3057:
18001
- cmn r8, #1
18002
- beq .L3055
18003
- ldr r3, [r5, #2804]
18370
+.L3017:
18371
+ cmn fp, #1
18372
+ beq .L3018
18373
+ ldr r3, [r5, #2800]
1800418374 ldr r3, [r3]
18005
- cmp r3, fp
18006
- beq .L3069
18007
-.L3055:
18008
- subs r6, r6, #1
18009
- bcs .L3059
18010
- movw r6, #65535
18011
- mov r7, #0
18012
- b .L3058
18013
-.L3069:
18014
- mov r6, r7
18015
-.L3058:
18016
- ldr r3, .L3087+20
18017
- sxth r6, r6
18018
- ldr r2, [r3]
18019
- str r3, [sp, #16]
18020
- tst r2, #4096
18021
- beq .L3060
18022
- ldr r3, [r5, #2804]
18023
- mov r1, r6
18024
- ldr r0, .L3087+28
18025
- mov r2, #4800
18026
- ldr r3, [r3]
18027
- bl printk
18028
-.L3060:
18029
- cmn r6, #1
18030
- bne .L3061
18031
- mov r2, #16384
18032
- ldr r0, [r4, #204]
18033
- mov r1, #0
18034
- bl ftl_memset
18035
- ldr r3, [r5, #2804]
18036
- ldr r2, .L3087+8
18037
- mov r0, r6
18038
- str r2, [r3]
18039
- ldr r2, .L3087+32
18040
- ldr r3, [r5, #2804]
18041
- str r2, [r3, #12]
18042
- b .L3062
18043
-.L3061:
18044
- ldr r3, [r5, #1176]
18375
+ cmp r3, r9
18376
+ bne .L3018
18377
+ mov r7, r8
18378
+ b .L3015
18379
+.L3020:
18380
+ ldr r3, [r5, #1040]
1804518381 mov r0, #0
18046
- ldr r2, [r4, #204]
18047
- sxtah r3, r3, r7
18048
- strb r7, [r4, #201]
18049
- ldr r6, .L3087+36
18382
+ ldr r2, [r4, #-52]
1805018383 mov r7, #0
18384
+ strb r8, [r4, #-55]
18385
+ add r3, r3, r8
18386
+ ldr r10, .L3043+12
1805118387 ldrb r1, [r3, #40] @ zero_extendqisi2
1805218388 mov r3, #4
1805318389 str r3, [sp]
18054
- ldr r3, .L3087+16
18055
- strb r1, [r4, #200]
18390
+ ldr r3, [r4, #-76]
18391
+ strb r1, [r4, #-56]
1805618392 bl flash_get_last_written_page
18057
- ldrh r8, [r6, #-10]
18058
- add r6, r6, #3056
18059
- ldr fp, .L3087+8
1806018393 uxth r9, r0
18061
- mov r10, r0
18394
+ ldrb r8, [r4, #-56] @ zero_extendqisi2
18395
+ ldr fp, .L3043+32
1806218396 add r3, r9, #1
1806318397 uxth r3, r3
18064
- str r3, [sp, #12]
18065
- ldrb r3, [r4, #200] @ zero_extendqisi2
18066
- mul r8, r8, r3
18067
-.L3063:
18068
- rsb r3, r7, r9
18398
+ str r3, [sp, #8]
18399
+ ldr r3, .L3043+36
18400
+ ldrh r3, [r3, #-2]
18401
+ mla r8, r3, r8, r0
18402
+.L3022:
18403
+ sub r3, r9, r7
1806918404 tst r3, #32768
18070
- bne .L3067
18071
- ldrb r3, [r5, #2772] @ zero_extendqisi2
18072
- add r1, r10, r8
18073
- ldr ip, .L3087+4
18405
+ bne .L3026
18406
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
18407
+ sub r1, r8, r7
18408
+ ldr r2, [r4, #-52]
1807418409 mov r0, #0
18075
- rsb r1, r7, r1
18076
- ldr r2, [r4, #204]
1807718410 str r3, [sp]
18078
- ldr r3, .L3087+16
18079
- str ip, [sp, #20]
18411
+ ldr r3, [r4, #-76]
1808018412 bl ftl_read_page
1808118413 cmn r0, #1
18082
- beq .L3064
18083
- ldr ip, [sp, #20]
18084
- ldr r3, [ip, #2804]
18414
+ beq .L3023
18415
+ ldr r3, [r5, #2800]
1808518416 ldr r3, [r3]
18086
- cmp r3, fp
18087
- bne .L3064
18088
- ldr r3, [r6, #-48]
18417
+ cmp r3, r10
18418
+ bne .L3023
18419
+ ldr r3, [r4, #-76]
18420
+ ldr r3, [r3, #8]
1808918421 cmp r3, #0
18090
- bne .L3065
18091
-.L3067:
18092
- ldrh r3, [sp, #12]
18093
- strh r3, [r4, #202] @ movhi
18422
+ bne .L3024
18423
+.L3026:
18424
+ ldrh r3, [sp, #8]
18425
+ strh r3, [r4, #-54] @ movhi
1809418426 bl ftl_tmp_into_update
18095
- ldr r2, [r5, #2804]
18427
+ ldr r2, [r5, #2800]
1809618428 mov r0, #0
1809718429 ldr r3, [r2, #64]
1809818430 add r3, r3, #1
....@@ -18100,301 +18432,282 @@
1810018432 bl ftl_info_flush
1810118433 mov r0, #0
1810218434 bl ftl_info_flush
18103
- ldr r3, [sp, #16]
18104
- ldr r0, [r3]
18105
- ands r0, r0, #16384
18106
- beq .L3062
18107
- ldr r3, .L3087+4
18108
- ldr r0, .L3087+40
18109
- ldr r3, [r3, #2804]
18435
+ ldr r7, [r6]
18436
+ ands r7, r7, #16384
18437
+ beq .L3042
18438
+ ldr r3, [r5, #2800]
18439
+ ldr r0, .L3043+40
1811018440 ldr r1, [r3, #156]
1811118441 bl printk
1811218442 mov r0, #0
18113
- b .L3062
18114
-.L3065:
18115
- ldrb r1, [ip, #2772] @ zero_extendqisi2
18116
- ldr r0, [r6, #204]
18117
- str r3, [sp, #20]
18118
- mov r1, r1, asl #9
18443
+ b .L3012
18444
+.L3024:
18445
+ ldrb r1, [r4, #-2546] @ zero_extendqisi2
18446
+ ldr r0, [r4, #-52]
18447
+ str r3, [sp, #12]
18448
+ lsl r1, r1, #9
1811918449 bl js_hash
18120
- ldr r3, [sp, #20]
18450
+ ldr r3, [sp, #12]
1812118451 cmp r3, r0
18122
- beq .L3067
18123
- ldr r0, .L3087+44
18124
- ldr r1, [r6, #-48]
18452
+ beq .L3026
18453
+ ldr r3, [r4, #-76]
18454
+ mov r0, fp
18455
+ ldr r1, [r3, #8]
1812518456 bl printk
18126
-.L3064:
18457
+.L3023:
1812718458 add r7, r7, #1
18128
- b .L3063
18129
-.L3062:
18130
- add sp, sp, #28
18131
- @ sp needed
18132
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
18133
-.L3088:
18459
+ b .L3022
18460
+.L3044:
1813418461 .align 2
18135
-.L3087:
18462
+.L3043:
1813618463 .word .LANCHOR3
1813718464 .word .LANCHOR0
18138
- .word 1229739078
18139
- .word .LANCHOR3-3066
18140
- .word .LANCHOR3-56
1814118465 .word .LANCHOR2
18466
+ .word 1229739078
1814218467 .word .LC188
18143
- .word .LC189
1814418468 .word 393252
18145
- .word .LANCHOR3-3056
18146
- .word .LC191
18469
+ .word .LANCHOR3-3074
18470
+ .word .LC187
18471
+ .word .LC189
18472
+ .word .LANCHOR3-3072
1814718473 .word .LC190
1814818474 .fnend
1814918475 .size ftl_info_blk_init, .-ftl_info_blk_init
1815018476 .align 2
1815118477 .global ftl_ext_info_flush
18478
+ .syntax unified
18479
+ .arm
18480
+ .fpu softvfp
1815218481 .type ftl_ext_info_flush, %function
1815318482 ftl_ext_info_flush:
1815418483 .fnstart
1815518484 @ args = 0, pretend = 0, frame = 0
1815618485 @ frame_needed = 0, uses_anonymous_args = 0
18157
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
18486
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
1815818487 .save {r4, r5, r6, r7, r8, r9, lr}
1815918488 .pad #12
1816018489 bl timer_get_time
18161
- ldr r3, .L3105
18162
- ldr r4, .L3105+4
18490
+ ldr r3, .L3061
18491
+ ldr r5, .L3061+4
1816318492 umull r0, r1, r0, r3
18164
- ldr r3, [r4, #1092]
18493
+ ldr r3, [r5, #1096]
1816518494 ldr r0, [r3, #520]
18166
- mov r1, r1, lsr #5
18495
+ lsr r1, r1, #5
1816718496 cmp r1, r0
18168
- ldrhi r2, [r3, #12]
18169
- rsbhi r2, r0, r2
18170
- addhi r2, r2, r1
18171
- strhi r2, [r3, #12]
18172
- bhi .L3104
18173
-.L3090:
18174
- bcs .L3091
18175
-.L3104:
18497
+ bls .L3046
18498
+ ldr r2, [r3, #12]
18499
+ sub r2, r2, r0
18500
+ add r2, r2, r1
18501
+ str r2, [r3, #12]
18502
+.L3060:
1817618503 str r1, [r3, #520]
18177
-.L3091:
18504
+ b .L3047
18505
+.L3046:
18506
+ bcc .L3060
18507
+.L3047:
18508
+ ldr r4, .L3061+8
1817818509 mov r0, #0
18179
- ldr r7, .L3105+8
1818018510 bl ftl_total_vpn_update
18181
- ldr r6, .L3105+12
18182
-.L3095:
18183
- ldr r3, [r4, #2804]
18511
+ sub r7, r4, #3136
18512
+.L3051:
18513
+ ldr r3, [r5, #2800]
1818418514 ldr r2, [r3, #56]
1818518515 add r2, r2, #1
1818618516 str r2, [r3, #56]
1818718517 ldrh r2, [r3, #140]
18188
- ldrh r3, [r7]
18518
+ ldr r3, .L3061+12
18519
+ ldrh r3, [r3]
1818918520 cmp r2, r3
18190
- bcc .L3093
18521
+ bcc .L3049
1819118522 bl ftl_ext_alloc_new_blk
18192
-.L3093:
18193
- ldr r3, [r4, #2804]
18523
+.L3049:
18524
+ ldr r3, [r5, #2800]
1819418525 ldrh r2, [r3, #130]
1819518526 movw r3, #65535
1819618527 cmp r2, r3
18197
- bne .L3094
18198
- ldr r1, .L3105+16
18528
+ bne .L3050
1819918529 movw r2, #2211
18200
- ldr r0, .L3105+20
18530
+ ldr r1, .L3061+16
18531
+ ldr r0, .L3061+20
1820118532 bl printk
1820218533 bl dump_stack
18203
-.L3094:
18204
- ldr r1, [r4, #2804]
18205
- ldr r0, .L3105+24
18206
- ldrb r2, [r4, #1189] @ zero_extendqisi2
18207
- ldrh r3, [r1, #130]
18208
- ldrh r0, [r0]
18209
- rsb r2, r2, #24
18210
- ldr r8, .L3105+12
18211
- rsb r2, r0, r2
18212
- mvn r0, #0
18213
- mov r9, r3, asr r2
18214
- bic r3, r3, r0, asl r2
18215
- ldr r2, .L3105+28
18216
- sub r0, r8, #56
18217
- sxth r3, r3
18218
- ldrh r5, [r2]
18219
- ldrh r2, [r1, #140]
18534
+.L3050:
18535
+ ldr r2, [r5, #2800]
18536
+ ldrb r6, [r5, #1153] @ zero_extendqisi2
18537
+ ldrh r1, [r7, #-2]
18538
+ ldrh r3, [r2, #130]
18539
+ rsb r6, r6, #24
18540
+ ldr r0, [r4, #-76]
18541
+ sub r6, r6, r1
18542
+ mvn r1, #0
18543
+ asr r8, r3, r6
18544
+ bic r6, r3, r1, lsl r6
18545
+ ldr r3, .L3061+24
18546
+ sxth r6, r6
18547
+ ldrh r1, [r3, #-2]
18548
+ ldrh r3, [r2, #140]
18549
+ ldrb r2, [r4, #-2546] @ zero_extendqisi2
18550
+ mla r6, r1, r6, r3
18551
+ lsl r2, r2, #1
1822018552 mov r1, #0
18221
- mla r5, r5, r3, r2
18222
- ldrb r2, [r4, #2772] @ zero_extendqisi2
18223
- mov r2, r2, asl #1
1822418553 bl ftl_memset
18225
- mov r3, #0
18226
- str r3, [r6, #-56]
18227
- ldr r3, [r4, #2804]
18228
- ldrb r1, [r4, #2772] @ zero_extendqisi2
18229
- ldr r0, [r6, #212]
18554
+ ldr r3, [r4, #-76]
18555
+ mov r2, #0
18556
+ str r2, [r3]
18557
+ ldr r3, [r5, #2800]
18558
+ ldrb r1, [r4, #-2546] @ zero_extendqisi2
18559
+ ldr r9, [r4, #-76]
1823018560 ldr r3, [r3, #56]
18231
- mov r1, r1, asl #9
18232
- str r3, [r6, #-52]
18561
+ ldr r0, [r4, #-44]
18562
+ lsl r1, r1, #9
18563
+ str r3, [r9, #4]
1823318564 bl js_hash
18234
- ldrb r3, [r4, #2772] @ zero_extendqisi2
18235
- mov r1, r5
18236
- ldr r2, [r6, #212]
18237
- str r0, [r6, #-48]
18238
- uxtb r0, r9
18565
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
18566
+ mov r1, r6
18567
+ str r0, [r9, #8]
18568
+ uxtb r0, r8
18569
+ ldr r2, [r4, #-44]
1823918570 str r3, [sp]
18240
- sub r3, r8, #56
18571
+ ldr r3, [r4, #-76]
1824118572 bl ftl_prog_page
18242
- ldr r2, [r4, #2804]
18573
+ ldr r2, [r5, #2800]
1824318574 ldrh r3, [r2, #140]
1824418575 add r3, r3, #1
1824518576 uxth r3, r3
18246
- strh r3, [r2, #140] @ movhi
1824718577 cmp r3, #1
18248
- beq .L3095
18578
+ strh r3, [r2, #140] @ movhi
18579
+ beq .L3051
1824918580 cmn r0, #1
18250
- beq .L3096
18251
- ldrb r0, [r8, #210] @ zero_extendqisi2
18581
+ beq .L3052
18582
+ ldrb r0, [r4, #-46] @ zero_extendqisi2
1825218583 cmp r0, #0
18253
- beq .L3097
18254
-.L3096:
18255
-.L3092:
18584
+ beq .L3053
18585
+.L3052:
18586
+.L3048:
1825618587 mov r3, #0
18257
- strb r3, [r8, #210]
18258
- b .L3095
18259
-.L3097:
18588
+ strb r3, [r4, #-46]
18589
+ b .L3051
18590
+.L3053:
1826018591 add sp, sp, #12
1826118592 @ sp needed
18262
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
18263
-.L3106:
18593
+ pop {r4, r5, r6, r7, r8, r9, pc}
18594
+.L3062:
1826418595 .align 2
18265
-.L3105:
18596
+.L3061:
1826618597 .word 1374389535
1826718598 .word .LANCHOR0
18268
- .word .LANCHOR3-3096
1826918599 .word .LANCHOR3
18270
- .word .LANCHOR1+2364
18600
+ .word .LANCHOR3-3096
18601
+ .word .LANCHOR1+2164
1827118602 .word .LC0
18272
- .word .LANCHOR3-3132
18273
- .word .LANCHOR3-3066
18603
+ .word .LANCHOR3-3072
1827418604 .fnend
1827518605 .size ftl_ext_info_flush, .-ftl_ext_info_flush
1827618606 .align 2
1827718607 .global ftl_ext_info_init
18608
+ .syntax unified
18609
+ .arm
18610
+ .fpu softvfp
1827818611 .type ftl_ext_info_init, %function
1827918612 ftl_ext_info_init:
1828018613 .fnstart
18281
- @ args = 0, pretend = 0, frame = 16
18614
+ @ args = 0, pretend = 0, frame = 8
1828218615 @ frame_needed = 0, uses_anonymous_args = 0
18283
- ldr ip, .L3127
18284
- mov r2, #0
18285
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18616
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1828618617 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18287
- sub r3, ip, #2528
18288
- ldr r4, .L3127+4
18289
- mvn r5, #0
18290
- strh r2, [r3, #-12] @ movhi
18291
- sub r2, ip, #3120
18292
- .pad #28
18293
- sub sp, sp, #28
18294
- ldr r3, [r4, #2804]
18295
- ldrb r9, [r4, #1189] @ zero_extendqisi2
18296
- ldrh r6, [r2, #-12]
18297
- ldrh r3, [r3, #130]
18298
- rsb r8, r9, #24
18299
- rsb r6, r6, r8
18300
- str ip, [sp, #12]
18301
- bic r5, r3, r5, asl r6
18302
- mov fp, r3, asr r6
18618
+ mov r2, #0
18619
+ ldr r4, .L3083
18620
+ .pad #20
18621
+ sub sp, sp, #20
18622
+ ldr r5, .L3083+4
18623
+ sub r3, r4, #2544
18624
+ strh r2, [r3, #-4] @ movhi
18625
+ sub r2, r4, #3136
18626
+ ldr r3, [r5, #2800]
18627
+ ldrh r2, [r2, #-2]
18628
+ ldrh r6, [r3, #130]
18629
+ ldrb r3, [r5, #1153] @ zero_extendqisi2
18630
+ rsb r3, r3, #24
18631
+ sub r3, r3, r2
18632
+ mvn r2, #0
18633
+ asr r7, r6, r3
18634
+ bic r6, r6, r2, lsl r3
18635
+ uxtb r10, r7
1830318636 mov r3, #4
18304
- mov r1, r5
1830518637 str r3, [sp]
18306
- uxtb r10, fp
18307
- ldr r2, [ip, #212]
18308
- sub r3, ip, #56
18638
+ mov r1, r6
18639
+ ldr r3, [r4, #-76]
1830918640 mov r0, r10
18641
+ ldr r2, [r4, #-44]
1831018642 bl flash_get_last_written_page
18311
- ldr r3, .L3127+8
18643
+ ldr r3, .L3083+8
18644
+ mov r8, r0
1831218645 ldr r2, [r3]
18646
+ str r3, [sp, #8]
1831318647 tst r2, #4096
18314
- mov r7, r0
18315
- str r3, [sp, #16]
18316
- beq .L3108
18317
- uxth fp, fp
18318
- str fp, [sp]
18319
- ldr r3, [r4, #2804]
18648
+ beq .L3064
18649
+ ldr r3, [r5, #2800]
18650
+ uxth r7, r7
1832018651 mov r2, #2256
18321
- ldr r0, .L3127+12
18322
- ldr r1, .L3127+16
18652
+ ldr r1, .L3083+12
1832318653 ldrh r3, [r3, #130]
18654
+ str r7, [sp]
1832418655 str r3, [sp, #4]
18325
- mov r3, r7
18656
+ mov r3, r0
18657
+ ldr r0, .L3083+16
1832618658 bl printk
18327
-.L3108:
18328
- ldr r9, .L3127
18329
- mov r8, #0
18330
- ldr fp, .L3127+20
18331
-.L3109:
18332
- uxth r6, r7
18333
- rsb r3, r8, r6
18659
+.L3064:
18660
+ ldr fp, .L3083+20
18661
+ mov r9, #0
18662
+.L3065:
18663
+ uxth r7, r8
18664
+ sub r3, r7, r9
1833418665 tst r3, #32768
18335
- bne .L3114
18336
- ldr r3, .L3127+24
18337
- rsb r1, r8, r7
18338
- ldrb r2, [r4, #2772] @ zero_extendqisi2
18666
+ bne .L3070
18667
+ ldr r3, .L3083+24
18668
+ sub r1, r8, r9
18669
+ ldrh r0, [r3]
18670
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
18671
+ mla r1, r6, r0, r1
18672
+ str r3, [sp]
18673
+ ldr r3, [r4, #-76]
18674
+ ldr r2, [r4, #-44]
1833918675 mov r0, r10
18340
- ldr ip, .L3127+4
18341
- ldrh r3, [r3]
18342
- str r2, [sp]
18343
- str ip, [sp, #20]
18344
- mla r1, r3, r5, r1
18345
- ldr r3, [sp, #12]
18346
- ldr r2, [r3, #212]
18347
- ldr r3, .L3127+28
1834818676 bl flash_read_page_en
1834918677 cmp r0, #512
1835018678 cmnne r0, #1
18351
- ldr ip, [sp, #20]
18352
- beq .L3110
18353
- ldr r3, [ip, #1092]
18679
+ beq .L3066
18680
+ ldr r3, [r5, #1096]
18681
+ ldr r2, .L3083+28
1835418682 ldr r3, [r3]
18355
- cmp r3, fp
18356
- bne .L3110
18357
- ldr r3, [r9, #-48]
18683
+ cmp r3, r2
18684
+ bne .L3066
18685
+ ldr r3, [r4, #-76]
18686
+ ldr r3, [r3, #8]
1835818687 cmp r3, #0
18359
- bne .L3111
18360
-.L3114:
18688
+ bne .L3067
18689
+.L3070:
1836118690 bl zftl_sblk_list_init
18362
- ldr r3, [r4, #2804]
18691
+ ldr r3, [r5, #2800]
1836318692 ldrh r2, [r3, #140]
18364
- cmp r2, r7
18365
- bgt .L3113
18366
- add r6, r6, #1
18367
- strh r6, [r3, #140] @ movhi
18693
+ cmp r2, r8
18694
+ bgt .L3069
18695
+ add r7, r7, #1
18696
+ strh r7, [r3, #140] @ movhi
1836818697 bl ftl_ext_info_flush
18369
- b .L3113
18370
-.L3111:
18371
- ldrb r1, [ip, #2772] @ zero_extendqisi2
18372
- ldr r0, [r9, #212]
18373
- str r3, [sp, #20]
18374
- mov r1, r1, asl #9
18375
- bl js_hash
18376
- ldr r3, [sp, #20]
18377
- cmp r3, r0
18378
- beq .L3114
18379
- ldr r0, .L3127+32
18380
- ldr r1, [r9, #-48]
18381
- bl printk
18382
-.L3110:
18383
- add r8, r8, #1
18384
- b .L3109
18385
-.L3113:
18386
- ldr r5, [r4, #1092]
18698
+.L3069:
18699
+ ldr r4, [r5, #1096]
1838718700 bl timer_get_time
18388
- ldr r3, .L3127+36
18701
+ ldr r3, .L3083+32
1838918702 umull r0, r1, r0, r3
18390
- mov r3, r1, lsr #5
18391
- str r3, [r5, #520]
18392
- ldr r5, [r4, #1092]
18703
+ lsr r3, r1, #5
18704
+ str r3, [r4, #520]
18705
+ ldr r4, [r5, #1096]
1839318706 bl timer_get_time
18394
- ldr r3, [r4, #1092]
18707
+ ldr r3, [r5, #1096]
1839518708 mov r2, #0
18709
+ str r0, [r4, #604]
1839618710 add r1, r3, #584
18397
- str r0, [r5, #604]
1839818711 str r2, [r3, #608]
1839918712 mvn r2, #0
1840018713 strh r2, [r1] @ movhi
....@@ -18406,2066 +18719,2053 @@
1840618719 strh r2, [r3, r1] @ movhi
1840718720 movw r1, #65535
1840818721 str r2, [r3, #564]
18409
- ldr r2, [sp, #16]
18722
+ ldr r2, [sp, #8]
1841018723 str r1, [r3, #560]
1841118724 ldr r2, [r2]
1841218725 tst r2, #4096
18413
- beq .L3116
18414
- ldr r5, [r3, #520]
18415
- ldr r4, [r3, #12]
18726
+ beq .L3072
18727
+ ldr r4, [r3, #520]
18728
+ ldr r5, [r3, #12]
1841618729 bl timer_get_time
18417
- ldr r1, .L3127+16
18418
- mov r2, r5
18419
- mov r3, r4
18730
+ mov r2, r4
1842018731 str r0, [sp]
18421
- ldr r0, .L3127+40
18732
+ mov r3, r5
18733
+ ldr r1, .L3083+12
18734
+ ldr r0, .L3083+36
1842218735 bl printk
18423
-.L3116:
18424
- ldr r3, .L3127+44
18736
+.L3072:
18737
+ ldr r3, .L3083+40
1842518738 mvn r2, #0
1842618739 mov r0, #0
18427
- strh r2, [r3] @ movhi
18428
- add sp, sp, #28
18740
+ strh r2, [r3, #-4] @ movhi
18741
+ add sp, sp, #20
1842918742 @ sp needed
18430
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
18431
-.L3128:
18743
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
18744
+.L3067:
18745
+ ldrb r1, [r4, #-2546] @ zero_extendqisi2
18746
+ ldr r0, [r4, #-44]
18747
+ str r3, [sp, #12]
18748
+ lsl r1, r1, #9
18749
+ bl js_hash
18750
+ ldr r3, [sp, #12]
18751
+ cmp r3, r0
18752
+ beq .L3070
18753
+ ldr r3, [r4, #-76]
18754
+ mov r0, fp
18755
+ ldr r1, [r3, #8]
18756
+ bl printk
18757
+.L3066:
18758
+ add r9, r9, #1
18759
+ b .L3065
18760
+.L3084:
1843218761 .align 2
18433
-.L3127:
18762
+.L3083:
1843418763 .word .LANCHOR3
1843518764 .word .LANCHOR0
1843618765 .word .LANCHOR2
18766
+ .word .LANCHOR1+2183
18767
+ .word .LC191
1843718768 .word .LC192
18438
- .word .LANCHOR1+2384
18769
+ .word .LANCHOR3-3074
1843918770 .word 1162432070
18440
- .word .LANCHOR3-3066
18441
- .word .LANCHOR3-56
18442
- .word .LC193
1844318771 .word 1374389535
18444
- .word .LC194
18772
+ .word .LC193
1844518773 .word .LANCHOR3-3152
1844618774 .fnend
1844718775 .size ftl_ext_info_init, .-ftl_ext_info_init
1844818776 .align 2
1844918777 .global ftl_prog_ppa_page
18778
+ .syntax unified
18779
+ .arm
18780
+ .fpu softvfp
1845018781 .type ftl_prog_ppa_page, %function
1845118782 ftl_prog_ppa_page:
1845218783 .fnstart
1845318784 @ args = 0, pretend = 0, frame = 0
1845418785 @ frame_needed = 0, uses_anonymous_args = 0
18455
- stmfd sp!, {r0, r1, r4, lr}
18456
- .save {r4, lr}
18457
- .pad #8
18458
- mov lr, r2
18459
- ldr r2, .L3131
18460
- mov ip, r0
18461
- mov r4, r1
18462
- ldrb r0, [r2, #1189] @ zero_extendqisi2
18463
- mov r2, #1
18786
+ ldr ip, .L3087
18787
+ push {r0, r1, r2, r4, r5, lr}
18788
+ .save {r4, r5, lr}
18789
+ .pad #12
18790
+ ldrb r5, [ip, #1153] @ zero_extendqisi2
18791
+ mov ip, #1
1846418792 str r3, [sp]
18465
- mov r3, lr
18466
- rsb r1, r0, #24
18467
- mov r0, r2, asl r0
18468
- sub r0, r0, #1
18469
- and r0, r0, ip, lsr r1
18470
- mov r1, r2, asl r1
18471
- sub r1, r1, #1
18472
- mov r2, r4
18473
- and r1, r1, ip
18474
- uxtb r0, r0
18793
+ mov r3, r2
18794
+ mov r2, r1
18795
+ rsb r4, r5, #24
18796
+ lsl lr, ip, r4
18797
+ lsl ip, ip, r5
18798
+ sub ip, ip, #1
18799
+ sub lr, lr, #1
18800
+ and ip, ip, r0, lsr r4
18801
+ and r1, lr, r0
18802
+ uxtb r0, ip
1847518803 bl ftl_prog_page
18476
- add sp, sp, #8
18804
+ add sp, sp, #12
1847718805 @ sp needed
18478
- ldmfd sp!, {r4, pc}
18479
-.L3132:
18806
+ pop {r4, r5, pc}
18807
+.L3088:
1848018808 .align 2
18481
-.L3131:
18809
+.L3087:
1848218810 .word .LANCHOR0
1848318811 .fnend
1848418812 .size ftl_prog_ppa_page, .-ftl_prog_ppa_page
1848518813 .align 2
1848618814 .global ftl_write_last_log_page
18815
+ .syntax unified
18816
+ .arm
18817
+ .fpu softvfp
1848718818 .type ftl_write_last_log_page, %function
1848818819 ftl_write_last_log_page:
1848918820 .fnstart
1849018821 @ args = 0, pretend = 0, frame = 0
1849118822 @ frame_needed = 0, uses_anonymous_args = 0
18492
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
18823
+ ldrh r3, [r0, #6]
18824
+ cmp r3, #1
18825
+ bne .L3091
18826
+ push {r4, r5, r6, r7, r8, lr}
1849318827 .save {r4, r5, r6, r7, r8, lr}
1849418828 mov r4, r0
18495
- ldrh r3, [r0, #6]
18496
- ldr r5, .L3138
18497
- cmp r3, #1
18829
+ ldr r5, .L3097
1849818830 ldrh r8, [r0, #12]
18499
- ldr r6, [r5, #-2548]
18500
- bne .L3135
18831
+ ldr r6, [r5, #-2556]
1850118832 bl ftl_get_new_free_page
1850218833 cmn r0, #1
1850318834 mov r7, r0
18504
- beq .L3136
18835
+ beq .L3092
1850518836 ldrh r0, [r4]
18506
- add r6, r6, r8, asl #2
18837
+ add r6, r6, r8, lsl #2
1850718838 bl ftl_vpn_decrement
18508
- ldr r3, .L3138+4
18839
+ ldr r3, [r5, #-40]
1850918840 mov r0, r6
18510
- mov r4, #0
18511
- str r3, [r5, #264]
18841
+ ldr r2, .L3097+4
18842
+ str r2, [r3]
1851218843 sub r3, r5, #3088
18513
- ldrh r1, [r3, #-8]
18514
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
18515
- mul r1, r3, r1
18516
- mov r1, r1, asl #2
18844
+ ldrh r3, [r3, #-8]
18845
+ ldrb r1, [r5, #-3127] @ zero_extendqisi2
18846
+ ldr r4, [r5, #-40]
18847
+ mul r1, r1, r3
18848
+ lsl r1, r1, #2
1851718849 bl js_hash
18518
- mov r1, r5
18519
- str r4, [r1, #280]!
18850
+ ldr r1, [r5, #-40]
18851
+ str r0, [r4, #4]
18852
+ mov r4, #0
1852018853 mov r2, r4
18521
- str r4, [r5, #272]
18522
- str r4, [r5, #276]
18523
- str r0, [r5, #268]
1852418854 mov r0, #2
18855
+ str r4, [r1, #8]
18856
+ str r4, [r1, #12]
18857
+ str r4, [r1, #16]!
1852518858 bl ftl_debug_info_fill
18526
- ldr r3, .L3138+8
18527
- mov r0, r7
18859
+ ldrb r3, [r5, #-2546] @ zero_extendqisi2
1852818860 mov r1, r6
18529
- add r2, r5, #264
18530
- ldrb r3, [r3, #2772] @ zero_extendqisi2
18861
+ ldr r2, [r5, #-40]
18862
+ mov r0, r7
1853118863 bl ftl_prog_ppa_page
18532
- b .L3136
18533
-.L3135:
18534
- mvn r0, #0
18535
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
18536
-.L3136:
18864
+.L3092:
1853718865 mov r0, #0
18538
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
18539
-.L3139:
18866
+ pop {r4, r5, r6, r7, r8, pc}
18867
+.L3091:
18868
+ mvn r0, #0
18869
+ bx lr
18870
+.L3098:
1854018871 .align 2
18541
-.L3138:
18872
+.L3097:
1854218873 .word .LANCHOR3
1854318874 .word -178307901
18544
- .word .LANCHOR0
1854518875 .fnend
1854618876 .size ftl_write_last_log_page, .-ftl_write_last_log_page
1854718877 .align 2
1854818878 .global ftl_dump_write_open_sblk
18879
+ .syntax unified
18880
+ .arm
18881
+ .fpu softvfp
1854918882 .type ftl_dump_write_open_sblk, %function
1855018883 ftl_dump_write_open_sblk:
1855118884 .fnstart
18552
- @ args = 0, pretend = 0, frame = 72
18885
+ @ args = 0, pretend = 0, frame = 64
1855318886 @ frame_needed = 0, uses_anonymous_args = 0
18554
- ldr r3, .L3182
18555
- movw r2, #1076
18556
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18887
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1855718888 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18558
- mov r6, r0
18559
- ldrh r2, [r3, r2]
18560
- .pad #116
18561
- sub sp, sp, #116
18562
- cmp r2, r0
18563
- bls .L3140
18564
- mov fp, r3
18565
- ldr r3, .L3182+4
18566
- ldrb r2, [r3, #-3116] @ zero_extendqisi2
18889
+ movw r3, #1080
18890
+ ldr r4, .L3138
18891
+ .pad #108
18892
+ sub sp, sp, #108
18893
+ ldrh r3, [r4, r3]
18894
+ cmp r3, r0
18895
+ bls .L3099
18896
+ ldr r3, .L3138+4
18897
+ ldrb r2, [r3, #-3120] @ zero_extendqisi2
1856718898 cmp r2, #0
18568
- bne .L3142
18569
- ldrb r2, [r3, #-3122] @ zero_extendqisi2
18899
+ bne .L3101
18900
+ ldrb r2, [r3, #-3126] @ zero_extendqisi2
1857018901 cmp r2, #0
18571
- beq .L3140
18572
-.L3142:
18573
- ldrb r2, [fp, #1196] @ zero_extendqisi2
18902
+ beq .L3099
18903
+.L3101:
18904
+ ldrb r2, [r4, #1158] @ zero_extendqisi2
1857418905 cmp r2, #0
18575
- bne .L3140
18576
- ldr r2, .L3182
18577
- mov r4, r6, asl #2
18578
- add r1, sp, #96
18579
- mov r0, r6
18580
- strh r6, [sp, #80] @ movhi
18581
- mov r5, #0
18582
- ldr r2, [r2, #1080]
18583
- mov r7, r5
18584
- ldr r8, .L3182+8
18585
- mov r9, r5
18586
- add r2, r2, r4
18906
+ bne .L3099
18907
+ ldr r2, [r4, #1084]
18908
+ lsl r7, r0, #2
18909
+ ldr r5, .L3138+8
18910
+ add r1, sp, #88
18911
+ mov r10, r0
18912
+ strh r0, [sp, #72] @ movhi
18913
+ add r2, r2, r7
18914
+ mov r6, #0
1858718915 ldrb r2, [r2, #2] @ zero_extendqisi2
1858818916 and r2, r2, #224
1858918917 cmp r2, #160
18590
- ldreqb r10, [r3, #-3124] @ zero_extendqisi2
18591
- movne r10, #1
18918
+ ldrbeq r8, [r3, #-3128] @ zero_extendqisi2
18919
+ movne r8, #1
1859218920 bl ftl_get_blk_list_in_sblk
18593
- mov r2, r8
18594
- ldrh r3, [r2, #-8]!
18921
+ ldrh r3, [r5, #-8]
1859518922 uxtb r0, r0
18596
- strb r0, [sp, #89]
18597
- str r2, [sp, #44]
18923
+ strh r6, [sp, #74] @ movhi
18924
+ strb r0, [sp, #81]
18925
+ strb r6, [sp, #77]
1859818926 smulbb r0, r3, r0
18599
- ldr r2, [fp, #1080]
18600
- strh r5, [sp, #82] @ movhi
18601
- add r3, r2, r4
18602
- strb r5, [sp, #85]
18603
- strh r5, [sp, #90] @ movhi
18604
- strh r0, [sp, #86] @ movhi
18605
- ldrh r1, [r2, r4]
18606
- ldrb r3, [r3, #2] @ zero_extendqisi2
18607
- ubfx r1, r1, #0, #11
18608
- str r1, [sp]
18609
- ldr r2, [r2, r6, asl #2]
18610
- mov r1, r6
18611
- ldr r0, .L3182+12
18612
- ubfx r2, r2, #11, #8
18613
- str r2, [sp, #4]
18614
- mov r2, r3, lsr #5
18615
- ubfx r3, r3, #3, #2
18927
+ ldr r3, [r4, #1084]
18928
+ strh r6, [sp, #82] @ movhi
18929
+ strh r0, [sp, #78] @ movhi
18930
+ add r2, r3, r7
18931
+ ldr r1, [r3, r10, lsl #2]
18932
+ ldrb r2, [r2, #2] @ zero_extendqisi2
18933
+ ldr r0, .L3138+12
18934
+ ubfx r1, r1, #11, #8
18935
+ str r1, [sp, #4]
18936
+ mov r1, r10
18937
+ ldrh r3, [r3, r7]
18938
+ mov r7, r6
18939
+ ubfx r3, r3, #0, #11
18940
+ str r3, [sp]
18941
+ ubfx r3, r2, #3, #2
18942
+ lsr r2, r2, #5
1861618943 bl printk
1861718944 mov r0, #1
1861818945 bl buf_alloc
18619
- add r3, r8, #3088
1862018946 mov r4, r0
18621
- str r3, [sp, #48]
18622
-.L3144:
18623
- ldr r3, [sp, #44]
18624
- uxth r8, r5
18625
- ldrh r3, [r3]
18626
- cmp r3, r8
18627
- bls .L3167
18628
- mov r3, r8, asl #1
18629
- mov ip, #0
18630
- add r2, r3, r8
18631
- sub r3, r3, #1
18632
- sub r2, r2, #1
18633
- str r3, [sp, #60]
18634
- str r2, [sp, #52]
18635
-.L3155:
18636
- ldrb r3, [sp, #89] @ zero_extendqisi2
18637
- uxth r9, ip
18638
- cmp r3, r9
18639
- bls .L3179
18640
- add r3, r9, #8
18641
- mov r7, #1
18642
- mov r3, r3, asl r7
18947
+ add r3, r5, #16
18948
+ str r6, [sp, #44]
1864318949 str r3, [sp, #64]
18644
-.L3154:
18645
- cmp r7, r10
18646
- bhi .L3180
18647
- ldr r2, [sp, #64]
18648
- add r3, sp, #112
18649
- add r3, r3, r2
18650
- ldrh r2, [r3, #-32]
18651
- movw r3, #65535
18652
- cmp r2, r3
18653
- beq .L3146
18654
- ldr r3, .L3182+16
18655
- cmp r10, #3
18950
+.L3103:
18951
+ ldr r3, .L3138+16
18952
+ uxth r5, r6
1865618953 ldrh r3, [r3]
18657
- mul r3, r3, r2
18658
- bne .L3147
18659
- ldr r1, .L3182
18660
- ldrb r1, [r1, #1197] @ zero_extendqisi2
18661
- cmp r1, #0
18662
- uxtaheq r3, r3, r5
18663
- ldrne r1, [sp, #52]
18664
- orreq r3, r3, r7, asl #24
18665
- beq .L3149
18666
- b .L3178
18667
-.L3147:
18668
- cmp r10, #2
18669
- uxtahne r3, r3, r5
18670
- bne .L3149
18671
- ldr r1, [sp, #60]
18672
-.L3178:
18673
- add r3, r3, r1
18674
- ldr r1, [sp, #48]
18675
- add r3, r3, r7
18676
- ldrb r1, [r1, #-3124] @ zero_extendqisi2
18677
- orr r3, r3, r1, asl #24
18678
-.L3149:
18679
- str r3, [r4, #24]
18680
- mov r0, r4
18681
- mov r1, #1
18682
- str ip, [sp, #76]
18683
- str r2, [sp, #72]
18684
- str r3, [sp, #68]
18685
- bl sblk_read_page
18686
- ldr lr, [r4, #36]
18687
- sub r3, lr, #512
18688
- cmp lr, #512
18689
- cmnne lr, #1
18690
- clz r3, r3
18691
- mov r3, r3, lsr #5
18692
- ldr r2, [sp, #72]
18954
+ cmp r3, r5
18955
+ bls .L3111
18956
+ lsl r3, r5, #1
18957
+ str r5, [sp, #52]
18958
+ mov fp, #0
18959
+ sub r2, r3, #1
18960
+ add r3, r3, r5
18961
+ sub r3, r3, #1
18962
+ str r2, [sp, #48]
1869318963 str r3, [sp, #56]
18694
- ldr ip, [sp, #76]
18695
- ldr r3, [sp, #68]
18696
- bne .L3146
18697
- ldr r0, [r4, #4]
18698
- ldr r1, [r4, #12]
18699
- str lr, [sp]
18700
- ldr lr, [r0]
18701
- str ip, [sp, #68]
18702
- str lr, [sp, #4]
18703
- ldr lr, [r0, #4]
18704
- str lr, [sp, #8]
18705
- ldr lr, [r0, #8]
18706
- str lr, [sp, #12]
18707
- ldr r0, [r0, #12]
18708
- str r0, [sp, #16]
18709
- ldr r0, [r1]
18710
- str r0, [sp, #20]
18711
- ldr r0, [r1, #4]
18712
- str r0, [sp, #24]
18713
- ldr r0, [r1, #8]
18714
- str r0, [sp, #28]
18715
- ldr r1, [r1, #12]
18716
- ldr r0, .L3182+20
18717
- str r1, [sp, #32]
18718
- mov r1, r2
18719
- mov r2, r8
18720
- bl printk
18721
- ldr r3, [sp, #56]
18722
- ldr ip, [sp, #68]
18723
- cmp r3, #0
18724
- bne .L3167
18725
-.L3146:
18964
+ b .L3114
18965
+.L3112:
18966
+ ldr r2, [sp, #60]
18967
+ add r3, sp, #104
18968
+ add r3, r3, r2
18969
+ ldrh r3, [r3, #-32]
18970
+ str r3, [sp, #40]
18971
+ movw r3, #65535
18972
+ ldr r2, [sp, #40]
18973
+ cmp r2, r3
18974
+ bne .L3104
18975
+.L3110:
1872618976 add r7, r7, #1
1872718977 uxth r7, r7
18728
- b .L3154
18729
-.L3180:
18730
- add ip, ip, #1
18731
- b .L3155
18732
-.L3179:
18733
- add r5, r5, #1
18734
- b .L3144
18735
-.L3167:
18736
-.L3152:
18737
- str r7, [sp]
18738
- mov r3, r9
18739
- ldr r7, .L3182
18740
- mov r1, r6
18741
- mov r2, r8
18742
- ldr r0, .L3182+24
18743
- bl printk
18744
- mov r1, #0
18745
- ldrb r2, [r7, #2772] @ zero_extendqisi2
18746
- mov r5, r8
18747
- ldr r0, [r4, #4]
18748
- ldr r10, .L3182+28
18749
- mov r2, r2, asl #9
18750
- ldr r9, .L3182+32
18751
- bl ftl_memset
18752
- ldrb r2, [r7, #2772] @ zero_extendqisi2
18753
- ldr r0, [r4, #12]
18754
- mov r1, #0
18755
- mov r2, r2, asl #1
18756
- bl ftl_memset
18757
-.L3156:
18758
- ldrh r3, [r10]
18759
- cmp r3, r5
18760
- bls .L3162
18761
- ldr r8, .L3182+4
18762
- mov r7, #0
18763
- mov r3, r5, asl #1
18978
+.L3105:
18979
+ cmp r8, r7
18980
+ bcs .L3112
18981
+ add fp, fp, #1
18982
+.L3114:
18983
+ uxth r3, fp
18984
+ uxth r2, fp
1876418985 str r3, [sp, #44]
18765
-.L3163:
18766
- ldrb r2, [sp, #89] @ zero_extendqisi2
18767
- uxth r3, r7
18768
- cmp r2, r3
18769
- bls .L3181
18770
- ldr r2, [r9]
18771
- tst r2, #4096
18772
- beq .L3157
18773
- mov r2, r3
18774
- ldr r0, .L3182+36
18775
- mov r1, r5
18776
- str r3, [sp, #48]
18777
- bl printk
18778
- ldr r3, [sp, #48]
18779
-.L3157:
18780
- ldrb ip, [r8, #-3116] @ zero_extendqisi2
18781
- cmp ip, #0
18782
- beq .L3158
18783
- add r2, sp, #112
18986
+ ldrb r3, [sp, #81] @ zero_extendqisi2
18987
+ cmp r3, r2
18988
+ bls .L3113
18989
+ mov r7, #1
18990
+ add r3, r2, #8
18991
+ lsl r3, r3, r7
18992
+ str r3, [sp, #60]
18993
+ b .L3105
18994
+.L3104:
18995
+ ldr r3, [sp, #64]
18996
+ cmp r8, #3
18997
+ ldr r2, [sp, #40]
18998
+ ldrh r3, [r3, #-2]
18999
+ mul r3, r2, r3
19000
+ bne .L3106
19001
+ ldr r2, .L3138
19002
+ ldrb r2, [r2, #1159] @ zero_extendqisi2
19003
+ cmp r2, #0
19004
+ uxtaheq r3, r3, r6
19005
+ ldrne r2, [sp, #56]
19006
+ orreq r3, r3, r7, lsl #24
19007
+ beq .L3108
19008
+.L3137:
19009
+ add r3, r2, r3
19010
+ ldr r2, .L3138+4
19011
+ add r3, r3, r7
19012
+ ldrb r2, [r2, #-3128] @ zero_extendqisi2
19013
+ orr r3, r3, r2, lsl #24
19014
+.L3108:
19015
+ str r3, [r4, #24]
19016
+ mov r1, #1
1878419017 mov r0, r4
18785
- add r3, r2, r3, asl #1
19018
+ str r3, [sp, #68]
19019
+ bl sblk_read_page
19020
+ ldr r9, [r4, #36]
19021
+ ldr r3, [sp, #68]
19022
+ cmn r9, #1
19023
+ cmpne r9, #512
19024
+ bne .L3110
19025
+ ldr r1, [r4, #12]
19026
+ ldr r2, [r4, #4]
19027
+ ldr r0, [r1, #12]
19028
+ str r0, [sp, #32]
19029
+ ldr r0, [r1, #8]
19030
+ str r0, [sp, #28]
19031
+ ldr r0, [r1, #4]
19032
+ str r0, [sp, #24]
19033
+ ldr r1, [r1]
19034
+ ldr r0, .L3138+20
19035
+ str r1, [sp, #20]
19036
+ ldr r1, [r2, #12]
19037
+ str r1, [sp, #16]
19038
+ ldr r1, [r2, #8]
19039
+ str r1, [sp, #12]
19040
+ ldr r1, [r2, #4]
19041
+ str r1, [sp, #8]
19042
+ ldr r2, [r2]
19043
+ ldr r1, [sp, #40]
19044
+ str r9, [sp]
19045
+ str r2, [sp, #4]
19046
+ ldr r2, [sp, #52]
19047
+ bl printk
19048
+ cmp r9, #512
19049
+ bne .L3110
19050
+.L3111:
19051
+ uxth r2, r6
19052
+ ldr r6, .L3138+4
19053
+ ldr r3, [sp, #44]
19054
+ mov r1, r10
19055
+ str r7, [sp]
19056
+ ldr r0, .L3138+24
19057
+ bl printk
19058
+ ldrb r2, [r6, #-2546] @ zero_extendqisi2
19059
+ mov r1, #0
19060
+ ldr r0, [r4, #4]
19061
+ ldr fp, .L3138+28
19062
+ lsl r2, r2, #9
19063
+ bl ftl_memset
19064
+ ldrb r2, [r6, #-2546] @ zero_extendqisi2
19065
+ mov r1, #0
19066
+ ldr r0, [r4, #12]
19067
+ lsl r2, r2, #1
19068
+ bl ftl_memset
19069
+.L3115:
19070
+ ldr r7, .L3138+16
19071
+ ldrh r3, [r7]
19072
+ cmp r3, r5
19073
+ bls .L3121
19074
+ lsl r3, r5, #1
19075
+ mov r8, #0
19076
+ ldr r9, .L3138+32
19077
+ add r7, r7, #24
19078
+ str r3, [sp, #40]
19079
+ b .L3122
19080
+.L3106:
19081
+ cmp r8, #2
19082
+ uxtahne r3, r3, r6
19083
+ bne .L3108
19084
+ ldr r2, [sp, #48]
19085
+ b .L3137
19086
+.L3113:
19087
+ add r6, r6, #1
19088
+ b .L3103
19089
+.L3120:
19090
+ ldr r3, [fp]
19091
+ tst r3, #4096
19092
+ uxth r3, r8
19093
+ beq .L3116
19094
+ mov r2, r3
19095
+ mov r1, r5
19096
+ mov r0, r9
19097
+ str r3, [sp, #44]
19098
+ bl printk
19099
+ ldr r3, [sp, #44]
19100
+.L3116:
19101
+ ldrb r2, [r6, #-3120] @ zero_extendqisi2
19102
+ cmp r2, #0
19103
+ beq .L3117
19104
+ add r2, sp, #104
19105
+ mov r0, r4
19106
+ add r3, r2, r3, lsl #1
1878619107 ldrh r2, [r3, #-16]
18787
- ldr r3, .L3182+16
18788
- ldrh r3, [r3]
19108
+ ldrh r3, [r7, #-2]
1878919109 mul r3, r3, r2
1879019110 orr r3, r3, r5
1879119111 str r3, [r4, #24]
1879219112 bl sblk_3d_tlc_dump_prog
18793
- b .L3159
18794
-.L3158:
18795
- ldrb r2, [r8, #-3124] @ zero_extendqisi2
18796
- cmp r2, #2
18797
- add r2, sp, #112
18798
- add r3, r2, r3, asl #1
18799
- ldrh r2, [r3, #-16]
18800
- ldr r3, .L3182+16
18801
- ldrh r3, [r3]
18802
- mul r3, r3, r2
18803
- bne .L3160
18804
- ldr r2, [sp, #44]
19113
+.L3118:
19114
+ add r8, r8, #1
19115
+.L3122:
19116
+ ldrb r2, [sp, #81] @ zero_extendqisi2
19117
+ uxth r3, r8
19118
+ cmp r2, r3
19119
+ bhi .L3120
19120
+ add r5, r5, #1
19121
+ uxth r5, r5
19122
+ b .L3115
19123
+.L3117:
19124
+ ldrb r1, [r6, #-3128] @ zero_extendqisi2
19125
+ cmp r1, #2
19126
+ bne .L3119
19127
+ add r2, sp, #104
1880519128 mov r0, r4
19129
+ add r3, r2, r3, lsl #1
19130
+ ldrh r2, [r3, #-16]
19131
+ ldrh r3, [r7, #-2]
19132
+ mul r3, r3, r2
19133
+ ldr r2, [sp, #40]
1880619134 orr r3, r3, r2
1880719135 orr r3, r3, #33554432
1880819136 str r3, [r4, #24]
1880919137 bl sblk_mlc_dump_prog
18810
- b .L3159
18811
-.L3160:
18812
- ldrb r2, [fp, #1189] @ zero_extendqisi2
18813
- orr r3, r3, r5
18814
- mvn r0, #0
18815
- ldrb lr, [fp, #2772] @ zero_extendqisi2
18816
- rsb r1, r2, #24
18817
- str r3, [r4, #24]
18818
- mvn r2, r0, asl r2
18819
- and r0, r2, r3, lsr r1
18820
- str lr, [sp]
18821
- bic r1, r3, r2, asl r1
18822
- str ip, [sp, #4]
19138
+ b .L3118
19139
+.L3119:
19140
+ add r1, sp, #104
19141
+ ldrh ip, [r7, #-2]
19142
+ add r3, r1, r3, lsl #1
19143
+ ldrh r1, [r3, #-16]
19144
+ ldr r3, .L3138
19145
+ mul ip, ip, r1
19146
+ ldrb r1, [r3, #1153] @ zero_extendqisi2
19147
+ mvn r3, #0
19148
+ rsb lr, r1, #24
19149
+ orr ip, ip, r5
19150
+ mvn r1, r3, lsl r1
19151
+ str ip, [r4, #24]
19152
+ str r2, [sp, #4]
19153
+ and r0, r1, ip, lsr lr
19154
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
19155
+ bic r1, ip, r1, lsl lr
1882319156 uxtb r0, r0
18824
- ldr r2, [r4, #4]
19157
+ str r3, [sp]
1882519158 ldr r3, [r4, #12]
19159
+ ldr r2, [r4, #4]
1882619160 bl flash_prog_page_en
18827
-.L3159:
18828
- add r7, r7, #1
18829
- b .L3163
18830
-.L3181:
18831
- add r5, r5, #1
18832
- uxth r5, r5
18833
- b .L3156
18834
-.L3162:
19161
+ b .L3118
19162
+.L3121:
1883519163 mov r0, r4
1883619164 bl zbuf_free
18837
- ldr r0, .L3182+40
18838
- mov r1, r6
19165
+ mov r1, r10
19166
+ ldr r0, .L3138+36
1883919167 bl printk
18840
-.L3140:
18841
- add sp, sp, #116
19168
+.L3099:
19169
+ add sp, sp, #108
1884219170 @ sp needed
18843
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
18844
-.L3183:
19171
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
19172
+.L3139:
1884519173 .align 2
18846
-.L3182:
19174
+.L3138:
1884719175 .word .LANCHOR0
1884819176 .word .LANCHOR3
1884919177 .word .LANCHOR3-3088
18850
- .word .LC195
18851
- .word .LANCHOR3-3066
18852
- .word .LC196
18853
- .word .LC197
19178
+ .word .LC194
1885419179 .word .LANCHOR3-3096
19180
+ .word .LC195
19181
+ .word .LC196
1885519182 .word .LANCHOR2
19183
+ .word .LC197
1885619184 .word .LC198
18857
- .word .LC199
1885819185 .fnend
1885919186 .size ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
1886019187 .align 2
1886119188 .global gc_ink_check_sblk
19189
+ .syntax unified
19190
+ .arm
19191
+ .fpu softvfp
1886219192 .type gc_ink_check_sblk, %function
1886319193 gc_ink_check_sblk:
1886419194 .fnstart
1886519195 @ args = 0, pretend = 0, frame = 0
1886619196 @ frame_needed = 0, uses_anonymous_args = 0
18867
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
18868
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
18869
- .pad #12
18870
- movw r5, #2106
18871
- ldr r4, .L3213
18872
- ldr r7, .L3213+4
18873
- ldrh r3, [r4, r5]
18874
- ldr r6, [r7, #908]
18875
- cmp r3, #3
18876
- ldrls pc, [pc, r3, asl #2]
18877
- b .L3185
18878
-.L3187:
18879
- .word .L3186
18880
- .word .L3188
18881
- .word .L3189
18882
- .word .L3190
18883
-.L3186:
18884
- ldr r8, .L3213+8
18885
- movw r3, #2792
19197
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
19198
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
19199
+ .pad #8
19200
+ movw r3, #2106
19201
+ ldr r4, .L3169
19202
+ ldr r5, .L3169+4
19203
+ ldrh r2, [r4, r3]
19204
+ ldr r6, [r5, #904]
19205
+ cmp r2, #3
19206
+ ldrls pc, [pc, r2, asl #2]
19207
+ b .L3141
19208
+.L3143:
19209
+ .word .L3142
19210
+ .word .L3144
19211
+ .word .L3145
19212
+ .word .L3146
19213
+.L3142:
19214
+ ldr r8, .L3169+8
19215
+ movw r3, #2788
1888619216 ldrh r3, [r8, r3]
1888719217 cmp r3, #7
18888
- bls .L3184
18889
- ldrb r3, [r8, #2774] @ zero_extendqisi2
19218
+ bls .L3140
19219
+ ldrb r3, [r8, #2769] @ zero_extendqisi2
1889019220 cmp r3, #2
18891
- bls .L3184
18892
- ldr r0, .L3213+12
19221
+ bls .L3140
19222
+ ldr r7, .L3169+12
1889319223 mov r1, #0
18894
- bl _list_get_gc_head_node
1889519224 movw r9, #65535
19225
+ sub r6, r7, #3072
19226
+ sub r6, r6, #8
19227
+ mov r0, r6
19228
+ bl _list_get_gc_head_node
1889619229 cmp r0, r9
18897
- beq .L3184
18898
- ldr r3, [r8, #1080]
18899
- mov r0, r0, asl #2
19230
+ beq .L3140
19231
+ ldr r3, [r8, #1084]
19232
+ lsl r0, r0, #2
1890019233 ldrh r3, [r3, r0]
1890119234 ubfx r3, r3, #0, #11
1890219235 cmp r3, #2
18903
- bgt .L3184
19236
+ bgt .L3140
1890419237 mov r0, #1
18905
- add r6, r8, #4096
1890619238 bl buf_alloc
1890719239 cmp r0, #0
18908
- str r0, [r7, #908]
18909
- beq .L3184
18910
- ldr r0, .L3213+12
19240
+ str r0, [r5, #904]
19241
+ beq .L3140
19242
+ mov r0, r6
19243
+ ldr r2, .L3169+16
1891119244 mov r1, #0
18912
- ldr r2, .L3213+16
1891319245 bl _list_pop_index_node
18914
- uxth r5, r0
18915
- cmp r5, r9
18916
- bne .L3194
18917
- ldr r0, [r6, #908]
19246
+ uxth r10, r0
19247
+ mov r6, r0
19248
+ cmp r10, r9
19249
+ bne .L3150
19250
+ ldr r0, [r5, #904]
1891819251 bl zbuf_free
1891919252 mov r3, #0
18920
- str r3, [r6, #908]
18921
- b .L3184
18922
-.L3194:
18923
- ldr r1, .L3213+20
18924
- mov r0, r5
19253
+ str r3, [r5, #904]
19254
+.L3140:
19255
+ add sp, sp, #8
19256
+ @ sp needed
19257
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
19258
+.L3150:
19259
+ add r1, r4, #2144
19260
+ mov r0, r10
19261
+ add r1, r1, #14
19262
+ uxth r6, r6
1892519263 bl ftl_get_blk_list_in_sblk
1892619264 movw r3, #2142
18927
- strh r5, [r4, r3] @ movhi
1892819265 mov r2, #0
18929
- ldr r3, .L3213+24
18930
- mov r5, r5, asl #2
19266
+ strh r10, [r4, r3] @ movhi
19267
+ add r3, r4, #2144
1893119268 strh r2, [r3] @ movhi
18932
- movw r3, #2106
1893319269 mov r2, #1
19270
+ movw r3, #2106
19271
+ lsl r6, r6, #2
1893419272 strh r2, [r4, r3] @ movhi
18935
- ldr r3, [r8, #1080]
18936
- ldrb r2, [r8, #2772] @ zero_extendqisi2
18937
- mov r2, r2, asl #9
18938
- strb r0, [r6, #883]
18939
- ldrh r3, [r3, r5]
19273
+ ldr r3, [r8, #1084]
19274
+ strb r0, [r5, #879]
19275
+ ldrb r2, [r7, #-2546] @ zero_extendqisi2
19276
+ ldrh r3, [r3, r6]
1894019277 tst r3, #1
18941
- ldr r3, [r6, #908]
19278
+ ldr r3, [r5, #904]
19279
+ lsl r2, r2, #9
1894219280 movne r1, #85
1894319281 moveq r1, #170
1894419282 ldr r0, [r3, #4]
18945
- add sp, sp, #12
19283
+ add sp, sp, #8
1894619284 @ sp needed
18947
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19285
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
1894819286 b ftl_memset
18949
-.L3188:
19287
+.L3144:
1895019288 movw r3, #2142
1895119289 mov r1, #0
1895219290 ldrh r0, [r4, r3]
1895319291 bl ftl_erase_sblk
18954
- movw r3, #2106
1895519292 mov r2, #2
19293
+.L3168:
19294
+ movw r3, #2106
19295
+.L3166:
1895619296 strh r2, [r4, r3] @ movhi
18957
- b .L3184
18958
-.L3189:
19297
+ b .L3140
19298
+.L3145:
19299
+ ldr r8, .L3169+12
19300
+ mov r7, #0
19301
+ ldr r10, .L3169+20
1895919302 bl sblk_wait_write_queue_completed
18960
- ldr r9, .L3213+8
18961
- ldr r10, .L3213+28
18962
- mov r8, #0
18963
- ldr fp, .L3213+32
18964
-.L3196:
18965
- ldrb r3, [r7, #883] @ zero_extendqisi2
18966
- uxth r5, r8
18967
- cmp r3, r5
18968
- bls .L3211
18969
- add r5, r4, r5, asl #1
18970
- movw r3, #65535
18971
- add r5, r5, #2144
18972
- ldrh r2, [r5, #14]
19303
+ sub r9, r8, #3072
19304
+.L3152:
19305
+ ldrb r2, [r5, #879] @ zero_extendqisi2
19306
+ uxth r3, r7
1897319307 cmp r2, r3
18974
- beq .L3197
18975
- ldr r3, .L3213+24
18976
- mov ip, #0
18977
- ldrh r1, [r10]
18978
- ldrh r3, [r3]
18979
- mla r3, r1, r2, r3
18980
- ldr r2, [r6, #4]
18981
- str r3, [r2]
18982
- ldr r2, [r6, #4]
18983
- str fp, [r2, #4]
18984
- ldr r2, [r6, #12]
18985
- str ip, [r2]
18986
- mvn r2, #0
18987
- ldrb r0, [r9, #1189] @ zero_extendqisi2
18988
- ldrb lr, [r9, #2772] @ zero_extendqisi2
18989
- rsb r1, r0, #24
18990
- str ip, [sp, #4]
18991
- mvn r2, r2, asl r0
18992
- and r0, r2, r3, lsr r1
18993
- str lr, [sp]
18994
- bic r1, r3, r2, asl r1
18995
- uxtb r0, r0
18996
- ldr r2, [r6, #4]
18997
- ldr r3, [r6, #12]
18998
- bl flash_prog_page_en
18999
-.L3197:
19000
- add r8, r8, #1
19001
- b .L3196
19002
-.L3211:
19003
- ldr r1, .L3213
19004
- ldr r0, .L3213+36
19005
- add r2, r1, #2144
19308
+ bhi .L3154
19309
+ add r2, r4, #2144
19310
+ ldr r1, .L3169+24
1900619311 ldrh r3, [r2]
19007
- ldrh r0, [r0, #-8]
19312
+ ldrh r1, [r1, #-8]
19313
+ add r3, r3, #1
19314
+ uxth r3, r3
19315
+ cmp r1, r3
19316
+ strh r3, [r2] @ movhi
19317
+ bhi .L3140
19318
+ mov r3, #0
19319
+ strh r3, [r2] @ movhi
19320
+ mov r2, #3
19321
+ b .L3168
19322
+.L3154:
19323
+ uxth r2, r7
19324
+ add r3, r4, #2128
19325
+ add r3, r3, #14
19326
+ add r3, r3, r2, lsl #1
19327
+ ldrh r1, [r3, #16]
19328
+ movw r3, #65535
19329
+ cmp r1, r3
19330
+ beq .L3153
19331
+ add r3, r4, #2144
19332
+ ldrh ip, [r9, #-2]
19333
+ ldrh r3, [r3]
19334
+ mla ip, r1, ip, r3
19335
+ ldr r3, [r6, #4]
19336
+ str ip, [r3]
19337
+ ldr r3, [r6, #4]
19338
+ str r10, [r3, #4]
19339
+ mov r3, #0
19340
+ ldr r2, [r6, #12]
19341
+ str r3, [r2]
19342
+ ldr r2, .L3169+8
19343
+ ldrb r1, [r2, #1153] @ zero_extendqisi2
19344
+ mvn r2, #0
19345
+ str r3, [sp, #4]
19346
+ ldrb r3, [r8, #-2546] @ zero_extendqisi2
19347
+ rsb lr, r1, #24
19348
+ mvn r1, r2, lsl r1
19349
+ str r3, [sp]
19350
+ and r0, r1, ip, lsr lr
19351
+ ldr r3, [r6, #12]
19352
+ ldr r2, [r6, #4]
19353
+ bic r1, ip, r1, lsl lr
19354
+ uxtb r0, r0
19355
+ bl flash_prog_page_en
19356
+.L3153:
19357
+ add r7, r7, #1
19358
+ b .L3152
19359
+.L3146:
19360
+ add r10, r4, #2128
19361
+ mov r9, #0
19362
+ add r10, r10, #14
19363
+ bl sblk_wait_write_queue_completed
19364
+.L3155:
19365
+ ldrb r2, [r5, #879] @ zero_extendqisi2
19366
+ uxth r3, r9
19367
+ cmp r2, r3
19368
+ bhi .L3159
19369
+ add r2, r4, #2144
19370
+ ldrh r3, [r2]
1900819371 add r3, r3, #1
1900919372 uxth r3, r3
1901019373 strh r3, [r2] @ movhi
19011
- cmp r0, r3
19012
- movls r3, #0
19013
- strlsh r3, [r2] @ movhi
19014
- movwls r3, #2106
19015
- movls r2, #3
19016
- strlsh r2, [r1, r3] @ movhi
19017
- b .L3184
19018
-.L3190:
19019
- bl sblk_wait_write_queue_completed
19020
- ldr r9, .L3213+28
19021
- ldr r10, .L3213+24
19022
- mov fp, #0
19023
-.L3199:
19024
- ldrb r3, [r7, #883] @ zero_extendqisi2
19025
- uxth r5, fp
19026
- ldr r8, .L3213+4
19027
- cmp r3, r5
19028
- bls .L3212
19029
- add r5, r4, r5, asl #1
19374
+ ldr r2, .L3169+24
19375
+ ldrh r2, [r2, #-8]
19376
+ cmp r2, r3
19377
+ bhi .L3140
19378
+ movw r3, #2106
19379
+ mov r6, #0
19380
+ ldr r0, [r5, #904]
19381
+ strh r6, [r4, r3] @ movhi
19382
+ bl zbuf_free
19383
+ movw r2, #2108
19384
+ str r6, [r5, #904]
19385
+ ldrh r3, [r4, r2]
19386
+ cmp r3, #15
19387
+ bhi .L3160
19388
+ add r1, r3, #1
19389
+ add r3, r3, #1040
19390
+ strh r1, [r4, r2] @ movhi
19391
+ movw r2, #2142
19392
+ add r3, r3, #12
19393
+ ldrh r2, [r4, r2]
19394
+ add r3, r4, r3, lsl #1
19395
+ strh r2, [r3, #6] @ movhi
19396
+.L3161:
19397
+ movw r3, #2108
19398
+ ldr r0, .L3169+28
19399
+ ldrh r2, [r4, r3]
19400
+ movw r3, #2142
19401
+ ldrh r1, [r4, r3]
19402
+ add sp, sp, #8
19403
+ @ sp needed
19404
+ pop {r4, r5, r6, r7, r8, r9, r10, lr}
19405
+ b printk
19406
+.L3159:
19407
+ uxth r7, r9
1903019408 movw r2, #65535
19031
- add r5, r5, #2144
19032
- add r5, r5, #14
19033
- ldrh r3, [r5]
19409
+ add r7, r7, #8
19410
+ lsl r7, r7, #1
19411
+ ldrh r3, [r10, r7]
1903419412 cmp r3, r2
19035
- beq .L3201
19036
- ldrh r2, [r10]
19037
- mov r0, r6
19038
- ldrh r8, [r9]
19413
+ beq .L3157
19414
+ ldr r2, .L3169+32
1903919415 mov r1, #1
19040
- mla r8, r8, r3, r2
19416
+ mov r0, r6
19417
+ ldrh r8, [r2]
19418
+ add r2, r4, #2144
19419
+ ldrh r2, [r2]
19420
+ mla r8, r3, r8, r2
1904119421 str r8, [r6, #24]
1904219422 bl sblk_read_page
1904319423 ldr r3, [r6, #4]
1904419424 ldr r3, [r3]
19045
- cmp r3, r8
19046
- beq .L3201
19425
+ cmp r8, r3
19426
+ beq .L3157
1904719427 mov r0, r8
1904819428 bl ftl_mask_bad_block
1904919429 mvn r3, #0
19050
- strh r3, [r5] @ movhi
19051
-.L3201:
19052
- add fp, fp, #1
19053
- b .L3199
19054
-.L3212:
19055
- add r2, r8, #876
19056
- ldr r5, .L3213
19057
- ldrh r3, [r2]
19058
- add r3, r3, #1
19059
- uxth r3, r3
19060
- strh r3, [r2] @ movhi
19061
- ldr r2, .L3213+36
19062
- ldrh r2, [r2, #-8]
19063
- cmp r2, r3
19064
- bhi .L3184
19065
- movw r3, #2106
19066
- ldr r0, [r8, #908]
19067
- mov r6, #0
19068
- strh r6, [r5, r3] @ movhi
19069
- bl zbuf_free
19070
- movw r2, #2108
19071
- ldrh r3, [r5, r2]
19072
- str r6, [r8, #908]
19073
- cmp r3, #15
19074
- bhi .L3204
19075
- add r1, r3, #1
19076
- add r3, r3, #1040
19077
- strh r1, [r5, r2] @ movhi
19078
- add r3, r3, #12
19079
- movw r2, #2142
19080
- ldrh r2, [r5, r2]
19081
- add r3, r5, r3, asl #1
19082
- strh r2, [r3, #6] @ movhi
19083
- b .L3205
19084
-.L3204:
19430
+ strh r3, [r10, r7] @ movhi
19431
+.L3157:
19432
+ add r9, r9, #1
19433
+ b .L3155
19434
+.L3160:
1908519435 movw r3, #2142
19086
- ldrh r0, [r5, r3]
19436
+ ldrh r0, [r4, r3]
1908719437 bl zftl_insert_free_list
19088
-.L3205:
19089
- movw r3, #2142
19090
- ldr r0, .L3213+40
19091
- ldrh r1, [r4, r3]
19092
- movw r3, #2108
19093
- ldrh r2, [r4, r3]
19094
- add sp, sp, #12
19095
- @ sp needed
19096
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19097
- b printk
19098
-.L3185:
19099
- mov r3, #0
19100
- strh r3, [r4, r5] @ movhi
19101
-.L3184:
19102
- add sp, sp, #12
19103
- @ sp needed
19104
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
19105
-.L3214:
19438
+ b .L3161
19439
+.L3141:
19440
+ mov r2, #0
19441
+ b .L3166
19442
+.L3170:
1910619443 .align 2
19107
-.L3213:
19108
- .word .LANCHOR0+2828
19444
+.L3169:
19445
+ .word .LANCHOR0+2824
1910919446 .word .LANCHOR0+4096
1911019447 .word .LANCHOR0
19111
- .word .LANCHOR3-3072
19112
- .word .LANCHOR0+2792
19113
- .word .LANCHOR0+4986
19114
- .word .LANCHOR0+4972
19115
- .word .LANCHOR3-3066
19448
+ .word .LANCHOR3
19449
+ .word .LANCHOR0+2788
1911619450 .word 1437269760
1911719451 .word .LANCHOR3-3088
19118
- .word .LC200
19452
+ .word .LC199
19453
+ .word .LANCHOR3-3074
1911919454 .fnend
1912019455 .size gc_ink_check_sblk, .-gc_ink_check_sblk
1912119456 .align 2
1912219457 .global ftl_ink_check_sblk
19458
+ .syntax unified
19459
+ .arm
19460
+ .fpu softvfp
1912319461 .type ftl_ink_check_sblk, %function
1912419462 ftl_ink_check_sblk:
1912519463 .fnstart
1912619464 @ args = 0, pretend = 0, frame = 40
1912719465 @ frame_needed = 0, uses_anonymous_args = 0
19128
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19466
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1912919467 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19468
+ lsl r9, r0, #2
19469
+ ldr r6, .L3190
19470
+ mov r5, r0
19471
+ mov r1, r0
1913019472 .pad #52
1913119473 sub sp, sp, #52
19132
- ldr r6, .L3238
19133
- mov r3, r0, asl #2
19134
- str r3, [sp, #8]
19135
- mov r5, r0
19136
- ldr r2, [sp, #8]
19137
- mov r1, r5
19138
- ldr r3, [r6, #1080]
19139
- ldrh r2, [r3, r2]
19140
- ldr r3, [r3, r0, asl #2]
19141
- ubfx r2, r2, #0, #11
19142
- ldr r0, .L3238+4
19474
+ ldr r2, [r6, #1084]
19475
+ ldr r3, [r2, r0, lsl #2]
19476
+ ldrh r2, [r2, r9]
19477
+ ldr r0, .L3190+4
1914319478 ubfx r3, r3, #11, #8
19479
+ ubfx r2, r2, #0, #11
1914419480 bl printk
1914519481 movw r3, #65535
1914619482 cmp r5, r3
19147
- beq .L3215
19148
- movw r3, #1076
19483
+ beq .L3171
19484
+ movw r3, #1080
1914919485 ldrh r3, [r6, r3]
1915019486 cmp r3, r5
19151
- bls .L3215
19487
+ bls .L3171
1915219488 mov r1, #0
1915319489 mov r0, r5
1915419490 bl ftl_erase_sblk
1915519491 mov r0, r5
19156
- mov r8, #0
1915719492 add r1, sp, #32
1915819493 strh r5, [sp, #16] @ movhi
19494
+ mov r8, #0
1915919495 bl ftl_get_blk_list_in_sblk
1916019496 strb r0, [sp, #25]
1916119497 mov r0, #1
1916219498 bl buf_alloc
19163
- ldr r3, [r6, #1080]
19164
- ldr r2, [sp, #8]
19499
+ ldr r3, [r6, #1084]
1916519500 mov r4, r0
19501
+ ldr r10, .L3190+8
19502
+ ldr fp, .L3190+12
19503
+ ldrh r3, [r3, r9]
19504
+ ldrb r2, [r10, #-2546] @ zero_extendqisi2
1916619505 ldr r0, [r0, #4]
19167
- ldrh r3, [r3, r2]
19168
- ldrb r2, [r6, #2772] @ zero_extendqisi2
1916919506 ubfx r3, r3, #0, #11
1917019507 cmp r3, #1
19171
- mov r2, r2, asl #9
19508
+ lsl r2, r2, #9
1917219509 movle r1, #85
1917319510 movgt r1, #170
1917419511 bl ftl_memset
1917519512 bl sblk_wait_write_queue_completed
19176
-.L3219:
19177
- ldr r3, .L3238+8
19178
- uxth r10, r8
19179
- ldr fp, .L3238+8
19180
- ldrh r3, [r3]
19181
- cmp r3, r10
19182
- bls .L3234
19183
- add fp, fp, #30
19184
- mov r9, #0
19185
-.L3222:
19186
- ldrb r2, [sp, #25] @ zero_extendqisi2
19187
- uxth r3, r9
19513
+.L3175:
19514
+ ldr r3, .L3190+16
19515
+ ldrh r2, [r3]
19516
+ uxth r3, r8
1918819517 cmp r2, r3
19189
- bls .L3235
19518
+ bls .L3178
19519
+ mov r7, #0
19520
+ b .L3179
19521
+.L3177:
19522
+ uxth r3, r7
1919019523 add r2, sp, #48
19191
- add r3, r2, r3, asl #1
19192
- movw r2, #65535
19193
- ldrh r3, [r3, #-16]
19194
- cmp r3, r2
19195
- beq .L3220
19196
- ldrh r7, [fp]
19197
- mvn r0, #0
19198
- ldr r2, .L3238+12
19199
- mla r7, r7, r3, r10
19200
- ldr r3, [r4, #4]
19201
- str r7, [r3]
19202
- ldr r3, [r4, #4]
19203
- str r2, [r3, #4]
19204
- mov r2, #0
19205
- ldr r3, [r4, #12]
19206
- str r2, [r3]
19207
- ldrb r3, [r6, #1189] @ zero_extendqisi2
19208
- ldrb ip, [r6, #2772] @ zero_extendqisi2
19209
- rsb r1, r3, #24
19210
- str r2, [sp, #4]
19211
- mvn r3, r0, asl r3
19212
- and r0, r3, r7, lsr r1
19213
- str ip, [sp]
19214
- bic r1, r7, r3, asl r1
19215
- uxtb r0, r0
19216
- ldr r2, [r4, #4]
19217
- ldr r3, [r4, #12]
19218
- bl flash_prog_page_en
19219
-.L3220:
19220
- add r9, r9, #1
19221
- b .L3222
19222
-.L3235:
19223
- add r8, r8, #1
19224
- b .L3219
19225
-.L3234:
19226
- mov r10, #0
19227
-.L3223:
19228
- ldrh r1, [fp]
19229
- uxth r3, r10
19230
- str r3, [sp, #12]
19524
+ add r3, r2, r3, lsl #1
19525
+ ldrh r1, [r3, #-16]
19526
+ movw r3, #65535
1923119527 cmp r1, r3
19232
- bls .L3236
19233
- mov r9, #0
19234
-.L3228:
19235
- ldrb r1, [sp, #25] @ zero_extendqisi2
19236
- uxth r7, r9
19237
- cmp r1, r7
19238
- bls .L3237
19239
- add r7, r7, #8
19528
+ beq .L3176
19529
+ ldr r3, .L3190+20
19530
+ ldrh ip, [r3]
19531
+ uxth r3, r8
19532
+ mla ip, r1, ip, r3
19533
+ ldr r3, [r4, #4]
19534
+ str ip, [r3]
19535
+ ldr r3, [r4, #4]
19536
+ str fp, [r3, #4]
19537
+ mov r3, #0
19538
+ ldr r2, [r4, #12]
19539
+ str r3, [r2]
19540
+ mvn r2, #0
19541
+ ldrb r1, [r6, #1153] @ zero_extendqisi2
19542
+ str r3, [sp, #4]
19543
+ ldrb r3, [r10, #-2546] @ zero_extendqisi2
19544
+ rsb lr, r1, #24
19545
+ mvn r1, r2, lsl r1
19546
+ str r3, [sp]
19547
+ and r0, r1, ip, lsr lr
19548
+ ldr r3, [r4, #12]
19549
+ ldr r2, [r4, #4]
19550
+ bic r1, ip, r1, lsl lr
19551
+ uxtb r0, r0
19552
+ bl flash_prog_page_en
19553
+.L3176:
19554
+ add r7, r7, #1
19555
+.L3179:
19556
+ ldrb r2, [sp, #25] @ zero_extendqisi2
19557
+ uxth r3, r7
19558
+ cmp r2, r3
19559
+ bhi .L3177
19560
+ add r8, r8, #1
19561
+ b .L3175
19562
+.L3178:
19563
+ mov r10, #0
19564
+.L3180:
19565
+ ldr r3, .L3190+24
19566
+ uxth r2, r10
19567
+ ldrh r1, [r3, #-8]
19568
+ cmp r1, r2
19569
+ bls .L3185
19570
+ mov fp, #0
19571
+ str r2, [sp, #12]
19572
+ b .L3186
19573
+.L3184:
19574
+ uxth r7, fp
1924019575 add r3, sp, #48
19241
- add r7, r3, r7, asl #1
19576
+ add r7, r7, #8
19577
+ add r7, r3, r7, lsl #1
1924219578 movw r3, #65535
1924319579 ldrh r1, [r7, #-32]
1924419580 cmp r1, r3
19245
- beq .L3225
19246
- ldr r3, .L3238+16
19247
- mov r0, r4
19248
- ldrh r8, [r3]
19581
+ beq .L3182
19582
+ ldr r0, .L3190+20
1924919583 ldr r3, [sp, #12]
19250
- mla r8, r8, r1, r3
19584
+ ldrh r8, [r0]
19585
+ mov r0, r4
19586
+ mla r8, r1, r8, r3
1925119587 mov r1, #1
1925219588 str r8, [r4, #24]
1925319589 bl sblk_read_page
1925419590 ldr r1, [r4, #4]
1925519591 ldr r1, [r1]
19256
- cmp r1, r8
19257
- beq .L3225
19592
+ cmp r8, r1
19593
+ beq .L3182
1925819594 mov r0, r8
1925919595 bl ftl_mask_bad_block
1926019596 mvn r1, #0
1926119597 strh r1, [r7, #-32] @ movhi
19262
-.L3225:
19263
- add r9, r9, #1
19264
- b .L3228
19265
-.L3237:
19598
+.L3182:
19599
+ add fp, fp, #1
19600
+.L3186:
19601
+ ldrb r0, [sp, #25] @ zero_extendqisi2
19602
+ uxth r1, fp
19603
+ cmp r0, r1
19604
+ bhi .L3184
1926619605 add r10, r10, #1
19267
- b .L3223
19268
-.L3236:
19606
+ b .L3180
19607
+.L3185:
1926919608 mov r0, r4
1927019609 bl zbuf_free
19271
- ldr r3, [r6, #1080]
19272
- ldr r0, .L3238+20
19610
+ ldr r2, [r6, #1084]
1927319611 mov r1, r5
19274
- ldr r2, [sp, #8]
19275
- ldrh r2, [r3, r2]
19276
- ldr r3, [r3, r5, asl #2]
19277
- ubfx r2, r2, #0, #11
19612
+ ldr r0, .L3190+28
19613
+ ldr r3, [r2, r5, lsl #2]
19614
+ ldrh r2, [r2, r9]
1927819615 ubfx r3, r3, #11, #8
19616
+ ubfx r2, r2, #0, #11
1927919617 bl printk
19280
-.L3215:
19618
+.L3171:
1928119619 add sp, sp, #52
1928219620 @ sp needed
19283
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
19284
-.L3239:
19621
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
19622
+.L3191:
1928519623 .align 2
19286
-.L3238:
19624
+.L3190:
1928719625 .word .LANCHOR0
19288
- .word .LC201
19289
- .word .LANCHOR3-3096
19626
+ .word .LC200
19627
+ .word .LANCHOR3
1929019628 .word 1437269760
19291
- .word .LANCHOR3-3066
19292
- .word .LC202
19629
+ .word .LANCHOR3-3096
19630
+ .word .LANCHOR3-3074
19631
+ .word .LANCHOR3-3088
19632
+ .word .LC201
1929319633 .fnend
1929419634 .size ftl_ink_check_sblk, .-ftl_ink_check_sblk
1929519635 .align 2
1929619636 .global ftl_alloc_sblk
19637
+ .syntax unified
19638
+ .arm
19639
+ .fpu softvfp
1929719640 .type ftl_alloc_sblk, %function
1929819641 ftl_alloc_sblk:
1929919642 .fnstart
1930019643 @ args = 0, pretend = 0, frame = 0
1930119644 @ frame_needed = 0, uses_anonymous_args = 0
19302
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
19303
- .save {r3, r4, r5, r6, r7, r8, r9, lr}
19645
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
19646
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
1930419647 uxth r5, r0
1930519648 cmp r0, #5
1930619649 mov r9, r0
1930719650 mov r1, r5
1930819651 mov r0, #0
19309
- movne r7, #0
19310
- moveq r7, #2
19652
+ movne r8, #0
19653
+ moveq r8, #2
1931119654 bl zftl_get_free_sblk
1931219655 movw r3, #65535
19313
- cmp r0, r3
1931419656 mov r4, r0
19315
- beq .L3242
19316
- ldr r6, .L3256
19317
- mov r8, r0, asl #2
19318
- ldr r5, [r6, #1080]
19319
- add r5, r5, r8
19657
+ cmp r0, r3
19658
+ beq .L3194
19659
+ ldr r6, .L3212
19660
+ lsl r7, r0, #2
19661
+ ldr r5, [r6, #1084]
19662
+ add r5, r5, r7
1932019663 ldrb r3, [r5, #2] @ zero_extendqisi2
1932119664 tst r3, #224
19322
- beq .L3243
19323
- ldr r1, .L3256+4
19665
+ beq .L3195
1932419666 mov r2, #1012
19325
- ldr r0, .L3256+8
19667
+ ldr r1, .L3212+4
19668
+ ldr r0, .L3212+8
1932619669 bl printk
1932719670 bl dump_stack
19328
-.L3243:
19671
+.L3195:
1932919672 ldrb r3, [r5, #2] @ zero_extendqisi2
1933019673 bfi r3, r9, #5, #3
1933119674 uxtb r3, r3
1933219675 ubfx r2, r3, #3, #2
19333
- orr r2, r7, r2
19676
+ orr r2, r8, r2
1933419677 bfi r3, r2, #3, #2
19678
+ clz r2, r8
1933519679 strb r3, [r5, #2]
1933619680 uxtb r3, r3
19337
- and r2, r3, #24
19338
- cmp r7, #0
19339
- cmpeq r2, #24
19340
- moveq r2, #1
19341
- bfieq r3, r2, #3, #2
19342
- streqb r3, [r5, #2]
19343
- ldr r3, [r6, #2804]
19681
+ lsr r2, r2, #5
19682
+ and r1, r3, #24
19683
+ cmp r1, #24
19684
+ cmpeq r8, #0
19685
+ moveq r1, #1
19686
+ bfieq r3, r1, #3, #2
19687
+ strbeq r3, [r5, #2]
19688
+ ldr r3, [r6, #2800]
1934419689 ldrh r3, [r3, #150]
1934519690 cmp r3, #0
19346
- beq .L3247
19347
- ldr r3, .L3256
19348
- mov r0, r4
19349
- ldr r3, [r3, #1080]
19350
- ldrh r3, [r3, r8]
19691
+ beq .L3197
19692
+ ldr r3, [r6, #1084]
19693
+ ldrh r3, [r3, r7]
1935119694 ubfx r3, r3, #0, #11
19352
- orrs r3, r7, r3
19353
- bne .L3248
19695
+ cmp r3, #0
19696
+ movne r2, #0
19697
+ andeq r2, r2, #1
19698
+ cmp r2, #0
19699
+ beq .L3197
19700
+ mov r0, r4
1935419701 bl ftl_ink_check_sblk
19355
- b .L3247
19356
-.L3242:
19702
+.L3197:
19703
+ mov r0, r4
19704
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
19705
+.L3194:
1935719706 bl print_ftl_debug_info
19358
- mov r1, r4
1935919707 mov r2, r9
19360
- ldr r0, .L3256+12
19708
+ mov r1, r4
19709
+ ldr r0, .L3212+12
1936119710 bl printk
1936219711 mov r1, r5
1936319712 mov r0, #0
1936419713 bl zftl_get_free_sblk
1936519714 mov r2, r9
19715
+ mov r1, r0
1936619716 mov r4, r0
19367
- ldr r0, .L3256+12
19368
- mov r1, r4
19717
+ ldr r0, .L3212+12
1936919718 bl printk
1937019719 bl dump_all_list_info
19371
- ldr r1, .L3256+4
1937219720 movw r2, #1031
19373
- ldr r0, .L3256+8
19721
+ ldr r1, .L3212+4
19722
+ ldr r0, .L3212+8
1937419723 bl printk
1937519724 bl dump_stack
19376
-.L3247:
19377
- mov r0, r4
19378
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
19379
-.L3248:
19380
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
19381
-.L3257:
19725
+ b .L3197
19726
+.L3213:
1938219727 .align 2
19383
-.L3256:
19728
+.L3212:
1938419729 .word .LANCHOR0
19385
- .word .LANCHOR1+2404
19730
+ .word .LANCHOR1+2201
1938619731 .word .LC0
19387
- .word .LC203
19732
+ .word .LC202
1938819733 .fnend
1938919734 .size ftl_alloc_sblk, .-ftl_alloc_sblk
1939019735 .align 2
1939119736 .global ftl_open_sblk_init
19737
+ .syntax unified
19738
+ .arm
19739
+ .fpu softvfp
1939219740 .type ftl_open_sblk_init, %function
1939319741 ftl_open_sblk_init:
1939419742 .fnstart
1939519743 @ args = 0, pretend = 0, frame = 0
1939619744 @ frame_needed = 0, uses_anonymous_args = 0
19397
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
19745
+ push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1939819746 .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1939919747 mov r4, r0
19400
- ldr r6, .L3266
19401
- mov r5, r1
19402
- ldr r8, .L3266+4
19403
- mov r7, r6
19404
-.L3259:
19748
+ ldr r5, .L3222
19749
+ mov r6, r1
19750
+ mov r7, #0
19751
+ sub r8, r5, #3088
19752
+.L3215:
1940519753 movw r10, #65535
19406
-.L3260:
19407
- mov r0, r5
19754
+.L3216:
19755
+ mov r0, r6
1940819756 bl ftl_alloc_sblk
1940919757 cmp r0, r10
1941019758 mov r9, r0
19411
- beq .L3260
19759
+ beq .L3216
1941219760 mov r1, #0
19413
- ldr fp, .L3266+8
19761
+ ldr fp, .L3222+4
1941419762 bl ftl_erase_sblk
1941519763 add r1, r4, #16
1941619764 mov r0, r9
19417
- mov r10, r9, asl #1
1941819765 bl ftl_get_blk_list_in_sblk
1941919766 strh r9, [r4] @ movhi
19420
- ldrh r2, [r8]
19421
- cmp r5, #2
19422
- strb r5, [r4, #4]
19423
- uxtb r3, r0
19424
- strb r3, [r4, #9]
19425
- mov r0, #0
19426
- strh r0, [r4, #2] @ movhi
19427
- smulbb r3, r3, r2
19428
- strb r0, [r4, #5]
19429
- strh r0, [r4, #10] @ movhi
19430
- ldrneb r0, [r6, #-3123] @ zero_extendqisi2
19431
- ldr r1, [r7, #-2548]
19432
- strh r3, [r4, #6] @ movhi
19433
- ldrb r3, [r7, #-3123] @ zero_extendqisi2
19434
- smulbbne r0, r0, r2
19435
- mul r2, r3, r2
19436
- uxthne r0, r0
19437
- strh r0, [r4, #12] @ movhi
19438
- mov r2, r2, asl #2
19439
- add r0, r1, r0, asl #2
19767
+ cmp r6, #2
19768
+ ldrh r2, [r8, #-8]
19769
+ uxtb r0, r0
19770
+ ldrbne r3, [r5, #-3127] @ zero_extendqisi2
19771
+ moveq r3, #0
19772
+ ldrb r1, [r5, #-3127] @ zero_extendqisi2
19773
+ lsl r10, r9, #1
19774
+ strb r0, [r4, #9]
19775
+ smulbb r0, r0, r2
19776
+ strh r7, [r4, #2] @ movhi
19777
+ smulbbne r3, r3, r2
19778
+ strb r7, [r4, #5]
19779
+ mul r2, r2, r1
19780
+ strh r7, [r4, #10] @ movhi
19781
+ strh r0, [r4, #6] @ movhi
1944019782 mov r1, #255
19783
+ ldr r0, [r5, #-2556]
19784
+ uxthne r3, r3
19785
+ strb r6, [r4, #4]
19786
+ strh r3, [r4, #12] @ movhi
19787
+ lsl r2, r2, #2
19788
+ add r0, r0, r3, lsl #2
1944119789 bl ftl_memset
19442
- ldr r3, [fp, #1088]
19790
+ ldr r3, [fp, #1092]
1944319791 ldrh r2, [r4, #6]
1944419792 strh r2, [r3, r10] @ movhi
1944519793 ldrb r3, [r4, #9] @ zero_extendqisi2
1944619794 cmp r3, #0
19447
- ldmnefd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
19448
- ldr r0, .L3266+12
19795
+ popne {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
1944919796 mov r1, r9
19797
+ ldr r0, .L3222+8
1945019798 bl printk
19451
- ldr r3, [fp, #1088]
19799
+ ldr r3, [fp, #1092]
1945219800 mvn r2, #0
1945319801 strh r2, [r3, r10] @ movhi
1945419802 mov r3, #7
1945519803 strb r3, [r4, #4]
19456
- b .L3259
19457
-.L3267:
19804
+ b .L3215
19805
+.L3223:
1945819806 .align 2
19459
-.L3266:
19807
+.L3222:
1946019808 .word .LANCHOR3
19461
- .word .LANCHOR3-3096
1946219809 .word .LANCHOR0
19463
- .word .LC204
19810
+ .word .LC203
1946419811 .fnend
1946519812 .size ftl_open_sblk_init, .-ftl_open_sblk_init
1946619813 .align 2
1946719814 .global pm_alloc_new_blk
19815
+ .syntax unified
19816
+ .arm
19817
+ .fpu softvfp
1946819818 .type pm_alloc_new_blk, %function
1946919819 pm_alloc_new_blk:
1947019820 .fnstart
1947119821 @ args = 0, pretend = 0, frame = 0
1947219822 @ frame_needed = 0, uses_anonymous_args = 0
19473
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
19823
+ push {r0, r1, r4, r5, r6, r7, r8, lr}
1947419824 .save {r4, r5, r6, r7, r8, lr}
1947519825 .pad #8
19476
- movw r2, #690
19477
- ldr r5, .L3286
19478
- ldr r7, .L3286+4
19479
- ldr r4, [r5, #2804]
19480
- ldrh r3, [r4, r2]
19826
+ movw r1, #690
19827
+ ldr r4, .L3242
19828
+ ldr r7, .L3242+4
19829
+ ldr r2, [r4, #2800]
19830
+ ldrh r3, [r2, r1]
1948119831 add r3, r3, #1
1948219832 uxth r3, r3
19483
- strh r3, [r4, r2] @ movhi
19484
- ldrb r2, [r7, #-3123] @ zero_extendqisi2
19485
- cmp r2, r3
19486
- bls .L3269
19833
+ strh r3, [r2, r1] @ movhi
19834
+ ldrb r1, [r7, #-3127] @ zero_extendqisi2
19835
+ cmp r1, r3
19836
+ bls .L3225
1948719837 add r3, r3, #336
19488
- mov r3, r3, asl #1
19489
- ldrh r2, [r4, r3]
19838
+ lsl r3, r3, #1
19839
+ ldrh r2, [r2, r3]
1949019840 movw r3, #65535
1949119841 cmp r2, r3
19492
- bne .L3270
19493
-.L3269:
19494
- ldr r4, .L3286
19842
+ bne .L3226
19843
+.L3225:
19844
+ ldr r5, .L3242+8
1949519845 movw r8, #65535
19496
-.L3271:
19846
+.L3227:
1949719847 mov r0, #1
1949819848 bl ftl_alloc_sblk
1949919849 cmp r0, r8
1950019850 mov r6, r0
19501
- beq .L3271
19851
+ beq .L3227
1950219852 mov r1, #0
1950319853 bl ftl_erase_sblk
19504
- ldr r1, [r5, #2804]
19854
+ ldr r1, [r4, #2800]
1950519855 mov r0, r6
1950619856 add r1, r1, #672
1950719857 bl ftl_get_blk_list_in_sblk
1950819858 uxth r0, r0
1950919859 cmp r0, #0
19510
- bne .L3272
19860
+ bne .L3228
1951119861 mov r1, r6
19512
- ldr r0, .L3286+8
19862
+ mov r0, r5
1951319863 bl printk
19514
- ldr r3, [r4, #1080]
19515
- add r6, r3, r6, asl #2
19864
+ ldr r3, [r4, #1084]
19865
+ add r6, r3, r6, lsl #2
1951619866 ldrb r3, [r6, #2] @ zero_extendqisi2
1951719867 orr r3, r3, #224
1951819868 strb r3, [r6, #2]
19519
- b .L3271
19520
-.L3272:
19521
- ldr r3, .L3286
19522
- movw r2, #690
19523
- mov r4, #0
19869
+ b .L3227
19870
+.L3228:
19871
+ ldr r2, [r4, #2800]
19872
+ movw r3, #690
19873
+ mov r5, #0
1952419874 movw r1, #65535
19525
- ldr r3, [r3, #2804]
19526
- strh r4, [r3, r2] @ movhi
19527
- add r3, r3, #412
19528
- add r3, r3, #2
19529
- mov r2, #1
19530
- str r2, [r7, #520]
19531
-.L3274:
19532
- ldrh r0, [r3, #2]!
19533
- uxth r2, r4
19875
+ strh r5, [r2, r3] @ movhi
19876
+ add r2, r2, #416
19877
+ mov r3, #1
19878
+ str r3, [r7, #-36]
19879
+.L3230:
19880
+ ldrh r0, [r2], #2
19881
+ uxth r3, r5
1953419882 cmp r0, r1
19535
- beq .L3273
19536
- add r4, r4, #1
19537
- cmp r4, #128
19538
- bne .L3274
19883
+ beq .L3229
19884
+ add r5, r5, #1
19885
+ cmp r5, #128
19886
+ bne .L3230
1953919887 mov r2, #264
19540
- ldr r1, .L3286+12
19541
- ldr r0, .L3286+16
19888
+ ldr r1, .L3242+12
19889
+ ldr r0, .L3242+16
1954219890 bl printk
1954319891 bl dump_stack
19544
- mov r2, r4
19545
-.L3273:
19546
- add r2, r2, #208
19547
- ldr r3, [r5, #2804]
19548
- mov r2, r2, asl #1
19549
- strh r6, [r3, r2] @ movhi
19550
- add r3, r3, #688
19892
+ mov r3, r5
19893
+.L3229:
19894
+ ldr r2, [r4, #2800]
19895
+ add r3, r3, #208
19896
+ lsl r3, r3, #1
19897
+ strh r6, [r2, r3] @ movhi
19898
+ add r3, r2, #688
1955119899 ldrh r2, [r3]
1955219900 add r2, r2, #1
1955319901 strh r2, [r3] @ movhi
19554
-.L3270:
19555
- ldr r2, [r5, #2804]
19902
+.L3226:
19903
+ ldr r2, [r4, #2800]
1955619904 movw r3, #690
1955719905 ldrh r3, [r2, r3]
1955819906 add r3, r3, #336
19559
- mov r3, r3, asl #1
19560
- ldrh r4, [r2, r3]
19907
+ lsl r3, r3, #1
19908
+ ldrh r5, [r2, r3]
1956119909 movw r2, #65533
19562
- sub r3, r4, #1
19910
+ sub r3, r5, #1
1956319911 uxth r3, r3
1956419912 cmp r3, r2
19565
- bls .L3276
19566
- ldr r1, .L3286+12
19913
+ bls .L3232
1956719914 movw r2, #270
19568
- ldr r0, .L3286+16
19915
+ ldr r1, .L3242+12
19916
+ ldr r0, .L3242+16
1956919917 bl printk
1957019918 bl dump_stack
19571
-.L3276:
19572
- ldr r1, [r5, #2804]
19919
+.L3232:
19920
+ ldr r1, [r4, #2800]
1957319921 mov r2, #0
19922
+ movw r0, #694
1957419923 add r3, r1, #696
1957519924 strh r2, [r3] @ movhi
19576
- ldr r2, .L3286+20
19577
- ldrb r3, [r5, #1189] @ zero_extendqisi2
19578
- ldrh r5, [r2, #-12]
19579
- rsb r3, r3, #24
19580
- movw r2, #694
19581
- rsb r5, r5, r3
19582
- mov r3, r4, asr r5
19583
- strh r3, [r1, r2] @ movhi
19584
- ldr r2, .L3286+24
19925
+ ldr r3, .L3242+20
19926
+ ldrb r2, [r4, #1153] @ zero_extendqisi2
19927
+ ldrh r3, [r3, #-2]
19928
+ rsb r2, r2, #24
19929
+ sub r2, r2, r3
19930
+ asr r3, r5, r2
19931
+ strh r3, [r1, r0] @ movhi
1958519932 add r1, r1, #692
19586
- strh r4, [r1] @ movhi
19587
- ldr r2, [r2]
19588
- tst r2, #4096
19589
- beq .L3280
19590
- mvn r2, #0
19933
+ strh r5, [r1] @ movhi
19934
+ ldr r1, .L3242+24
19935
+ ldr r1, [r1]
19936
+ tst r1, #4096
19937
+ beq .L3236
1959119938 uxth r3, r3
19592
- ldr r0, .L3286+28
19593
- mov r1, r4
19939
+ mvn r1, #0
19940
+ mvn r2, r1, lsl r2
19941
+ ldr r0, .L3242+28
1959419942 str r3, [sp]
19595
- mvn r2, r2, asl r5
19596
- mov r3, r4
19943
+ mov r1, r5
19944
+ mov r3, r5
1959719945 bl printk
19598
-.L3280:
19946
+.L3236:
1959919947 mov r0, #0
1960019948 add sp, sp, #8
1960119949 @ sp needed
19602
- ldmfd sp!, {r4, r5, r6, r7, r8, pc}
19603
-.L3287:
19950
+ pop {r4, r5, r6, r7, r8, pc}
19951
+.L3243:
1960419952 .align 2
19605
-.L3286:
19953
+.L3242:
1960619954 .word .LANCHOR0
1960719955 .word .LANCHOR3
19608
- .word .LC204
19609
- .word .LANCHOR1+2420
19956
+ .word .LC203
19957
+ .word .LANCHOR1+2216
1961019958 .word .LC0
19611
- .word .LANCHOR3-3120
19959
+ .word .LANCHOR3-3136
1961219960 .word .LANCHOR2
19613
- .word .LC205
19961
+ .word .LC204
1961419962 .fnend
1961519963 .size pm_alloc_new_blk, .-pm_alloc_new_blk
1961619964 .align 2
1961719965 .global pm_write_page
19966
+ .syntax unified
19967
+ .arm
19968
+ .fpu softvfp
1961819969 .type pm_write_page, %function
1961919970 pm_write_page:
1962019971 .fnstart
1962119972 @ args = 0, pretend = 0, frame = 0
1962219973 @ frame_needed = 0, uses_anonymous_args = 0
19623
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
19624
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19625
- .pad #12
19626
- mov r6, r0
19627
- ldr r8, .L3302
19628
- mov r7, r1
19629
- ldr r9, .L3302+4
19630
- mov r4, r8
19631
-.L3289:
19632
- ldr r3, [r8, #2804]
19974
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
19975
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
19976
+ .pad #8
19977
+ mov r5, r0
19978
+ ldr r9, .L3258
19979
+ mov r8, r1
19980
+ mov r7, r9
19981
+.L3245:
19982
+ ldr r3, [r9, #2800]
1963319983 ldr r2, [r3, #48]
1963419984 add r2, r2, #1
1963519985 str r2, [r3, #48]
1963619986 add r2, r3, #696
1963719987 ldrh r1, [r2]
19638
- ldrh r2, [r9]
19988
+ ldr r2, .L3258+4
19989
+ ldrh r2, [r2]
1963919990 cmp r1, r2
19640
- bcs .L3290
19991
+ bcs .L3246
1964119992 add r3, r3, #692
1964219993 ldrh r2, [r3]
1964319994 movw r3, #65535
1964419995 cmp r2, r3
19645
- bne .L3291
19646
-.L3290:
19996
+ bne .L3247
19997
+.L3246:
1964719998 bl pm_alloc_new_blk
1964819999 mov r0, #0
1964920000 bl ftl_info_flush
19650
-.L3291:
19651
- ldr r3, [r4, #2804]
20001
+.L3247:
20002
+ ldr r3, [r7, #2800]
1965220003 add r3, r3, #692
1965320004 ldrh r2, [r3]
1965420005 movw r3, #65535
1965520006 cmp r2, r3
19656
- bne .L3292
19657
- ldr r1, .L3302+8
20007
+ bne .L3248
1965820008 movw r2, #303
19659
- ldr r0, .L3302+12
20009
+ ldr r1, .L3258+8
20010
+ ldr r0, .L3258+12
1966020011 bl printk
1966120012 bl dump_stack
19662
-.L3292:
19663
- ldr r3, [r4, #2804]
19664
- ldr r5, .L3302+16
20013
+.L3248:
20014
+ ldr r3, [r7, #2800]
20015
+ mov r1, #0
20016
+ ldr r4, .L3258+16
1966520017 add r2, r3, #692
1966620018 add r3, r3, #696
19667
- ldrh r1, [r2]
19668
- ldr r2, .L3302+20
19669
- ldr r0, [r5, #524]
19670
- ldrh r10, [r2]
19671
- ldrh r2, [r3]
19672
- mla r10, r10, r1, r2
20019
+ ldrh r6, [r2]
20020
+ sub r2, r4, #3072
20021
+ ldrh r2, [r2, #-2]
20022
+ ldrh r3, [r3]
20023
+ ldr r0, [r4, #-32]
20024
+ mla r6, r2, r6, r3
1967320025 mov r2, #64
19674
- mov r1, #0
1967520026 bl ftl_memset
19676
- ldr r3, [r5, #524]
19677
- mov r0, r7
19678
- str r6, [r3]
19679
- ldr r3, [r4, #2804]
19680
- ldr fp, [r5, #524]
19681
- ldrb r1, [r4, #2772] @ zero_extendqisi2
20027
+ ldr r3, [r4, #-32]
20028
+ mov r0, r8
20029
+ str r5, [r3]
20030
+ ldr r3, [r7, #2800]
20031
+ ldrb r1, [r4, #-2546] @ zero_extendqisi2
20032
+ ldr r10, [r4, #-32]
1968220033 ldr r3, [r3, #48]
19683
- mov r1, r1, asl #9
19684
- str r3, [fp, #4]
20034
+ lsl r1, r1, #9
20035
+ str r3, [r10, #4]
1968520036 bl js_hash
19686
- ldr r3, [r4, #2804]
19687
- mov r1, r10
19688
- mov r2, r7
19689
- str r0, [fp, #8]
20037
+ ldr r3, [r7, #2800]
20038
+ mov r2, r8
20039
+ str r0, [r10, #8]
20040
+ mov r1, r6
1969020041 ldrb r0, [r3, #694] @ zero_extendqisi2
19691
- ldrb r3, [r4, #2772] @ zero_extendqisi2
20042
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
1969220043 str r3, [sp]
19693
- ldr r3, [r5, #524]
20044
+ ldr r3, [r4, #-32]
1969420045 bl ftl_prog_page
19695
- ldr r2, [r4, #2804]
20046
+ ldr r2, [r7, #2800]
1969620047 add r1, r2, #696
1969720048 ldrh r3, [r1]
1969820049 add r3, r3, #1
1969920050 uxth r3, r3
19700
- strh r3, [r1] @ movhi
1970120051 cmp r3, #1
19702
- beq .L3293
19703
- ldrb r3, [r5, #528] @ zero_extendqisi2
20052
+ strh r3, [r1] @ movhi
20053
+ beq .L3249
20054
+ ldrb r3, [r4, #-28] @ zero_extendqisi2
1970420055 cmp r3, #0
19705
- beq .L3294
19706
-.L3293:
20056
+ beq .L3250
20057
+.L3249:
1970720058 mov r3, #0
19708
- strb r3, [r5, #528]
19709
- b .L3289
19710
-.L3294:
20059
+ strb r3, [r4, #-28]
20060
+ b .L3245
20061
+.L3250:
1971120062 cmn r0, #1
19712
- bne .L3296
19713
- mov r1, r10
19714
- ldr r0, .L3302+24
20063
+ bne .L3252
20064
+ mov r1, r6
20065
+ ldr r0, .L3258+20
1971520066 bl printk
19716
- b .L3289
19717
-.L3296:
20067
+ b .L3245
20068
+.L3252:
1971820069 movw r3, #698
1971920070 mov r0, #0
1972020071 ldrh r3, [r2, r3]
19721
- cmp r6, r3
19722
- addcc r6, r6, #176
19723
- strcc r10, [r2, r6, asl #2]
19724
- add sp, sp, #12
20072
+ cmp r5, r3
20073
+ addcc r5, r5, #176
20074
+ strcc r6, [r2, r5, lsl #2]
20075
+ add sp, sp, #8
1972520076 @ sp needed
19726
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
19727
-.L3303:
20077
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
20078
+.L3259:
1972820079 .align 2
19729
-.L3302:
20080
+.L3258:
1973020081 .word .LANCHOR0
1973120082 .word .LANCHOR3-3096
19732
- .word .LANCHOR1+2440
20083
+ .word .LANCHOR1+2233
1973320084 .word .LC0
1973420085 .word .LANCHOR3
19735
- .word .LANCHOR3-3066
19736
- .word .LC206
20086
+ .word .LC205
1973720087 .fnend
1973820088 .size pm_write_page, .-pm_write_page
1973920089 .align 2
1974020090 .global flash_info_flush
20091
+ .syntax unified
20092
+ .arm
20093
+ .fpu softvfp
1974120094 .type flash_info_flush, %function
1974220095 flash_info_flush:
1974320096 .fnstart
1974420097 @ args = 0, pretend = 0, frame = 8
1974520098 @ frame_needed = 0, uses_anonymous_args = 0
19746
- ldr r3, .L3318
19747
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20099
+ ldr r3, .L3273
20100
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1974820101 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
1974920102 .pad #20
1975020103 sub sp, sp, #20
1975120104 ldr r3, [r3]
1975220105 tst r3, #4096
19753
- beq .L3305
19754
- ldr r0, .L3318+4
20106
+ beq .L3261
20107
+ ldr r2, .L3273+4
1975520108 movw r1, #365
19756
- ldr r2, .L3318+8
20109
+ ldr r0, .L3273+8
1975720110 bl printk
19758
-.L3305:
19759
- ldr r5, .L3318+12
19760
- mov r1, #0
19761
- ldr r6, .L3318+16
20111
+.L3261:
20112
+ ldr r4, .L3273+12
1976220113 mov r2, #64
19763
- add r8, r5, #536
19764
- mov r9, #0
19765
- ldr r0, [r5, #532]
19766
- mov r7, r5
20114
+ ldr r5, .L3273+16
20115
+ mov r1, #0
20116
+ ldr r9, .L3273+20
20117
+ mov r7, #0
20118
+ ldr r0, [r4, #-24]
20119
+ mov r10, r7
1976720120 bl ftl_memset
19768
- ldr r0, .L3318+20
19769
- ldr r1, [r6, #1176]
19770
- mov r2, #4
1977120121 mov r3, #16
19772
- mov r10, r8
20122
+ mov r2, #4
20123
+ ldr r1, [r5, #1040]
20124
+ ldr r0, .L3273+24
1977320125 bl rknand_print_hex
19774
- ldr r4, [r6, #1176]
19775
- add r0, r4, #16
19776
- ldr r1, [r4, #8]
20126
+ ldr r8, .L3273+28
20127
+ ldr r6, [r5, #1040]
20128
+ ldr r1, [r6, #8]
20129
+ add r0, r6, #16
1977720130 bl js_hash
19778
- str r0, [r4, #12]
19779
-.L3306:
19780
- ldrb r3, [r5, #536] @ zero_extendqisi2
19781
- ldrh r4, [r8, #2]
19782
- ldrh ip, [r6, #2]
19783
- mov r1, r3
19784
- ldr r0, .L3318+24
19785
- mov r2, r4
19786
- str r3, [sp, #8]
19787
- str ip, [sp, #12]
20131
+ str r0, [r6, #12]
20132
+.L3262:
20133
+ ldrb r6, [r4, #-20] @ zero_extendqisi2
20134
+ mov r0, r9
20135
+ ldrh fp, [r4, #-18]
20136
+ ldrh r3, [r5, #2]
20137
+ mov r1, r6
20138
+ mov r2, fp
20139
+ str r3, [sp, #12]
1978820140 bl printk
19789
- ldrh r2, [r5, #-220]
19790
- ldrh r0, [r8, #2]
20141
+ ldrh r2, [r4, #-224]
20142
+ ldrh r0, [r4, #-18]
20143
+ ldr r3, [sp, #12]
1979120144 sub r2, r2, #1
19792
- ldr fp, .L3318+16
1979320145 cmp r0, r2
19794
- ldr r3, [sp, #8]
19795
- ldr ip, [sp, #12]
19796
- blt .L3307
19797
- ldr r4, [fp, #1176]
19798
- ldrb r2, [r7, #537] @ zero_extendqisi2
19799
- ldr r3, [r4, #4]
19800
- mov r0, r4
20146
+ blt .L3263
20147
+ ldr r6, [r5, #1040]
20148
+ ldrb r2, [r4, #-19] @ zero_extendqisi2
20149
+ strh r10, [r4, #-18] @ movhi
20150
+ ldr r3, [r6, #4]
20151
+ mov r0, r6
1980120152 add r3, r3, #1
19802
- str r3, [r4, #4]
19803
- ldrb r3, [r7, #536] @ zero_extendqisi2
19804
- strb r2, [r7, #536]
19805
- ldrh r2, [r4, #16]
19806
- strb r3, [r7, #537]
19807
- mov r3, #0
19808
- add r2, r2, #1
19809
- strh r2, [r0, #16]! @ movhi
19810
- ldr r1, [r4, #8]
19811
- strh r3, [r8, #2] @ movhi
19812
- str r3, [sp, #8]
20153
+ str r3, [r6, #4]
20154
+ ldrb r3, [r4, #-20] @ zero_extendqisi2
20155
+ strb r2, [r4, #-20]
20156
+ strb r3, [r4, #-19]
20157
+ ldrh r3, [r6, #16]
20158
+ add r3, r3, #1
20159
+ strh r3, [r0, #16]! @ movhi
20160
+ ldr r1, [r6, #8]
1981320161 bl js_hash
19814
- ldrb r2, [r7, #536] @ zero_extendqisi2
19815
- str r0, [r4, #12]
19816
- ldr r3, [sp, #8]
19817
- ldrh r4, [fp, #2]
19818
- mov r0, r3
19819
- mul r4, r4, r2
19820
- b .L3316
19821
-.L3307:
19822
- cmp r0, #0
19823
- mla r4, ip, r3, r4
19824
- bne .L3308
19825
-.L3316:
19826
- mov r1, r4
19827
- bl flash_erase_block
19828
-.L3308:
19829
- ldr r2, [r6, #1176]
19830
- mov fp, #1
19831
- ldr r3, [r5, #532]
20162
+ ldrb r3, [r4, #-20] @ zero_extendqisi2
20163
+ str r0, [r6, #12]
1983220164 mov r0, #0
19833
- mov r1, r4
20165
+ ldrh r6, [r5, #2]
20166
+ mul r6, r6, r3
20167
+ mov r1, r6
20168
+.L3272:
20169
+ bl flash_erase_block
20170
+.L3264:
20171
+ ldr r2, [r5, #1040]
20172
+ mov fp, #1
20173
+ ldr r3, [r4, #-24]
20174
+ mov r1, r6
20175
+ mov r0, #0
1983420176 ldr r2, [r2, #4]
1983520177 str r2, [r3]
19836
- ldr r2, .L3318+28
19837
- ldr r3, [r5, #532]
19838
- str r2, [r3, #4]
1983920178 mov r2, #4
19840
- stmia sp, {r2, fp}
19841
- ldr r2, [r6, #1176]
20179
+ ldr r3, [r4, #-24]
20180
+ str r8, [r3, #4]
20181
+ stm sp, {r2, fp}
20182
+ ldr r2, [r5, #1040]
1984220183 bl flash_prog_page_en
19843
- ldrh r3, [r10, #2]
19844
- add r3, r3, fp
19845
- strh r3, [r10, #2] @ movhi
20184
+ ldrh r3, [r4, #-18]
1984620185 cmn r0, #1
19847
- bne .L3309
19848
- mov r1, r4
19849
- ldr r0, .L3318+32
20186
+ add r3, r3, fp
20187
+ strh r3, [r4, #-18] @ movhi
20188
+ bne .L3265
20189
+ mov r1, r6
20190
+ ldr r0, .L3273+32
1985020191 bl printk
19851
- b .L3306
19852
-.L3309:
19853
- cmp r9, #0
19854
- moveq r9, fp
19855
- beq .L3306
19856
-.L3317:
20192
+ b .L3262
20193
+.L3267:
20194
+ mov r7, fp
20195
+ b .L3262
20196
+.L3263:
20197
+ cmp r0, #0
20198
+ mla r6, r6, r3, fp
20199
+ bne .L3264
20200
+ mov r1, r6
20201
+ b .L3272
20202
+.L3265:
20203
+ cmp r7, #0
20204
+ beq .L3267
1985720205 mov r0, #0
1985820206 add sp, sp, #20
1985920207 @ sp needed
19860
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
19861
-.L3319:
20208
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
20209
+.L3274:
1986220210 .align 2
19863
-.L3318:
20211
+.L3273:
1986420212 .word .LANCHOR2
19865
- .word .LC138
19866
- .word .LANCHOR1+2456
20213
+ .word .LANCHOR1+2247
20214
+ .word .LC135
1986720215 .word .LANCHOR3
1986820216 .word .LANCHOR0
1986920217 .word .LC207
19870
- .word .LC208
20218
+ .word .LC206
1987120219 .word 1398362953
19872
- .word .LC209
20220
+ .word .LC208
1987320221 .fnend
1987420222 .size flash_info_flush, .-flash_info_flush
1987520223 .align 2
1987620224 .global flash_info_blk_init
20225
+ .syntax unified
20226
+ .arm
20227
+ .fpu softvfp
1987720228 .type flash_info_blk_init, %function
1987820229 flash_info_blk_init:
1987920230 .fnstart
19880
- @ args = 0, pretend = 0, frame = 8
20231
+ @ args = 0, pretend = 0, frame = 0
1988120232 @ frame_needed = 0, uses_anonymous_args = 0
19882
- ldr r3, .L3353
19883
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20233
+ ldr r3, .L3307
20234
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
1988420235 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
19885
- .pad #20
19886
- sub sp, sp, #20
20236
+ .pad #12
20237
+ ldr r4, .L3307+4
1988720238 ldr r3, [r3]
19888
- ldr r6, .L3353+4
1988920239 tst r3, #4096
19890
- beq .L3321
19891
- ldr r3, [r6, #1176]
20240
+ beq .L3276
20241
+ ldr r3, [r4, #1040]
1989220242 mov r1, #50
19893
- ldr r0, .L3353+8
19894
- ldr r2, .L3353+12
20243
+ ldr r2, .L3307+8
20244
+ ldr r0, .L3307+12
1989520245 str r3, [sp]
1989620246 mov r3, #2048
1989720247 bl printk
19898
-.L3321:
19899
- ldr ip, .L3353+4
20248
+.L3276:
20249
+ ldr r5, .L3307+16
1990020250 mov r7, #4
19901
- ldr fp, .L3353+16
19902
-.L3322:
19903
- mov r5, #0
19904
-.L3325:
19905
- ldrh r1, [r6, #2]
19906
- mov r8, #4
19907
- ldr r4, .L3353+20
20251
+ ldr r8, .L3307+20
20252
+.L3280:
20253
+ mov r6, #0
20254
+.L3279:
20255
+ ldrh r1, [r4, #2]
20256
+ mov r9, #4
20257
+ str r9, [sp]
1990820258 mov r0, #0
19909
- str r8, [sp]
19910
- mla r1, r1, r7, r5
19911
- ldr r2, [r6, #1176]
19912
- ldr r3, [r4, #532]
19913
- str ip, [sp, #12]
20259
+ ldr r3, [r5, #-24]
20260
+ ldr r2, [r4, #1040]
20261
+ mla r1, r7, r1, r6
1991420262 bl flash_read_page_en
19915
- ldr r9, .L3353+4
1991620263 cmn r0, #1
19917
- ldr ip, [sp, #12]
19918
- beq .L3323
19919
- ldr r2, [ip, #1176]
19920
- ldr r10, .L3353+16
20264
+ beq .L3277
20265
+ ldr r2, [r4, #1040]
1992120266 ldr r3, [r2]
19922
- cmp r3, fp
19923
- beq .L3324
19924
-.L3323:
19925
- add r5, r5, #1
19926
- cmp r5, #4
19927
- bne .L3325
20267
+ cmp r3, r8
20268
+ beq .L3278
20269
+.L3277:
20270
+ add r6, r6, #1
20271
+ cmp r6, #4
20272
+ bne .L3279
1992820273 add r7, r7, #1
1992920274 cmp r7, #16
19930
- bne .L3322
19931
- b .L3334
19932
-.L3324:
19933
- ldrb r1, [r2, #37] @ zero_extendqisi2
20275
+ bne .L3280
20276
+.L3306:
20277
+ mvn r0, #0
20278
+.L3275:
20279
+ add sp, sp, #12
20280
+ @ sp needed
20281
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
20282
+.L3287:
20283
+ str r9, [sp]
20284
+ sub r1, r10, r7
20285
+ ldr r3, [r5, #-24]
1993420286 mov r0, #0
19935
- ldrb r3, [r2, #36] @ zero_extendqisi2
19936
- strb r1, [r4, #537]
19937
- ldrh r1, [r9, #2]
19938
- strb r3, [r4, #536]
19939
- str r8, [sp]
19940
- mul r1, r1, r3
19941
- ldr r3, [r4, #532]
20287
+ ldr r2, [r4, #1040]
1994220288 bl flash_read_page_en
1994320289 cmn r0, #1
19944
- beq .L3335
19945
- ldr r3, [r9, #1176]
20290
+ beq .L3285
20291
+ ldr r3, [r4, #1040]
20292
+ ldr r3, [r3]
20293
+ cmp r3, r8
20294
+ beq .L3286
20295
+.L3285:
20296
+ add r7, r7, #1
20297
+ b .L3284
20298
+.L3286:
20299
+ cmp r7, #1
20300
+ bls .L3290
20301
+ bl flash_info_flush
20302
+.L3290:
20303
+ mov r0, #0
20304
+ b .L3275
20305
+.L3278:
20306
+ ldrb r1, [r2, #36] @ zero_extendqisi2
20307
+ ldrh r0, [r4, #2]
20308
+ ldrb r3, [r2, #37] @ zero_extendqisi2
20309
+ strb r1, [r5, #-20]
20310
+ str r9, [sp]
20311
+ strb r3, [r5, #-19]
20312
+ mul r1, r1, r0
20313
+ ldr r3, [r5, #-24]
20314
+ mov r0, #0
20315
+ bl flash_read_page_en
20316
+ cmn r0, #1
20317
+ beq .L3289
20318
+ ldr r3, [r4, #1040]
1994620319 ldr r2, [r3]
19947
- cmp r2, fp
19948
- ldreq r5, [r3, #4]
19949
- bne .L3335
19950
-.L3327:
19951
- ldrb r3, [r4, #537] @ zero_extendqisi2
19952
- mov r2, #4
19953
- ldrh r1, [r6, #2]
20320
+ cmp r2, r8
20321
+ ldreq r6, [r3, #4]
20322
+ beq .L3282
20323
+.L3289:
20324
+ mov r6, #0
20325
+.L3282:
20326
+ ldrh r0, [r4, #2]
20327
+ mov r3, #4
20328
+ ldrb r1, [r5, #-19] @ zero_extendqisi2
20329
+ str r3, [sp]
20330
+ ldr r2, [r4, #1040]
20331
+ ldr r3, [r5, #-24]
20332
+ mul r1, r0, r1
1995420333 mov r0, #0
19955
- str r2, [sp]
19956
- ldr r2, [r6, #1176]
19957
- mul r1, r1, r3
19958
- ldr r3, [r4, #532]
1995920334 bl flash_read_page_en
19960
- ldr r7, .L3353+20
1996120335 cmn r0, #1
19962
- bne .L3352
19963
-.L3328:
19964
- ldr r2, [r6, #1176]
19965
- mov r8, #4
19966
- ldr r3, [r4, #532]
20336
+ beq .L3283
20337
+ ldr r3, [r4, #1040]
20338
+ ldr r2, [r3]
20339
+ cmp r2, r8
20340
+ bne .L3283
20341
+ ldr r2, [r3, #4]
20342
+ cmp r6, r2
20343
+ ldrbcc r2, [r3, #37] @ zero_extendqisi2
20344
+ ldrbcc r3, [r3, #36] @ zero_extendqisi2
20345
+ strbcc r2, [r5, #-20]
20346
+ strbcc r3, [r5, #-19]
20347
+.L3283:
20348
+ mov r9, #4
20349
+ ldr r3, [r5, #-24]
20350
+ ldrb r1, [r5, #-20] @ zero_extendqisi2
1996720351 mov r0, #0
19968
- ldrb r1, [r4, #536] @ zero_extendqisi2
20352
+ str r9, [sp]
1996920353 mov r7, #0
19970
- str r8, [sp]
20354
+ ldr r2, [r4, #1040]
1997120355 bl flash_get_last_written_page
19972
- ldr r3, .L3353+24
19973
- ldrh r9, [r6, #2]
19974
- ldr ip, .L3353+4
1997520356 uxth fp, r0
19976
- add r2, fp, #1
19977
- strh r2, [r3, #2] @ movhi
19978
- ldrb r3, [r4, #536] @ zero_extendqisi2
19979
- mla r9, r9, r3, r0
19980
-.L3329:
19981
- rsb r5, r7, fp
19982
- sxth r5, r5
19983
- cmp r5, #0
19984
- bge .L3332
19985
- cmn r5, #1
19986
- bne .L3331
19987
- ldr r3, [r6, #1176]
19988
- ldr r0, .L3353+28
20357
+ ldrb r10, [r5, #-20] @ zero_extendqisi2
20358
+ add r3, fp, #1
20359
+ strh r3, [r5, #-18] @ movhi
20360
+ ldrh r3, [r4, #2]
20361
+ mla r10, r3, r10, r0
20362
+.L3284:
20363
+ sub r0, fp, r7
20364
+ sxth r6, r0
20365
+ cmp r6, #0
20366
+ bge .L3287
20367
+ cmn r6, #1
20368
+ bne .L3286
20369
+ ldr r3, [r4, #1040]
20370
+ ldr r0, .L3307+24
1998920371 ldr r1, [r3]
1999020372 bl printk
19991
-.L3334:
19992
- mvn r0, #0
19993
- b .L3350
19994
-.L3335:
19995
- mov r5, #0
19996
- b .L3327
19997
-.L3352:
19998
- ldr r3, .L3353+4
19999
- ldr r3, [r3, #1176]
20000
- ldr r2, [r3]
20001
- cmp r2, r10
20002
- bne .L3328
20003
- ldr r2, [r3, #4]
20004
- cmp r5, r2
20005
- ldrccb r2, [r3, #37] @ zero_extendqisi2
20006
- ldrccb r3, [r3, #36] @ zero_extendqisi2
20007
- strccb r2, [r7, #536]
20008
- strccb r3, [r7, #537]
20009
- b .L3328
20010
-.L3332:
20011
- str r8, [sp]
20012
- mov r0, #0
20013
- rsb r1, r7, r9
20014
- ldr r2, [r6, #1176]
20015
- ldr r3, [r4, #532]
20016
- str ip, [sp, #12]
20017
- bl flash_read_page_en
20018
- cmn r0, #1
20019
- ldr ip, [sp, #12]
20020
- beq .L3330
20021
- ldr r3, [ip, #1176]
20022
- ldr r3, [r3]
20023
- cmp r3, r10
20024
- beq .L3331
20025
-.L3330:
20026
- add r7, r7, #1
20027
- b .L3329
20028
-.L3331:
20029
- cmp r7, #1
20030
- bls .L3336
20031
- bl flash_info_flush
20032
-.L3336:
20033
- mov r0, #0
20034
-.L3350:
20035
- add sp, sp, #20
20036
- @ sp needed
20037
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
20038
-.L3354:
20373
+ b .L3306
20374
+.L3308:
2003920375 .align 2
20040
-.L3353:
20376
+.L3307:
2004120377 .word .LANCHOR2
2004220378 .word .LANCHOR0
20043
- .word .LC210
20044
- .word .LANCHOR1+2476
20045
- .word 1398362953
20379
+ .word .LANCHOR1+2264
20380
+ .word .LC209
2004620381 .word .LANCHOR3
20047
- .word .LANCHOR3+536
20048
- .word .LC211
20382
+ .word 1398362953
20383
+ .word .LC210
2004920384 .fnend
2005020385 .size flash_info_blk_init, .-flash_info_blk_init
2005120386 .align 2
2005220387 .global nand_flash_init
20388
+ .syntax unified
20389
+ .arm
20390
+ .fpu softvfp
2005320391 .type nand_flash_init, %function
2005420392 nand_flash_init:
2005520393 .fnstart
2005620394 @ args = 0, pretend = 0, frame = 0
2005720395 @ frame_needed = 0, uses_anonymous_args = 0
20058
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
20396
+ push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2005920397 .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2006020398 mov r4, r0
20061
- ldr r6, .L3451
20399
+ ldr r6, .L3395
2006220400 ldr r3, [r6]
2006320401 tst r3, #4096
20064
- beq .L3356
20065
- ldr r0, .L3451+4
20402
+ beq .L3310
20403
+ ldr r2, .L3395+4
2006620404 movw r1, #3450
20067
- ldr r2, .L3451+8
20405
+ ldr r0, .L3395+8
2006820406 bl printk
20069
-.L3356:
20070
- ldr r5, .L3451+12
20071
- mov r0, r4
20407
+.L3310:
20408
+ ldr r5, .L3395+12
2007220409 mov r7, #0
20073
- ldr r4, .L3451+16
20074
- str r7, [r5, #-112]
20410
+ mov r0, r4
20411
+ ldr r4, .L3395+16
20412
+ ldr r9, .L3395+20
20413
+ mov fp, #44
20414
+ str r7, [r5, #-104]
2007520415 bl nandc_init
20076
- ldr r3, .L3451+20
20077
- mov r1, r7
20416
+ ldr r3, .L3395+24
2007820417 mov r2, #8
20079
- ldr r0, .L3451+24
20080
- add r10, r4, #1200
20081
- mov r9, r4
20082
- str r3, [r4, #1096]
20083
- mov r3, #1
20084
- strb r3, [r4, #1101]
20085
- mov r3, #3
20086
- strb r3, [r4, #1189]
20087
- bl ftl_memset
20088
- sub r0, r5, #216
2008920418 mov r1, r7
20090
- mov r2, #32
20091
- mov fp, r10
20419
+ ldr r0, .L3395+28
20420
+ mov r10, r9
20421
+ str r3, [r4, #1104]
20422
+ mov r3, #1
20423
+ strb r3, [r4, #1109]
20424
+ mov r3, #3
20425
+ strb r3, [r4, #1153]
2009220426 bl ftl_memset
20093
-.L3362:
20094
- mov r8, r7, asl #3
20427
+ mov r2, #32
20428
+ mov r1, r7
20429
+ sub r0, r5, #220
20430
+ bl ftl_memset
20431
+.L3316:
20432
+ lsl r8, r7, #3
2009520433 uxtb r0, r7
20096
- add r1, r10, r8
20434
+ add r1, r9, r8
2009720435 bl flash_read_id
2009820436 cmp r7, #0
20099
- ldr r1, .L3451+28
20100
- bne .L3357
20101
- ldrb r3, [r9, #1200] @ zero_extendqisi2
20437
+ bne .L3311
20438
+ ldrb r3, [r4, #1160] @ zero_extendqisi2
2010220439 sub r3, r3, #1
2010320440 uxtb r3, r3
2010420441 cmp r3, #253
20105
- bls .L3358
20106
-.L3360:
20442
+ bls .L3312
20443
+.L3314:
2010720444 mvn r7, #1
20108
- b .L3440
20109
-.L3358:
20110
- ldrb r3, [r9, #1201] @ zero_extendqisi2
20445
+.L3309:
20446
+ mov r0, r7
20447
+ pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
20448
+.L3312:
20449
+ ldrb r3, [r4, #1161] @ zero_extendqisi2
2011120450 cmp r3, #255
20112
- beq .L3360
20113
-.L3357:
20114
- ldrb r3, [fp, r8] @ zero_extendqisi2
20451
+ beq .L3314
20452
+.L3311:
20453
+ ldrb r3, [r8, r10] @ zero_extendqisi2
2011520454 add r7, r7, #1
2011620455 cmp r3, #181
20117
- ldreq r3, .L3451+28
20118
- moveq r2, #44
20119
- streqb r2, [r8, r3]
20456
+ strbeq fp, [r8, r10]
2012020457 cmp r7, #4
20121
- bne .L3362
20122
- ldr ip, .L3451+32
20123
- mov r3, #0
20124
-.L3400:
20125
- mov r0, r3, asl #5
20126
- ldrb r8, [ip, r3, asl #5] @ zero_extendqisi2
20127
- add r7, r0, #1
20128
- ldr lr, .L3451+32
20129
- add r7, ip, r7
20130
- mov r2, #0
20131
-.L3363:
20132
- cmp r2, r8
20133
- bcs .L3450
20134
- ldrb r10, [r7, r2] @ zero_extendqisi2
20135
- ldrb r9, [r1, r2] @ zero_extendqisi2
20136
- cmp r10, r9
20137
- bne .L3364
20138
- add r2, r2, #1
20139
- b .L3363
20140
-.L3450:
20141
- adds r8, lr, r0
20142
- beq .L3360
20143
- ldr r3, .L3451
20144
- ldr r2, .L3451+36
20145
- add r0, r3, r0
20146
- mov r3, #0
20147
- ldrb r1, [r0, #446] @ zero_extendqisi2
20148
-.L3368:
20149
- ldrb r0, [r2, r3, asl #5] @ zero_extendqisi2
20150
- cmp r0, r1
20151
- beq .L3367
20152
- add r3, r3, #1
20153
- cmp r3, #4
20154
- bne .L3368
20155
-.L3367:
20156
- ldr r1, .L3451+36
20458
+ bne .L3316
20459
+ ldr r9, .L3395+32
20460
+ mov r7, #0
20461
+ ldr r10, .L3395+20
20462
+.L3319:
20463
+ lsl r8, r7, #5
20464
+ ldrb r2, [r9, r7, lsl #5] @ zero_extendqisi2
20465
+ mov r1, r10
20466
+ add r0, r8, #1
20467
+ add r0, r9, r0
20468
+ bl flash_mem_cmp8
20469
+ cmp r0, #0
20470
+ bne .L3317
20471
+ add r9, r9, r8
20472
+ ldr r3, .L3395+36
20473
+ add r8, r6, r8
20474
+ ldrb r2, [r8, #440] @ zero_extendqisi2
20475
+ mov r1, r3
20476
+.L3318:
20477
+ ldrb ip, [r3, r0, lsl #5] @ zero_extendqisi2
20478
+ cmp ip, r2
20479
+ beq .L3320
20480
+ add r0, r0, #1
20481
+ cmp r0, #4
20482
+ bne .L3318
20483
+.L3320:
20484
+ add r1, r1, r0, lsl #5
2015720485 mov r2, #32
20158
- ldr r7, .L3451
20159
- add r1, r1, r3, asl #5
20160
- ldr r0, .L3451+40
20486
+ ldr r0, .L3395+40
2016120487 bl ftl_memcpy
20162
- add r0, r7, #4
20163
- mov r1, r8
2016420488 mov r2, #32
20489
+ mov r1, r9
20490
+ ldr r0, .L3395+24
2016520491 bl ftl_memcpy
2016620492 ldrb r3, [r4, #1028] @ zero_extendqisi2
2016720493 cmp r3, #8
20168
- bhi .L3369
20169
- ldrb r2, [r7, #24] @ zero_extendqisi2
20494
+ bhi .L3321
20495
+ ldrb r2, [r6, #24] @ zero_extendqisi2
2017020496 cmp r2, #60
2017120497 movhi r2, #60
20172
- strhib r2, [r7, #24]
20498
+ strbhi r2, [r6, #24]
2017320499 cmp r3, #6
20174
- beq .L3360
20175
-.L3369:
20500
+ beq .L3314
20501
+.L3321:
2017620502 ldr r3, [r6]
2017720503 tst r3, #4096
20178
- beq .L3371
20179
- ldr r0, .L3451+4
20504
+ beq .L3323
20505
+ ldr r2, .L3395+4
2018020506 movw r1, #3480
20181
- ldr r2, .L3451+8
20507
+ ldr r0, .L3395+8
2018220508 bl printk
20183
-.L3371:
20184
- ldr r3, [r4, #1096]
20509
+.L3323:
20510
+ ldr r3, [r4, #1104]
2018520511 mov r0, #16384
2018620512 mov r7, #0
2018720513 ldrh r3, [r3, #10]
2018820514 cmp r3, #1024
20189
- ldrcs r3, .L3451+16
20190
- movcs r2, #2
20191
- strcsb r2, [r3, #1189]
20515
+ movcs r3, #2
20516
+ strbcs r3, [r4, #1153]
2019220517 bl ftl_malloc
20193
- str r0, [r5, #-104]
20518
+ str r0, [r5, #-92]
2019420519 mov r0, #16384
2019520520 bl ftl_malloc
20196
- str r0, [r5, #-128]
20197
- mov r0, #2048
20198
- bl ftl_malloc
20199
- str r0, [r4, #1176]
20200
- mov r0, #64
20201
- bl ftl_malloc
20202
- str r0, [r5, #-100]
20203
- mov r0, #64
20204
- bl ftl_malloc
2020520521 str r0, [r5, #-120]
20522
+ mov r0, #2048
20523
+ bl ftl_dma32_malloc
20524
+ str r0, [r4, #1040]
2020620525 mov r0, #64
20207
- bl ftl_malloc
20208
- strb r7, [r5, #540]
20209
- str r0, [r5, #532]
20526
+ bl ftl_dma32_malloc
20527
+ str r0, [r5, #-96]
20528
+ mov r0, #64
20529
+ bl ftl_dma32_malloc
20530
+ str r0, [r5, #-112]
20531
+ mov r0, #64
20532
+ bl ftl_dma32_malloc
20533
+ strb r7, [r5, #-16]
20534
+ str r0, [r5, #-24]
2021020535 bl flash_die_info_init
2021120536 ldrb r0, [r6, #22] @ zero_extendqisi2
2021220537 bl flash_lsb_page_tbl_build
2021320538 ldrb r0, [r6, #24] @ zero_extendqisi2
2021420539 bl nandc_bch_sel
20215
- ldr r1, [r4, #1096]
20216
- str r7, [r5, #-108]
20540
+ ldr r1, [r4, #1104]
20541
+ str r7, [r5, #-100]
2021720542 ldrh r3, [r1, #16]
2021820543 ubfx r2, r3, #8, #3
20219
- strb r2, [r4, #1232]
20544
+ strb r2, [r4, #1192]
2022020545 ubfx r2, r3, #3, #1
20221
- strb r2, [r5, #-88]
20546
+ strb r2, [r5, #-80]
2022220547 ubfx r2, r3, #4, #1
20223
- strb r2, [r4, #1233]
20548
+ strb r2, [r4, #1194]
2022420549 ubfx r2, r3, #12, #1
20225
- strb r2, [r5, #-3116]
20550
+ strb r2, [r5, #-3120]
2022620551 ubfx r2, r3, #13, #1
20227
- strb r2, [r5, #-3122]
20552
+ strb r2, [r5, #-3126]
2022820553 ubfx r2, r3, #11, #1
20229
- strb r2, [r4, #1196]
20554
+ strb r2, [r4, #1158]
2023020555 ldrb r2, [r1, #31] @ zero_extendqisi2
2023120556 ldrb r1, [r1, #28] @ zero_extendqisi2
2023220557 ubfx r0, r2, #1, #1
20233
- strb r0, [r5, #-2536]
20558
+ strb r0, [r5, #-2542]
2023420559 ubfx r0, r2, #2, #1
20235
- strb r0, [r5, #541]
20560
+ strb r0, [r5, #-15]
2023620561 ubfx r0, r3, #14, #1
20237
- mov r3, r3, lsr #15
20238
- strb r3, [r5, #-3121]
20562
+ lsr r3, r3, #15
20563
+ strb r0, [r4, #1]
20564
+ strb r1, [r4]
20565
+ strb r3, [r5, #-3125]
2023920566 ubfx r3, r2, #3, #1
20240
- strb r3, [r4, #1188]
20567
+ strb r3, [r4, #1152]
2024120568 mov r3, #60
20242
- strb r3, [r4, #1100]
20569
+ strb r3, [r4, #1108]
2024320570 ubfx r2, r2, #4, #1
2024420571 ldrb r3, [r4, #1028] @ zero_extendqisi2
20245
- strb r2, [r4, #1197]
20572
+ strb r2, [r4, #1159]
20573
+ strb r1, [r4, #1110]
2024620574 cmp r3, #9
20247
- strb r1, [r4]
20248
- strb r1, [r4, #1102]
20249
- ldreq r2, .L3451+16
20250
- ldrb r1, [r6, #35] @ zero_extendqisi2
20251
- strb r0, [r4, #1]
20252
- moveq r0, #70
20253
- streqb r0, [r2, #1100]
20254
- tst r1, #1
20255
- ldr r2, .L3451+16
20256
- beq .L3374
20257
- ldr r1, .L3451
20258
- ldrb r1, [r1, #33] @ zero_extendqisi2
20259
- cmp r1, #0
20260
- movne r1, #2
20261
- moveq r1, #3
20262
- strb r1, [r2, #1102]
20263
-.L3374:
20575
+ moveq r2, #70
20576
+ strbeq r2, [r4, #1108]
20577
+ ldrb r2, [r6, #35] @ zero_extendqisi2
20578
+ tst r2, #1
20579
+ beq .L3326
20580
+ ldrb r2, [r6, #33] @ zero_extendqisi2
20581
+ cmp r2, #0
20582
+ movne r2, #2
20583
+ moveq r2, #3
20584
+ strb r2, [r4, #1110]
20585
+.L3326:
2026420586 cmp r3, #8
20265
- bne .L3376
20266
- ldrb r3, [r4, #1200] @ zero_extendqisi2
20267
- cmp r3, #44
20268
- cmpne r3, #137
20269
- bne .L3376
20587
+ bne .L3328
20588
+ ldrb r3, [r4, #1160] @ zero_extendqisi2
20589
+ cmp r3, #137
20590
+ cmpne r3, #44
20591
+ bne .L3328
2027020592 ldrb r3, [r6, #32] @ zero_extendqisi2
2027120593 cmp r3, #3
20272
- ldreq r3, .L3451+16
20273
- moveq r2, #0
20274
- streqb r2, [r3, #1102]
20275
-.L3376:
20594
+ moveq r3, #0
20595
+ strbeq r3, [r4, #1110]
20596
+.L3328:
2027620597 ldrh r2, [r6, #20]
2027720598 ldrb r3, [r6, #23] @ zero_extendqisi2
2027820599 tst r2, #64
20279
- ldr r0, .L3451+16
20280
- strb r3, [r4, #1173]
20281
- beq .L3378
20600
+ strb r3, [r4, #1100]
20601
+ beq .L3330
2028220602 sub r2, r3, #17
20283
- sub r1, r3, #21
20284
- clz r1, r1
2028520603 cmp r3, #21
2028620604 cmpne r2, #2
20287
- mov r1, r1, lsr #5
20288
- bhi .L3379
20289
- ldr r2, .L3451+44
20290
- cmp r1, #0
20291
- ldr r3, .L3451+12
20292
- str r2, [r5, #-108]
20293
- moveq r2, #15
20294
- movne r2, #4
20295
- strb r2, [r3, #-116]
20296
- b .L3378
20297
-.L3379:
20298
- sub r2, r3, #65
20299
- cmp r3, #33
20300
- cmpne r2, #1
20301
- ldrls r3, .L3451+48
20302
- strls r3, [r5, #-108]
20303
- movls r3, #4
20304
- strlsb r3, [r0, #1174]
20305
- bls .L3449
20306
-.L3382:
20307
- sub r1, r3, #67
20308
- sub r2, r3, #34
20309
- cmp r1, #1
20310
- sub ip, r3, #35
20311
- sub lr, r3, #68
20312
- clz ip, ip
20313
- movhi r1, #0
20314
- movls r1, #1
20315
- cmp r2, #1
20316
- movhi r2, r1
20317
- orrls r2, r1, #1
20318
- clz lr, lr
20319
- cmp r2, #0
20320
- mov ip, ip, lsr #5
20321
- mov lr, lr, lsr #5
20322
- beq .L3383
20323
- ldr r2, .L3451+48
20324
- ldr r3, .L3451+12
20325
- str r2, [r5, #-108]
20326
- orrs r2, lr, ip
20327
- moveq r2, #7
20328
- movne r2, #17
20329
- cmp r1, #0
20330
- strb r2, [r3, #-116]
20331
- movne r3, #4
20332
- moveq r3, #5
20333
- strb r3, [r4, #1174]
20334
- b .L3378
20335
-.L3383:
20336
- sub r1, r3, #36
20337
- cmp r1, #1
20338
- bhi .L3387
20339
- ldr r3, .L3451+52
20340
- str r3, [r5, #-108]
20341
-.L3449:
20342
- mov r3, #7
20343
- b .L3447
20344
-.L3387:
20345
- cmp r3, #50
20346
- bne .L3388
20347
- ldr r3, .L3451+56
20348
- str r3, [r5, #-108]
20349
- mov r3, #25
20350
-.L3447:
20351
- strb r3, [r5, #-116]
20352
- b .L3378
20353
-.L3388:
20354
- cmp r3, #81
20355
- streqb r2, [r0, #1136]
20356
- ldreq r3, .L3451+60
20357
- streq r3, [r5, #-108]
20358
- moveq r3, #7
20359
- streqb r3, [r5, #-116]
20360
-.L3378:
20605
+ bhi .L3331
20606
+ cmp r3, #21
20607
+ ldr r2, .L3395+44
20608
+ movne r3, #15
20609
+ moveq r3, #4
20610
+ str r2, [r5, #-100]
20611
+.L3391:
20612
+ strb r3, [r5, #-108]
20613
+.L3330:
2036120614 ldr r3, [r6]
2036220615 tst r3, #4096
20363
- beq .L3389
20364
- ldr r0, .L3451+4
20616
+ beq .L3341
20617
+ ldr r2, .L3395+4
2036520618 movw r1, #3573
20366
- ldr r2, .L3451+8
20619
+ ldr r0, .L3395+8
2036720620 bl printk
20368
-.L3389:
20621
+.L3341:
2036920622 mov r3, #0
20370
- strb r3, [r4, #1135]
20371
- ldrb r3, [r4, #1232] @ zero_extendqisi2
20623
+ strb r3, [r4, #1143]
20624
+ ldrb r3, [r4, #1192] @ zero_extendqisi2
2037220625 tst r3, #1
2037320626 moveq r0, #4
20374
- beq .L3448
20375
- ldr r3, .L3451+16
20376
- ldrb r3, [r3, #1200] @ zero_extendqisi2
20627
+ beq .L3393
20628
+ ldrb r3, [r4, #1160] @ zero_extendqisi2
2037720629 cmp r3, #155
20378
- beq .L3391
20630
+ beq .L3343
2037920631 mov r0, #4
2038020632 bl flash_set_interface_mode
2038120633 mov r0, #4
2038220634 bl nandc_set_if_mode
20383
-.L3391:
20635
+.L3343:
2038420636 mov r0, #1
2038520637 bl flash_set_interface_mode
2038620638 mov r0, #1
20387
-.L3448:
20639
+.L3393:
2038820640 bl nandc_set_if_mode
2038920641 bl flash_info_blk_init
2039020642 cmn r0, #1
2039120643 mov r7, r0
20392
- bne .L3393
20393
- ldr r3, [r4, #1176]
20644
+ bne .L3345
20645
+ ldr r3, [r4, #1040]
2039420646 mov r2, #17
2039520647 mov r0, #0
20396
- strb r0, [r4, #1192]
20648
+ strb r0, [r4, #1154]
2039720649 strb r2, [r3, #32]
2039820650 bl zftl_flash_exit_slc_mode
20399
- b .L3440
20400
-.L3393:
20651
+ b .L3309
20652
+.L3317:
20653
+ add r7, r7, #1
20654
+ cmp r7, #49
20655
+ bne .L3319
20656
+ b .L3314
20657
+.L3331:
20658
+ sub r2, r3, #65
20659
+ cmp r3, #33
20660
+ cmpne r2, #1
20661
+ bhi .L3334
20662
+ ldr r3, .L3395+48
20663
+ str r3, [r5, #-100]
20664
+ mov r3, #4
20665
+ strb r3, [r4, #1101]
20666
+.L3394:
20667
+ mov r3, #7
20668
+ b .L3391
20669
+.L3334:
20670
+ sub r2, r3, #67
20671
+ sub r1, r3, #34
20672
+ uxtb r2, r2
20673
+ cmp r2, #1
20674
+ cmphi r1, #1
20675
+ movls r1, #1
20676
+ movhi r1, #0
20677
+ bhi .L3335
20678
+ cmp r3, #68
20679
+ cmpne r3, #35
20680
+ ldr r1, .L3395+48
20681
+ movne r3, #7
20682
+ moveq r3, #17
20683
+ cmp r2, #1
20684
+ strb r3, [r5, #-108]
20685
+ movls r3, #4
20686
+ movhi r3, #5
20687
+ str r1, [r5, #-100]
20688
+ strb r3, [r4, #1101]
20689
+ b .L3330
20690
+.L3335:
20691
+ sub r2, r3, #36
20692
+ cmp r2, #1
20693
+ ldrls r3, .L3395+52
20694
+ strls r3, [r5, #-100]
20695
+ bls .L3394
20696
+.L3339:
20697
+ cmp r3, #50
20698
+ ldreq r3, .L3395+56
20699
+ streq r3, [r5, #-100]
20700
+ moveq r3, #25
20701
+ beq .L3391
20702
+.L3340:
20703
+ cmp r3, #81
20704
+ ldreq r3, .L3395+60
20705
+ strbeq r1, [r4, #1195]
20706
+ streq r3, [r5, #-100]
20707
+ moveq r3, #7
20708
+ strbeq r3, [r5, #-108]
20709
+ b .L3330
20710
+.L3345:
2040120711 ldrb r3, [r6, #11] @ zero_extendqisi2
2040220712 cmp r3, #9
20403
- bne .L3394
20404
- ldr r3, [r4, #1176]
20713
+ bne .L3346
20714
+ ldr r3, [r4, #1040]
2040520715 ldrb r3, [r3, #20] @ zero_extendqisi2
2040620716 cmp r3, #1
20407
- ldrne r3, .L3451+16
20408
- movne r2, #0
20409
- strneb r2, [r3, #1102]
20410
-.L3394:
20411
- ldrb r3, [r4, #1173] @ zero_extendqisi2
20412
- ldr r7, .L3451+16
20717
+ movne r3, #0
20718
+ strbne r3, [r4, #1110]
20719
+.L3346:
20720
+ ldrb r3, [r4, #1100] @ zero_extendqisi2
2041320721 sub r3, r3, #1
2041420722 cmp r3, #7
20415
- ldrls r3, .L3451+64
20416
- strls r3, [r5, #-108]
20417
- ldrb r3, [r4, #1232] @ zero_extendqisi2
20723
+ ldrls r3, .L3395+64
20724
+ strls r3, [r5, #-100]
20725
+ ldrb r3, [r4, #1192] @ zero_extendqisi2
2041820726 tst r3, #4
20419
- beq .L3397
20420
- ldr r3, [r7, #1176]
20727
+ beq .L3349
20728
+ ldr r3, [r4, #1040]
2042120729 ldrb r3, [r3, #19] @ zero_extendqisi2
2042220730 cmp r3, #0
20423
- beq .L3397
20424
- ldrb r3, [r5, #536] @ zero_extendqisi2
20731
+ beq .L3349
20732
+ ldrb r3, [r5, #-20] @ zero_extendqisi2
2042520733 mov r0, #0
20426
- ldrh r1, [r7, #2]
20734
+ ldrh r1, [r4, #2]
2042720735 mul r1, r1, r3
2042820736 bl flash_ddr_para_scan
20429
- ldrb r3, [r7, #1135] @ zero_extendqisi2
20737
+ ldrb r3, [r4, #1143] @ zero_extendqisi2
2043020738 cmp r3, #0
20431
- bne .L3397
20432
- ldr r2, [r7, #1176]
20739
+ bne .L3349
20740
+ ldr r2, [r4, #1040]
2043320741 strb r3, [r2, #19]
2043420742 bl flash_info_flush
20435
-.L3397:
20743
+.L3349:
2043620744 ldr r3, [r6]
2043720745 tst r3, #4096
20438
- beq .L3399
20439
- ldr r0, .L3451+4
20746
+ beq .L3351
20747
+ ldr r2, .L3395+4
2044020748 movw r1, #3676
20441
- ldr r2, .L3451+8
20749
+ ldr r0, .L3395+8
2044220750 bl printk
20443
-.L3399:
20751
+.L3351:
2044420752 bl nand_flash_print_info
2044520753 mov r7, #0
20446
- b .L3440
20447
-.L3364:
20448
- add r3, r3, #1
20449
- cmp r3, #49
20450
- bne .L3400
20451
- b .L3360
20452
-.L3440:
20453
- mov r0, r7
20454
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
20455
-.L3452:
20754
+ b .L3309
20755
+.L3396:
2045620756 .align 2
20457
-.L3451:
20757
+.L3395:
2045820758 .word .LANCHOR2
20459
- .word .LC138
20460
- .word .LANCHOR1+2496
20759
+ .word .LANCHOR1+2284
20760
+ .word .LC135
2046120761 .word .LANCHOR3
2046220762 .word .LANCHOR0
20763
+ .word .LANCHOR0+1160
2046320764 .word .LANCHOR2+4
20464
- .word .LANCHOR0+1180
20465
- .word .LANCHOR0+1200
20466
- .word .LANCHOR2+424
20467
- .word .LANCHOR2+1992
20468
- .word .LANCHOR0+1103
20765
+ .word .LANCHOR0+1144
20766
+ .word .LANCHOR2+418
20767
+ .word .LANCHOR2+1986
20768
+ .word .LANCHOR0+1111
2046920769 .word micron_read_retrial
2047020770 .word toshiba_read_retrial
2047120771 .word toshiba_3d_read_retrial
....@@ -20476,408 +20776,397 @@
2047620776 .size nand_flash_init, .-nand_flash_init
2047720777 .align 2
2047820778 .global ftl_sysblk_dump
20779
+ .syntax unified
20780
+ .arm
20781
+ .fpu softvfp
2047920782 .type ftl_sysblk_dump, %function
2048020783 ftl_sysblk_dump:
2048120784 .fnstart
2048220785 @ args = 0, pretend = 0, frame = 8
2048320786 @ frame_needed = 0, uses_anonymous_args = 0
20484
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20787
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2048520788 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20486
- mov fp, r0
20789
+ mov r9, r0
2048720790 .pad #52
2048820791 sub sp, sp, #52
2048920792 mov r0, #1
20793
+ mov r5, #0
20794
+ ldr r10, .L3408
20795
+ mov r6, r5
2049020796 bl buf_alloc
20491
- ldr r10, .L3465
20492
- mov r6, #0
20493
- mov r5, r6
20494
- ldr ip, [r0, #4]
20797
+ ldr r3, [r0, #4]
2049520798 mov r4, r0
20496
-.L3454:
20497
- ldrh r3, [r10]
20498
- uxth r8, r6
20499
- cmp r3, r8
20500
- bls .L3464
20501
- ldr r3, .L3465+4
20502
- add r6, r6, #1
20503
- ldr r1, [r4, #4]
20504
- ldr r2, [r4, #12]
20505
- ldrh r7, [r3]
20506
- ldr r3, .L3465+8
20507
- str ip, [sp, #44]
20508
- mla r7, r7, fp, r8
20509
- ldrb r3, [r3, #2772] @ zero_extendqisi2
20510
- mov r0, r7
20511
- bl ftl_read_ppa_page
20512
- ldr r2, [r4, #4]
20513
- ldr r3, [r4, #12]
20514
- str r0, [sp]
20515
- mov r9, r0
20516
- ldr r1, [r2]
20517
- ldr r0, .L3465+12
20518
- str r1, [sp, #4]
20519
- ldr r1, [r2, #4]
20520
- str r1, [sp, #8]
20521
- ldr r1, [r2, #8]
20522
- str r1, [sp, #12]
20523
- mov r1, fp
20524
- ldr r2, [r2, #12]
20525
- str r2, [sp, #16]
20526
- ldr r2, [r3]
20527
- str r2, [sp, #20]
20528
- ldr r2, [r3, #4]
20529
- str r2, [sp, #24]
20530
- ldr r2, [r3, #8]
20531
- str r2, [sp, #28]
20532
- mov r2, r8
20533
- ldr r3, [r3, #12]
20534
- str r3, [sp, #32]
20535
- mov r3, r7
20536
- bl printk
20537
- cmn r9, #1
20538
- cmpne r9, #512
20539
- moveq r5, #1
20540
- ldr ip, [sp, #44]
20541
- b .L3454
20542
-.L3464:
20543
- ldr r0, .L3465+16
20544
- add r1, ip, #704
20545
- mov r2, #4
20799
+ str r3, [sp, #44]
20800
+.L3398:
20801
+ ldr r3, .L3408+4
20802
+ ldrh r2, [r3, #-8]
20803
+ uxth r3, r5
20804
+ cmp r2, r3
20805
+ bhi .L3400
20806
+ ldr r1, [sp, #44]
2054620807 mov r3, #32
20808
+ mov r2, #4
20809
+ ldr r0, .L3408+8
20810
+ add r1, r1, #704
2054720811 bl rknand_print_hex
2054820812 mov r0, r4
2054920813 bl zbuf_free
20550
- cmp r5, #0
20551
- beq .L3457
20552
- ldr r1, .L3465+20
20814
+ cmp r6, #0
20815
+ beq .L3401
2055320816 movw r2, #1619
20554
- ldr r0, .L3465+24
20817
+ ldr r1, .L3408+12
20818
+ ldr r0, .L3408+16
2055520819 bl printk
2055620820 bl dump_stack
20557
-.L3457:
20558
- mov r0, r5
20821
+.L3401:
20822
+ mov r0, r6
2055920823 add sp, sp, #52
2056020824 @ sp needed
20561
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
20562
-.L3466:
20825
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
20826
+.L3400:
20827
+ ldr r3, .L3408+20
20828
+ uxth fp, r5
20829
+ ldr r2, [r4, #12]
20830
+ add r5, r5, #1
20831
+ ldr r1, [r4, #4]
20832
+ ldrh r7, [r3]
20833
+ ldrb r3, [r10, #-2546] @ zero_extendqisi2
20834
+ mla r7, r9, r7, fp
20835
+ mov r0, r7
20836
+ bl ftl_read_ppa_page
20837
+ ldr r2, [r4, #12]
20838
+ mov r8, r0
20839
+ ldr r3, [r4, #4]
20840
+ ldr r1, [r2, #12]
20841
+ str r1, [sp, #32]
20842
+ ldr r1, [r2, #8]
20843
+ str r1, [sp, #28]
20844
+ ldr r1, [r2, #4]
20845
+ str r1, [sp, #24]
20846
+ mov r1, r9
20847
+ ldr r2, [r2]
20848
+ str r2, [sp, #20]
20849
+ ldr r2, [r3, #12]
20850
+ str r2, [sp, #16]
20851
+ ldr r2, [r3, #8]
20852
+ str r2, [sp, #12]
20853
+ ldr r2, [r3, #4]
20854
+ str r2, [sp, #8]
20855
+ mov r2, fp
20856
+ ldr r3, [r3]
20857
+ str r0, [sp]
20858
+ ldr r0, .L3408+24
20859
+ str r3, [sp, #4]
20860
+ mov r3, r7
20861
+ bl printk
20862
+ cmn r8, #1
20863
+ cmpne r8, #512
20864
+ moveq r6, #1
20865
+ b .L3398
20866
+.L3409:
2056320867 .align 2
20564
-.L3465:
20565
- .word .LANCHOR3-3096
20566
- .word .LANCHOR3-3066
20567
- .word .LANCHOR0
20568
- .word .LC196
20569
- .word .LC212
20570
- .word .LANCHOR1+2512
20868
+.L3408:
20869
+ .word .LANCHOR3
20870
+ .word .LANCHOR3-3088
20871
+ .word .LC211
20872
+ .word .LANCHOR1+2300
2057120873 .word .LC0
20874
+ .word .LANCHOR3-3074
20875
+ .word .LC195
2057220876 .fnend
2057320877 .size ftl_sysblk_dump, .-ftl_sysblk_dump
2057420878 .align 2
2057520879 .global ftl_open_sblk_recovery
20880
+ .syntax unified
20881
+ .arm
20882
+ .fpu softvfp
2057620883 .type ftl_open_sblk_recovery, %function
2057720884 ftl_open_sblk_recovery:
2057820885 .fnstart
2057920886 @ args = 0, pretend = 0, frame = 216
2058020887 @ frame_needed = 0, uses_anonymous_args = 0
20581
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
20888
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2058220889 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2058320890 .pad #228
2058420891 sub sp, sp, #228
20585
- ldr r5, .L3606
20892
+ ldr r5, .L3532
2058620893 mov r4, r0
2058720894 str r1, [sp, #28]
2058820895 ldr r3, [r5]
2058920896 tst r3, #4096
20590
- beq .L3468
20591
- ldr r0, .L3606+4
20592
- ldrh r1, [r4, #2]
20897
+ beq .L3411
20898
+ ldrh r1, [r0, #2]
20899
+ ldr r0, .L3532+4
2059320900 bl printk
20594
-.L3468:
20901
+.L3411:
2059520902 ldr r3, [r5]
2059620903 tst r3, #4096
20597
- beq .L3469
20598
- ldr r0, .L3606+8
20904
+ beq .L3412
2059920905 ldrb r1, [r4, #5] @ zero_extendqisi2
20906
+ ldr r0, .L3532+8
2060020907 bl printk
20601
-.L3469:
20908
+.L3412:
2060220909 ldr r3, [r5]
2060320910 tst r3, #4096
20604
- beq .L3470
20605
- ldr r0, .L3606+12
20911
+ beq .L3413
2060620912 ldrh r1, [r4]
20913
+ ldr r0, .L3532+12
2060720914 bl printk
20608
-.L3470:
20915
+.L3413:
2060920916 ldr r3, [r5]
2061020917 tst r3, #4096
20611
- beq .L3471
20612
- ldr r0, .L3606+16
20613
- ldrh r1, [r4, #16]
20918
+ beq .L3414
2061420919 ldrh r2, [r4, #18]
20920
+ ldrh r1, [r4, #16]
20921
+ ldr r0, .L3532+16
2061520922 bl printk
20616
-.L3471:
20923
+.L3414:
2061720924 ldr r3, [r5]
2061820925 tst r3, #4096
20619
- beq .L3472
20620
- ldr r0, .L3606+20
20926
+ beq .L3415
2062120927 ldrb r1, [r4, #9] @ zero_extendqisi2
20928
+ ldr r0, .L3532+20
2062220929 bl printk
20623
-.L3472:
20930
+.L3415:
2062420931 ldrh r3, [r4, #10]
20625
- ldr r6, .L3606+24
20932
+ ldr r1, .L3532+24
2062620933 ldrh r2, [r4]
2062720934 strh r3, [r4, #14] @ movhi
20628
- movw r3, #1076
20629
- ldrh r3, [r6, r3]
20935
+ movw r3, #1080
20936
+ ldrh r3, [r1, r3]
2063020937 cmp r2, r3
20631
- bcs .L3467
20938
+ bcs .L3410
2063220939 mov r0, #1
2063320940 bl buf_alloc
20634
- ldrb r3, [r6, #2772] @ zero_extendqisi2
20941
+ ldr r3, .L3532+28
2063520942 mov r1, #255
20636
- sub r3, r3, #2
2063720943 ldr r2, [r0, #4]
2063820944 mov r5, r0
2063920945 add r0, sp, #32
20640
- add r3, r2, r3, asl #9
20946
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
20947
+ sub r3, r3, #2
20948
+ add r3, r2, r3, lsl #9
2064120949 mov r2, #64
2064220950 str r3, [sp, #16]
2064320951 bl ftl_memset
20644
- mov r1, #255
2064520952 mov r2, #64
20953
+ mov r1, #255
2064620954 add r0, sp, #96
2064720955 bl ftl_memset
20648
- mov r1, #255
2064920956 mov r2, #64
20957
+ mov r1, #255
2065020958 add r0, sp, #160
2065120959 bl ftl_memset
20652
- ldrb r6, [r4, #5] @ zero_extendqisi2
20653
- ldrh r7, [r4, #2]
20960
+ ldrb r10, [r4, #5] @ zero_extendqisi2
2065420961 mov r3, #2
20962
+ ldrh r9, [r4, #2]
2065520963 str r3, [sp, #12]
2065620964 mov r3, #0
2065720965 str r3, [sp, #24]
20658
-.L3474:
20659
- ldr r3, .L3606+28
20966
+.L3417:
20967
+ ldr r3, .L3532+32
2066020968 ldrh r3, [r3]
20661
- cmp r3, r7
20662
- bls .L3477
20663
- ldrb r6, [r4, #5] @ zero_extendqisi2
20664
- ldr r8, .L3606+24
20665
-.L3475:
20969
+ cmp r3, r9
20970
+ bhi .L3434
20971
+.L3420:
20972
+ ldrh r3, [r4, #10]
20973
+ ldr r1, .L3532+36
20974
+ ldrh r2, [r4, #6]
20975
+ ldrb r0, [r4, #9] @ zero_extendqisi2
20976
+ strh r9, [r4, #2] @ movhi
20977
+ add r2, r2, r3
20978
+ ldrh r3, [r1, #-8]
20979
+ strb r10, [r4, #5]
20980
+ str r1, [sp, #16]
20981
+ mul r3, r3, r0
20982
+ cmp r2, r3
20983
+ beq .L3435
20984
+ movw r2, #1802
20985
+ ldr r1, .L3532+40
20986
+ ldr r0, .L3532+44
20987
+ bl printk
20988
+ bl dump_stack
20989
+.L3435:
20990
+ ldr r6, .L3532+28
20991
+ mov r7, #0
20992
+ ldrh r0, [r4, #10]
20993
+ mov r2, r7
20994
+ ldr r3, [r6, #-2556]
20995
+.L3436:
20996
+ cmp r2, r0
20997
+ bcc .L3438
20998
+ ldr r2, [sp, #16]
2066620999 ldrb r3, [r4, #9] @ zero_extendqisi2
20667
- cmp r3, r6
20668
- bls .L3602
20669
- add r3, r4, r6, asl #1
20670
- ldrh r10, [r3, #16]
21000
+ ldr r9, .L3532
21001
+ ldrh r2, [r2, #-8]
21002
+ ldr r10, .L3532+24
21003
+ smulbb r3, r3, r2
21004
+ sub r3, r3, r0
21005
+ add r7, r7, r3
21006
+ ldr r3, [r9]
21007
+ uxth r7, r7
21008
+ tst r3, #4096
21009
+ beq .L3439
21010
+ ldrh r1, [r4]
21011
+ ldr r2, [r10, #1092]
21012
+ ldr r0, .L3532+48
21013
+ lsl r3, r1, #1
21014
+ ldrh r3, [r2, r3]
21015
+ mov r2, r7
21016
+ bl printk
21017
+.L3439:
21018
+ ldrh r3, [r4]
21019
+ ldr r2, [r10, #1092]
21020
+ lsl r3, r3, #1
21021
+ strh r7, [r2, r3] @ movhi
21022
+ ldr r3, [r9]
21023
+ tst r3, #16384
21024
+ beq .L3440
21025
+ ldr r3, [sp, #44]
21026
+ add r1, sp, #32
21027
+ ldr r0, .L3532+52
21028
+ str r3, [sp]
21029
+ ldm r1, {r1, r2, r3}
21030
+ bl printk
21031
+.L3440:
21032
+ ldrb r2, [r6, #-2546] @ zero_extendqisi2
21033
+ mov r8, #0
21034
+ mov r1, #0
21035
+ ldr r0, [r5, #4]
21036
+ lsl r2, r2, #9
21037
+ bl ftl_memset
21038
+.L3441:
21039
+ ldrb r3, [r6, #-3127] @ zero_extendqisi2
21040
+ ldr r2, [sp, #12]
21041
+ mul r3, r2, r3
21042
+ cmp r8, r3
21043
+ bcc .L3453
21044
+ ldr fp, .L3532+56
21045
+ mov r7, #0
21046
+ add r8, sp, #32
21047
+.L3454:
21048
+ ldrb r3, [r6, #-3127] @ zero_extendqisi2
21049
+ ldr r2, [sp, #12]
21050
+ mul r3, r2, r3
21051
+ cmp r7, r3
21052
+ bcc .L3460
21053
+ mov r0, r5
21054
+ bl zbuf_free
21055
+ ldr r3, [sp, #16]
21056
+ ldrh r2, [r4, #12]
21057
+ ldrb r1, [r4, #9] @ zero_extendqisi2
21058
+ ldrh r3, [r3, #-8]
21059
+ mla r3, r1, r3, r2
21060
+ ldr r2, [r6, #-2556]
21061
+ sub r3, r3, #-1073741823
21062
+ ldr r3, [r2, r3, lsl #2]
21063
+ cmn r3, #1
21064
+ beq .L3461
21065
+ movw r2, #1917
21066
+ ldr r1, .L3532+40
21067
+ ldr r0, .L3532+44
21068
+ bl printk
21069
+ bl dump_stack
21070
+.L3461:
21071
+ ldrh r3, [r4, #6]
21072
+ cmp r3, #1
21073
+ bne .L3410
21074
+ mov r0, r4
21075
+ bl ftl_write_last_log_page
21076
+.L3410:
21077
+ add sp, sp, #228
21078
+ @ sp needed
21079
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
21080
+.L3434:
21081
+ ldrb r10, [r4, #5] @ zero_extendqisi2
21082
+ ldr r6, .L3532+28
21083
+.L3418:
21084
+ ldrb r3, [r4, #9] @ zero_extendqisi2
21085
+ cmp r3, r10
21086
+ movls r3, #0
21087
+ strbls r3, [r4, #5]
21088
+ addls r3, r9, #1
21089
+ uxthls r9, r3
21090
+ bls .L3417
21091
+.L3433:
21092
+ add r3, r4, r10, lsl #1
21093
+ ldrh r8, [r3, #16]
2067121094 movw r3, #65535
20672
- cmp r10, r3
20673
- beq .L3476
20674
- ldr r3, .L3606+32
20675
- ldr r1, [r5, #4]
21095
+ cmp r8, r3
21096
+ beq .L3419
21097
+ ldr r3, .L3532+60
2067621098 ldr r2, [r5, #12]
20677
- ldrh r3, [r3]
20678
- mla r3, r3, r10, r7
21099
+ ldr r1, [r5, #4]
21100
+ ldrh r3, [r3, #-2]
21101
+ mla r3, r8, r3, r9
2067921102 str r3, [sp, #20]
20680
- mov r0, r3
20681
- ldrb r3, [r8, #2772] @ zero_extendqisi2
21103
+ ldr r0, [sp, #20]
21104
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
2068221105 bl ftl_read_ppa_page
2068321106 cmp r0, #512
20684
- mov r9, r0
20685
- beq .L3477
21107
+ mov r7, r0
21108
+ beq .L3420
2068621109 cmn r0, #1
20687
- beq .L3478
21110
+ beq .L3421
2068821111 ldr r3, [r5, #12]
2068921112 ldr r2, [r3]
2069021113 cmn r2, #1
20691
- bne .L3478
21114
+ bne .L3421
2069221115 ldr r3, [r3, #4]
2069321116 cmn r3, #1
20694
- bne .L3478
21117
+ bne .L3421
2069521118 ldr r3, [r5, #4]
2069621119 ldr r3, [r3]
2069721120 cmn r3, #1
20698
- beq .L3477
20699
-.L3478:
20700
- ldr r3, .L3606+36
20701
- mov r2, #1
20702
- strb r2, [r3, #209]
20703
- ldrb r3, [r4, #9] @ zero_extendqisi2
21121
+ beq .L3420
21122
+.L3421:
21123
+ mov r3, #1
2070421124 ldrh r2, [r4, #10]
20705
- mla r3, r3, r7, r6
21125
+ strb r3, [r6, #-47]
21126
+ ldrb r3, [r4, #9] @ zero_extendqisi2
21127
+ mla r3, r9, r3, r10
2070621128 cmp r2, r3
20707
- beq .L3479
20708
- ldr r1, .L3606+40
21129
+ beq .L3422
2070921130 movw r2, #1694
20710
- ldr r0, .L3606+44
21131
+ ldr r1, .L3532+40
21132
+ ldr r0, .L3532+44
2071121133 bl printk
2071221134 bl dump_stack
20713
-.L3479:
20714
- ldrh r3, [r4, #6]
20715
- ldrh r2, [r4, #10]
20716
- add r2, r3, r2
20717
- ldr r3, .L3606+28
21135
+.L3422:
21136
+ ldrh r3, [r4, #10]
21137
+ ldrh r2, [r4, #6]
21138
+ add r2, r2, r3
21139
+ ldr r3, .L3532+32
2071821140 ldrh r1, [r3]
2071921141 ldrb r3, [r4, #9] @ zero_extendqisi2
2072021142 mul r3, r3, r1
2072121143 cmp r2, r3
20722
- beq .L3480
20723
- ldr r1, .L3606+40
21144
+ beq .L3423
2072421145 movw r2, #1695
20725
- ldr r0, .L3606+44
21146
+ ldr r1, .L3532+40
21147
+ ldr r0, .L3532+44
2072621148 bl printk
2072721149 bl dump_stack
20728
-.L3480:
20729
- ldr r3, .L3606+24
20730
- ldrb r3, [r3, #2772] @ zero_extendqisi2
21150
+.L3423:
21151
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
2073121152 cmp r3, #8
20732
- bls .L3481
21153
+ bls .L3424
2073321154 ldr r3, [r5, #12]
20734
- ldr r1, .L3606+48
21155
+ ldr r1, .L3532+64
2073521156 ldr r2, [r3]
2073621157 cmp r2, r1
20737
- beq .L3481
20738
- cmn r9, #1
20739
- beq .L3486
21158
+ beq .L3424
21159
+ cmn r7, #1
21160
+ beq .L3426
2074021161 ldr r2, [r3, #4]
2074121162 cmn r2, #1
20742
- beq .L3519
20743
- ldr r2, [r3, #16]
20744
- ldr r1, .L3606+52
20745
- cmp r2, r1
20746
- bne .L3519
20747
- ldr r0, [sp, #16]
20748
- mov r1, #1024
20749
- ldr fp, [r3, #20]
20750
- bl js_hash
20751
- cmp fp, r0
20752
- beq .L3519
20753
- mov r1, #1024
20754
- ldr r0, [sp, #16]
20755
- bl js_hash
20756
- mov r1, r10
20757
- mov r2, r7
20758
- str r9, [sp]
20759
- str r0, [sp, #4]
20760
- ldr r3, [sp, #20]
20761
- ldr r0, .L3606+56
20762
- bl printk
20763
- ldr r0, .L3606+60
20764
- mov r2, #4
20765
- mov r3, #16
20766
- ldr r1, [sp, #16]
20767
- bl rknand_print_hex
20768
- ldrb r3, [r8, #2772] @ zero_extendqisi2
20769
- ldr r0, .L3606+64
20770
- mov r2, #4
20771
- ldr r1, [r5, #12]
20772
- mov r3, r3, lsr #1
20773
- bl rknand_print_hex
20774
- b .L3486
20775
-.L3481:
20776
- cmn r9, #1
20777
- beq .L3486
20778
-.L3519:
21163
+ bne .L3427
21164
+.L3430:
2077921165 ldr r3, [r5, #12]
2078021166 ldr r0, [r3, #4]
2078121167 cmn r0, #1
20782
- beq .L3486
20783
- ldr r3, [r3]
20784
- ldr r2, .L3606+48
20785
- cmp r3, r2
20786
- beq .L3486
20787
- bl lpa_hash_get_ppa
20788
- ldr r2, [sp, #28]
20789
- mov r3, r0
20790
- cmp r2, #0
20791
- beq .L3485
20792
- ldr r2, [r5, #12]
20793
- ldr r1, [r2, #8]
20794
- str r2, [sp, #24]
20795
- cmp r0, r1
20796
- cmnne r0, #1
20797
- beq .L3485
20798
- ldr r2, .L3606+24
20799
- mov r9, #1
20800
- ldr fp, .L3606+68
20801
- ldr r10, .L3606+36
20802
- ldrb r1, [r2, #1189] @ zero_extendqisi2
20803
- ldrh r0, [fp]
20804
- rsb r1, r1, #24
20805
- str r3, [sp, #12]
20806
- rsb r1, r0, r1
20807
- mov r1, r9, asl r1
20808
- sub r1, r1, #1
20809
- and r0, r1, r3, lsr r0
20810
- ldrb r1, [r10, #-3130] @ zero_extendqisi2
20811
- bl __aeabi_uidiv
20812
- ldr r3, [sp, #28]
20813
- uxth r0, r0
20814
- ldr r2, [sp, #24]
20815
- ldrh r1, [r3]
20816
- ldr r3, [sp, #12]
20817
- cmp r1, r0
20818
- bne .L3485
20819
- ldr ip, [r2]
20820
- mov r0, r3
20821
- ldr r1, [r5, #4]
20822
- sub r2, r10, #56
20823
- ldrb r3, [r8, #2772] @ zero_extendqisi2
20824
- str ip, [sp, #12]
20825
- bl ftl_read_ppa_page
20826
- ldr r3, [r10, #-56]
20827
- ldr ip, [sp, #12]
20828
- cmp r3, ip
20829
- bcc .L3485
20830
- ldr r3, [r5, #12]
20831
- ldr r0, [r3, #8]
20832
- cmn r0, #1
20833
- beq .L3486
20834
- ldrb r3, [r8, #1189] @ zero_extendqisi2
20835
- ldrh r2, [fp]
20836
- rsb r3, r3, #24
20837
- ldrb r1, [r10, #-3130] @ zero_extendqisi2
20838
- rsb r3, r2, r3
20839
- mov r9, r9, asl r3
20840
- sub r9, r9, #1
20841
- and r0, r9, r0, lsr r2
20842
- bl __aeabi_uidiv
20843
- uxth r0, r0
20844
- bl ftl_vpn_decrement
20845
- b .L3486
20846
-.L3485:
20847
- ldr r2, [r5, #12]
20848
- ldr r3, [r8, #2784]
20849
- ldr r1, [r2, #4]
20850
- cmp r1, r3
20851
- bcs .L3486
20852
- ldr r3, .L3606+28
20853
- ldrb r0, [r4, #9] @ zero_extendqisi2
20854
- ldrh r1, [r4, #10]
20855
- ldrh r3, [r3]
20856
- mul r3, r3, r0
20857
- sub r3, r3, #1
20858
- cmp r1, r3
20859
- bge .L3486
20860
- ldr r3, [r8, #2804]
20861
- ldr r2, [r2]
20862
- ldr r1, [r3, #8]
20863
- cmp r2, r1
20864
- strhi r2, [r3, #8]
20865
- ldrh r3, [r4, #12]
20866
- ldrh r2, [r4, #10]
20867
- ldr r1, [r5, #12]
20868
- add r2, r3, r2
20869
- ldmib r1, {r0, r1}
20870
- uxth r2, r2
20871
- bl lpa_hash_update_ppa
20872
- ldr r3, [sp, #36]
20873
- str r3, [sp, #32]
20874
- ldr r3, [sp, #40]
20875
- str r3, [sp, #36]
20876
- ldr r3, [sp, #44]
20877
- str r3, [sp, #40]
20878
- ldr r3, [sp, #20]
20879
- str r3, [sp, #44]
20880
-.L3486:
21168
+ bne .L3428
21169
+.L3426:
2088121170 ldrh r3, [r4, #6]
2088221171 sub r3, r3, #1
2088321172 strh r3, [r4, #6] @ movhi
....@@ -20888,114 +21177,133 @@
2088821177 str r3, [sp, #12]
2088921178 mov r3, #1
2089021179 str r3, [sp, #24]
20891
-.L3476:
20892
- add r6, r6, #1
20893
- uxth r6, r6
20894
- b .L3475
20895
-.L3602:
20896
- add r7, r7, #1
20897
- mov r3, #0
20898
- strb r3, [r4, #5]
20899
- uxth r7, r7
20900
- b .L3474
20901
-.L3477:
20902
- ldrh r3, [r4, #6]
20903
- strb r6, [r4, #5]
20904
- ldrh r6, [r4, #10]
20905
- ldrb fp, [r4, #9] @ zero_extendqisi2
20906
- add r6, r3, r6
20907
- ldr r3, .L3606+72
20908
- strh r7, [r4, #2] @ movhi
20909
- ldrh ip, [r3, #-8]
20910
- str r3, [sp, #16]
20911
- mul fp, ip, fp
20912
- cmp r6, fp
20913
- beq .L3490
20914
- ldr r1, .L3606+40
20915
- movw r2, #1802
20916
- ldr r0, .L3606+44
21180
+.L3419:
21181
+ add r3, r10, #1
21182
+ uxth r10, r3
21183
+ b .L3418
21184
+.L3427:
21185
+ ldr r2, [r3, #16]
21186
+ ldr r1, .L3532+68
21187
+ cmp r2, r1
21188
+ bne .L3430
21189
+ ldr fp, [r3, #20]
21190
+ mov r1, #1024
21191
+ ldr r0, [sp, #16]
21192
+ bl js_hash
21193
+ cmp fp, r0
21194
+ beq .L3430
21195
+ mov r1, #1024
21196
+ ldr r0, [sp, #16]
21197
+ bl js_hash
21198
+ mov r2, r9
21199
+ mov r1, r8
21200
+ str r0, [sp, #4]
21201
+ str r7, [sp]
21202
+ ldr r3, [sp, #20]
21203
+ ldr r0, .L3532+72
2091721204 bl printk
20918
- bl dump_stack
20919
-.L3490:
20920
- ldr r9, .L3606+36
20921
- mov r8, #0
20922
- ldrh r6, [r4, #10]
20923
- mov r7, r8
20924
- ldr r10, [r9, #-2548]
20925
-.L3491:
20926
- cmp r7, r6
20927
- bcs .L3603
20928
- ldrh r3, [r4, #12]
20929
- add r3, r7, r3
20930
- add r7, r7, #1
20931
- ldr r3, [r10, r3, asl #2]
20932
- cmn r3, #1
20933
- addne r8, r8, #1
20934
- uxthne r8, r8
20935
- b .L3491
20936
-.L3603:
20937
- ldr r2, [sp, #16]
20938
- ldrb r3, [r4, #9] @ zero_extendqisi2
20939
- ldrh r10, [r2, #-8]
20940
- smulbb r3, r3, r10
20941
- ldr r10, .L3606+24
20942
- rsb r6, r6, r3
20943
- add r6, r8, r6
20944
- ldr r8, .L3606
20945
- uxth r6, r6
20946
- ldr r3, [r8]
20947
- tst r3, #4096
20948
- beq .L3494
20949
- ldrh r1, [r4]
20950
- mov r2, r6
20951
- ldr ip, [r10, #1088]
20952
- ldr r0, .L3606+76
20953
- mov r3, r1, asl #1
20954
- ldrh r3, [ip, r3]
20955
- bl printk
20956
-.L3494:
20957
- ldrh r3, [r4]
20958
- ldr r2, [r10, #1088]
20959
- mov r3, r3, asl #1
20960
- strh r6, [r2, r3] @ movhi
20961
- ldr r3, [r8]
20962
- tst r3, #16384
20963
- beq .L3495
20964
- ldr r3, [sp, #44]
20965
- add r1, sp, #32
20966
- ldr r0, .L3606+80
20967
- str r3, [sp]
20968
- ldmia r1, {r1, r2, r3}
20969
- bl printk
20970
-.L3495:
20971
- ldrb r2, [r10, #2772] @ zero_extendqisi2
20972
- mov r1, #0
20973
- ldr r0, [r5, #4]
20974
- mov r7, #0
20975
- mov r2, r2, asl #9
20976
- bl ftl_memset
20977
-.L3496:
20978
- ldrb r3, [r9, #-3123] @ zero_extendqisi2
20979
- ldr r2, [sp, #12]
20980
- mul r3, r3, r2
20981
- cmp r7, r3
20982
- bcs .L3604
20983
- add ip, sp, #32
20984
- ldr r0, [ip, r7, asl #2]
21205
+ mov r3, #16
21206
+ mov r2, #4
21207
+ ldr r1, [sp, #16]
21208
+ ldr r0, .L3532+76
21209
+ bl rknand_print_hex
21210
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
21211
+ mov r2, #4
21212
+ ldr r1, [r5, #12]
21213
+ ldr r0, .L3532+80
21214
+ lsr r3, r3, #1
21215
+ bl rknand_print_hex
21216
+ b .L3426
21217
+.L3424:
21218
+ cmn r7, #1
21219
+ bne .L3430
21220
+ b .L3426
21221
+.L3428:
21222
+ ldr r3, [r3]
21223
+ ldr r2, .L3532+64
21224
+ cmp r3, r2
21225
+ beq .L3426
21226
+ bl lpa_hash_get_ppa
21227
+ ldr r3, [sp, #28]
21228
+ mov r8, r0
21229
+ cmp r3, #0
21230
+ beq .L3431
21231
+ ldr fp, [r5, #12]
21232
+ ldr r3, [fp, #8]
21233
+ cmp r3, r0
21234
+ cmnne r0, #1
21235
+ beq .L3431
21236
+ ldr r3, .L3532+84
21237
+ mov r7, #1
21238
+ ldrb r1, [r6, #-3136] @ zero_extendqisi2
21239
+ ldrh r0, [r3]
21240
+ ldr r3, .L3532+24
21241
+ ldrb r3, [r3, #1153] @ zero_extendqisi2
21242
+ rsb r3, r3, #24
21243
+ sub r3, r3, r0
21244
+ lsl r3, r7, r3
21245
+ sub r3, r3, #1
21246
+ and r0, r3, r8, lsr r0
21247
+ bl __aeabi_uidiv
21248
+ ldr r3, [sp, #28]
21249
+ uxth r0, r0
21250
+ ldrh r3, [r3]
21251
+ cmp r3, r0
21252
+ bne .L3431
21253
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
21254
+ mov r0, r8
21255
+ ldr r2, [r6, #-76]
21256
+ ldr r1, [r5, #4]
21257
+ ldr fp, [fp]
21258
+ bl ftl_read_ppa_page
21259
+ ldr r3, [r6, #-76]
21260
+ ldr r3, [r3]
21261
+ cmp fp, r3
21262
+ bhi .L3431
21263
+ ldr r3, [r5, #12]
21264
+ ldr r0, [r3, #8]
2098521265 cmn r0, #1
20986
- bne .L3497
20987
-.L3501:
20988
- ldr r2, [r10, #2804]
20989
- mvn r6, #0
21266
+ beq .L3426
21267
+ ldr r3, .L3532+84
21268
+ ldrb r1, [r6, #-3136] @ zero_extendqisi2
21269
+ ldrh r2, [r3]
21270
+ ldr r3, .L3532+24
21271
+ ldrb r3, [r3, #1153] @ zero_extendqisi2
21272
+ rsb r3, r3, #24
21273
+ sub r3, r3, r2
21274
+ lsl r7, r7, r3
21275
+ sub r7, r7, #1
21276
+ and r0, r7, r0, lsr r2
21277
+ bl __aeabi_uidiv
21278
+ uxth r0, r0
21279
+ bl ftl_vpn_decrement
21280
+ b .L3426
21281
+.L3438:
21282
+ ldrh r1, [r4, #12]
21283
+ add r1, r1, r2
21284
+ add r2, r2, #1
21285
+ ldr r1, [r3, r1, lsl #2]
21286
+ cmn r1, #1
21287
+ addne r7, r7, #1
21288
+ uxthne r7, r7
21289
+ b .L3436
21290
+.L3453:
21291
+ add r3, sp, #32
21292
+ ldr r0, [r3, r8, lsl #2]
21293
+ cmn r0, #1
21294
+ bne .L3442
21295
+.L3446:
21296
+ ldr r2, [r10, #2800]
21297
+ mvn r7, #0
2099021298 ldr r3, [r5, #12]
2099121299 mov r0, #2
2099221300 ldr r2, [r2, #8]
2099321301 str r2, [r3]
2099421302 mov r2, #0
2099521303 ldr r3, [r5, #12]
20996
- str r6, [r3, #4]
21304
+ str r7, [r3, #4]
2099721305 ldr r3, [r5, #12]
20998
- str r6, [r3, #8]
21306
+ str r7, [r3, #8]
2099921307 ldr r3, [r5, #12]
2100021308 str r2, [r3, #12]
2100121309 ldr r3, [r5, #12]
....@@ -21005,37 +21313,91 @@
2100521313 ldr r1, [r5, #12]
2100621314 add r1, r1, #16
2100721315 bl ftl_debug_info_fill
21008
- b .L3498
21009
-.L3497:
21010
- ldr r3, .L3606+24
21011
- ldr r1, [r5, #4]
21316
+.L3443:
21317
+ ldr r3, [sp, #24]
21318
+ cmp r3, #1
21319
+ bne .L3448
21320
+ ldrh r3, [r4, #6]
21321
+ cmp r3, #1
21322
+ bls .L3448
21323
+.L3507:
21324
+ mov r0, r4
21325
+ bl ftl_get_new_free_page
21326
+ ldr r3, [r9]
21327
+ mov fp, r0
21328
+ tst r3, #16384
21329
+ beq .L3450
21330
+ ldrh r2, [r4, #12]
21331
+ mov r1, r0
21332
+ ldrh r3, [r4, #10]
21333
+ ldr r0, .L3532+88
21334
+ add r3, r3, r2
2101221335 ldr r2, [r5, #12]
21013
- ldrb r3, [r3, #2772] @ zero_extendqisi2
21014
- str ip, [sp, #20]
21336
+ sub r3, r3, #1
21337
+ ldr r2, [r2, #4]
21338
+ bl printk
21339
+.L3450:
21340
+ ldrb r3, [r6, #-3127] @ zero_extendqisi2
21341
+ ldr r1, [sp, #12]
21342
+ ldrh r2, [r4, #6]
21343
+ mul r3, r1, r3
21344
+ add r3, r3, #1
21345
+ sub r3, r3, r8
21346
+ cmp r2, r3
21347
+ bls .L3448
21348
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
21349
+ mov r0, fp
21350
+ ldr r2, [r5, #12]
21351
+ ldr r1, [r5, #4]
21352
+ bl ftl_prog_ppa_page
21353
+ str r0, [sp, #20]
21354
+ ldrh r0, [r4]
21355
+ bl ftl_vpn_decrement
21356
+ ldr r2, [sp, #20]
21357
+ adds r3, r7, #1
21358
+ movne r3, #1
21359
+ cmn r2, #1
21360
+ cmnne r7, #1
21361
+ beq .L3451
21362
+ add r3, sp, #96
21363
+ ldrh r2, [r4, #12]
21364
+ str fp, [r3, r8, lsl #2]
21365
+ ldrh r3, [r4, #10]
21366
+ add r3, r3, r2
21367
+ add r2, sp, #160
21368
+ sub r3, r3, #1
21369
+ str r3, [r2, r8, lsl #2]
21370
+.L3448:
21371
+ add r8, r8, #1
21372
+ b .L3441
21373
+.L3442:
21374
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
21375
+ ldr r2, [r5, #12]
21376
+ ldr r1, [r5, #4]
2101521377 bl ftl_read_ppa_page
2101621378 ldr r3, [r5, #12]
21017
- mov r6, r0
21379
+ mov r7, r0
2101821380 ldr r0, [r3, #4]
2101921381 bl lpa_hash_get_ppa
21020
- ldr r3, [r8]
21021
- tst r3, #16384
21382
+ ldr r3, [r9]
2102221383 mov fp, r0
21023
- ldr ip, [sp, #20]
21024
- beq .L3499
21384
+ tst r3, #16384
21385
+ beq .L3444
2102521386 ldr r3, [r5, #12]
21026
- mov r1, fp
21027
- ldr r0, .L3606+84
21028
- ldr r2, [ip, r7, asl #2]
21387
+ add r2, sp, #32
21388
+ mov r1, r0
21389
+ ldr r2, [r2, r8, lsl #2]
21390
+ ldr r0, .L3532+92
2102921391 ldr r3, [r3, #4]
2103021392 bl printk
21031
-.L3499:
21393
+.L3444:
2103221394 add r3, sp, #32
2103321395 mov r2, #1
21396
+ ldr r3, [r3, r8, lsl #2]
2103421397 mov r0, #2
21035
- ldr r3, [r3, r7, asl #2]
2103621398 cmp fp, r3
2103721399 ldr r3, [r5, #12]
21038
- mvnne r6, #0
21400
+ mvnne r7, #0
2103921401 str fp, [r3, #8]
2104021402 ldr r3, [r5, #12]
2104121403 str r2, [r3, #12]
....@@ -21045,298 +21407,243 @@
2104521407 ldr r1, [r5, #12]
2104621408 add r1, r1, #16
2104721409 bl ftl_debug_info_fill
21048
- cmn r6, #1
21049
- beq .L3501
21050
-.L3498:
21051
- ldr r3, [sp, #24]
21052
- cmp r3, #1
21053
- bne .L3503
21054
- ldrh r3, [r4, #6]
21055
- cmp r3, #1
21056
- bls .L3503
21057
-.L3573:
21058
- mov r0, r4
21059
- bl ftl_get_new_free_page
21060
- ldr r3, [r8]
21061
- tst r3, #16384
21062
- mov fp, r0
21063
- beq .L3505
21064
- ldrh r1, [r4, #12]
21065
- ldr r2, [r5, #12]
21066
- ldrh r3, [r4, #10]
21067
- ldr r0, .L3606+88
21068
- add r3, r3, r1
21069
- ldr r2, [r2, #4]
21070
- mov r1, fp
21071
- sub r3, r3, #1
21072
- bl printk
21073
-.L3505:
21074
- ldrb r3, [r9, #-3123] @ zero_extendqisi2
21075
- ldr r1, [sp, #12]
21076
- ldrh r2, [r4, #6]
21077
- mul r3, r3, r1
21078
- add r3, r3, #1
21079
- rsb r3, r7, r3
21080
- cmp r2, r3
21081
- bls .L3503
21082
- ldr r3, .L3606+24
21083
- mov r0, fp
21084
- ldr r2, [r5, #12]
21085
- ldr r1, [r5, #4]
21086
- ldrb r3, [r3, #2772] @ zero_extendqisi2
21087
- bl ftl_prog_ppa_page
21088
- str r0, [sp, #20]
21089
- ldrh r0, [r4]
21090
- bl ftl_vpn_decrement
21091
- adds r3, r6, #1
21092
- movne r3, #1
21093
- ldr r2, [sp, #20]
21094
- cmn r2, #1
21095
- cmnne r6, #1
21096
- beq .L3506
21097
- add r3, sp, #96
21098
- ldrh r2, [r4, #12]
21099
- str fp, [r3, r7, asl #2]
21100
- ldrh r3, [r4, #10]
21101
- add r3, r3, r2
21102
- add r2, sp, #160
21103
- sub r3, r3, #1
21104
- str r3, [r2, r7, asl #2]
21105
- b .L3503
21106
-.L3506:
21410
+ cmn r7, #1
21411
+ bne .L3443
21412
+ b .L3446
21413
+.L3451:
2110721414 ldrh r2, [r4, #6]
2110821415 cmp r2, #1
2110921416 movls r3, #0
2111021417 andhi r3, r3, #1
2111121418 cmp r3, #0
21112
- bne .L3573
21113
-.L3503:
21114
- add r7, r7, #1
21115
- b .L3496
21116
-.L3604:
21117
- ldr r10, .L3606+24
21118
- mov r6, #0
21119
-.L3509:
21120
- ldrb r3, [r9, #-3123] @ zero_extendqisi2
21121
- ldr r2, [sp, #12]
21122
- mul r3, r3, r2
21123
- cmp r6, r3
21124
- bcs .L3605
21125
- add fp, sp, #96
21126
- ldr r3, [fp, r6, asl #2]
21419
+ bne .L3507
21420
+ b .L3448
21421
+.L3460:
21422
+ add r10, sp, #96
21423
+ ldr r3, [r10, r7, lsl #2]
2112721424 cmn r3, #1
21128
- beq .L3511
21129
- add r7, sp, #32
21130
- ldr r1, [r5, #4]
21425
+ beq .L3456
21426
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
2113121427 ldr r2, [r5, #12]
21132
- ldr r0, [r7, r6, asl #2]
21133
- ldrb r3, [r10, #2772] @ zero_extendqisi2
21428
+ ldr r1, [r5, #4]
21429
+ ldr r0, [r8, r7, lsl #2]
2113421430 bl ftl_read_ppa_page
2113521431 cmn r0, #1
2113621432 cmpne r0, #256
21137
- bne .L3511
21138
- ldr r0, [fp, r6, asl #2]
21139
- ldrb r3, [r10, #2772] @ zero_extendqisi2
21140
- ldr r1, [r5, #4]
21433
+ bne .L3456
21434
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
21435
+ ldr r0, [r10, r7, lsl #2]
2114121436 ldr r2, [r5, #12]
21437
+ ldr r1, [r5, #4]
2114221438 bl ftl_read_ppa_page
21143
- ldr r3, [r8]
21439
+ ldr r3, [r9]
21440
+ mov r10, r0
2114421441 tst r3, #16384
21145
- mov fp, r0
21146
- beq .L3513
21147
- ldr r3, [r5, #12]
21148
- mov r1, fp
21149
- ldr r0, .L3606+88
21150
- ldr r2, [r3, #8]
21151
- ldr r3, [r7, r6, asl #2]
21442
+ beq .L3458
21443
+ ldr r2, [r5, #12]
21444
+ mov r1, r0
21445
+ ldr r3, [r8, r7, lsl #2]
21446
+ ldr r0, .L3532+88
21447
+ ldr r2, [r2, #8]
2115221448 bl printk
21153
-.L3513:
21154
- cmn fp, #1
21155
- beq .L3511
21156
- ldr r3, [r5, #12]
21157
- ldr r2, [r7, r6, asl #2]
21158
- ldr r1, [r3, #8]
21159
- cmp r2, r1
21160
- bne .L3511
21161
- ldr r1, [r8]
21162
- add r7, sp, #160
21163
- tst r1, #16384
21164
- beq .L3514
21165
- ldr r1, [r3, #4]
21166
- ldr r0, .L3606+92
21167
- ldr r3, [r7, r6, asl #2]
21449
+.L3458:
21450
+ cmn r10, #1
21451
+ beq .L3456
21452
+ ldr r1, [r5, #12]
21453
+ ldr r2, [r8, r7, lsl #2]
21454
+ ldr r3, [r1, #8]
21455
+ cmp r2, r3
21456
+ bne .L3456
21457
+ ldr r3, [r9]
21458
+ add r10, sp, #160
21459
+ tst r3, #16384
21460
+ beq .L3459
21461
+ ldr r3, [r10, r7, lsl #2]
21462
+ mov r0, fp
21463
+ ldr r1, [r1, #4]
2116821464 bl printk
21169
-.L3514:
21465
+.L3459:
21466
+ ldr r2, [r10, r7, lsl #2]
2117021467 ldr r3, [r5, #12]
21171
- ldr r2, [r7, r6, asl #2]
21172
- ldmib r3, {r0, r1}
2117321468 uxth r2, r2
21469
+ ldmib r3, {r0, r1}
2117421470 bl lpa_hash_update_ppa
21175
-.L3511:
21176
- add r6, r6, #1
21177
- b .L3509
21178
-.L3605:
21179
- mov r0, r5
21180
- bl zbuf_free
21181
- ldrh r3, [r4, #12]
21182
- ldrb r1, [r4, #9] @ zero_extendqisi2
21183
- ldr r2, [sp, #16]
21184
- ldrh r2, [r2, #-8]
21185
- mla r3, r1, r2, r3
21186
- ldr r2, .L3606+36
21187
- ldr r2, [r2, #-2548]
21188
- sub r3, r3, #-1073741823
21189
- ldr r3, [r2, r3, asl #2]
21190
- cmn r3, #1
21191
- beq .L3516
21192
- ldr r1, .L3606+40
21193
- movw r2, #1917
21194
- ldr r0, .L3606+44
21195
- bl printk
21196
- bl dump_stack
21197
-.L3516:
21198
- ldrh r3, [r4, #6]
21199
- cmp r3, #1
21200
- bne .L3467
21201
- mov r0, r4
21202
- bl ftl_write_last_log_page
21203
-.L3467:
21204
- add sp, sp, #228
21205
- @ sp needed
21206
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
21207
-.L3607:
21471
+.L3456:
21472
+ add r7, r7, #1
21473
+ b .L3454
21474
+.L3431:
21475
+ ldr r1, [r5, #12]
21476
+ ldr r2, .L3532+24
21477
+ ldr r0, [r1, #4]
21478
+ ldr r3, [r2, #2780]
21479
+ cmp r0, r3
21480
+ bcs .L3426
21481
+ ldr r3, .L3532+32
21482
+ ldrb ip, [r4, #9] @ zero_extendqisi2
21483
+ ldrh r0, [r4, #10]
21484
+ ldrh r3, [r3]
21485
+ mul r3, r3, ip
21486
+ sub r3, r3, #1
21487
+ cmp r0, r3
21488
+ bge .L3426
21489
+ ldr r3, [r2, #2800]
21490
+ ldr r1, [r1]
21491
+ ldr r2, [r3, #8]
21492
+ cmp r1, r2
21493
+ strhi r1, [r3, #8]
21494
+ ldrh r1, [r4, #12]
21495
+ ldrh r2, [r4, #10]
21496
+ ldr r3, [r5, #12]
21497
+ add r2, r2, r1
21498
+ uxth r2, r2
21499
+ ldmib r3, {r0, r1}
21500
+ bl lpa_hash_update_ppa
21501
+ ldr r3, [sp, #36]
21502
+ str r3, [sp, #32]
21503
+ ldr r3, [sp, #40]
21504
+ str r3, [sp, #36]
21505
+ ldr r3, [sp, #44]
21506
+ str r3, [sp, #40]
21507
+ ldr r3, [sp, #20]
21508
+ str r3, [sp, #44]
21509
+ b .L3426
21510
+.L3533:
2120821511 .align 2
21209
-.L3606:
21512
+.L3532:
2121021513 .word .LANCHOR2
21514
+ .word .LC212
2121121515 .word .LC213
2121221516 .word .LC214
2121321517 .word .LC215
2121421518 .word .LC216
21215
- .word .LC217
2121621519 .word .LANCHOR0
21217
- .word .LANCHOR3-3096
21218
- .word .LANCHOR3-3066
2121921520 .word .LANCHOR3
21220
- .word .LANCHOR1+2528
21521
+ .word .LANCHOR3-3096
21522
+ .word .LANCHOR3-3088
21523
+ .word .LANCHOR1+2316
2122121524 .word .LC0
21525
+ .word .LC219
21526
+ .word .LC220
21527
+ .word .LC223
21528
+ .word .LANCHOR3-3072
2122221529 .word -178307901
2122321530 .word 1212240712
21531
+ .word .LC217
2122421532 .word .LC218
21225
- .word .LC219
21226
- .word .LC184
21227
- .word .LANCHOR3-3132
21228
- .word .LANCHOR3-3088
21229
- .word .LC220
21230
- .word .LC221
21533
+ .word .LC183
21534
+ .word .LANCHOR3-3138
2123121535 .word .LC222
21232
- .word .LC223
21233
- .word .LC224
21536
+ .word .LC221
2123421537 .fnend
2123521538 .size ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
2123621539 .align 2
2123721540 .global dump_ftl_info
21541
+ .syntax unified
21542
+ .arm
21543
+ .fpu softvfp
2123821544 .type dump_ftl_info, %function
2123921545 dump_ftl_info:
2124021546 .fnstart
2124121547 @ args = 0, pretend = 0, frame = 0
2124221548 @ frame_needed = 0, uses_anonymous_args = 0
21243
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, lr}
21549
+ push {r0, r1, r2, r4, r5, r6, r7, lr}
2124421550 .save {r4, r5, r6, r7, lr}
2124521551 .pad #12
21246
- movw r7, #1076
21247
- ldr r4, .L3610
21248
- ldr r5, .L3610+4
21249
- ldr r0, .L3610+8
21250
- ldrb r1, [r4, #2774] @ zero_extendqisi2
21552
+ movw r7, #1080
21553
+ ldr r4, .L3536
21554
+ ldr r5, .L3536+4
21555
+ ldrb r1, [r4, #2769] @ zero_extendqisi2
21556
+ ldr r0, .L3536+8
21557
+ bl printk
21558
+ ldrh r3, [r5, #-54]
2125121559 sub r6, r5, #3088
21560
+ ldrb r2, [r5, #-55] @ zero_extendqisi2
21561
+ ldrb r1, [r5, #-56] @ zero_extendqisi2
21562
+ ldr r0, .L3536+12
2125221563 bl printk
21253
- ldrb r1, [r5, #200] @ zero_extendqisi2
21254
- ldrb r2, [r5, #201] @ zero_extendqisi2
21255
- ldrh r3, [r5, #202]
21256
- ldr r0, .L3610+12
21257
- bl printk
21258
- ldr r3, [r4, #2804]
21259
- ldr r0, .L3610+16
21260
- ldrh r1, [r3, #130]
21564
+ ldr r3, [r4, #2800]
21565
+ ldr r0, .L3536+16
2126121566 ldrh r2, [r3, #140]
21567
+ ldrh r1, [r3, #130]
2126221568 bl printk
21263
- ldr r0, [r4, #1092]
21264
- ldrh ip, [r0, #22]
21265
- ldrh r1, [r0, #16]
21266
- ldrh r2, [r0, #18]
21569
+ ldr r0, [r4, #1096]
21570
+ ldrh ip, [r0, #26]
2126721571 ldrb r3, [r0, #21] @ zero_extendqisi2
21268
- str ip, [sp]
21269
- ldrh r0, [r0, #26]
21270
- str r0, [sp, #4]
21271
- ldr r0, .L3610+20
21572
+ ldrh r2, [r0, #18]
21573
+ ldrh r1, [r0, #16]
21574
+ str ip, [sp, #4]
21575
+ ldrh r0, [r0, #22]
21576
+ str r0, [sp]
21577
+ ldr r0, .L3536+20
2127221578 bl printk
21273
- ldr r0, [r4, #1092]
21274
- ldrh ip, [r0, #54]
21275
- ldrh r1, [r0, #48]
21276
- ldrh r2, [r0, #50]
21579
+ ldr r0, [r4, #1096]
21580
+ ldrh ip, [r0, #58]
2127721581 ldrb r3, [r0, #53] @ zero_extendqisi2
21278
- str ip, [sp]
21279
- ldrh r0, [r0, #58]
21280
- str r0, [sp, #4]
21281
- ldr r0, .L3610+24
21582
+ ldrh r2, [r0, #50]
21583
+ ldrh r1, [r0, #48]
21584
+ str ip, [sp, #4]
21585
+ ldrh r0, [r0, #54]
21586
+ str r0, [sp]
21587
+ ldr r0, .L3536+24
2128221588 bl printk
21283
- ldr r0, [r4, #1092]
21284
- ldrh ip, [r0, #86]
21285
- ldrh r1, [r0, #80]
21286
- ldrh r2, [r0, #82]
21589
+ ldr r0, [r4, #1096]
21590
+ ldrh ip, [r0, #90]
2128721591 ldrb r3, [r0, #85] @ zero_extendqisi2
21288
- str ip, [sp]
21289
- ldrh r0, [r0, #90]
21290
- str r0, [sp, #4]
21291
- ldr r0, .L3610+28
21592
+ ldrh r2, [r0, #82]
21593
+ ldrh r1, [r0, #80]
21594
+ str ip, [sp, #4]
21595
+ ldrh r0, [r0, #86]
21596
+ str r0, [sp]
21597
+ ldr r0, .L3536+28
2129221598 bl printk
2129321599 ldrh r2, [r6, #-8]
21294
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
21295
- ldr r1, [r5, #-2548]
21296
- ldr r0, .L3610+32
21600
+ ldrb r3, [r5, #-3127] @ zero_extendqisi2
21601
+ ldr r1, [r5, #-2556]
21602
+ ldr r0, .L3536+32
2129721603 mul r3, r3, r2
2129821604 mov r2, #4
21299
- mov r3, r3, asl #1
21605
+ lsl r3, r3, #1
2130021606 bl rknand_print_hex
21301
- ldr r1, [r4, #1088]
2130221607 ldrh r3, [r4, r7]
2130321608 mov r2, #2
21304
- ldr r0, .L3610+36
21609
+ ldr r1, [r4, #1092]
21610
+ ldr r0, .L3536+36
2130521611 bl rknand_print_hex
21306
- ldr r3, [r4, #2804]
21307
- movw ip, #698
21308
- ldr r0, .L3610+40
21309
- add r1, r3, #704
21612
+ ldr r1, [r4, #2800]
21613
+ movw r3, #698
2131021614 mov r2, #4
21311
- ldrh r3, [r3, ip]
21615
+ ldr r0, .L3536+40
21616
+ ldrh r3, [r1, r3]
21617
+ add r1, r1, #704
2131221618 bl rknand_print_hex
21313
- ldr r1, [r4, #1080]
2131421619 ldrh r3, [r4, r7]
2131521620 mov r2, #4
21316
- ldr r0, .L3610+44
21621
+ ldr r1, [r4, #1084]
21622
+ ldr r0, .L3536+44
2131721623 bl rknand_print_hex
2131821624 sub r1, r5, #3056
21319
- ldr r0, .L3610+48
21320
- sub r1, r1, #4
21321
- mov r2, #2
2132221625 mov r3, #256
21626
+ mov r2, #2
21627
+ sub r1, r1, #14
21628
+ ldr r0, .L3536+48
2132321629 bl rknand_print_hex
2132421630 ldrh r2, [r6, #-8]
21325
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
21326
- ldr r0, .L3610+52
21327
- ldr r1, [r5, #-2544]
21631
+ ldrb r3, [r5, #-3127] @ zero_extendqisi2
21632
+ ldr r1, [r5, #-2552]
21633
+ ldr r0, .L3536+52
2132821634 mul r3, r3, r2
2132921635 mov r2, #2
21330
- mov r3, r3, asl #1
21636
+ lsl r3, r3, #1
2133121637 add sp, sp, #12
2133221638 @ sp needed
21333
- ldmfd sp!, {r4, r5, r6, r7, lr}
21639
+ pop {r4, r5, r6, r7, lr}
2133421640 b rknand_print_hex
21335
-.L3611:
21641
+.L3537:
2133621642 .align 2
21337
-.L3610:
21643
+.L3536:
2133821644 .word .LANCHOR0
2133921645 .word .LANCHOR3
21646
+ .word .LC224
2134021647 .word .LC225
2134121648 .word .LC226
2134221649 .word .LC227
....@@ -21344,2197 +21651,2185 @@
2134421651 .word .LC229
2134521652 .word .LC230
2134621653 .word .LC231
21654
+ .word .LC211
2134721655 .word .LC232
21348
- .word .LC212
2134921656 .word .LC233
2135021657 .word .LC234
21351
- .word .LC235
2135221658 .fnend
2135321659 .size dump_ftl_info, .-dump_ftl_info
2135421660 .align 2
2135521661 .global pm_ppa_update_check
21662
+ .syntax unified
21663
+ .arm
21664
+ .fpu softvfp
2135621665 .type pm_ppa_update_check, %function
2135721666 pm_ppa_update_check:
2135821667 .fnstart
2135921668 @ args = 0, pretend = 0, frame = 0
2136021669 @ frame_needed = 0, uses_anonymous_args = 0
21361
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
21362
- .save {r3, r4, r5, r6, r7, lr}
21363
- mov r4, r2
21364
- ldr r3, .L3616
21365
- mov r6, r0
21366
- ldr r7, .L3616+4
21670
+ ldr r3, .L3542
21671
+ push {r4, r5, r6, r7, r8, lr}
21672
+ .save {r4, r5, r6, r7, r8, lr}
21673
+ mov r6, r2
21674
+ ldr r7, .L3542+4
21675
+ mov r4, r0
21676
+ sub r2, r3, #3136
2136721677 mov r5, r1
21368
- sub r2, r3, #3120
21369
- mvn r1, #0
21370
- ldrh r0, [r2, #-12]
21371
- ldrb r2, [r7, #1189] @ zero_extendqisi2
21372
- rsb r2, r2, #24
21373
- rsb r2, r0, r2
21374
- mov r0, r4, lsr r0
21375
- bic r0, r0, r1, asl r2
21376
- ldrb r1, [r3, #-3130] @ zero_extendqisi2
21678
+ ldrh r0, [r2, #-2]
21679
+ ldrb ip, [r7, #1153] @ zero_extendqisi2
21680
+ ldrb r1, [r3, #-3136] @ zero_extendqisi2
21681
+ mvn r3, #0
21682
+ rsb ip, ip, #24
21683
+ sub ip, ip, r0
21684
+ lsr r0, r6, r0
21685
+ bic r0, r0, r3, lsl ip
2137721686 bl __aeabi_uidiv
21378
- ldr r3, [r7, #1080]
21687
+ ldr r3, [r7, #1084]
2137921688 uxth r0, r0
21380
- add r0, r3, r0, asl #2
21689
+ add r0, r3, r0, lsl #2
2138121690 ldrb r0, [r0, #2] @ zero_extendqisi2
21382
- mov r0, r0, lsr #5
21383
- cmp r0, #1
21384
- cmpne r0, #7
21691
+ lsr r0, r0, #5
21692
+ cmp r0, #7
21693
+ cmpne r0, #1
2138521694 moveq r0, #1
2138621695 movne r0, #0
21387
- ldmnefd sp!, {r3, r4, r5, r6, r7, pc}
21388
- mov r1, r6
21696
+ popne {r4, r5, r6, r7, r8, pc}
21697
+ mov r3, r6
2138921698 mov r2, r5
21390
- mov r3, r4
21391
- ldr r0, .L3616+8
21699
+ mov r1, r4
21700
+ ldr r0, .L3542+8
2139221701 bl printk
2139321702 bl dump_ftl_info
2139421703 mvn r0, #0
21395
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
21396
-.L3617:
21704
+ pop {r4, r5, r6, r7, r8, pc}
21705
+.L3543:
2139721706 .align 2
21398
-.L3616:
21707
+.L3542:
2139921708 .word .LANCHOR3
2140021709 .word .LANCHOR0
21401
- .word .LC236
21710
+ .word .LC235
2140221711 .fnend
2140321712 .size pm_ppa_update_check, .-pm_ppa_update_check
2140421713 .align 2
21714
+ .syntax unified
21715
+ .arm
21716
+ .fpu softvfp
2140521717 .type load_l2p_region, %function
2140621718 load_l2p_region:
2140721719 .fnstart
2140821720 @ args = 0, pretend = 0, frame = 0
2140921721 @ frame_needed = 0, uses_anonymous_args = 0
2141021722 cmp r1, #31
21411
- stmfd sp!, {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
21723
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
2141221724 .save {r4, r5, r6, r7, r8, r9, r10, lr}
2141321725 .pad #8
21414
- mov r6, r0
21415
- mov r5, r1
21416
- bls .L3619
21417
- ldr r1, .L3633
21726
+ mov r7, r0
21727
+ mov r6, r1
21728
+ bls .L3545
2141821729 mov r2, #32
21419
- ldr r0, .L3633+4
21730
+ ldr r1, .L3559
21731
+ ldr r0, .L3559+4
2142021732 bl printk
2142121733 bl dump_stack
21422
-.L3619:
21423
- ldr r9, .L3633+8
21734
+.L3545:
21735
+ ldr r8, .L3559+8
2142421736 movw r10, #698
21425
- ldr r7, .L3633+12
21426
- ldr r3, [r9, #2804]
21427
- mov r8, r9
21737
+ ldr r5, .L3559+12
21738
+ ldr r3, [r8, #2800]
21739
+ mov r9, r8
2142821740 ldrh r2, [r3, r10]
21429
- cmp r6, r2
21430
- bls .L3620
21431
- mov r1, r6
21432
- ldr r0, .L3633+16
21433
- bl printk
21741
+ cmp r2, r7
21742
+ bcs .L3546
21743
+ mov r1, r7
21744
+ ldr r0, .L3559+16
2143421745 mov r4, #0
21435
- movw r3, #542
21436
- ldr r0, [r4, #4]
21437
- ldrh r2, [r7, r3]
21746
+ bl printk
21747
+ ldrh r2, [r5, #-14]
2143821748 mov r1, #255
21749
+ ldr r0, [r4, #4]
2143921750 bl ftl_memset
21440
- ldr r3, [r9, #2804]
21751
+ ldr r3, [r8, #2800]
2144121752 ldrh r3, [r3, r10]
21442
- cmp r3, r6
21443
- bcs .L3631
21444
- ldr r0, .L3633+4
21753
+ cmp r3, r7
21754
+ bcc .L3547
21755
+.L3557:
21756
+ mov r0, #0
21757
+.L3544:
21758
+ add sp, sp, #8
21759
+ @ sp needed
21760
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
21761
+.L3547:
2144521762 mov r2, #37
21446
- ldr r1, .L3633
21447
- b .L3632
21448
-.L3620:
21449
- add r2, r6, #176
21450
- mov r5, r5, asl #3
21451
- add r9, r7, r5
21452
- ldr r4, [r3, r2, asl #2]
21453
- sub r3, r7, #2528
21454
- add r2, r3, r5
21455
- strh r6, [r3, r5] @ movhi
21763
+.L3558:
21764
+ ldr r1, .L3559
21765
+ ldr r0, .L3559+4
21766
+ bl printk
21767
+ bl dump_stack
21768
+ b .L3557
21769
+.L3546:
21770
+ add r2, r7, #176
21771
+ lsl r6, r6, #3
21772
+ ldr r4, [r3, r2, lsl #2]
21773
+ ldr r3, .L3559+20
21774
+ add r8, r5, r6
21775
+ add r2, r3, r6
21776
+ strh r7, [r3, r6] @ movhi
2145621777 mov r3, #0
2145721778 cmp r4, r3
2145821779 strh r3, [r2, #2] @ movhi
21459
- bne .L3623
21460
- mov r1, r6
21780
+ bne .L3549
2146121781 mov r2, r4
21462
- ldr r0, .L3633+20
21782
+ mov r1, r7
21783
+ ldr r0, .L3559+24
2146321784 bl printk
21464
- movw r3, #542
21465
- ldr r0, [r9, #-2524]
21785
+ ldrh r2, [r5, #-14]
2146621786 mov r1, #255
21467
- ldrh r2, [r7, r3]
21787
+ ldr r0, [r8, #-2528]
2146821788 bl ftl_memset
21469
- b .L3631
21470
-.L3623:
21471
- ldr r2, [r7, #524]
21789
+ b .L3557
21790
+.L3549:
21791
+ ldrb r3, [r5, #-2546] @ zero_extendqisi2
2147221792 mov r0, r4
21473
- ldrb r3, [r8, #2772] @ zero_extendqisi2
21474
- ldr r1, [r9, #-2524]
21793
+ ldr r2, [r5, #-32]
21794
+ ldr r1, [r8, #-2528]
2147521795 bl ftl_read_ppa_page
21476
- ldr r2, [r7, #524]
21477
- ldr r2, [r2]
21478
- cmp r2, r6
21796
+ ldr r2, [r5, #-32]
2147921797 mov r3, r0
21480
- bne .L3624
21798
+ ldr r2, [r2]
21799
+ cmp r2, r7
21800
+ bne .L3550
2148121801 cmn r0, #1
2148221802 cmpne r0, #512
21483
- beq .L3624
21484
-.L3628:
21485
- ldr r3, [r7, #524]
21803
+ beq .L3550
21804
+.L3554:
21805
+ ldr r3, [r5, #-32]
2148621806 ldr r3, [r3]
21487
- cmp r3, r6
21488
- beq .L3631
21489
- ldr r0, .L3633+4
21807
+ cmp r7, r3
21808
+ beq .L3557
2149021809 mov r2, #73
21491
- ldr r1, .L3633
21492
- b .L3632
21493
-.L3624:
21494
- mov r1, r6
21810
+ b .L3558
21811
+.L3550:
21812
+ mov r1, r7
2149521813 str r4, [sp]
21496
- ldr r0, .L3633+24
21497
- add r5, r7, r5
21814
+ ldr r0, .L3559+28
21815
+ add r6, r5, r6
2149821816 bl printk
21499
- ldr r3, [r8, #2804]
21500
- movw ip, #698
21501
- ldr r0, .L3633+28
21502
- add r1, r3, #704
21817
+ ldr r1, [r9, #2800]
21818
+ movw r3, #698
2150321819 mov r2, #4
21504
- ldrh r3, [r3, ip]
21820
+ ldr r0, .L3559+32
21821
+ ldrh r3, [r1, r3]
21822
+ add r1, r1, #704
2150521823 bl rknand_print_hex
21506
- ldrb r3, [r8, #2772] @ zero_extendqisi2
21507
- ldr r0, .L3633+32
21824
+ ldrb r3, [r5, #-2546] @ zero_extendqisi2
2150821825 mov r2, #4
21509
- ldr r1, [r5, #-2524]
21510
- mov r3, r3, asl #7
21511
- ldr r9, .L3633+12
21826
+ ldr r1, [r6, #-2528]
21827
+ ldr r0, .L3559+36
21828
+ lsl r3, r3, #7
2151221829 bl rknand_print_hex
21513
- ldr r0, .L3633+36
21514
- ldr r1, [r7, #524]
21515
- mov r2, #4
2151621830 mov r3, #16
21831
+ mov r2, #4
21832
+ ldr r1, [r5, #-32]
21833
+ ldr r0, .L3559+40
2151721834 bl rknand_print_hex
21835
+ ldrb r3, [r5, #-2546] @ zero_extendqisi2
2151821836 mov r0, r4
21519
- ldr r1, [r5, #-2524]
21520
- ldr r2, [r7, #524]
21521
- ldrb r3, [r8, #2772] @ zero_extendqisi2
21837
+ ldr r2, [r5, #-32]
21838
+ ldr r1, [r6, #-2528]
2152221839 bl ftl_read_ppa_page
2152321840 cmn r0, #1
2152421841 cmpne r0, #512
21525
- bne .L3627
21526
- movw r3, #542
21527
- ldr r0, [r5, #-2524]
21842
+ bne .L3553
21843
+ ldrh r2, [r5, #-14]
2152821844 mov r1, #255
21529
- ldrh r2, [r9, r3]
21845
+ ldr r0, [r6, #-2528]
2153021846 bl ftl_memset
21531
- b .L3629
21532
-.L3627:
21533
- ldr r3, [r9, #524]
21534
- ldr r3, [r3]
21535
- cmp r3, r6
21536
- beq .L3628
21537
- b .L3629
21538
-.L3632:
21539
- bl printk
21540
- bl dump_stack
21541
-.L3631:
21542
- mov r0, #0
21543
- b .L3622
21544
-.L3629:
21847
+.L3555:
2154521848 mvn r0, #0
21546
-.L3622:
21547
- add sp, sp, #8
21548
- @ sp needed
21549
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
21550
-.L3634:
21849
+ b .L3544
21850
+.L3553:
21851
+ ldr r3, [r5, #-32]
21852
+ ldr r3, [r3]
21853
+ cmp r7, r3
21854
+ beq .L3554
21855
+ b .L3555
21856
+.L3560:
2155121857 .align 2
21552
-.L3633:
21553
- .word .LANCHOR1+2552
21858
+.L3559:
21859
+ .word .LANCHOR1+2339
2155421860 .word .LC0
2155521861 .word .LANCHOR0
2155621862 .word .LANCHOR3
21863
+ .word .LC236
21864
+ .word .LANCHOR3-2532
2155721865 .word .LC237
2155821866 .word .LC238
2155921867 .word .LC239
21868
+ .word .LC218
2156021869 .word .LC240
21561
- .word .LC219
21562
- .word .LC241
2156321870 .fnend
2156421871 .size load_l2p_region, .-load_l2p_region
2156521872 .align 2
2156621873 .global pm_gc
21874
+ .syntax unified
21875
+ .arm
21876
+ .fpu softvfp
2156721877 .type pm_gc, %function
2156821878 pm_gc:
2156921879 .fnstart
2157021880 @ args = 0, pretend = 0, frame = 8
2157121881 @ frame_needed = 0, uses_anonymous_args = 0
21572
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
21882
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2157321883 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2157421884 .pad #12
21575
- ldr r5, .L3654
21576
- ldr r4, [r5, #2804]
21577
- add r4, r4, #688
21578
- ldrh r2, [r4]
21579
- ldr r4, .L3654+4
21580
- ldrh r3, [r4, #-152]
21885
+ ldr r6, .L3579
21886
+ ldr r4, .L3579+4
21887
+ ldr r3, [r6, #2800]
21888
+ add r3, r3, #688
21889
+ ldrh r2, [r3]
21890
+ ldrh r3, [r4, #-176]
2158121891 sub r3, r3, #1
2158221892 cmp r2, r3
21583
- bge .L3636
21584
- ldr r3, [r4, #-160]
21893
+ bge .L3562
21894
+ ldr r3, [r4, #-184]
2158521895 cmp r3, #0
21586
- beq .L3637
21587
-.L3636:
21896
+ beq .L3563
21897
+.L3562:
2158821898 bl pm_free_sblk
21589
- ldr r2, [r5, #2804]
21899
+ ldr r2, [r6, #2800]
2159021900 add r3, r2, #688
2159121901 ldrh r1, [r3]
21592
- ldrh r3, [r4, #-152]
21902
+ ldrh r3, [r4, #-176]
2159321903 sub r3, r3, #1
2159421904 cmp r1, r3
21595
- bge .L3638
21596
- ldr r3, .L3654+4
21597
- ldr r3, [r3, #-160]
21905
+ bge .L3564
21906
+ ldr r3, [r4, #-184]
2159821907 cmp r3, #0
21599
- beq .L3637
21600
-.L3638:
21908
+ beq .L3563
21909
+.L3564:
2160121910 uxth r0, r0
21602
- movw r6, #65535
21603
- add r0, r0, #208
21911
+ movw r5, #65535
2160421912 mov r3, #0
21605
- str r3, [r4, #-160]
21606
- mov r0, r0, asl #1
21607
- ldrh r7, [r2, r0]
21608
- cmp r7, r6
21609
- bne .L3640
21610
- ldr r1, .L3654+8
21913
+ add r0, r0, #208
21914
+ str r3, [r4, #-184]
21915
+ lsl r0, r0, #1
21916
+ ldrh r9, [r2, r0]
21917
+ cmp r9, r5
21918
+ bne .L3566
2161121919 mov r2, #182
21612
- ldr r0, .L3654+12
21920
+ ldr r1, .L3579+8
21921
+ ldr r0, .L3579+12
2161321922 bl printk
2161421923 bl dump_stack
2161521924 bl pm_free_sblk
21616
- ldr r3, [r5, #2804]
2161721925 uxth r0, r0
21926
+ ldr r3, [r6, #2800]
2161821927 add r0, r0, #208
21619
- mov r0, r0, asl #1
21620
- ldrh r7, [r3, r0]
21621
- cmp r7, r6
21622
- beq .L3637
21623
-.L3640:
21928
+ lsl r0, r0, #1
21929
+ ldrh r9, [r3, r0]
21930
+ cmp r9, r5
21931
+ beq .L3563
21932
+.L3566:
21933
+ ldr r5, .L3579+16
2162421934 bl pm_select_ram_region
21625
- ldr r8, .L3654+4
21626
- movw r2, #65535
21627
- sub r3, r8, #2528
21628
- mov r6, r0, asl #3
21935
+ lsl r7, r0, #3
2162921936 mov r10, r0
21630
- add r9, r3, r6
21631
- str r3, [sp]
21632
- ldrh r0, [r3, r6]
21633
- cmp r0, r2
21634
- beq .L3641
21635
- add r8, r8, r6
21636
- ldr r1, [r8, #-2524]
21937
+ movw r3, #65535
21938
+ ldrh r0, [r5, r7]
21939
+ add r8, r5, r7
21940
+ add r5, r5, #4
21941
+ cmp r0, r3
21942
+ beq .L3567
21943
+ add r3, r4, r7
21944
+ ldr r1, [r3, #-2528]
2163721945 cmp r1, #0
21638
- beq .L3641
21639
- ldrsh r3, [r9, #2]
21946
+ beq .L3567
21947
+ ldrsh r3, [r8, #2]
2164021948 cmp r3, #0
21641
- bge .L3641
21949
+ bge .L3567
2164221950 bl pm_write_page
21643
- ldrh r3, [r9, #2]
21951
+ ldrh r3, [r8, #2]
2164421952 ubfx r3, r3, #0, #15
21645
- strh r3, [r9, #2] @ movhi
21646
-.L3641:
21647
- ldr fp, .L3654
21953
+ strh r3, [r8, #2] @ movhi
21954
+.L3567:
21955
+ sub r5, r5, #4
2164821956 mov r8, #0
21649
- ldr r9, .L3654+4
21650
- add r3, r9, r6
21651
- str r3, [sp, #4]
21652
-.L3642:
21653
- ldr r0, [r5, #2804]
21654
- uxth r9, r8
21655
- add r3, r0, #696
21656
- add r3, r3, #2
21657
- ldrh r3, [r3]
21658
- cmp r3, r9
21659
- bls .L3653
21660
- ldr r3, .L3654+16
21661
- ldrh r1, [r3]
21662
- add r3, r9, #176
21663
- ldr ip, [r0, r3, asl #2]
21664
- mvn r0, #0
21665
- ldrb r3, [fp, #1189] @ zero_extendqisi2
21666
- rsb r3, r3, #24
21667
- rsb r3, r1, r3
21668
- mvn r0, r0, asl r3
21669
- and r0, r0, ip, lsr r1
21670
- ldrb r1, [r4, #-3130] @ zero_extendqisi2
21671
- bl __aeabi_uidiv
21672
- uxth r0, r0
21673
- cmp r0, r7
21674
- bne .L3643
21675
- mov r0, r9
21676
- mov r1, r10
21677
- bl load_l2p_region
21678
- cmp r0, #0
21679
- bne .L3644
21680
- ldr r3, [sp, #4]
21681
- mov r0, r9
21682
- ldr r1, [r3, #-2524]
21683
- bl pm_write_page
21684
-.L3644:
21685
- ldr r2, [sp]
21686
- mvn r3, #0
21687
- strh r3, [r2, r6] @ movhi
21688
-.L3643:
21689
- add r8, r8, #1
21690
- b .L3642
21691
-.L3653:
21957
+ add r5, r5, r7
21958
+.L3568:
21959
+ ldr r3, [r6, #2800]
21960
+ movw r1, #698
21961
+ uxth r2, r8
21962
+ ldrh r1, [r3, r1]
21963
+ cmp r1, r2
21964
+ bhi .L3571
2169221965 bl pm_free_sblk
21693
-.L3637:
21966
+.L3563:
2169421967 mov r0, #0
2169521968 add sp, sp, #12
2169621969 @ sp needed
21697
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
21698
-.L3655:
21970
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
21971
+.L3571:
21972
+ ldr r1, .L3579+20
21973
+ uxth fp, r8
21974
+ ldrb r0, [r6, #1153] @ zero_extendqisi2
21975
+ add ip, fp, #176
21976
+ str r2, [sp, #4]
21977
+ ldrh r1, [r1]
21978
+ ldr r3, [r3, ip, lsl #2]
21979
+ rsb r0, r0, #24
21980
+ mvn ip, #0
21981
+ sub r0, r0, r1
21982
+ lsr r3, r3, r1
21983
+ ldrb r1, [r4, #-3136] @ zero_extendqisi2
21984
+ bic r0, r3, ip, lsl r0
21985
+ bl __aeabi_uidiv
21986
+ uxth r0, r0
21987
+ ldr r2, [sp, #4]
21988
+ cmp r9, r0
21989
+ bne .L3569
21990
+ mov r1, r10
21991
+ mov r0, r2
21992
+ bl load_l2p_region
21993
+ cmp r0, #0
21994
+ bne .L3570
21995
+ add r3, r4, r7
21996
+ mov r0, fp
21997
+ ldr r1, [r3, #-2528]
21998
+ bl pm_write_page
21999
+.L3570:
22000
+ mvn r3, #0
22001
+ strh r3, [r5] @ movhi
22002
+.L3569:
22003
+ add r8, r8, #1
22004
+ b .L3568
22005
+.L3580:
2169922006 .align 2
21700
-.L3654:
22007
+.L3579:
2170122008 .word .LANCHOR0
2170222009 .word .LANCHOR3
21703
- .word .LANCHOR1+2568
22010
+ .word .LANCHOR1+2355
2170422011 .word .LC0
21705
- .word .LANCHOR3-3132
22012
+ .word .LANCHOR3-2532
22013
+ .word .LANCHOR3-3138
2170622014 .fnend
2170722015 .size pm_gc, .-pm_gc
2170822016 .align 2
2170922017 .global pm_flush_id
22018
+ .syntax unified
22019
+ .arm
22020
+ .fpu softvfp
2171022021 .type pm_flush_id, %function
2171122022 pm_flush_id:
2171222023 .fnstart
2171322024 @ args = 0, pretend = 0, frame = 0
2171422025 @ frame_needed = 0, uses_anonymous_args = 0
21715
- stmfd sp!, {r3, r4, r5, lr}
21716
- .save {r3, r4, r5, lr}
21717
- mov r0, r0, asl #3
21718
- ldr r4, .L3662
22026
+ push {r4, r5, r6, lr}
22027
+ .save {r4, r5, r6, lr}
22028
+ lsl r0, r0, #3
22029
+ ldr r4, .L3587
2171922030 sub r3, r4, #2528
2172022031 add r2, r4, r0
22032
+ sub r3, r3, #4
22033
+ ldr r1, [r2, #-2528]
2172122034 add r5, r3, r0
21722
- ldr r1, [r2, #-2524]
2172322035 ldrh r0, [r3, r0]
2172422036 bl pm_write_page
2172522037 ldrh r3, [r5, #2]
2172622038 ubfx r3, r3, #0, #15
2172722039 strh r3, [r5, #2] @ movhi
21728
- ldr r3, [r4, #520]
22040
+ ldr r3, [r4, #-36]
2172922041 cmp r3, #0
21730
- beq .L3657
22042
+ beq .L3582
2173122043 bl pm_gc
2173222044 mov r3, #0
21733
- str r3, [r4, #520]
21734
-.L3657:
22045
+ str r3, [r4, #-36]
22046
+.L3582:
2173522047 mov r0, #0
21736
- ldmfd sp!, {r3, r4, r5, pc}
21737
-.L3663:
22048
+ pop {r4, r5, r6, pc}
22049
+.L3588:
2173822050 .align 2
21739
-.L3662:
22051
+.L3587:
2174022052 .word .LANCHOR3
2174122053 .fnend
2174222054 .size pm_flush_id, .-pm_flush_id
2174322055 .align 2
2174422056 .global pm_flush
22057
+ .syntax unified
22058
+ .arm
22059
+ .fpu softvfp
2174522060 .type pm_flush, %function
2174622061 pm_flush:
2174722062 .fnstart
2174822063 @ args = 0, pretend = 0, frame = 0
2174922064 @ frame_needed = 0, uses_anonymous_args = 0
21750
- stmfd sp!, {r3, r4, r5, lr}
21751
- .save {r3, r4, r5, lr}
22065
+ push {r4, r5, r6, lr}
22066
+ .save {r4, r5, r6, lr}
2175222067 mov r4, #0
21753
- ldr r5, .L3669
21754
-.L3666:
21755
- add r3, r5, r4, asl #3
22068
+ ldr r5, .L3594
22069
+.L3591:
22070
+ add r3, r5, r4, lsl #3
2175622071 uxth r0, r4
2175722072 ldrsh r3, [r3, #2]
2175822073 cmp r3, #0
21759
- bge .L3665
22074
+ bge .L3590
2176022075 bl pm_flush_id
21761
-.L3665:
22076
+.L3590:
2176222077 add r4, r4, #1
2176322078 cmp r4, #32
21764
- bne .L3666
22079
+ bne .L3591
2176522080 mov r0, #0
21766
- ldmfd sp!, {r3, r4, r5, pc}
21767
-.L3670:
22081
+ pop {r4, r5, r6, pc}
22082
+.L3595:
2176822083 .align 2
21769
-.L3669:
21770
- .word .LANCHOR3-2528
22084
+.L3594:
22085
+ .word .LANCHOR3-2532
2177122086 .fnend
2177222087 .size pm_flush, .-pm_flush
2177322088 .align 2
2177422089 .global flt_sys_flush
22090
+ .syntax unified
22091
+ .arm
22092
+ .fpu softvfp
2177522093 .type flt_sys_flush, %function
2177622094 flt_sys_flush:
2177722095 .fnstart
2177822096 @ args = 0, pretend = 0, frame = 0
2177922097 @ frame_needed = 0, uses_anonymous_args = 0
21780
- stmfd sp!, {r3, lr}
21781
- .save {r3, lr}
22098
+ push {r4, lr}
22099
+ .save {r4, lr}
2178222100 bl ftl_flush
2178322101 bl pm_flush
2178422102 bl ftl_ext_info_flush
2178522103 mov r0, #0
21786
- ldmfd sp!, {r3, lr}
22104
+ pop {r4, lr}
2178722105 b ftl_info_flush
2178822106 .fnend
2178922107 .size flt_sys_flush, .-flt_sys_flush
2179022108 .align 2
2179122109 .global zftl_deinit
22110
+ .syntax unified
22111
+ .arm
22112
+ .fpu softvfp
2179222113 .type zftl_deinit, %function
2179322114 zftl_deinit:
2179422115 .fnstart
2179522116 @ args = 0, pretend = 0, frame = 0
2179622117 @ frame_needed = 0, uses_anonymous_args = 0
21797
- stmfd sp!, {r3, lr}
21798
- .save {r3, lr}
22118
+ push {r4, lr}
22119
+ .save {r4, lr}
2179922120 bl zftl_flash_de_init
2180022121 bl flt_sys_flush
21801
- ldmfd sp!, {r3, lr}
22122
+ pop {r4, lr}
2180222123 b zftl_flash_de_init
2180322124 .fnend
2180422125 .size zftl_deinit, .-zftl_deinit
2180522126 .align 2
2180622127 .global pm_init
22128
+ .syntax unified
22129
+ .arm
22130
+ .fpu softvfp
2180722131 .type pm_init, %function
2180822132 pm_init:
2180922133 .fnstart
2181022134 @ args = 0, pretend = 0, frame = 8
2181122135 @ frame_needed = 0, uses_anonymous_args = 0
21812
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
22136
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2181322137 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
21814
- mov r7, r0
21815
- ldr r4, .L3699
22138
+ mov r5, #0
22139
+ ldr r8, .L3623
22140
+ mvn r9, #0
22141
+ mov r10, r5
22142
+ mov r3, #1
22143
+ ldr r4, .L3623+4
2181622144 .pad #20
2181722145 sub sp, sp, #20
22146
+ mov r7, r0
2181822147 mov r0, #64
21819
- mov r5, #0
21820
- mov r3, #1
21821
- ldr r10, .L3699+4
21822
- str r5, [r4, #-160]
21823
- sub r8, r4, #2528
21824
- str r5, [r4, #520]
21825
- mvn r9, #0
21826
- strb r3, [r4, #528]
21827
- bl ftl_malloc
21828
- str r0, [r4, #524]
21829
-.L3677:
21830
- mov r3, #0
21831
- cmp r7, r3
22148
+ str r5, [r4, #-184]
22149
+ str r5, [r4, #-36]
22150
+ strb r3, [r4, #-28]
22151
+ bl ftl_dma32_malloc
22152
+ str r0, [r4, #-32]
22153
+.L3602:
22154
+ cmp r7, #0
2183222155 mov r6, r8
2183322156 strh r9, [r6, r5]! @ movhi
21834
- strh r3, [r6, #2] @ movhi
21835
- beq .L3676
21836
- ldrb r0, [r10, #2772] @ zero_extendqisi2
21837
- mov r0, r0, asl #9
21838
- bl ftl_malloc
22157
+ strh r10, [r6, #2] @ movhi
22158
+ beq .L3601
22159
+ ldrb r0, [r4, #-2546] @ zero_extendqisi2
22160
+ lsl r0, r0, #9
22161
+ bl ftl_dma32_malloc
2183922162 str r0, [r6, #4]
21840
-.L3676:
22163
+.L3601:
2184122164 add r5, r5, #8
2184222165 cmp r5, #256
21843
- bne .L3677
21844
- ldr r5, .L3699+4
21845
- ldr r10, [r4, #-2524]
21846
- ldr r6, [r4, #524]
21847
- ldr r3, [r5, #2804]
21848
- mov r2, r10
21849
- add r3, r3, #692
21850
- ldrb r0, [r3, #2] @ zero_extendqisi2
21851
- ldrh r1, [r3]
22166
+ bne .L3602
22167
+ ldr r5, .L3623+8
22168
+ ldr r9, [r4, #-2528]
22169
+ ldr r6, [r4, #-32]
22170
+ ldr r3, [r5, #2800]
22171
+ add r2, r3, #692
22172
+ ldrb r0, [r3, #694] @ zero_extendqisi2
2185222173 mov r3, #4
22174
+ ldrh r1, [r2]
2185322175 str r3, [sp]
22176
+ mov r2, r9
2185422177 mov r3, r6
2185522178 bl flash_get_last_written_page
21856
- ldr r3, [r5, #2804]
22179
+ ldr r3, [r5, #2800]
22180
+ mov r8, r0
2185722181 add r2, r3, #696
2185822182 ldrh r2, [r2]
2185922183 cmp r2, r0
21860
- mov r7, r0
21861
- bgt .L3678
21862
- add r3, r3, #692
21863
- ldr r0, .L3699+8
21864
- mov fp, r5
21865
- ldrh r1, [r3]
21866
- mov r3, r7
21867
- bl printk
21868
- ldr r3, [r5, #2804]
21869
- add r7, r7, #1
21870
- add r3, r3, #696
21871
- ldrh r9, [r3]
21872
-.L3679:
21873
- sxth r3, r9
21874
- cmp r3, r7
21875
- bge .L3698
21876
- ldr r2, [r5, #2804]
21877
- ldr r0, .L3699+12
21878
- add r1, r2, #692
21879
- ldrh r8, [r0]
22184
+ bgt .L3603
22185
+ add r1, r3, #692
22186
+ mov r3, r0
2188022187 ldrh r1, [r1]
21881
- ldrb r0, [r2, #694] @ zero_extendqisi2
21882
- mov r2, r10
21883
- mla r8, r8, r1, r3
21884
- ldrb r3, [r5, #2772] @ zero_extendqisi2
21885
- str r3, [sp]
21886
- mov r3, r6
21887
- mov r1, r8
21888
- bl flash_read_page_en
21889
- ldr r3, [r5, #2804]
21890
- add r3, r3, #692
21891
- ldr r2, [r3, #-644]
21892
- add r2, r2, #1
21893
- str r2, [r3, #-644]
21894
- add r3, r3, #2
21895
- ldr r1, [r6]
21896
- mov r2, r8
21897
- ldrh r3, [r3]
21898
- str r0, [sp, #12]
21899
- ldr r0, .L3699+16
22188
+ ldr r0, .L3623+12
2190022189 bl printk
21901
- ldr ip, [sp, #12]
21902
- cmp ip, #512
21903
- cmnne ip, #1
21904
- beq .L3680
21905
- ldr r3, [fp, #2804]
21906
- ldr r2, [r6]
22190
+ ldr r3, [r5, #2800]
2190722191 add r3, r3, #696
21908
- add r3, r3, #2
21909
- ldrh r3, [r3]
21910
- cmp r2, r3
21911
- bcs .L3680
21912
- ldr r3, [r6, #8]
21913
- cmp r3, #0
21914
- beq .L3681
21915
- ldrb r1, [fp, #2772] @ zero_extendqisi2
21916
- mov r0, r10
22192
+ ldrsh r7, [r3]
22193
+ add r3, r8, #1
2191722194 str r3, [sp, #12]
21918
- mov r1, r1, asl #9
21919
- bl js_hash
22195
+.L3604:
2192022196 ldr r3, [sp, #12]
21921
- cmp r3, r0
21922
- beq .L3681
21923
- ldr r1, [r6, #8]
21924
- ldr r0, .L3699+20
21925
- bl printk
21926
- b .L3680
21927
-.L3681:
21928
- ldr r3, [r6]
21929
- ldr r2, [r5, #2804]
21930
- add r3, r3, #176
21931
- str r8, [r2, r3, asl #2]
21932
-.L3680:
21933
- add r9, r9, #1
21934
- uxth r9, r9
21935
- b .L3679
21936
-.L3698:
22197
+ cmp r7, r3
22198
+ blt .L3607
2193722199 mov r3, #1
21938
- strb r3, [r4, #209]
21939
- ldr r3, [r5, #2804]
22200
+ ldrh r2, [sp, #12]
22201
+ strb r3, [r4, #-47]
22202
+ ldr r3, [r5, #2800]
2194022203 add r3, r3, #696
21941
- strh r7, [r3] @ movhi
22204
+ strh r2, [r3] @ movhi
2194222205 bl pm_free_sblk
21943
-.L3678:
21944
- movw r3, #542
22206
+.L3603:
22207
+ ldrh r2, [r4, #-14]
2194522208 mov r1, #255
21946
- ldrh r2, [r4, r3]
21947
- ldr r0, [r4, #-2524]
22209
+ ldr r0, [r4, #-2528]
2194822210 bl ftl_memset
22211
+ ldr r1, [r4, #-2528]
2194922212 mvn r0, #0
21950
- ldr r1, [r4, #-2524]
2195122213 bl pm_write_page
21952
- ldrb r3, [r4, #209] @ zero_extendqisi2
21953
- ldr r5, .L3699
22214
+ ldrb r3, [r4, #-47] @ zero_extendqisi2
2195422215 cmp r3, #0
21955
- beq .L3683
21956
- ldr r1, [r5, #-2524]
22216
+ beq .L3608
22217
+ ldr r1, [r4, #-2528]
2195722218 mvn r0, #0
2195822219 bl pm_write_page
21959
- ldr r1, [r5, #-2524]
22220
+ ldr r1, [r4, #-2528]
2196022221 mvn r0, #0
2196122222 bl pm_write_page
22223
+ ldr r1, [r4, #-2528]
2196222224 mvn r0, #0
21963
- ldr r1, [r5, #-2524]
2196422225 bl pm_write_page
21965
-.L3683:
22226
+.L3608:
2196622227 bl pm_free_sblk
2196722228 bl pm_gc
2196822229 mov r0, #0
2196922230 add sp, sp, #20
2197022231 @ sp needed
21971
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
21972
-.L3700:
22232
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
22233
+.L3607:
22234
+ ldr r3, [r5, #2800]
22235
+ movw fp, #694
22236
+ add r2, r3, #692
22237
+ ldrb r0, [r3, fp] @ zero_extendqisi2
22238
+ ldrh r8, [r2]
22239
+ ldr r2, .L3623+16
22240
+ ldrb r3, [r4, #-2546] @ zero_extendqisi2
22241
+ ldrh r2, [r2]
22242
+ str r3, [sp]
22243
+ mov r3, r6
22244
+ mla r8, r2, r8, r7
22245
+ mov r2, r9
22246
+ mov r1, r8
22247
+ bl flash_read_page_en
22248
+ ldr r3, [r5, #2800]
22249
+ mov r10, r0
22250
+ ldr r0, .L3623+20
22251
+ ldr r2, [r3, #48]
22252
+ add r2, r2, #1
22253
+ str r2, [r3, #48]
22254
+ mov r2, r8
22255
+ ldrh r3, [r3, fp]
22256
+ ldr r1, [r6]
22257
+ bl printk
22258
+ cmp r10, #512
22259
+ cmnne r10, #1
22260
+ beq .L3605
22261
+ ldr r2, [r5, #2800]
22262
+ movw r3, #698
22263
+ ldrh r3, [r2, r3]
22264
+ ldr r2, [r6]
22265
+ cmp r2, r3
22266
+ bcs .L3605
22267
+ ldr r10, [r6, #8]
22268
+ cmp r10, #0
22269
+ beq .L3606
22270
+ ldrb r1, [r4, #-2546] @ zero_extendqisi2
22271
+ mov r0, r9
22272
+ lsl r1, r1, #9
22273
+ bl js_hash
22274
+ cmp r10, r0
22275
+ beq .L3606
22276
+ ldr r1, [r6, #8]
22277
+ ldr r0, .L3623+24
22278
+ bl printk
22279
+.L3605:
22280
+ add r7, r7, #1
22281
+ sxth r7, r7
22282
+ b .L3604
22283
+.L3606:
22284
+ ldr r3, [r6]
22285
+ ldr r2, [r5, #2800]
22286
+ add r3, r3, #176
22287
+ str r8, [r2, r3, lsl #2]
22288
+ b .L3605
22289
+.L3624:
2197322290 .align 2
21974
-.L3699:
22291
+.L3623:
22292
+ .word .LANCHOR3-2532
2197522293 .word .LANCHOR3
2197622294 .word .LANCHOR0
22295
+ .word .LC241
22296
+ .word .LANCHOR3-3074
2197722297 .word .LC242
21978
- .word .LANCHOR3-3066
2197922298 .word .LC243
21980
- .word .LC244
2198122299 .fnend
2198222300 .size pm_init, .-pm_init
2198322301 .align 2
2198422302 .global pm_log2phys
22303
+ .syntax unified
22304
+ .arm
22305
+ .fpu softvfp
2198522306 .type pm_log2phys, %function
2198622307 pm_log2phys:
2198722308 .fnstart
21988
- @ args = 0, pretend = 0, frame = 0
22309
+ @ args = 0, pretend = 0, frame = 8
2198922310 @ frame_needed = 0, uses_anonymous_args = 0
21990
- stmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
21991
- .save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
21992
- mov r6, r1
21993
- ldr r9, .L3720
21994
- mov r10, r0
21995
- mov r8, r2
21996
- ldrb r4, [r9, #2772] @ zero_extendqisi2
21997
- mov r1, r4, asl #7
21998
- mov r5, r4, asl #7
22311
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
22312
+ .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
22313
+ .pad #12
22314
+ mov r7, r1
22315
+ ldr r8, .L3641
22316
+ mov r6, r0
22317
+ mov r9, r2
22318
+ ldr r10, .L3641+4
22319
+ ldrb r4, [r8, #-2546] @ zero_extendqisi2
22320
+ lsl r1, r4, #7
22321
+ lsl r4, r4, #7
2199922322 bl __aeabi_uidiv
22000
- ldr r2, [r9, #2784]
22001
- cmp r10, r2
22002
- movcc r3, #0
22003
- ldrcc r2, .L3720+4
22004
- uxth fp, r0
22005
- mov r7, r0
22006
- smulbb r5, r5, fp
22007
- rsb r5, r5, r10
22008
- uxth r5, r5
22009
- bcc .L3702
22010
- mov r1, r10
22011
- ldr r0, .L3720+8
22323
+ str r0, [sp, #4]
22324
+ ldrh fp, [sp, #4]
22325
+ ldr r2, [r10, #2780]
22326
+ smulbb r4, r4, fp
22327
+ cmp r6, r2
22328
+ sub r4, r6, r4
22329
+ bcc .L3626
22330
+ mov r1, r6
22331
+ ldr r0, .L3641+8
2201222332 bl printk
22333
+ cmp r9, #0
2201322334 mvn r0, #0
22014
- cmp r8, #0
22015
- streq r0, [r6]
22016
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
22017
-.L3718:
22018
- ldrh r1, [r1, r2]
22019
- cmp r1, fp
22020
- beq .L3705
22021
-.L3704:
22022
- add r3, r3, #1
22023
- cmp r3, #32
22024
- beq .L3717
22025
-.L3702:
22026
- mov r1, r3, asl #3
22027
- uxth r4, r3
22028
- add r0, r2, r1
22029
- ldr r10, .L3720+4
22030
- ldr r0, [r0, #4]
22031
- cmp r0, #0
22032
- bne .L3718
22033
- b .L3704
22034
-.L3717:
22035
- bl pm_select_ram_region
22036
- mov r3, r0, asl #3
22037
- mov r4, r0
22038
- add r2, r10, r3
22039
- ldrh r1, [r10, r3]
22040
- movw r3, #65535
22041
- cmp r1, r3
22042
- bne .L3719
22043
-.L3708:
22044
- ldr r3, .L3720+12
22045
- mov r0, fp
22046
- mov r1, r4
22047
- strb r4, [r3, #544]
22048
- bl load_l2p_region
22049
-.L3705:
22050
- cmp r8, #0
22051
- ldr r1, .L3720+12
22052
- mov r4, r4, asl #3
22053
- bne .L3706
22054
- add r3, r1, r4
22335
+ streq r0, [r7]
22336
+.L3625:
22337
+ add sp, sp, #12
22338
+ @ sp needed
22339
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
22340
+.L3626:
22341
+ ldr r1, .L3641+12
22342
+ uxth r4, r4
22343
+ mov r2, #0
22344
+ sub r6, r8, #2528
22345
+.L3632:
22346
+ lsl r0, r2, #3
22347
+ uxth r5, r2
22348
+ add ip, r1, r0
22349
+ ldr ip, [ip, #4]
22350
+ cmp ip, #0
22351
+ beq .L3628
22352
+ ldrh r0, [r0, r1]
22353
+ cmp r0, fp
22354
+ bne .L3628
22355
+.L3629:
22356
+ cmp r9, #0
22357
+ lsl r5, r5, #3
22358
+ bne .L3630
22359
+ add r2, r8, r5
22360
+ ldr r2, [r2, #-2528]
22361
+ ldr r1, [r2, r4, lsl #2]
2205522362 mvn r2, #0
22056
- ldr r3, [r3, #-2524]
22057
- ldr r3, [r3, r5, asl #2]
22058
- str r3, [r6]
22059
- ldrb r0, [r9, #1189] @ zero_extendqisi2
22363
+ str r1, [r7]
22364
+ ldrb r0, [r10, #1153] @ zero_extendqisi2
22365
+ ldrb r3, [r8, #-3072] @ zero_extendqisi2
2206022366 rsb ip, r0, #24
22061
- mvn r2, r2, asl r0
22062
- and r3, r2, r3, lsr ip
22063
- ldrb r2, [r1, #-3064] @ zero_extendqisi2
22064
- cmp r3, r2
22367
+ mvn r2, r2, lsl r0
22368
+ and r2, r2, r1, lsr ip
22369
+ cmp r2, r3
2206522370 mvncs r3, #0
22066
- strcs r3, [r6]
22067
- b .L3707
22068
-.L3706:
22069
- add r3, r1, r4
22070
- ldr r2, [r6]
22071
- ldr r3, [r3, #-2524]
22072
- str r2, [r3, r5, asl #2]
22073
- add r2, r10, r4
22074
- strb r7, [r1, #-2272]
22075
- ldrh r3, [r2, #2]
22076
- mvn r3, r3, asl #17
22077
- mvn r3, r3, lsr #17
22078
- strh r3, [r2, #2] @ movhi
22079
-.L3707:
22080
- add r4, r10, r4
22371
+ strcs r3, [r7]
22372
+.L3631:
22373
+ sub r6, r6, #4
2208122374 movw r2, #32767
22375
+ add r6, r6, r5
2208222376 mov r0, #0
22083
- ldrh r3, [r4, #2]
22377
+ ldrh r3, [r6, #2]
2208422378 ubfx r1, r3, #0, #15
2208522379 cmp r1, r2
2208622380 addne r3, r3, #1
22087
- strneh r3, [r4, #2] @ movhi
22088
- ldmfd sp!, {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
22089
-.L3719:
22090
- ldrsh r3, [r2, #2]
22091
- cmp r3, #0
22092
- bge .L3708
22381
+ strhne r3, [r6, #2] @ movhi
22382
+ b .L3625
22383
+.L3630:
22384
+ add r2, r8, r5
22385
+ ldr r1, [r7]
22386
+ ldr r2, [r2, #-2528]
22387
+ ldrb r3, [sp, #4] @ zero_extendqisi2
22388
+ str r1, [r2, r4, lsl #2]
22389
+ sub r1, r6, #4
22390
+ add r1, r1, r5
22391
+ strb r3, [r8, #-2276]
22392
+ ldrh r2, [r1, #2]
22393
+ mvn r2, r2, lsl #17
22394
+ mvn r2, r2, lsr #17
22395
+ strh r2, [r1, #2] @ movhi
22396
+ b .L3631
22397
+.L3628:
22398
+ add r2, r2, #1
22399
+ cmp r2, #32
22400
+ bne .L3632
22401
+ bl pm_select_ram_region
22402
+ lsl r1, r0, #3
22403
+ sub r2, r6, #4
22404
+ mov r5, r0
22405
+ add ip, r2, r1
22406
+ ldrh r1, [r2, r1]
22407
+ movw r2, #65535
22408
+ cmp r1, r2
22409
+ beq .L3633
22410
+ ldrsh r2, [ip, #2]
22411
+ cmp r2, #0
22412
+ bge .L3633
2209322413 bl pm_flush_id
22094
- b .L3708
22095
-.L3721:
22414
+.L3633:
22415
+ mov r1, r5
22416
+ mov r0, fp
22417
+ strb r5, [r8, #-12]
22418
+ bl load_l2p_region
22419
+ b .L3629
22420
+.L3642:
2209622421 .align 2
22097
-.L3720:
22098
- .word .LANCHOR0
22099
- .word .LANCHOR3-2528
22100
- .word .LC245
22422
+.L3641:
2210122423 .word .LANCHOR3
22424
+ .word .LANCHOR0
22425
+ .word .LC244
22426
+ .word .LANCHOR3-2532
2210222427 .fnend
2210322428 .size pm_log2phys, .-pm_log2phys
2210422429 .align 2
2210522430 .global gc_recovery
22431
+ .syntax unified
22432
+ .arm
22433
+ .fpu softvfp
2210622434 .type gc_recovery, %function
2210722435 gc_recovery:
2210822436 .fnstart
22109
- @ args = 0, pretend = 0, frame = 32
22437
+ @ args = 0, pretend = 0, frame = 40
2211022438 @ frame_needed = 0, uses_anonymous_args = 0
22111
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
22439
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2211222440 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2211322441 movw r3, #65535
22114
- ldr r7, .L3822
22115
- mov r6, #0
22116
- ldr r8, .L3822+4
22117
- .pad #68
22118
- sub sp, sp, #68
22119
- ldr r5, [r7, #1092]
22120
- strb r6, [r8, #-3115]
22121
- strb r6, [r8, #-182]
22122
- ldrh r4, [r5, #80]
22123
- cmp r4, r3
22124
- beq .L3723
22442
+ ldr r8, .L3744
22443
+ mov r5, #0
22444
+ .pad #76
22445
+ sub sp, sp, #76
22446
+ ldr r7, .L3744+4
22447
+ ldr r4, [r8, #1096]
22448
+ strb r5, [r7, #-3119]
22449
+ ldrh r2, [r4, #80]
22450
+ strb r5, [r7, #-144]
22451
+ cmp r2, r3
22452
+ beq .L3644
2212522453 mvn r3, #0
2212622454 mov r0, #1
22127
- strh r3, [r5, #130] @ movhi
22455
+ strh r3, [r4, #130] @ movhi
2212822456 bl buf_alloc
22129
- ldrb r3, [r5, #89] @ zero_extendqisi2
22130
- add r3, r5, r3, asl #1
22131
- ldrh r1, [r3, #94]
22132
- sub r3, r8, #3056
22133
- ldrh r3, [r3, #-10]
22134
- mul r1, r3, r1
22135
- ldrb r3, [r8, #-3124] @ zero_extendqisi2
22136
- cmp r3, #2
22137
- mov r4, r0
22138
- str r1, [sp, #56]
22139
- beq .L3724
22140
- ldrb r2, [r7, #1196] @ zero_extendqisi2
22141
- cmp r2, r6
22142
- bne .L3724
22143
- ldrb r2, [r7, #1197] @ zero_extendqisi2
22144
- cmp r2, r6
22145
- beq .L3725
22146
-.L3724:
22147
- ldr r2, .L3822+8
22148
- ldrh r2, [r2, #-10]
22149
- sub r2, r2, #1
22150
- add r2, r2, r1
22151
- orr r3, r2, r3, asl #24
22152
- b .L3814
22153
-.L3725:
22154
- cmp r3, #3
22155
- bne .L3726
22156
- sub r3, r8, #3088
22157
- ldrh r3, [r3, #-8]
22158
- sub r3, r3, #1
22159
- add r3, r3, r1
22160
- orr r3, r3, #50331648
22161
-.L3814:
22162
- str r3, [r4, #24]
22163
-.L3726:
22164
- mov r0, r4
22165
- mov r1, #1
22166
- bl sblk_read_page
22167
- ldr r3, [r4, #36]
22168
- cmn r3, #1
22169
- cmpne r3, #512
22170
- beq .L3727
22171
- ldr r3, [r4, #12]
22172
- ldr r6, .L3822+12
22173
- ldr r3, [r3]
22174
- cmp r3, r6
22175
- beq .L3728
22176
-.L3727:
22177
- mov r0, r4
22178
- bl zbuf_free
22179
- ldr r3, [r4, #4]
22180
- ldr r2, [r4, #12]
22181
- ldr r0, .L3822+16
22182
- ldr r1, [r3, #4]
22183
- str r1, [sp]
22184
- ldr r1, [r3, #8]
22185
- str r1, [sp, #4]
22186
- ldr r1, [r3, #12]
22187
- str r1, [sp, #8]
22188
- ldr r1, [r2]
22189
- str r1, [sp, #12]
22190
- ldr r1, [r2, #4]
22191
- str r1, [sp, #16]
22192
- ldr r1, [r2, #8]
22193
- str r1, [sp, #20]
22194
- ldr r2, [r2, #12]
22195
- str r2, [sp, #24]
22196
- ldr r1, [r4, #24]
22197
- ldr r2, [r4, #36]
22198
- ldr r3, [r3]
22199
- bl printk
22200
- b .L3818
22201
-.L3728:
22202
- ldrb r3, [r8, #545] @ zero_extendqisi2
22203
- ldr r10, .L3822+4
22204
- cmp r3, #2
22205
- sub r9, r10, #3104
22206
- bne .L3730
22207
- ldrb r3, [r10, #-3124] @ zero_extendqisi2
22208
- cmp r3, #3
22209
- bne .L3730
22210
- ldrh r2, [r9, #-10]
22211
- movw r3, #542
22212
- ldrb ip, [r10, #-3123] @ zero_extendqisi2
22213
- ldrh r3, [r10, r3]
22214
- mov r2, r2, asl #2
22215
- ldr r1, [r10, #-172]
22216
- smulbb r2, ip, r2
22217
- mov r0, r3, lsr #2
22218
- add r0, r1, r0, asl #2
22219
- ldr r1, [r4, #4]
22220
- rsb r2, r3, r2
22221
- uxth r2, r2
22222
- bl ftl_memcpy
22223
- ldrb r3, [r7, #1196] @ zero_extendqisi2
22224
- cmp r3, #0
22225
- bne .L3731
22226
- ldr r3, .L3822
22227
- ldrb r3, [r3, #1197] @ zero_extendqisi2
22228
- cmp r3, #0
22229
- beq .L3732
22230
-.L3731:
22231
- ldr r3, [r4, #24]
22232
- sub r3, r3, #1
22233
- b .L3733
22234
-.L3732:
22235
- sub r10, r10, #3088
22236
- ldr r3, [sp, #56]
22237
- ldrh r2, [r10, #-8]
22457
+ ldrb r3, [r4, #89] @ zero_extendqisi2
22458
+ mov r6, r0
22459
+ ldrb r1, [r7, #-3128] @ zero_extendqisi2
22460
+ add r3, r4, r3, lsl #1
22461
+ cmp r1, #2
22462
+ ldrh r2, [r3, #94]
22463
+ sub r3, r7, #3072
22464
+ ldrh r3, [r3, #-2]
22465
+ mul r2, r3, r2
22466
+ str r2, [sp, #64]
22467
+ beq .L3645
22468
+ ldrb r3, [r8, #1158] @ zero_extendqisi2
22469
+ cmp r3, r5
22470
+ bne .L3645
22471
+ ldrb r3, [r8, #1159] @ zero_extendqisi2
22472
+ cmp r3, r5
22473
+ beq .L3646
22474
+.L3645:
22475
+ ldr r3, .L3744+8
22476
+ ldrh r3, [r3, #-14]
2223822477 sub r3, r3, #1
2223922478 add r3, r3, r2
22240
- orr r3, r3, #33554432
22241
-.L3733:
22242
- str r3, [r4, #24]
22243
- mov r0, r4
22479
+ orr r3, r3, r1, lsl #24
22480
+.L3734:
22481
+ str r3, [r6, #24]
22482
+.L3647:
2224422483 mov r1, #1
22484
+ mov r0, r6
2224522485 bl sblk_read_page
22246
- ldr r3, [r4, #36]
22486
+ ldr r3, [r6, #36]
2224722487 cmn r3, #1
2224822488 cmpne r3, #512
22249
- beq .L3734
22250
- ldr r3, [r4, #12]
22489
+ beq .L3648
22490
+ ldr r3, [r6, #12]
22491
+ ldr r9, .L3744+12
2225122492 ldr r3, [r3]
22252
- cmp r3, r6
22253
- beq .L3735
22254
-.L3734:
22255
- mov r0, r4
22493
+ cmp r3, r9
22494
+ beq .L3649
22495
+.L3648:
22496
+ mov r0, r6
2225622497 bl zbuf_free
22257
-.L3818:
22258
- ldrh r4, [r5, #80]
22259
- mov r6, #0
22260
- ldr r3, [r7, #1088]
22261
- mov r4, r4, asl #1
22262
- strh r6, [r3, r4] @ movhi
22263
- ldrh r2, [r5, #80]
22264
- ldr r3, [r7, #1092]
22265
- strh r2, [r3, #130] @ movhi
22266
- b .L3729
22267
-.L3735:
22268
- movw r3, #542
22269
- ldr r0, [r8, #-172]
22270
- ldr r1, [r4, #4]
22271
- ldrh r2, [r8, r3]
22272
- b .L3815
22273
-.L3730:
22274
- ldrh r2, [r9, #-10]
22275
- ldrb r3, [r8, #-3123] @ zero_extendqisi2
22276
- ldr r0, [r8, #-172]
22277
- ldr r1, [r4, #4]
22278
- mul r2, r3, r2
22279
- mov r2, r2, asl #2
22280
-.L3815:
22281
- bl ftl_memcpy
22282
- ldrb r3, [r8, #-3123] @ zero_extendqisi2
22283
- ldrh r2, [r9, #-10]
22284
- ldr r10, .L3822+4
22285
- mul r2, r3, r2
22286
- ldrb r3, [r7, #2772] @ zero_extendqisi2
22287
- sub r6, r10, #3104
22288
- cmp r3, r2, asr #6
22289
- mov r2, r2, asl #2
22290
- bge .L3737
22291
- ldr r0, [r10, #-168]
22292
- mov r1, #0
22293
- bl ftl_memset
22294
- ldrb r9, [r10, #545] @ zero_extendqisi2
22295
- cmp r9, #1
22296
- movne r9, #1
22297
- movne r6, #0
22298
- bne .L3738
22299
- ldrh r1, [r6, #-10]
22300
- movw r2, #542
22301
- ldrb r3, [r10, #-3123] @ zero_extendqisi2
22302
- ldrh r6, [r10, r2]
22303
- ldr r0, [r10, #-168]
22304
- mul r3, r3, r1
22305
- ldr r1, [r4, #4]
22306
- sub r6, r6, r3, asl #2
22307
- add r1, r1, r3, asl #2
22308
- mov r2, r6
22309
- bl ftl_memcpy
22310
- b .L3738
22311
-.L3737:
22312
- ldr r1, [r4, #4]
22313
- mov r9, #0
22314
- ldr r0, [r10, #-168]
22315
- mov r6, r9
22316
- add r1, r1, r2
22317
- bl ftl_memcpy
22318
-.L3738:
22319
- ldr r3, .L3822+4
22320
- sub r2, r3, #3088
22321
- ldrh r2, [r2, #-8]
22322
- str r2, [sp, #36]
22323
- ldrb r2, [r8, #-3124] @ zero_extendqisi2
22324
- cmp r2, #2
22325
- str r2, [sp, #32]
22326
- bne .L3739
22327
- ldrb r3, [r3, #-3122] @ zero_extendqisi2
22328
- cmp r3, #0
22329
- beq .L3740
22330
-.L3739:
22331
- ldrb r3, [r7, #1196] @ zero_extendqisi2
22332
- cmp r3, #0
22333
- beq .L3741
22334
-.L3740:
22335
- ldr r3, [sp, #32]
22336
- ldr r2, [sp, #36]
22337
- mul r3, r3, r2
22338
- str r3, [sp, #36]
22339
- mov r3, #1
22340
- str r3, [sp, #32]
22341
-.L3741:
22342
- ldr r10, .L3822+4
22343
- mov r7, #0
22344
- str r7, [sp, #40]
22345
-.L3742:
22346
- ldr r3, [sp, #36]
22347
- cmp r7, r3
22348
- bcs .L3755
22349
- add ip, r5, #96
22350
- add r3, r7, r7, asl #1
22351
- sub r3, r3, #1
22352
- str r3, [sp, #48]
22353
- mov r3, #0
22354
- str r3, [sp, #44]
22355
-.L3756:
22356
- ldrb r3, [r5, #89] @ zero_extendqisi2
22357
- ldr r2, [sp, #44]
22358
- cmp r2, r3
22359
- bge .L3752
22360
- ldr r3, [sp, #40]
22361
- mov fp, #1
22362
- mov r8, r3, asl #2
22363
-.L3753:
22364
- ldr r3, [sp, #32]
22365
- cmp fp, r3
22366
- bhi .L3820
22367
- ldr r3, .L3822+20
22368
- ldrh r2, [ip]
22369
- ldrb r1, [r10, #-3124] @ zero_extendqisi2
22370
- ldrh r3, [r3]
22371
- cmp r1, #2
22372
- mul r3, r3, r2
22373
- str r3, [sp, #56]
22374
- beq .L3743
22375
- ldr r2, .L3822
22376
- ldrb r2, [r2, #1196] @ zero_extendqisi2
22377
- cmp r2, #0
22378
- beq .L3744
22379
-.L3743:
22380
- sub r2, r7, #1
22381
- add r3, r2, r3
22382
- add r3, r3, fp
22383
- orr r3, r3, r1, asl #24
22384
- b .L3816
22385
-.L3744:
22386
- cmp r1, #3
22387
- addne r3, r3, r7
22388
- bne .L3816
22389
- ldr r2, .L3822
22390
- ldrb r2, [r2, #1197] @ zero_extendqisi2
22391
- cmp r2, #0
22392
- addeq r3, r3, r7
22393
- ldrne r2, [sp, #48]
22394
- orreq r3, r3, fp, asl #24
22395
- addne r3, r3, r2
22396
- addne r3, r3, fp
22397
- orrne r3, r3, #50331648
22398
-.L3816:
22399
- str r3, [r4, #24]
22400
- mov r0, r4
22401
- mov r1, #1
22402
- str ip, [sp, #52]
22403
- bl sblk_read_page
22404
- cmp r9, #0
22405
- ldr ip, [sp, #52]
22406
- beq .L3748
22407
- ldr r3, [r10, #-168]
22408
- ldr r2, [r3, r8]
22409
- cmp r2, #0
22410
- ldreq r2, [r4, #12]
22411
- ldreq r2, [r2, #8]
22412
- streq r2, [r3, r8]
22413
-.L3748:
22414
- ldr r3, [r10, #-172]
22415
- ldr r2, [r4, #12]
22416
- ldr r3, [r3, r8]
22417
- ldr r1, [r2, #4]
22418
- cmp r3, r1
22419
- bne .L3749
22420
- ldr r0, [r10, #-168]
22421
- ldr lr, [r0, r8]
22422
- ldr r0, [r2, #8]
22423
- cmp lr, r0
22424
- beq .L3779
22425
-.L3749:
22426
- ldr r0, [r10, #-168]
22427
- str ip, [sp, #52]
22428
- ldr r0, [r0, r8]
22429
- str r0, [sp]
22430
- ldr r0, [r2]
22431
- stmib sp, {r0, r1}
22498
+ ldr r2, [r6, #12]
22499
+ ldr r3, [r6, #4]
22500
+ ldr r0, .L3744+16
22501
+ ldr r1, [r2, #12]
22502
+ str r1, [sp, #24]
2243222503 ldr r1, [r2, #8]
22433
- ldr r0, .L3822+24
22434
- str r1, [sp, #12]
22435
- ldr r2, [r2, #12]
22436
- str r2, [sp, #16]
22437
- ldr r1, [r4, #24]
22438
- ldr r2, [r4, #36]
22504
+ str r1, [sp, #20]
22505
+ ldr r1, [r2, #4]
22506
+ str r1, [sp, #16]
22507
+ ldr r2, [r2]
22508
+ str r2, [sp, #12]
22509
+ ldr r2, [r3, #12]
22510
+ str r2, [sp, #8]
22511
+ ldr r2, [r3, #8]
22512
+ str r2, [sp, #4]
22513
+ ldr r2, [r3, #4]
22514
+ str r2, [sp]
22515
+ ldr r3, [r3]
22516
+ ldr r2, [r6, #36]
22517
+ ldr r1, [r6, #24]
2243922518 bl printk
22440
- ldr r3, [r10, #-172]
22441
- ldr r3, [r3, r8]
22442
- cmn r3, #1
22443
- ldr ip, [sp, #52]
22444
- beq .L3779
22445
- mov r0, r4
22446
- bl zbuf_free
22447
- ldr r2, .L3822
22448
- ldrh r3, [r5, #80]
22449
- mov r0, #0
22450
- ldr r1, [r2, #1088]
22451
- mov r3, r3, asl #1
22452
- strh r0, [r1, r3] @ movhi
22453
- ldrh r1, [r5, #80]
22454
- ldr r3, [r2, #1092]
22455
- strh r1, [r3, #130] @ movhi
22456
- b .L3729
22457
-.L3779:
22458
- ldr r3, [sp, #40]
22459
- add fp, fp, #1
22460
- add r8, r8, #4
22461
- add r3, r3, #1
22462
- str r3, [sp, #40]
22463
- b .L3753
22464
-.L3820:
22465
- ldr r3, [sp, #44]
22466
- add ip, ip, #2
22467
- add r3, r3, #1
22468
- str r3, [sp, #44]
22469
- b .L3756
22470
-.L3752:
22471
- ldrb r3, [r10, #-3122] @ zero_extendqisi2
22472
- cmp r3, #0
22473
- addne r7, r7, #1
22474
- add r7, r7, #1
22475
- b .L3742
22476
-.L3755:
22477
- mov r0, r4
22478
- mov r6, #0
22479
- bl zbuf_free
22480
- ldr ip, .L3822+8
22481
- ldrb r8, [r5, #89] @ zero_extendqisi2
22482
- mov r7, r6
22483
- ldr r3, .L3822
22484
- add r10, ip, #3104
22485
- ldrh r9, [ip, #-10]
22486
- ldrh r4, [r5, #80]
22487
- ldr r3, [r3, #1088]
22488
- smulbb r8, r8, r9
22489
- mov r4, r4, asl #1
22490
- mov r9, r6
22491
- strh r8, [r3, r4] @ movhi
22492
-.L3757:
22493
- ldr r3, [sp, #36]
22494
- cmp r9, r3
22495
- bcs .L3771
22496
- add r2, r9, r9, asl #1
22497
- sub r3, r2, #1
22498
- str r3, [sp, #48]
22499
- add r3, r5, #96
22500
- str r3, [sp, #44]
22501
- mov r3, #0
22502
- str r3, [sp, #40]
22503
-.L3772:
22504
- ldrb r2, [r5, #89] @ zero_extendqisi2
22505
- ldr r3, [sp, #40]
22506
- cmp r3, r2
22507
- bge .L3768
22508
- mov r4, #1
22509
-.L3769:
22510
- ldr r3, [sp, #32]
22511
- cmp r4, r3
22512
- bhi .L3821
22513
- ldr r2, [r10, #-172]
22514
- ldr r8, [r2, r7, asl #2]
22515
- cmn r8, #1
22516
- beq .L3758
22517
- ldr r2, [r10, #-168]
22518
- mov r0, r8
22519
- ldr fp, [r2, r7, asl #2]
22520
- bl lpa_hash_get_ppa
22521
- cmn r0, #1
22522
- str r0, [sp, #60]
22523
- bne .L3759
22524
- mov r0, r8
22525
- add r1, sp, #60
22526
- mov r2, #0
22527
- bl pm_log2phys
22528
-.L3759:
22529
- ldr r3, [sp, #44]
22530
- ldrh r2, [r3]
22531
- ldr r3, .L3822+20
22532
- ldrh r1, [r3]
22533
- ldr r3, .L3822+4
22534
- mul r2, r1, r2
22535
- ldrb r1, [r3, #-3124] @ zero_extendqisi2
22536
- cmp r1, #2
22537
- beq .L3760
22538
- ldr r0, .L3822
22539
- ldrb lr, [r0, #1196] @ zero_extendqisi2
22540
- cmp lr, #0
22541
- beq .L3761
22542
-.L3760:
22543
- sub r0, r9, #1
22544
- add r2, r0, r2
22545
- add r2, r2, r4
22546
- orr r2, r2, r1, asl #24
22547
- b .L3817
22548
-.L3761:
22549
- cmp r1, #3
22550
- addne r2, r2, r9
22551
- bne .L3817
22552
- ldrb r1, [r0, #1197] @ zero_extendqisi2
22553
- cmp r1, #0
22554
- mov r1, r4, asl #24
22555
- addeq r2, r2, r9
22556
- ldrne r3, [sp, #48]
22557
- addne r2, r2, r3
22558
- addne r2, r2, r4
22559
- orr r2, r1, r2
22560
-.L3817:
22561
- str r2, [sp, #56]
22562
- ldr r2, .L3822+28
22563
- ldrh r0, [r2]
22564
- ldr r2, .L3822
22565
- ldrb r1, [r2, #1189] @ zero_extendqisi2
22566
- mov r2, #1
22567
- str r2, [sp, #52]
22568
- rsb r1, r1, #24
22569
- rsb r1, r0, r1
22570
- mov r1, r2, asl r1
22571
- sub r1, r1, #1
22572
- and r0, r1, fp, lsr r0
22573
- ldrb r1, [r10, #-3130] @ zero_extendqisi2
22574
- bl __aeabi_uidiv
22575
- ldr r1, [sp, #60]
22576
- ldr r2, [sp, #52]
22577
- cmp r1, fp
22578
- uxth fp, r0
22579
- bne .L3765
22580
- mov r0, r8
22581
- add r1, sp, #56
22582
- bl pm_log2phys
22583
- mov r0, fp
22584
- add r6, r6, #1
22585
- bl ftl_vpn_decrement
22586
- b .L3766
22587
-.L3765:
22588
- ldr r2, [sp, #56]
22589
- cmp r1, r2
22590
- addeq r6, r6, #1
22591
-.L3766:
22592
- ldr r1, .L3822
22593
- add r7, r7, #1
22594
- ldr r2, [r1, #1080]
22595
- add r2, r2, fp, asl #2
22596
- ldrb r2, [r2, #2] @ zero_extendqisi2
22597
- ands r2, r2, #224
22598
- bne .L3758
22599
- ldr r8, [r1, #1088]
22600
- mov fp, fp, asl #1
22601
- ldrh r1, [r8, fp]
22602
- cmp r1, #0
22603
- strneh r2, [r8, fp] @ movhi
22604
-.L3758:
22605
- add r4, r4, #1
22606
- b .L3769
22607
-.L3821:
22608
- ldr r3, [sp, #40]
22609
- add r3, r3, #1
22610
- str r3, [sp, #40]
22611
- ldr r3, [sp, #44]
22612
- add r3, r3, #2
22613
- str r3, [sp, #44]
22614
- b .L3772
22615
-.L3768:
22616
- ldrb r2, [r10, #-3122] @ zero_extendqisi2
22617
- cmp r2, #0
22618
- addne r9, r9, #1
22619
- add r9, r9, #1
22620
- b .L3757
22621
-.L3771:
22622
- ldr r2, .L3822
22623
- ldrh r3, [r5, #80]
22624
- ldr r2, [r2, #1088]
22625
- mov r3, r3, asl #1
22626
- strh r6, [r2, r3] @ movhi
22627
- ldrh r0, [r5, #80]
22628
- bl zftl_insert_data_list
22629
-.L3729:
22630
- ldr r4, .L3822
22631
- ldrh r0, [r5, #80]
22632
- ldr r2, [r4, #1088]
22633
- mov r3, r0, asl #1
22519
+.L3742:
22520
+ ldrh r3, [r4, #80]
22521
+ mov r5, #0
22522
+ ldr r2, [r8, #1092]
22523
+ lsl r3, r3, #1
22524
+ strh r5, [r2, r3] @ movhi
22525
+ ldrh r2, [r4, #80]
22526
+ ldr r3, [r8, #1096]
22527
+ strh r2, [r3, #130] @ movhi
22528
+.L3650:
22529
+ ldrh r0, [r4, #80]
22530
+ ldr r6, .L3744
22531
+ ldr r2, [r6, #1092]
22532
+ lsl r3, r0, #1
2263422533 ldrh r3, [r2, r3]
2263522534 cmp r3, #0
22636
- bne .L3773
22535
+ bne .L3694
2263722536 bl ftl_dump_write_open_sblk
22638
-.L3773:
22639
- mov r2, r6
22640
- ldrh r1, [r5, #80]
22641
- ldr r0, .L3822+32
22537
+.L3694:
22538
+ mov r2, r5
22539
+ ldrh r1, [r4, #80]
22540
+ ldr r0, .L3744+20
2264222541 bl printk
2264322542 mvn r3, #0
22644
- strh r3, [r5, #80] @ movhi
22543
+ strh r3, [r4, #80] @ movhi
2264522544 bl pm_flush
2264622545 bl ftl_ext_info_flush
22647
- ldr r3, [r4, #1092]
22546
+ ldr r3, [r6, #1096]
2264822547 movw r2, #65535
2264922548 ldrh r3, [r3, #130]
2265022549 cmp r3, r2
22651
- beq .L3774
22652
- ldr r1, .L3822
22653
- movw r2, #1076
22654
- ldrh r2, [r1, r2]
22550
+ beq .L3695
22551
+ movw r2, #1080
22552
+ ldrh r2, [r6, r2]
2265522553 cmp r2, r3
22656
- bhi .L3775
22657
- ldr r1, .L3822+36
22554
+ bhi .L3696
2265822555 movw r2, #517
22659
- ldr r0, .L3822+40
22556
+ ldr r1, .L3744+24
22557
+ ldr r0, .L3744+28
2266022558 bl printk
2266122559 bl dump_stack
22662
-.L3775:
22663
- ldr r3, [r4, #1092]
22560
+.L3696:
22561
+ ldr r3, [r6, #1096]
2266422562 ldrh r0, [r3, #130]
2266522563 bl ftl_free_sblk
22666
-.L3774:
22667
- ldr r2, [r4, #2804]
22564
+.L3695:
22565
+ ldr r2, [r6, #2800]
2266822566 mvn r3, #0
2266922567 mov r0, #0
2267022568 strh r3, [r2, #126] @ movhi
22671
- ldr r2, [r4, #1092]
22569
+ ldr r2, [r6, #1096]
2267222570 strh r3, [r2, #130] @ movhi
2267322571 bl ftl_info_flush
22674
- b .L3722
22675
-.L3723:
22676
- ldrh r3, [r5, #130]
22677
- cmp r3, r4
22678
- beq .L3722
22679
- ldr r2, [r7, #2804]
22572
+.L3643:
22573
+ add sp, sp, #76
22574
+ @ sp needed
22575
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
22576
+.L3646:
22577
+ cmp r1, #3
22578
+ bne .L3647
22579
+ sub r3, r7, #3088
22580
+ ldrh r3, [r3, #-8]
22581
+ sub r3, r3, #1
22582
+ add r3, r3, r2
22583
+ orr r3, r3, #50331648
22584
+ b .L3734
22585
+.L3649:
22586
+ ldrb r3, [r7, #-11] @ zero_extendqisi2
22587
+ ldr r5, .L3744+8
22588
+ cmp r3, #2
22589
+ bne .L3651
22590
+ ldrb r3, [r7, #-3128] @ zero_extendqisi2
22591
+ cmp r3, #3
22592
+ bne .L3651
22593
+ ldrh r2, [r5, #-14]
22594
+ ldrh r0, [r7, #-14]
22595
+ ldr r1, [r6, #4]
22596
+ lsl r3, r2, #2
22597
+ ldrb r2, [r7, #-3127] @ zero_extendqisi2
22598
+ smulbb r2, r2, r3
22599
+ ldr r3, [r7, #-132]
22600
+ sub r2, r2, r0
22601
+ lsr r0, r0, #2
22602
+ uxth r2, r2
22603
+ add r0, r3, r0, lsl #2
22604
+ bl ftl_memcpy
22605
+ ldrb r3, [r8, #1158] @ zero_extendqisi2
22606
+ cmp r3, #0
22607
+ bne .L3652
22608
+ ldrb r3, [r8, #1159] @ zero_extendqisi2
22609
+ cmp r3, #0
22610
+ beq .L3653
22611
+.L3652:
22612
+ ldr r3, [r6, #24]
22613
+ sub r3, r3, #1
22614
+.L3735:
22615
+ str r3, [r6, #24]
22616
+ mov r1, #1
22617
+ mov r0, r6
22618
+ bl sblk_read_page
22619
+ ldr r3, [r6, #36]
22620
+ cmn r3, #1
22621
+ cmpne r3, #512
22622
+ beq .L3655
22623
+ ldr r3, [r6, #12]
22624
+ ldr r3, [r3]
22625
+ cmp r3, r9
22626
+ beq .L3656
22627
+.L3655:
22628
+ mov r0, r6
22629
+ bl zbuf_free
22630
+ b .L3742
22631
+.L3653:
22632
+ ldr r3, [sp, #64]
22633
+ ldrh r2, [r5, #8]
22634
+ sub r3, r3, #1
22635
+ add r3, r3, r2
22636
+ orr r3, r3, #33554432
22637
+ b .L3735
22638
+.L3656:
22639
+ ldrh r2, [r7, #-14]
22640
+.L3736:
22641
+ ldr r1, [r6, #4]
22642
+ ldr r0, [r7, #-132]
22643
+ bl ftl_memcpy
22644
+ ldrh r3, [r5, #-14]
22645
+ ldrb r2, [r7, #-3127] @ zero_extendqisi2
22646
+ mul r2, r2, r3
22647
+ ldrb r3, [r7, #-2546] @ zero_extendqisi2
22648
+ cmp r3, r2, asr #6
22649
+ lsl r2, r2, #2
22650
+ bge .L3658
22651
+ mov r1, #0
22652
+ ldr r0, [r7, #-128]
22653
+ bl ftl_memset
22654
+ ldrb r10, [r7, #-11] @ zero_extendqisi2
22655
+ cmp r10, #1
22656
+ movne r10, #1
22657
+ bne .L3737
22658
+ ldrh r1, [r5, #-14]
22659
+ ldrb r3, [r7, #-3127] @ zero_extendqisi2
22660
+ ldrh r5, [r7, #-14]
22661
+ ldr r0, [r7, #-128]
22662
+ mul r3, r3, r1
22663
+ ldr r1, [r6, #4]
22664
+ lsl r3, r3, #2
22665
+ sub r5, r5, r3
22666
+ add r1, r1, r3
22667
+ mov r2, r5
22668
+ bl ftl_memcpy
22669
+.L3659:
22670
+ ldr r3, .L3744+32
22671
+ ldrh r3, [r3, #-8]
22672
+ str r3, [sp, #44]
22673
+ ldrb r3, [r7, #-3128] @ zero_extendqisi2
22674
+ cmp r3, #2
22675
+ str r3, [sp, #36]
22676
+ bne .L3660
22677
+ ldrb r3, [r7, #-3126] @ zero_extendqisi2
22678
+ cmp r3, #0
22679
+ beq .L3661
22680
+.L3660:
22681
+ ldrb r3, [r8, #1158] @ zero_extendqisi2
22682
+ cmp r3, #0
22683
+ beq .L3662
22684
+.L3661:
22685
+ ldr r3, [sp, #36]
22686
+ ldr r2, [sp, #44]
22687
+ mul r3, r3, r2
22688
+ str r3, [sp, #44]
22689
+ mov r3, #1
22690
+ str r3, [sp, #36]
22691
+.L3662:
22692
+ ldr r8, .L3744+4
22693
+ mov r7, #0
22694
+ str r7, [sp, #48]
22695
+.L3663:
22696
+ ldr r3, [sp, #44]
22697
+ cmp r3, r7
22698
+ bls .L3676
22699
+ add r3, r7, r7, lsl #1
22700
+ sub r3, r3, #1
22701
+ str r3, [sp, #52]
22702
+ mov r3, #0
22703
+ b .L3739
22704
+.L3651:
22705
+ ldrh r3, [r5, #-14]
22706
+ ldrb r2, [r7, #-3127] @ zero_extendqisi2
22707
+ mul r2, r2, r3
22708
+ lsl r2, r2, #2
22709
+ b .L3736
22710
+.L3658:
22711
+ ldr r1, [r6, #4]
22712
+ mov r10, #0
22713
+ ldr r0, [r7, #-128]
22714
+ add r1, r1, r2
22715
+ bl ftl_memcpy
22716
+.L3737:
22717
+ mov r5, #0
22718
+ b .L3659
22719
+.L3672:
22720
+ ldr r3, [sp, #56]
22721
+ ldrb r1, [r8, #-3128] @ zero_extendqisi2
22722
+ ldrh r2, [r3, #96]
22723
+ ldr r3, .L3744+36
22724
+ cmp r1, #2
22725
+ ldrh r3, [r3, #-2]
22726
+ mul r3, r3, r2
22727
+ str r3, [sp, #64]
22728
+ beq .L3664
22729
+ ldr r2, .L3744
22730
+ ldrb r2, [r2, #1158] @ zero_extendqisi2
22731
+ cmp r2, #0
22732
+ beq .L3665
22733
+.L3664:
22734
+ sub r2, r7, #1
22735
+ add r3, r2, r3
22736
+ add r3, r3, fp
22737
+ orr r3, r3, r1, lsl #24
22738
+.L3738:
22739
+ str r3, [r6, #24]
22740
+ mov r1, #1
22741
+ mov r0, r6
22742
+ bl sblk_read_page
22743
+ cmp r10, #0
22744
+ beq .L3669
22745
+ ldr r3, [r8, #-128]
22746
+ ldr r2, [r3, r9]
22747
+ cmp r2, #0
22748
+ ldreq r2, [r6, #12]
22749
+ ldreq r2, [r2, #8]
22750
+ streq r2, [r3, r9]
22751
+.L3669:
22752
+ ldr r3, [r8, #-132]
22753
+ ldr r2, [r6, #12]
22754
+ ldr r3, [r3, r9]
22755
+ ldr r1, [r2, #4]
22756
+ cmp r3, r1
22757
+ bne .L3670
22758
+ ldr r0, [r8, #-128]
22759
+ ldr ip, [r0, r9]
22760
+ ldr r0, [r2, #8]
22761
+ cmp ip, r0
22762
+ beq .L3671
22763
+.L3670:
22764
+ ldr r0, [r2, #12]
22765
+ str r0, [sp, #16]
22766
+ ldr r0, [r2, #8]
22767
+ str r1, [sp, #8]
22768
+ str r0, [sp, #12]
22769
+ ldr r2, [r2]
22770
+ ldr r0, .L3744+40
22771
+ str r2, [sp, #4]
22772
+ ldr r2, [r8, #-128]
22773
+ ldr r2, [r2, r9]
22774
+ str r2, [sp]
22775
+ ldr r2, [r6, #36]
22776
+ ldr r1, [r6, #24]
22777
+ bl printk
22778
+ ldr r3, [r8, #-132]
22779
+ ldr r3, [r3, r9]
22780
+ cmn r3, #1
22781
+ beq .L3671
22782
+ mov r0, r6
22783
+ bl zbuf_free
22784
+ ldrh r3, [r4, #80]
22785
+ mov r0, #0
22786
+ ldr r2, .L3744
22787
+ ldr r1, [r2, #1092]
22788
+ lsl r3, r3, #1
22789
+ strh r0, [r1, r3] @ movhi
22790
+ ldrh r1, [r4, #80]
22791
+ ldr r3, [r2, #1096]
22792
+ strh r1, [r3, #130] @ movhi
22793
+ b .L3650
22794
+.L3665:
22795
+ cmp r1, #3
22796
+ addne r3, r7, r3
22797
+ bne .L3738
22798
+ ldr r2, .L3744
22799
+ ldrb r2, [r2, #1159] @ zero_extendqisi2
22800
+ cmp r2, #0
22801
+ ldrne r2, [sp, #52]
22802
+ addeq r3, r7, r3
22803
+ orreq r3, r3, fp, lsl #24
22804
+ addne r3, r3, r2
22805
+ addne r3, r3, fp
22806
+ orrne r3, r3, #50331648
22807
+ b .L3738
22808
+.L3671:
22809
+ ldr r3, [sp, #48]
22810
+ add fp, fp, #1
22811
+ add r9, r9, #4
22812
+ add r3, r3, #1
22813
+ str r3, [sp, #48]
22814
+.L3674:
22815
+ ldr r3, [sp, #36]
22816
+ cmp r3, fp
22817
+ bcs .L3672
22818
+ ldr r3, [sp, #40]
22819
+ add r3, r3, #1
22820
+.L3739:
22821
+ str r3, [sp, #40]
22822
+ ldr r2, [sp, #40]
22823
+ ldrb r3, [r4, #89] @ zero_extendqisi2
22824
+ cmp r2, r3
22825
+ bge .L3673
22826
+ ldr r3, [sp, #48]
22827
+ mov fp, #1
22828
+ lsl r9, r3, #2
22829
+ add r3, r4, r2, lsl #1
22830
+ str r3, [sp, #56]
22831
+ b .L3674
22832
+.L3673:
22833
+ ldrb r3, [r8, #-3126] @ zero_extendqisi2
22834
+ cmp r3, #0
22835
+ addne r7, r7, #1
22836
+ add r7, r7, #1
22837
+ b .L3663
22838
+.L3676:
22839
+ mov r0, r6
22840
+ mov r5, #0
22841
+ bl zbuf_free
22842
+ ldr r3, .L3744
22843
+ mov r6, r5
22844
+ ldrb r1, [r4, #89] @ zero_extendqisi2
22845
+ mov r10, r5
22846
+ ldrh r2, [r4, #80]
22847
+ ldr r0, [r3, #1092]
22848
+ ldr r3, .L3744+8
22849
+ lsl r2, r2, #1
22850
+ ldrh ip, [r3, #-14]
22851
+ add r9, r3, #3104
22852
+ smulbb r1, r1, ip
22853
+ strh r1, [r0, r2] @ movhi
22854
+.L3678:
22855
+ ldr r3, [sp, #44]
22856
+ cmp r3, r6
22857
+ bls .L3692
22858
+ add r2, r6, r6, lsl #1
22859
+ sub r3, r2, #1
22860
+ str r3, [sp, #52]
22861
+ mov r3, #0
22862
+ b .L3741
22863
+.L3688:
22864
+ ldr r2, [r9, #-132]
22865
+ ldr fp, [r2, r10, lsl #2]
22866
+ cmn fp, #1
22867
+ beq .L3679
22868
+ ldr r2, [r9, #-128]
22869
+ mov r0, fp
22870
+ ldr r3, [r2, r10, lsl #2]
22871
+ str r3, [sp, #48]
22872
+ bl lpa_hash_get_ppa
22873
+ cmn r0, #1
22874
+ str r0, [sp, #68]
22875
+ bne .L3680
22876
+ mov r2, #0
22877
+ add r1, sp, #68
22878
+ mov r0, fp
22879
+ bl pm_log2phys
22880
+.L3680:
22881
+ ldr r3, [sp, #56]
22882
+ ldr r1, .L3744+44
22883
+ ldrb r0, [r9, #-3128] @ zero_extendqisi2
22884
+ ldrh r2, [r3, #96]
22885
+ ldrh r1, [r1]
22886
+ cmp r0, #2
22887
+ mul r2, r1, r2
22888
+ beq .L3681
22889
+ ldr r1, .L3744
22890
+ ldrb ip, [r1, #1158] @ zero_extendqisi2
22891
+ cmp ip, #0
22892
+ beq .L3682
22893
+.L3681:
22894
+ sub r1, r6, #1
22895
+ add r2, r1, r2
22896
+ add r2, r2, r8
22897
+ orr r2, r2, r0, lsl #24
22898
+.L3740:
22899
+ str r2, [sp, #64]
22900
+ ldr r2, .L3744+48
22901
+ ldr r3, [sp, #48]
22902
+ ldrb r1, [r9, #-3136] @ zero_extendqisi2
22903
+ ldrh ip, [r2, #-2]
22904
+ ldr r2, .L3744
22905
+ ldrb r0, [r2, #1153] @ zero_extendqisi2
22906
+ mov r2, #1
22907
+ str r2, [sp, #60]
22908
+ rsb r0, r0, #24
22909
+ sub r0, r0, ip
22910
+ lsl r0, r2, r0
22911
+ sub r0, r0, #1
22912
+ and r0, r0, r3, lsr ip
22913
+ bl __aeabi_uidiv
22914
+ ldr r1, [sp, #68]
22915
+ mov r7, r0
22916
+ ldr r3, [sp, #48]
22917
+ ldr r2, [sp, #60]
22918
+ cmp r3, r1
22919
+ bne .L3686
22920
+ add r1, sp, #64
22921
+ mov r0, fp
22922
+ bl pm_log2phys
22923
+ uxth r0, r7
22924
+ add r5, r5, #1
22925
+ bl ftl_vpn_decrement
22926
+.L3687:
22927
+ ldr r1, .L3744
22928
+ uxth r7, r7
22929
+ add r10, r10, #1
22930
+ ldr r2, [r1, #1084]
22931
+ add r2, r2, r7, lsl #2
22932
+ ldrb r2, [r2, #2] @ zero_extendqisi2
22933
+ ands r0, r2, #224
22934
+ bne .L3679
22935
+ ldr r2, [r1, #1092]
22936
+ lsl r7, r7, #1
22937
+ ldrh r1, [r2, r7]
22938
+ cmp r1, #0
22939
+ strhne r0, [r2, r7] @ movhi
22940
+.L3679:
22941
+ add r8, r8, #1
22942
+.L3690:
22943
+ ldr r3, [sp, #36]
22944
+ cmp r3, r8
22945
+ bcs .L3688
22946
+ ldr r3, [sp, #40]
22947
+ add r3, r3, #1
22948
+.L3741:
22949
+ str r3, [sp, #40]
22950
+ ldrb r2, [r4, #89] @ zero_extendqisi2
22951
+ ldr r3, [sp, #40]
22952
+ cmp r3, r2
22953
+ bge .L3689
22954
+ add r3, r4, r3, lsl #1
22955
+ mov r8, #1
22956
+ str r3, [sp, #56]
22957
+ b .L3690
22958
+.L3682:
22959
+ cmp r0, #3
22960
+ addne r2, r6, r2
22961
+ bne .L3740
22962
+ ldrb r1, [r1, #1159] @ zero_extendqisi2
22963
+ cmp r1, #0
22964
+ lsl r1, r8, #24
22965
+ ldrne r3, [sp, #52]
22966
+ addeq r2, r6, r2
22967
+ addne r2, r2, r3
22968
+ addne r2, r2, r8
22969
+ orr r2, r2, r1
22970
+ b .L3740
22971
+.L3686:
22972
+ ldr r2, [sp, #64]
22973
+ cmp r1, r2
22974
+ addeq r5, r5, #1
22975
+ b .L3687
22976
+.L3689:
22977
+ ldrb r2, [r9, #-3126] @ zero_extendqisi2
22978
+ cmp r2, #0
22979
+ addne r6, r6, #1
22980
+ add r6, r6, #1
22981
+ b .L3678
22982
+.L3692:
22983
+ ldrh r3, [r4, #80]
22984
+ ldr r2, .L3744
22985
+ ldr r2, [r2, #1092]
22986
+ lsl r3, r3, #1
22987
+ strh r5, [r2, r3] @ movhi
22988
+ ldrh r0, [r4, #80]
22989
+ bl zftl_insert_data_list
22990
+ b .L3650
22991
+.L3644:
22992
+ ldrh r3, [r4, #130]
22993
+ cmp r3, r2
22994
+ beq .L3643
22995
+ ldr r2, [r8, #2800]
2268022996 ldrh r2, [r2, #126]
2268122997 cmp r2, r3
22682
- bne .L3777
22998
+ bne .L3698
2268322999 bl pm_flush
22684
- ldr r3, [r7, #1092]
23000
+ ldr r3, [r8, #1096]
2268523001 ldrh r0, [r3, #130]
2268623002 bl ftl_free_sblk
22687
- ldr r3, [r7, #2804]
23003
+ ldr r3, [r8, #2800]
2268823004 mvn r2, #0
22689
- mov r0, r6
23005
+ mov r0, r5
2269023006 strh r2, [r3, #126] @ movhi
2269123007 bl ftl_info_flush
22692
-.L3777:
22693
- ldr r3, [r7, #1092]
23008
+.L3698:
23009
+ ldr r3, [r8, #1096]
2269423010 mvn r2, #0
2269523011 strh r2, [r3, #130] @ movhi
22696
-.L3722:
22697
- add sp, sp, #68
22698
- @ sp needed
22699
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
22700
-.L3823:
23012
+ b .L3643
23013
+.L3745:
2270123014 .align 2
22702
-.L3822:
23015
+.L3744:
2270323016 .word .LANCHOR0
2270423017 .word .LANCHOR3
2270523018 .word .LANCHOR3-3104
2270623019 .word -178307901
22707
- .word .LC246
22708
- .word .LANCHOR3-3066
23020
+ .word .LC245
2270923021 .word .LC247
22710
- .word .LANCHOR3-3132
22711
- .word .LC248
22712
- .word .LANCHOR1+2576
23022
+ .word .LANCHOR1+2361
2271323023 .word .LC0
23024
+ .word .LANCHOR3-3088
23025
+ .word .LANCHOR3-3072
23026
+ .word .LC246
23027
+ .word .LANCHOR3-3074
23028
+ .word .LANCHOR3-3136
2271423029 .fnend
2271523030 .size gc_recovery, .-gc_recovery
2271623031 .align 2
2271723032 .global gc_update_l2p_map_new
23033
+ .syntax unified
23034
+ .arm
23035
+ .fpu softvfp
2271823036 .type gc_update_l2p_map_new, %function
2271923037 gc_update_l2p_map_new:
2272023038 .fnstart
2272123039 @ args = 0, pretend = 0, frame = 24
2272223040 @ frame_needed = 0, uses_anonymous_args = 0
22723
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23041
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2272423042 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2272523043 .pad #28
2272623044 sub sp, sp, #28
22727
- ldr r4, .L3860
22728
- ldr r3, .L3860+4
22729
- ldr r9, .L3860+8
22730
- ldr r5, [r4, #1092]
22731
- ldrh r3, [r3, #-10]
23045
+ ldr r4, .L3781
23046
+ ldr r3, .L3781+4
23047
+ ldr r5, [r4, #1096]
23048
+ ldrh r3, [r3, #-14]
2273223049 ldrb r2, [r5, #89] @ zero_extendqisi2
2273323050 mul r3, r2, r3
2273423051 str r3, [sp]
22735
- ldr r3, [r9]
22736
- tst r3, #256
22737
- beq .L3825
22738
- ldr r0, .L3860+12
22739
- ldrh r1, [r5, #80]
22740
- bl printk
22741
-.L3825:
22742
- ldrh r3, [r5, #80]
22743
- mov r8, #0
22744
- ldr r6, .L3860+16
22745
- mov r7, r8
22746
- ldr r1, [r4, #1088]
22747
- mov r3, r3, asl #1
22748
- ldr r0, [sp]
22749
- ldrb r2, [r6, #545] @ zero_extendqisi2
22750
- rsb r2, r2, r0
22751
- strh r2, [r1, r3] @ movhi
22752
-.L3826:
22753
- ldr r3, [sp]
22754
- cmp r7, r3
22755
- beq .L3859
22756
- ldr r3, [r6, #-172]
22757
- mov r10, r7, asl #2
22758
- ldr fp, [r3, r7, asl #2]
22759
- cmn fp, #1
22760
- beq .L3827
22761
- ldrb r1, [r4, #2772] @ zero_extendqisi2
22762
- mov r0, fp
22763
- mov r1, r1, asl #7
22764
- bl __aeabi_uidiv
22765
- uxth r3, r0
22766
- str r3, [sp, #12]
22767
- ldr r3, [r9]
22768
- tst r3, #256
22769
- beq .L3828
22770
- ldr r0, .L3860+20
22771
- mov r2, fp
22772
- ldr r1, [sp, #12]
22773
- mov r3, r7
22774
- bl printk
22775
-.L3828:
22776
- str r7, [sp, #8]
22777
-.L3834:
22778
- ldr r3, [r6, #-172]
22779
- ldr fp, [r3, r10]
22780
- cmn fp, #1
22781
- beq .L3829
22782
- ldrb r1, [r4, #2772] @ zero_extendqisi2
22783
- mov r0, fp
22784
- mov r1, r1, asl #7
22785
- bl __aeabi_uidiv
22786
- ldr r3, [sp, #12]
22787
- uxth r0, r0
22788
- cmp r0, r3
22789
- bne .L3829
22790
- ldr r3, [r6, #-168]
22791
- mov r0, fp
22792
- ldr r3, [r3, r10]
22793
- str r3, [sp, #4]
22794
- bl lpa_hash_get_ppa
22795
- cmn r0, #1
22796
- str r0, [sp, #20]
22797
- bne .L3830
22798
- mov r0, fp
22799
- add r1, sp, #20
22800
- mov r2, #0
22801
- bl pm_log2phys
22802
-.L3830:
22803
- ldr r3, [sp, #20]
22804
- ldr r2, [sp, #4]
22805
- cmp r3, r2
22806
- bne .L3831
22807
- ldr r3, .L3860+16
22808
- add r1, sp, #24
22809
- mov r0, fp
22810
- mov r2, #1
22811
- add r8, r8, #1
22812
- ldr r3, [r3, #-164]
22813
- ldr r3, [r3, r10]
22814
- str r3, [r1, #-8]!
22815
- bl pm_log2phys
22816
- ldr r3, .L3860+24
22817
- ldrh r0, [r3]
22818
- ldrb r3, [r4, #1189] @ zero_extendqisi2
22819
- rsb r3, r3, #24
22820
- rsb r3, r0, r3
22821
- ldr r2, [sp, #4]
22822
- mov fp, r2, lsr r0
22823
- mvn r0, #0
22824
- bic r0, fp, r0, asl r3
22825
- ldr r3, .L3860+16
22826
- ldrb r1, [r3, #-3130] @ zero_extendqisi2
22827
- bl __aeabi_uidiv
22828
- uxth r0, r0
22829
- b .L3858
22830
-.L3831:
22831
- ldr r2, [r9]
23052
+ ldr r3, .L3781+8
23053
+ ldr r2, [r3]
23054
+ mov fp, r3
2283223055 tst r2, #256
22833
- beq .L3833
22834
- ldr r0, .L3860+28
22835
- mov r1, fp
22836
- ldr r2, [sp, #4]
23056
+ beq .L3747
23057
+ ldrh r1, [r5, #80]
23058
+ ldr r0, .L3781+12
2283723059 bl printk
22838
-.L3833:
22839
- ldrh r0, [r5, #80]
22840
-.L3858:
22841
- bl ftl_vpn_decrement
22842
- ldr r3, [r6, #-172]
22843
- mvn r2, #0
22844
- str r2, [r3, r10]
22845
-.L3829:
22846
- ldr r3, [sp, #8]
22847
- add r10, r10, #4
22848
- ldr r2, [sp]
22849
- add r3, r3, #1
22850
- str r3, [sp, #8]
22851
- cmp r3, r2
22852
- bne .L3834
22853
-.L3827:
22854
- add r7, r7, #1
22855
- b .L3826
22856
-.L3859:
22857
- ldr r3, [r9]
22858
- tst r3, #256
22859
- beq .L3836
23060
+.L3747:
23061
+ ldr r2, .L3781+16
23062
+ mov r7, #0
2286023063 ldrh r3, [r5, #80]
23064
+ mov r6, r7
23065
+ ldr r0, [sp]
23066
+ ldrb r2, [r2, #-11] @ zero_extendqisi2
23067
+ ldr r8, .L3781+16
2286123068 ldr r1, [r4, #1092]
22862
- ldr r2, [r4, #1088]
22863
- mov r3, r3, asl #1
22864
- ldr r0, .L3860+32
23069
+ lsl r3, r3, #1
23070
+ sub r2, r0, r2
23071
+ strh r2, [r1, r3] @ movhi
23072
+.L3748:
23073
+ ldr r3, [sp]
23074
+ cmp r6, r3
23075
+ bne .L3757
23076
+ ldr r3, [fp]
23077
+ tst r3, #256
23078
+ beq .L3758
23079
+ ldrh r2, [r5, #80]
23080
+ mov r3, r7
23081
+ ldr r0, [r4, #1092]
23082
+ ldr r1, [r4, #1096]
23083
+ lsl r2, r2, #1
2286523084 ldrh r1, [r1, #80]
22866
- ldrh r2, [r2, r3]
22867
- mov r3, r8
23085
+ ldrh r2, [r0, r2]
23086
+ ldr r0, .L3781+20
2286823087 bl printk
22869
-.L3836:
23088
+.L3758:
2287023089 ldrh r3, [r5, #80]
22871
- ldr r2, [r4, #1088]
22872
- mov r3, r3, asl #1
23090
+ ldr r2, [r4, #1092]
23091
+ lsl r3, r3, #1
2287323092 ldrh r3, [r2, r3]
22874
- cmp r3, r8
22875
- beq .L3837
22876
- ldr r1, .L3860+36
23093
+ cmp r7, r3
23094
+ beq .L3759
2287723095 movw r2, #898
22878
- ldr r0, .L3860+40
23096
+ ldr r1, .L3781+24
23097
+ ldr r0, .L3781+28
2287923098 bl printk
2288023099 bl dump_stack
22881
-.L3837:
23100
+.L3759:
2288223101 ldrh r3, [r5, #80]
22883
- ldr r2, [r4, #1088]
22884
- mov r3, r3, asl #1
22885
- strh r8, [r2, r3] @ movhi
23102
+ ldr r2, [r4, #1092]
23103
+ lsl r3, r3, #1
23104
+ strh r7, [r2, r3] @ movhi
2288623105 ldrh r0, [r5, #80]
2288723106 bl zftl_insert_data_list
2288823107 add sp, sp, #28
2288923108 @ sp needed
22890
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
22891
-.L3861:
23109
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23110
+.L3757:
23111
+ ldr r3, [r8, #-132]
23112
+ lsl r9, r6, #2
23113
+ ldr r10, [r3, r6, lsl #2]
23114
+ cmn r10, #1
23115
+ beq .L3749
23116
+ ldrb r1, [r8, #-2546] @ zero_extendqisi2
23117
+ mov r0, r10
23118
+ lsl r1, r1, #7
23119
+ bl __aeabi_uidiv
23120
+ uxth r3, r0
23121
+ str r3, [sp, #12]
23122
+ ldr r3, [fp]
23123
+ tst r3, #256
23124
+ beq .L3750
23125
+ mov r3, r6
23126
+ mov r2, r10
23127
+ ldr r1, [sp, #12]
23128
+ ldr r0, .L3781+32
23129
+ bl printk
23130
+.L3750:
23131
+ str r6, [sp, #8]
23132
+.L3756:
23133
+ ldr r3, [r8, #-132]
23134
+ ldr r10, [r3, r9]
23135
+ cmn r10, #1
23136
+ beq .L3751
23137
+ ldrb r1, [r8, #-2546] @ zero_extendqisi2
23138
+ mov r0, r10
23139
+ lsl r1, r1, #7
23140
+ bl __aeabi_uidiv
23141
+ ldr r3, [sp, #12]
23142
+ uxth r0, r0
23143
+ cmp r3, r0
23144
+ bne .L3751
23145
+ ldr r3, [r8, #-128]
23146
+ mov r0, r10
23147
+ ldr r3, [r3, r9]
23148
+ str r3, [sp, #4]
23149
+ bl lpa_hash_get_ppa
23150
+ cmn r0, #1
23151
+ str r0, [sp, #20]
23152
+ bne .L3752
23153
+ mov r2, #0
23154
+ add r1, sp, #20
23155
+ mov r0, r10
23156
+ bl pm_log2phys
23157
+.L3752:
23158
+ ldr r3, [sp, #20]
23159
+ ldr r2, [sp, #4]
23160
+ cmp r2, r3
23161
+ bne .L3753
23162
+ ldr r3, .L3781+16
23163
+ add r1, sp, #24
23164
+ mov r2, #1
23165
+ mov r0, r10
23166
+ add r7, r7, #1
23167
+ ldr r3, [r3, #-124]
23168
+ ldr r3, [r3, r9]
23169
+ str r3, [r1, #-8]!
23170
+ bl pm_log2phys
23171
+ ldr r3, .L3781+36
23172
+ ldr r2, [sp, #4]
23173
+ ldrh r0, [r3]
23174
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
23175
+ rsb r3, r3, #24
23176
+ sub r3, r3, r0
23177
+ lsr r0, r2, r0
23178
+ ldr r2, .L3781+16
23179
+ ldrb r1, [r2, #-3136] @ zero_extendqisi2
23180
+ mvn r2, #0
23181
+ bic r0, r0, r2, lsl r3
23182
+ bl __aeabi_uidiv
23183
+ uxth r0, r0
23184
+.L3780:
23185
+ bl ftl_vpn_decrement
23186
+ ldr r3, [r8, #-132]
23187
+ mvn r2, #0
23188
+ str r2, [r3, r9]
23189
+.L3751:
23190
+ ldr r3, [sp, #8]
23191
+ add r9, r9, #4
23192
+ add r3, r3, #1
23193
+ str r3, [sp, #8]
23194
+ ldr r2, [sp, #8]
23195
+ ldr r3, [sp]
23196
+ cmp r3, r2
23197
+ bne .L3756
23198
+.L3749:
23199
+ add r6, r6, #1
23200
+ b .L3748
23201
+.L3753:
23202
+ ldr r2, [fp]
23203
+ tst r2, #256
23204
+ beq .L3755
23205
+ ldr r2, [sp, #4]
23206
+ mov r1, r10
23207
+ ldr r0, .L3781+40
23208
+ bl printk
23209
+.L3755:
23210
+ ldrh r0, [r5, #80]
23211
+ b .L3780
23212
+.L3782:
2289223213 .align 2
22893
-.L3860:
23214
+.L3781:
2289423215 .word .LANCHOR0
2289523216 .word .LANCHOR3-3104
2289623217 .word .LANCHOR2
22897
- .word .LC249
23218
+ .word .LC248
2289823219 .word .LANCHOR3
22899
- .word .LC250
22900
- .word .LANCHOR3-3132
2290123220 .word .LC251
22902
- .word .LC252
22903
- .word .LANCHOR1+2588
23221
+ .word .LANCHOR1+2373
2290423222 .word .LC0
23223
+ .word .LC249
23224
+ .word .LANCHOR3-3138
23225
+ .word .LC250
2290523226 .fnend
2290623227 .size gc_update_l2p_map_new, .-gc_update_l2p_map_new
2290723228 .align 2
2290823229 .global gc_scan_src_blk_one_page
23230
+ .syntax unified
23231
+ .arm
23232
+ .fpu softvfp
2290923233 .type gc_scan_src_blk_one_page, %function
2291023234 gc_scan_src_blk_one_page:
2291123235 .fnstart
22912
- @ args = 0, pretend = 0, frame = 16
23236
+ @ args = 0, pretend = 0, frame = 8
2291323237 @ frame_needed = 0, uses_anonymous_args = 0
22914
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
22915
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23238
+ push {r0, r1, r4, r5, r6, r7, r8, r9, r10, lr}
23239
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
23240
+ .pad #8
2291623241 mov r1, #0
22917
- ldr r6, .L3891
22918
- .pad #20
22919
- sub sp, sp, #20
22920
- ldr r4, .L3891+4
23242
+ ldr r5, .L3810
2292123243 mov lr, r1
22922
- ldr r5, .L3891+8
2292323244 movw r0, #65535
22924
- ldrb r3, [r6, #2832] @ zero_extendqisi2
22925
- ldrb ip, [r5, #-3123] @ zero_extendqisi2
22926
- add r2, r4, r3, asl #1
22927
- ldrh r7, [r2, #36]
23245
+ ldr r4, .L3810+4
23246
+ ldrb r3, [r5, #2828] @ zero_extendqisi2
23247
+ ldr r7, .L3810+8
23248
+ add r2, r4, r3, lsl #1
23249
+ ldrb ip, [r7, #-3127] @ zero_extendqisi2
23250
+ ldrh r8, [r2, #36]
2292823251 ldrh r2, [r4, #2]
22929
-.L3863:
22930
- cmp r7, r0
22931
- bne .L3889
23252
+.L3784:
23253
+ cmp r8, r0
23254
+ beq .L3786
23255
+ cmp lr, #0
23256
+ mov r0, #1
23257
+ strhne r2, [r4, #2] @ movhi
23258
+ cmp r1, #0
23259
+ strbne r3, [r5, #2828]
23260
+ mov r9, #1
23261
+ bl buf_alloc
23262
+ mov r6, r0
23263
+.L3789:
23264
+ ldrb r1, [r5, #2830] @ zero_extendqisi2
23265
+ cmp r9, r1
23266
+ ble .L3799
23267
+ mov r0, r6
23268
+ bl zbuf_free
23269
+ ldrb r3, [r5, #2828] @ zero_extendqisi2
23270
+ ldrb r2, [r7, #-3127] @ zero_extendqisi2
23271
+ add r3, r3, #1
23272
+ uxtb r3, r3
23273
+ cmp r2, r3
23274
+ strb r3, [r5, #2828]
23275
+ ldrheq r3, [r4, #2]
23276
+ addeq r3, r3, #1
23277
+ strheq r3, [r4, #2] @ movhi
23278
+ moveq r3, #0
23279
+ strbeq r3, [r5, #2828]
23280
+ add sp, sp, #8
23281
+ @ sp needed
23282
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
23283
+.L3786:
2293223284 add r3, r3, #1
2293323285 uxtb r3, r3
2293423286 cmp r3, ip
22935
- addeq r2, r2, #1
2293623287 moveq r3, #0
22937
- moveq lr, #1
22938
- add r1, r4, r3, asl #1
23288
+ addeq r2, r2, #1
23289
+ add r1, r4, r3, lsl #1
2293923290 uxtheq r2, r2
22940
- ldrh r7, [r1, #36]
23291
+ ldrh r8, [r1, #36]
23292
+ moveq lr, #1
2294123293 mov r1, #1
22942
- b .L3863
22943
-.L3889:
22944
- mov r0, #1
22945
- cmp lr, #0
22946
- strneh r2, [r4, #2] @ movhi
22947
- cmp r1, #0
22948
- strneb r3, [r6, #2832]
22949
- bl buf_alloc
22950
- ldr r8, .L3891
22951
- mov r9, #1
22952
- ldr r10, .L3891+12
22953
- mov fp, r0
22954
-.L3868:
22955
- ldrb r3, [r6, #2834] @ zero_extendqisi2
22956
- ldr r2, .L3891
22957
- cmp r9, r3
22958
- bgt .L3890
22959
- ldrh r2, [r10]
22960
- cmp r3, #2
22961
- mul r2, r2, r7
22962
- bne .L3869
22963
- ldrh r3, [r4, #2]
22964
- add r3, r2, r3, asl #1
22965
- ldr r2, .L3891+8
22966
- sub r3, r3, #1
22967
- add r3, r3, r9
22968
- ldrb r2, [r2, #-3124] @ zero_extendqisi2
22969
- b .L3887
22970
-.L3869:
22971
- cmp r3, #3
22972
- ldrneh r1, [r4, #2]
22973
- addne r2, r2, r1
22974
- bne .L3888
22975
- ldrb r3, [r8, #1196] @ zero_extendqisi2
23294
+ b .L3784
23295
+.L3799:
23296
+ ldr r3, .L3810+12
23297
+ cmp r1, #2
23298
+ ldrh r3, [r3]
23299
+ mul r2, r8, r3
23300
+ ldrheq r3, [r4, #2]
23301
+ addeq r3, r2, r3, lsl #1
23302
+ subeq r3, r3, #1
23303
+ beq .L3809
23304
+ cmp r1, #3
23305
+ ldrhne r3, [r4, #2]
23306
+ addne r3, r3, r2
23307
+ bne .L3808
23308
+ ldrb r3, [r5, #1158] @ zero_extendqisi2
2297623309 cmp r3, #0
22977
- bne .L3872
22978
- ldrb r3, [r8, #1197] @ zero_extendqisi2
23310
+ bne .L3793
23311
+ ldrb r3, [r5, #1159] @ zero_extendqisi2
2297923312 cmp r3, #0
22980
- beq .L3873
22981
-.L3872:
23313
+ ldrheq r3, [r4, #2]
23314
+ addeq r3, r3, r2
23315
+ orreq r3, r3, r9, lsl #24
23316
+ beq .L3808
23317
+.L3793:
2298223318 ldrh r3, [r4, #2]
22983
- add r3, r3, r3, asl #1
23319
+ add r3, r3, r3, lsl #1
2298423320 sub r3, r3, #1
2298523321 add r3, r3, r2
22986
- ldrb r2, [r5, #-3124] @ zero_extendqisi2
23322
+.L3809:
23323
+ ldrb r2, [r7, #-3128] @ zero_extendqisi2
2298723324 add r3, r3, r9
22988
-.L3887:
22989
- orr r3, r3, r2, asl #24
22990
- str r3, [fp, #24]
22991
- b .L3870
22992
-.L3873:
22993
- ldrh r1, [r4, #2]
22994
- add r2, r2, r1
22995
- orr r2, r2, r9, asl #24
22996
-.L3888:
22997
- str r2, [fp, #24]
22998
-.L3870:
22999
- mov r0, fp
23325
+ orr r3, r3, r2, lsl #24
23326
+.L3808:
23327
+ str r3, [r6, #24]
2300023328 mov r1, #1
23329
+ mov r0, r6
2300123330 bl sblk_read_page
23002
- ldr r3, [fp, #36]
23331
+ ldr r3, [r6, #36]
2300323332 cmp r3, #512
2300423333 cmnne r3, #1
23005
- beq .L3875
23006
- ldr r3, [fp, #12]
23007
- ldr r3, [r3, #4]
23008
- mov r0, r3
23009
- str r3, [sp, #4]
23334
+ beq .L3796
23335
+ ldr r3, [r6, #12]
23336
+ ldr r10, [r3, #4]
23337
+ mov r0, r10
2301023338 bl lpa_hash_get_ppa
2301123339 cmn r0, #1
23012
- str r0, [sp, #12]
23013
- ldr r3, [sp, #4]
23014
- bne .L3876
23015
- ldr r2, [r6, #2784]
23016
- cmp r3, r2
23017
- bcs .L3876
23018
- mov r0, r3
23019
- add r1, sp, #12
23340
+ str r0, [sp, #4]
23341
+ bne .L3797
23342
+ ldr r3, [r5, #2780]
23343
+ cmp r10, r3
23344
+ bcs .L3797
2302023345 mov r2, #0
23346
+ add r1, sp, #4
23347
+ mov r0, r10
2302123348 bl pm_log2phys
23022
-.L3876:
23023
- ldr r3, [fp, #24]
23024
- ldr r2, [sp, #12]
23349
+.L3797:
23350
+ ldr r3, [r6, #24]
23351
+ ldr r2, [sp, #4]
2302523352 cmp r3, r2
23026
- ldreqh r1, [r4, #20]
23027
- ldreq r2, [r5, #-3128]
23028
- streq r3, [r2, r1, asl #2]
23029
- ldreqh r3, [r4, #20]
23353
+ ldrheq r1, [r4, #20]
23354
+ ldreq r2, [r7, #-3132]
23355
+ streq r3, [r2, r1, lsl #2]
23356
+ ldrheq r3, [r4, #20]
2303023357 addeq r3, r3, #1
23031
- streqh r3, [r4, #20] @ movhi
23032
-.L3875:
23358
+ strheq r3, [r4, #20] @ movhi
23359
+.L3796:
2303323360 ldrh r3, [r4, #22]
2303423361 add r9, r9, #1
2303523362 add r3, r3, #1
2303623363 strh r3, [r4, #22] @ movhi
23037
- b .L3868
23038
-.L3890:
23039
- mov r0, fp
23040
- str r2, [sp, #4]
23041
- bl zbuf_free
23042
- ldrb r1, [r5, #-3123] @ zero_extendqisi2
23043
- ldr r2, [sp, #4]
23044
- ldrb r3, [r2, #2832] @ zero_extendqisi2
23045
- add r3, r3, #1
23046
- uxtb r3, r3
23047
- strb r3, [r2, #2832]
23048
- cmp r1, r3
23049
- ldreqh r3, [r4, #2]
23050
- addeq r3, r3, #1
23051
- streqh r3, [r4, #2] @ movhi
23052
- moveq r3, #0
23053
- streqb r3, [r2, #2832]
23054
- add sp, sp, #20
23055
- @ sp needed
23056
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23057
-.L3892:
23364
+ b .L3789
23365
+.L3811:
2305823366 .align 2
23059
-.L3891:
23367
+.L3810:
2306023368 .word .LANCHOR0
23061
- .word .LANCHOR0+2828
23369
+ .word .LANCHOR0+2824
2306223370 .word .LANCHOR3
23063
- .word .LANCHOR3-3066
23371
+ .word .LANCHOR3-3074
2306423372 .fnend
2306523373 .size gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
2306623374 .align 2
2306723375 .global gc_scan_src_blk
23376
+ .syntax unified
23377
+ .arm
23378
+ .fpu softvfp
2306823379 .type gc_scan_src_blk, %function
2306923380 gc_scan_src_blk:
2307023381 .fnstart
2307123382 @ args = 0, pretend = 0, frame = 24
2307223383 @ frame_needed = 0, uses_anonymous_args = 0
23073
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23384
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2307423385 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23075
- movw r3, #2828
23076
- ldr r4, .L3945
23386
+ movw r3, #2824
23387
+ ldr r4, .L3867
2307723388 .pad #28
2307823389 sub sp, sp, #28
2307923390 ldrh r2, [r4, r3]
2308023391 movw r3, #65535
2308123392 cmp r2, r3
23082
- bne .L3894
23083
- ldr r1, .L3945+4
23393
+ bne .L3813
2308423394 movw r2, #1505
23085
- ldr r0, .L3945+8
23395
+ ldr r1, .L3867+4
23396
+ ldr r0, .L3867+8
2308623397 bl printk
2308723398 bl dump_stack
23088
-.L3894:
23089
- movw r3, #2828
23399
+.L3813:
23400
+ movw r3, #2824
2309023401 ldrh r1, [r4, r3]
2309123402 movw r3, #65535
2309223403 cmp r1, r3
2309323404 moveq r0, #0
23094
- beq .L3895
23095
- ldr r3, .L3945+12
23405
+ beq .L3812
23406
+ ldr r3, .L3867+12
2309623407 ldr r3, [r3]
2309723408 tst r3, #256
23098
- beq .L3896
23099
- ldr r3, .L3945
23100
- ldr r0, .L3945+16
23101
- ldr r2, [r3, #1088]
23102
- mov r3, r1, asl #1
23409
+ beq .L3815
23410
+ ldr r2, [r4, #1092]
23411
+ lsl r3, r1, #1
23412
+ ldr r0, .L3867+16
2310323413 ldrh r2, [r2, r3]
2310423414 bl printk
23105
-.L3896:
23106
- ldr r5, .L3945
23107
- movw r7, #2828
23415
+.L3815:
23416
+ ldr r7, .L3867+20
23417
+ movw r5, #2824
2310823418 bl timer_get_time
23109
- ldrh r0, [r4, r7]
23110
- add r1, r5, #2864
23111
- ldr r6, .L3945+20
23419
+ ldrh r0, [r4, r5]
23420
+ add r1, r7, #36
2311223421 bl ftl_get_blk_list_in_sblk
2311323422 uxtb r0, r0
23114
- strb r0, [r4, #2833]
2311523423 cmp r0, #0
23424
+ strb r0, [r4, #2829]
2311623425 mvneq r3, #0
23117
- streqh r3, [r5, r7] @ movhi
23118
- beq .L3895
23119
- ldrh r3, [r5, r7]
23120
- ldr r2, [r5, #1080]
23121
- add r2, r2, r3, asl #2
23426
+ strheq r3, [r4, r5] @ movhi
23427
+ beq .L3812
23428
+ ldrh r3, [r4, r5]
23429
+ ldr r2, [r4, #1084]
23430
+ add r2, r2, r3, lsl #2
2312223431 ldrb r2, [r2, #2] @ zero_extendqisi2
23123
- tst r2, #192
23124
- and r1, r2, #224
23125
- moveq r2, #1
23126
- movne r2, #0
23127
- cmp r1, #224
23128
- orreq r2, r2, #1
23432
+ and r2, r2, #224
23433
+ cmp r2, #32
23434
+ beq .L3817
2312923435 cmp r2, #0
23130
- bne .L3898
23131
- ldr r2, [r5, #1092]
23132
- ldrh ip, [r2, #16]
23133
- cmp ip, r3
23134
- beq .L3898
23135
- ldrh ip, [r2, #48]
23136
- cmp ip, r3
23137
- beq .L3898
23436
+ cmpne r2, #224
23437
+ beq .L3818
23438
+ ldr r2, [r4, #1096]
23439
+ ldrh r1, [r2, #16]
23440
+ cmp r1, r3
23441
+ beq .L3817
23442
+ ldrh r1, [r2, #48]
23443
+ cmp r1, r3
23444
+ beq .L3817
2313823445 ldrh r2, [r2, #80]
2313923446 cmp r2, r3
23140
- bne .L3899
23141
-.L3898:
23142
- cmp r1, #0
23143
- bne .L3900
23144
- ldr r2, [r4, #1088]
23145
- mov r3, r3, asl #1
23146
- ldrh r3, [r2, r3]
23147
- cmp r3, #0
23148
- beq .L3901
23149
- ldr r1, .L3945+4
23150
- movw r2, #1530
23151
- ldr r0, .L3945+8
23152
- bl printk
23153
- bl dump_stack
23154
-.L3901:
23155
- movw r3, #2828
23156
- ldr r2, [r4, #1088]
23157
- ldrh r3, [r4, r3]
23158
- mov r1, #0
23159
- mov r3, r3, asl #1
23160
- strh r1, [r2, r3] @ movhi
23161
-.L3900:
23162
- movw r3, #2828
23447
+ bne .L3860
23448
+.L3817:
2316323449 mvn r2, #0
23450
+ movw r3, #2824
2316423451 mov r0, #0
2316523452 strh r2, [r4, r3] @ movhi
23166
- strh r0, [r6, #20] @ movhi
23167
- b .L3895
23168
-.L3899:
23169
- add r0, r6, r0, asl #1
23453
+ strh r0, [r7, #20] @ movhi
23454
+.L3812:
23455
+ add sp, sp, #28
23456
+ @ sp needed
23457
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23458
+.L3818:
23459
+ cmp r2, #0
23460
+ bne .L3817
23461
+ ldr r2, [r4, #1092]
23462
+ lsl r3, r3, #1
23463
+ ldrh r3, [r2, r3]
23464
+ cmp r3, #0
23465
+ beq .L3820
23466
+ movw r2, #1530
23467
+ ldr r1, .L3867+4
23468
+ ldr r0, .L3867+8
23469
+ bl printk
23470
+ bl dump_stack
23471
+.L3820:
23472
+ movw r3, #2824
23473
+ ldr r2, [r4, #1092]
23474
+ ldrh r3, [r4, r3]
23475
+ mov r1, #0
23476
+ lsl r3, r3, #1
23477
+ strh r1, [r2, r3] @ movhi
23478
+ b .L3817
23479
+.L3860:
23480
+ add r0, r7, r0, lsl #1
2317023481 movw r3, #65535
2317123482 ldrh r10, [r0, #34]
2317223483 cmp r10, r3
23173
- bne .L3902
23174
- ldr r1, .L3945+4
23484
+ bne .L3821
2317523485 movw r2, #1540
23176
- ldr r0, .L3945+8
23486
+ ldr r1, .L3867+4
23487
+ ldr r0, .L3867+8
2317723488 bl printk
2317823489 bl dump_stack
23179
-.L3902:
23180
- movw r3, #2828
23181
- ldr r5, .L3945+24
23182
- ldrh r2, [r4, r3]
23183
- ldr r3, [r4, #1080]
23184
- sub r9, r5, #3088
23185
- sub fp, r5, #3056
23186
- str fp, [sp, #4]
23187
- add r3, r3, r2, asl #2
23188
- ldrh r8, [r9, #-8]
23189
- ldrh r7, [fp, #-10]
23190
- ldrb r3, [r3, #2] @ zero_extendqisi2
23191
- sub r8, r8, #1
23192
- and r3, r3, #224
23193
- uxth r8, r8
23194
- cmp r3, #160
23195
- mul r7, r7, r10
23196
- movne r3, #1
23197
- bne .L3903
23198
- ldrb r2, [r5, #-3124] @ zero_extendqisi2
23490
+.L3821:
23491
+ movw r2, #2824
23492
+ ldr r8, .L3867+24
23493
+ ldrh r0, [r4, r2]
23494
+ ldr r2, [r4, #1084]
23495
+ sub r1, r8, #3072
23496
+ sub fp, r8, #3088
23497
+ ldrh r6, [fp, #-8]
23498
+ ldrh r3, [r1, #-2]
23499
+ add r2, r2, r0, lsl #2
23500
+ str r1, [sp, #4]
23501
+ sub r6, r6, #1
23502
+ ldrb r2, [r2, #2] @ zero_extendqisi2
23503
+ uxth r6, r6
23504
+ mul r3, r10, r3
23505
+ and r2, r2, #224
23506
+ cmp r2, #160
23507
+ movne r9, #1
23508
+ bne .L3822
23509
+ ldrb r2, [r8, #-3128] @ zero_extendqisi2
2319923510 cmp r2, #2
23200
- uxth r3, r2
23201
- orr r7, r7, r2, asl #24
23202
- subeq r2, r5, #3104
23203
- ldreqh r8, [r2, #-10]
23204
- ldrb r2, [r4, #1196] @ zero_extendqisi2
23205
- subeq r8, r8, #1
23206
- uxtheq r8, r8
23511
+ uxth r9, r2
23512
+ orr r3, r3, r2, lsl #24
23513
+ subeq r2, r8, #3104
23514
+ ldrheq r6, [r2, #-14]
23515
+ ldrb r2, [r4, #1158] @ zero_extendqisi2
23516
+ subeq r6, r6, #1
23517
+ uxtheq r6, r6
2320723518 cmp r2, #0
23208
- bne .L3905
23209
- ldr r2, .L3945
23210
- ldrb r2, [r2, #1197] @ zero_extendqisi2
23519
+ bne .L3824
23520
+ ldrb r2, [r4, #1159] @ zero_extendqisi2
2321123521 cmp r2, #0
23212
- beq .L3903
23213
-.L3905:
23214
- ldr r2, .L3945+28
23215
- ldrh r8, [r2, #-10]
23216
- sub r8, r8, #1
23217
- uxth r8, r8
23218
-.L3903:
23522
+ beq .L3822
23523
+.L3824:
23524
+ ldr r2, .L3867+28
23525
+ ldrh r6, [r2, #-14]
23526
+ sub r6, r6, #1
23527
+ uxth r6, r6
23528
+.L3822:
23529
+ orr r6, r6, r3
23530
+ strb r9, [r4, #2830]
23531
+ mov r3, #0
2321923532 mov r0, #1
23220
- strb r3, [r4, #2834]
23533
+ strh r3, [r7, #2] @ movhi
23534
+ strb r3, [r4, #2828]
23535
+ strh r3, [r7, #22] @ movhi
23536
+ strh r3, [r7, #24] @ movhi
2322123537 str r3, [sp]
23222
- orr r7, r8, r7
23223
- mov r8, #0
23224
- strh r8, [r6, #2] @ movhi
23225
- strb r8, [r4, #2832]
23226
- strh r8, [r6, #22] @ movhi
23227
- strh r8, [r6, #24] @ movhi
2322823538 bl buf_alloc
2322923539 mov r1, #1
23230
- str r7, [r0, #24]
23231
- mov fp, r0
23540
+ str r6, [r0, #24]
23541
+ mov r5, r0
2323223542 bl sblk_read_page
23233
- ldr r2, [fp, #36]
23234
- strh r8, [r6, #20] @ movhi
23235
- cmn r2, #1
23236
- cmpne r2, #512
2323723543 ldr r3, [sp]
23238
- beq .L3942
23239
- ldr r0, [fp, #12]
23240
- ldr r2, .L3945+32
23241
- ldr r1, [r0]
23242
- str r2, [sp, #8]
23243
- cmp r1, r2
23244
- beq .L3907
23245
- ldr r0, .L3945+8
23544
+ strh r3, [r7, #20] @ movhi
23545
+ ldr r3, [r5, #36]
23546
+ cmn r3, #1
23547
+ cmpne r3, #512
23548
+ bne .L3825
23549
+.L3865:
23550
+ mov r0, r5
23551
+ bl zbuf_free
23552
+.L3863:
23553
+ mvn r0, #0
23554
+ b .L3812
23555
+.L3825:
23556
+ ldr r1, [r5, #12]
23557
+ ldr r3, .L3867+32
23558
+ ldr r2, [r1]
23559
+ str r3, [sp, #8]
23560
+ cmp r2, r3
23561
+ beq .L3826
2324623562 movw r2, #1578
23247
- ldr r1, .L3945+4
23248
-.L3943:
23563
+.L3866:
23564
+ ldr r1, .L3867+4
23565
+ ldr r0, .L3867+8
2324923566 bl printk
2325023567 bl dump_stack
23251
-.L3942:
23252
- mov r0, fp
23253
- bl zbuf_free
23254
- b .L3940
23255
-.L3907:
23256
- ldrb r8, [r5, #-3123] @ zero_extendqisi2
23257
- ldrh r1, [r9, #-8]
23258
- ldr r2, .L3945+24
23259
- smulbb r1, r1, r8
23260
- smulbb r1, r1, r3
23261
- uxth r1, r1
23262
- str r1, [sp]
23263
- ldrb r1, [r5, #545] @ zero_extendqisi2
23264
- cmp r3, #3
23265
- cmpeq r1, #2
23266
- bne .L3908
23267
- movw r3, #542
23268
- ldr r1, [fp, #4]
23269
- ldrh r0, [r2, r3]
23270
- sub r3, r2, #3104
23271
- ldrh r3, [r3, #-10]
23272
- mov r3, r3, asl #2
23273
- smulbb r8, r3, r8
23274
- ldr r3, [r2, #-3128]
23275
- rsb r8, r0, r8
23276
- mov r0, r0, lsr #2
23277
- uxth r8, r8
23278
- add r0, r3, r0, asl #2
23279
- mov r2, r8
23568
+ b .L3865
23569
+.L3826:
23570
+ ldrb r2, [r8, #-3127] @ zero_extendqisi2
23571
+ ldrh r3, [fp, #-8]
23572
+ smulbb r3, r3, r2
23573
+ smulbb r3, r3, r9
23574
+ uxth r3, r3
23575
+ str r3, [sp]
23576
+ ldrb r3, [r8, #-11] @ zero_extendqisi2
23577
+ cmp r3, #2
23578
+ cmpeq r9, #3
23579
+ bne .L3827
23580
+ ldr r3, .L3867+28
23581
+ ldrh r0, [r8, #-14]
23582
+ ldr r1, [r5, #4]
23583
+ ldrh r9, [r3, #-14]
23584
+ ldr r3, [r8, #-3132]
23585
+ lsl r9, r9, #2
23586
+ smulbb r9, r9, r2
23587
+ sub r9, r9, r0
23588
+ lsr r0, r0, #2
23589
+ uxth r9, r9
23590
+ add r0, r3, r0, lsl #2
23591
+ mov r2, r9
2328023592 bl ftl_memcpy
23281
- ldr r3, [fp, #12]
23593
+ ldr r3, [r5, #12]
2328223594 ldr r3, [r3, #4]
2328323595 cmp r3, #0
23284
- beq .L3909
23285
- ldr r0, [fp, #4]
23286
- mov r1, r8
23596
+ beq .L3828
23597
+ mov r1, r9
23598
+ ldr r0, [r5, #4]
2328723599 str r3, [sp, #12]
2328823600 bl js_hash
2328923601 ldr r3, [sp, #12]
2329023602 cmp r3, r0
23291
- beq .L3909
23292
- mov r0, fp
23603
+ beq .L3828
23604
+ mov r0, r5
2329323605 bl zbuf_free
23294
- ldr r3, [fp, #12]
23295
- ldr r0, .L3945+36
23296
- ldr r2, [fp, #24]
23297
- ldr r1, [r3, #4]
23298
- mov r3, r8
23299
- b .L3941
23300
-.L3909:
23301
- ldrb r3, [r4, #1196] @ zero_extendqisi2
23606
+ ldr r1, [r5, #12]
23607
+ mov r3, r9
23608
+.L3864:
23609
+ ldr r2, [r5, #24]
23610
+ ldr r1, [r1, #4]
23611
+ ldr r0, .L3867+36
23612
+ bl printk
23613
+ b .L3863
23614
+.L3828:
23615
+ ldrb r3, [r4, #1158] @ zero_extendqisi2
2330223616 cmp r3, #0
23303
- bne .L3910
23304
- ldr r3, .L3945
23305
- ldrb r3, [r3, #1197] @ zero_extendqisi2
23617
+ bne .L3829
23618
+ ldrb r3, [r4, #1159] @ zero_extendqisi2
2330623619 cmp r3, #0
23307
- beq .L3911
23308
-.L3910:
23309
- sub r7, r7, #1
23310
- b .L3912
23311
-.L3911:
23312
- ldr r3, [sp, #4]
23313
- ldrh r7, [r9, #-8]
23314
- ldrh r3, [r3, #-10]
23315
- sub r7, r7, #1
23316
- uxth r7, r7
23317
- mul r10, r3, r10
23318
- orr r7, r7, #33554432
23319
- orr r7, r7, r10
23320
-.L3912:
23321
- str r7, [fp, #24]
23322
- mov r0, fp
23620
+ beq .L3830
23621
+.L3829:
23622
+ sub r6, r6, #1
23623
+ str r6, [r5, #24]
23624
+.L3831:
2332323625 mov r1, #1
23626
+ mov r0, r5
2332423627 bl sblk_read_page
23325
- ldr r3, [fp, #36]
23628
+ ldr r3, [r5, #36]
2332623629 cmn r3, #1
2332723630 cmpne r3, #512
23328
- beq .L3942
23329
- ldr r3, [fp, #12]
23631
+ beq .L3865
23632
+ ldr r3, [r5, #12]
2333023633 ldr r2, [sp, #8]
2333123634 ldr r3, [r3]
2333223635 cmp r3, r2
23333
- ldrne r0, .L3945+8
2333423636 movwne r2, #1619
23335
- ldrne r1, .L3945+4
23336
- bne .L3943
23337
-.L3914:
23338
- movw r3, #542
23339
- ldr r0, [r5, #-3128]
23340
- ldr r1, [fp, #4]
23341
- ldrh r2, [r5, r3]
23342
- b .L3939
23343
-.L3908:
23344
- ldr r3, [sp]
23345
- ldr r8, [r0, #4]
23346
- ldr r0, [fp, #4]
23347
- mov r7, r3, asl #2
23348
- str r2, [sp, #4]
23349
- mov r1, r7
23350
- bl js_hash
23351
- ldr r2, [sp, #4]
23352
- cmp r8, r0
23353
- ldreq r1, [fp, #4]
23354
- ldreq r0, [r2, #-3128]
23355
- moveq r2, r7
23356
- beq .L3939
23357
- mov r0, fp
23358
- bl zbuf_free
23359
- ldr r3, [fp, #12]
23360
- ldr r0, .L3945+36
23361
- ldr r2, [fp, #24]
23362
- ldr r1, [r3, #4]
23363
- mov r3, r7
23364
-.L3941:
23365
- bl printk
23366
-.L3940:
23367
- mvn r0, #0
23368
- b .L3895
23369
-.L3939:
23637
+ ldrheq r2, [r8, #-14]
23638
+ bne .L3866
23639
+.L3862:
23640
+ ldr r1, [r5, #4]
23641
+ mov r9, #0
23642
+ ldr r0, [r8, #-3132]
23643
+ mov r10, #1
2337023644 bl ftl_memcpy
23371
- ldr r7, [r5, #-3128]
23372
- ldr r10, .L3945+24
23373
- mov r8, #0
23374
- ldr r9, .L3945+20
23375
- sub r7, r7, #4
23376
-.L3917:
23645
+ ldr r6, [r8, #-3132]
23646
+ sub r6, r6, #4
23647
+.L3836:
2337723648 ldr r3, [sp]
23378
- cmp r8, r3
23379
- bge .L3944
23380
- ldr r0, [r7, #4]!
23649
+ cmp r9, r3
23650
+ blt .L3841
23651
+ mov r0, r5
23652
+ bl zbuf_free
23653
+ movw r3, #2824
23654
+ ldr r2, [r4, #1092]
23655
+ ldrh r1, [r4, r3]
23656
+ lsl r3, r1, #1
23657
+ ldrh r2, [r2, r3]
23658
+ ldrh r3, [r7, #20]
23659
+ cmp r2, r3
23660
+ beq .L3842
23661
+ ldr r0, .L3867+40
23662
+ bl printk
23663
+.L3842:
23664
+ movw r3, #2824
23665
+ ldrh r1, [r7, #20]
23666
+ ldrh r3, [r4, r3]
23667
+ ldr r2, [r4, #1092]
23668
+ lsl r3, r3, #1
23669
+ strh r1, [r2, r3] @ movhi
23670
+ mov r3, #0
23671
+ strh r3, [r7, #24] @ movhi
23672
+ ldrh r0, [r7, #20]
23673
+ b .L3812
23674
+.L3830:
23675
+ ldr r2, [sp, #4]
23676
+ ldrh r3, [fp, #-8]
23677
+ ldrh r2, [r2, #-2]
23678
+ sub r3, r3, #1
23679
+ uxth r3, r3
23680
+ mul r10, r10, r2
23681
+ orr r3, r3, #33554432
23682
+ orr r10, r3, r10
23683
+ str r10, [r5, #24]
23684
+ b .L3831
23685
+.L3827:
23686
+ ldr r3, [sp]
23687
+ ldr r9, [r1, #4]
23688
+ ldr r0, [r5, #4]
23689
+ lsl r6, r3, #2
23690
+ mov r1, r6
23691
+ bl js_hash
23692
+ cmp r9, r0
23693
+ moveq r2, r6
23694
+ beq .L3862
23695
+ mov r0, r5
23696
+ bl zbuf_free
23697
+ ldr r1, [r5, #12]
23698
+ mov r3, r6
23699
+ b .L3864
23700
+.L3841:
23701
+ ldr r0, [r6, #4]!
2338123702 cmn r0, #1
23382
- beq .L3919
23703
+ beq .L3838
2338323704 bl lpa_hash_get_ppa
2338423705 cmn r0, #1
2338523706 str r0, [sp, #20]
23386
- bne .L3920
23387
- ldr r0, [r7]
23388
- add r1, sp, #20
23707
+ bne .L3839
2338923708 mov r2, #0
23709
+ add r1, sp, #20
23710
+ ldr r0, [r6]
2339023711 bl pm_log2phys
23391
-.L3920:
23392
- ldr r3, .L3945+40
23393
- mvn r1, #0
23394
- ldr r2, [sp, #20]
23712
+.L3839:
23713
+ ldr r3, .L3867+44
23714
+ ldr fp, [sp, #20]
23715
+ ldrb r1, [r8, #-3136] @ zero_extendqisi2
2339523716 ldrh r0, [r3]
23396
- ldrb r3, [r4, #1189] @ zero_extendqisi2
23397
- str r2, [sp, #4]
23717
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
2339823718 rsb r3, r3, #24
23399
- rsb r3, r0, r3
23400
- mov r0, r2, lsr r0
23401
- bic r0, r0, r1, asl r3
23402
- ldrb r1, [r5, #-3130] @ zero_extendqisi2
23719
+ sub r3, r3, r0
23720
+ lsl r3, r10, r3
23721
+ sub r3, r3, #1
23722
+ and r0, r3, fp, lsr r0
2340323723 bl __aeabi_uidiv
23404
- ldrh r3, [r6]
23724
+ ldrh r3, [r7]
2340523725 cmp r0, r3
23406
- ldr r2, [sp, #4]
23407
- ldreq r3, [r10, #-3128]
23408
- ldreqh r1, [r9, #20]
23409
- streq r2, [r3, r1, asl #2]
23410
- ldreqh r3, [r9, #20]
23726
+ ldreq r3, [r8, #-3132]
23727
+ ldrheq r2, [r7, #20]
23728
+ streq fp, [r3, r2, lsl #2]
23729
+ ldrheq r3, [r7, #20]
2341123730 addeq r3, r3, #1
23412
- streqh r3, [r9, #20] @ movhi
23413
-.L3919:
23731
+ strheq r3, [r7, #20] @ movhi
23732
+.L3838:
2341423733 bl timer_get_time
23415
- add r8, r8, #1
23416
- b .L3917
23417
-.L3944:
23418
- mov r0, fp
23419
- bl zbuf_free
23420
- movw r3, #2828
23421
- ldrh r1, [r4, r3]
23422
- ldr r2, [r4, #1088]
23423
- mov r3, r1, asl #1
23424
- ldrh r2, [r2, r3]
23425
- ldrh r3, [r6, #20]
23426
- cmp r2, r3
23427
- beq .L3923
23428
- ldr r0, .L3945+44
23429
- bl printk
23430
-.L3923:
23431
- movw r3, #2828
23432
- ldrh r1, [r6, #20]
23433
- ldrh r3, [r4, r3]
23434
- ldr r2, [r4, #1088]
23435
- mov r3, r3, asl #1
23436
- strh r1, [r2, r3] @ movhi
23437
- mov r3, #0
23438
- ldrh r0, [r6, #20]
23439
- strh r3, [r6, #24] @ movhi
23440
-.L3895:
23441
- add sp, sp, #28
23442
- @ sp needed
23443
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23444
-.L3946:
23734
+ add r9, r9, #1
23735
+ b .L3836
23736
+.L3868:
2344523737 .align 2
23446
-.L3945:
23738
+.L3867:
2344723739 .word .LANCHOR0
23448
- .word .LANCHOR1+2612
23740
+ .word .LANCHOR1+2395
2344923741 .word .LC0
2345023742 .word .LANCHOR2
23451
- .word .LC253
23452
- .word .LANCHOR0+2828
23743
+ .word .LC252
23744
+ .word .LANCHOR0+2824
2345323745 .word .LANCHOR3
2345423746 .word .LANCHOR3-3104
2345523747 .word -178307901
23748
+ .word .LC253
2345623749 .word .LC254
23457
- .word .LANCHOR3-3132
23458
- .word .LC255
23750
+ .word .LANCHOR3-3138
2345923751 .fnend
2346023752 .size gc_scan_src_blk, .-gc_scan_src_blk
2346123753 .align 2
2346223754 .global gc_scan_static_data
23755
+ .syntax unified
23756
+ .arm
23757
+ .fpu softvfp
2346323758 .type gc_scan_static_data, %function
2346423759 gc_scan_static_data:
2346523760 .fnstart
2346623761 @ args = 0, pretend = 0, frame = 8
2346723762 @ frame_needed = 0, uses_anonymous_args = 0
23468
- stmfd sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
23469
- .save {r4, r5, r6, r7, r8, r9, lr}
23763
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
23764
+ .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2347023765 .pad #12
23471
- ldr r4, .L3964
23472
- ldr r3, [r4, #1092]
23766
+ ldr r4, .L3886
23767
+ ldr r3, [r4, #1096]
2347323768 ldr r2, [r3, #544]
2347423769 cmn r2, #1
23475
- beq .L3948
23476
- mov r5, #0
23477
- mov r7, r4
23478
-.L3949:
23479
- ldr r3, [r4, #1092]
23480
- add r1, sp, #4
23770
+ beq .L3870
23771
+ ldr r6, .L3886+4
23772
+ mov r7, #0
23773
+ ldr r9, .L3886+8
23774
+ sub r10, r6, #3136
23775
+.L3878:
23776
+ ldr r3, [r4, #1096]
2348123777 mov r2, #0
23482
- uxth r6, r5
23778
+ add r1, sp, #4
23779
+ uxth r8, r7
2348323780 ldr r0, [r3, #544]
2348423781 bl pm_log2phys
2348523782 ldr r3, [sp, #4]
2348623783 cmn r3, #1
23487
- beq .L3950
23784
+ beq .L3871
2348823785 mov r0, #1
2348923786 bl buf_alloc
23490
- mov r1, #1
2349123787 ldr r3, [sp, #4]
23492
- mov r8, r0
23788
+ mov r5, r0
23789
+ mov r1, #1
2349323790 str r3, [r0, #24]
2349423791 bl sblk_read_page
23495
- ldr r3, [r8, #36]
23792
+ ldr r3, [r5, #36]
2349623793 cmp r3, #256
23497
- bne .L3951
23498
- ldr r3, .L3964+4
23499
- mov r9, #1
23794
+ bne .L3872
23795
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
23796
+ mov fp, #1
23797
+ ldrh r2, [r10, #-2]
2350023798 ldr r0, [sp, #4]
23501
- ldrh r2, [r3]
23502
- ldrb r3, [r7, #1189] @ zero_extendqisi2
2350323799 rsb r3, r3, #24
23504
- rsb r3, r2, r3
23505
- mov r3, r9, asl r3
23800
+ ldrb r1, [r6, #-3136] @ zero_extendqisi2
23801
+ sub r3, r3, r2
23802
+ lsl r3, fp, r3
2350623803 sub r3, r3, #1
2350723804 and r0, r3, r0, lsr r2
23508
- ldr r3, .L3964+8
23509
- ldrb r1, [r3, #-3130] @ zero_extendqisi2
2351023805 bl __aeabi_uidiv
23511
- mov r1, r9
2351223806 mov r2, #0
23807
+ mov r1, fp
2351323808 uxth r0, r0
2351423809 bl gc_add_sblk
23515
-.L3951:
23516
- ldr r2, [r8, #12]
23517
- ldr r3, [r4, #1092]
23810
+.L3872:
23811
+ ldr r2, [r5, #12]
23812
+ ldr r3, [r4, #1096]
2351823813 ldr r2, [r2, #4]
2351923814 ldr r3, [r3, #544]
2352023815 cmp r2, r3
23521
- beq .L3952
23522
- ldr r1, .L3964+12
23816
+ beq .L3873
2352323817 movw r2, #2163
23524
- ldr r0, .L3964+16
23818
+ mov r1, r9
23819
+ ldr r0, .L3886+12
2352523820 bl printk
2352623821 bl dump_stack
23527
-.L3952:
23528
- mov r0, r8
23822
+.L3873:
23823
+ mov r0, r5
2352923824 bl zbuf_free
23530
-.L3950:
23531
- ldr r3, [r4, #1092]
23532
- ldr r1, [r4, #2784]
23825
+.L3871:
23826
+ ldr r3, [r4, #1096]
23827
+ ldr r1, [r4, #2780]
2353323828 ldr r2, [r3, #544]
2353423829 add r2, r2, #1
23535
- str r2, [r3, #544]
2353623830 cmp r2, r1
23537
- bcc .L3953
23831
+ str r2, [r3, #544]
23832
+ bcc .L3874
2353823833 mvn r2, #0
2353923834 str r2, [r3, #544]
2354023835 ldr r2, [r3, #548]
....@@ -23545,109 +23840,108 @@
2354523840 bl ftl_ext_info_flush
2354623841 mov r0, #0
2354723842 bl ftl_info_flush
23548
- b .L3947
23549
-.L3953:
23843
+.L3869:
23844
+ add sp, sp, #12
23845
+ @ sp needed
23846
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23847
+.L3874:
2355023848 ldr r3, [sp, #4]
2355123849 cmn r3, #1
23552
- bne .L3947
23553
- ldr r3, .L3964+20
23554
- add r5, r5, #1
23555
- ldrh r3, [r3]
23556
- cmp r6, r3, lsr #2
23557
- bcc .L3949
23558
- b .L3947
23559
-.L3948:
23850
+ bne .L3869
23851
+ ldrh r3, [r6, #-14]
23852
+ add r7, r7, #1
23853
+ cmp r8, r3, lsr #2
23854
+ bcc .L3878
23855
+ b .L3869
23856
+.L3870:
2356023857 ldr r2, [r3, #536]
2356123858 ldr r1, [r3, #12]
2356223859 add r2, r2, #12910592
2356323860 add r2, r2, #49408
2356423861 cmp r1, r2
23565
- bhi .L3958
23566
- ldr r0, [r4, #2804]
23862
+ bhi .L3880
23863
+ ldr r0, [r4, #2800]
2356723864 ldr r2, [r3, #540]
2356823865 ldr r0, [r0, #44]
2356923866 add r2, r2, #4992
2357023867 add r2, r2, #8
2357123868 cmp r0, r2
23572
- bls .L3947
23573
-.L3958:
23574
- ldr r2, [r4, #2804]
23869
+ bls .L3869
23870
+.L3880:
23871
+ ldr r2, [r4, #2800]
2357523872 ldr r2, [r2, #44]
2357623873 str r1, [r3, #536]
2357723874 str r2, [r3, #540]
2357823875 mov r2, #0
2357923876 str r2, [r3, #544]
23580
-.L3947:
23581
- add sp, sp, #12
23582
- @ sp needed
23583
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
23584
-.L3965:
23877
+ b .L3869
23878
+.L3887:
2358523879 .align 2
23586
-.L3964:
23880
+.L3886:
2358723881 .word .LANCHOR0
23588
- .word .LANCHOR3-3132
2358923882 .word .LANCHOR3
23590
- .word .LANCHOR1+2628
23883
+ .word .LANCHOR1+2411
2359123884 .word .LC0
23592
- .word .LANCHOR3+542
2359323885 .fnend
2359423886 .size gc_scan_static_data, .-gc_scan_static_data
2359523887 .align 2
2359623888 .global gc_block_vpn_scan
23889
+ .syntax unified
23890
+ .arm
23891
+ .fpu softvfp
2359723892 .type gc_block_vpn_scan, %function
2359823893 gc_block_vpn_scan:
2359923894 .fnstart
2360023895 @ args = 0, pretend = 0, frame = 32
2360123896 @ frame_needed = 0, uses_anonymous_args = 0
23602
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23897
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2360323898 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23604
- movw r4, #1076
23605
- ldr r5, .L4004
23899
+ movw r5, #1080
23900
+ ldr r4, .L3922
2360623901 .pad #44
2360723902 sub sp, sp, #44
23608
- ldr r2, [r5, #1092]
23609
- ldrh r3, [r5, r4]
23903
+ ldr r2, [r4, #1096]
23904
+ ldrh r3, [r4, r5]
2361023905 ldr r2, [r2, #608]
2361123906 cmp r2, r3
23612
- bcs .L3966
23907
+ bcs .L3888
2361323908 bl timer_get_time
23614
- ldr r6, [r5, #1092]
23909
+ ldr r6, [r4, #1096]
2361523910 ldr r3, [r6, #604]
2361623911 add r3, r3, #29952
2361723912 add r3, r3, #48
2361823913 cmp r0, r3
23619
- bls .L3966
23914
+ bls .L3888
2362023915 bl timer_get_time
23621
- ldr r3, [r5, #1092]
23622
- ldrh r1, [r5, r4]
23916
+ ldr r3, [r4, #1096]
2362323917 str r0, [r6, #604]
23918
+ ldrh r1, [r4, r5]
2362423919 ldr r2, [r3, #600]
2362523920 cmp r2, r1
23626
- bcs .L3970
23627
- ldr r1, [r5, #2804]
23921
+ bcs .L3890
23922
+ ldr r1, [r4, #2800]
2362823923 ldrh r1, [r1, #134]
2362923924 cmp r2, r1
23630
- bcs .L3971
23631
-.L3970:
23632
- ldr r2, [r5, #2804]
23925
+ bcs .L3891
23926
+.L3890:
23927
+ ldr r2, [r4, #2800]
2363323928 ldrh r2, [r2, #134]
2363423929 str r2, [r3, #600]
23635
-.L3971:
23636
- ldr r4, [r3, #600]
23930
+.L3891:
23931
+ ldr r5, [r3, #600]
2363723932 movw r3, #65535
23638
- uxth r4, r4
23639
- cmp r4, r3
23640
- bne .L3972
23641
- ldr r1, .L4004+4
23933
+ uxth r7, r5
23934
+ cmp r7, r3
23935
+ bne .L3892
2364223936 movw r2, #2504
23643
- ldr r0, .L4004+8
23937
+ ldr r1, .L3922+4
23938
+ ldr r0, .L3922+8
2364423939 bl printk
2364523940 bl dump_stack
23646
-.L3972:
23647
- ldr r3, [r5, #1092]
23648
- mov r0, r4
23941
+.L3892:
23942
+ ldr r3, [r4, #1096]
2364923943 add r1, sp, #24
23650
- ldr r6, .L4004
23944
+ mov r0, r7
2365123945 ldr r2, [r3, #600]
2365223946 add r2, r2, #1
2365323947 str r2, [r3, #600]
....@@ -23655,1351 +23949,1362 @@
2365523949 add r2, r2, #1
2365623950 str r2, [r3, #608]
2365723951 bl ftl_get_blk_list_in_sblk
23658
- uxth r0, r0
23659
- cmp r0, #0
23660
- beq .L3966
23661
- ldr r9, [r6, #1080]
23662
- add r9, r9, r4, asl #2
23663
- ldrb r3, [r9, #2] @ zero_extendqisi2
23664
- tst r3, #192
23952
+ uxth r3, r0
23953
+ cmp r3, #0
23954
+ beq .L3888
23955
+ ldr r10, [r4, #1084]
23956
+ uxth r5, r5
23957
+ add r10, r10, r5, lsl #2
23958
+ ldrb r3, [r10, #2] @ zero_extendqisi2
2366523959 and r2, r3, #224
23666
- moveq r3, #1
23667
- movne r3, #0
23668
- cmp r2, #224
23669
- orreq r3, r3, #1
23960
+ and r3, r3, #192
2367023961 cmp r3, #0
23671
- bne .L3973
23672
- ldr r3, [r6, #1092]
23962
+ cmpne r2, #224
23963
+ beq .L3893
23964
+ ldr r3, [r4, #1096]
2367323965 ldrh r1, [r3, #16]
23674
- cmp r1, r4
23675
- beq .L3973
23966
+ cmp r1, r7
23967
+ beq .L3893
2367623968 ldrh r1, [r3, #48]
23677
- cmp r1, r4
23678
- beq .L3973
23969
+ cmp r1, r7
23970
+ beq .L3893
2367923971 ldrh r3, [r3, #80]
23680
- cmp r3, r4
23681
- bne .L3974
23682
-.L3973:
23972
+ cmp r3, r7
23973
+ bne .L3894
23974
+.L3893:
2368323975 cmp r2, #0
23684
- bne .L3966
23685
- ldr r3, [r5, #1088]
23686
- mov r4, r4, asl #1
23687
- ldrh r3, [r3, r4]
23976
+ bne .L3888
23977
+ ldr r3, [r4, #1092]
23978
+ lsl r5, r5, #1
23979
+ ldrh r3, [r3, r5]
2368823980 cmp r3, #0
23689
- beq .L3975
23690
- ldr r1, .L4004+4
23981
+ beq .L3895
2369123982 movw r2, #2521
23692
- ldr r0, .L4004+8
23983
+ ldr r1, .L3922+4
23984
+ ldr r0, .L3922+8
2369323985 bl printk
2369423986 bl dump_stack
23695
-.L3975:
23696
- ldr r3, [r5, #1088]
23987
+.L3895:
23988
+ ldr r3, [r4, #1092]
2369723989 mov r2, #0
23698
- strh r2, [r3, r4] @ movhi
23699
- b .L3966
23700
-.L3974:
23990
+ strh r2, [r3, r5] @ movhi
23991
+.L3888:
23992
+ add sp, sp, #44
23993
+ @ sp needed
23994
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23995
+.L3894:
23996
+ uxth r0, r0
2370123997 add r3, sp, #40
23702
- add r0, r3, r0, asl #1
23998
+ add r0, r3, r0, lsl #1
2370323999 movw r3, #65535
23704
- ldrh r7, [r0, #-18]
23705
- cmp r7, r3
23706
- bne .L3977
23707
- ldr r1, .L4004+4
24000
+ ldrh r8, [r0, #-18]
24001
+ cmp r8, r3
24002
+ bne .L3897
2370824003 movw r2, #2529
23709
- ldr r0, .L4004+8
24004
+ ldr r1, .L3922+4
24005
+ ldr r0, .L3922+8
2371024006 bl printk
2371124007 bl dump_stack
23712
-.L3977:
23713
- ldr r6, .L4004+12
23714
- ldrb r10, [r9, #2] @ zero_extendqisi2
24008
+.L3897:
24009
+ ldr r6, .L3922+12
2371524010 sub fp, r6, #3088
23716
- ldrh r3, [fp, #-8]
23717
- sub r3, r3, #1
23718
- uxth r8, r3
23719
- sub r3, r6, #3056
23720
- ldrh r2, [r3, #-10]
23721
- sub r3, r6, #3104
23722
- mul r7, r2, r7
23723
- and r2, r10, #224
24011
+ ldrh r2, [fp, #-8]
24012
+ sub r2, r2, #1
24013
+ uxth r3, r2
24014
+ sub r2, r6, #3072
24015
+ ldrh r1, [r2, #-2]
24016
+ ldrb r2, [r10, #2] @ zero_extendqisi2
24017
+ and r2, r2, #224
24018
+ mul r1, r8, r1
2372424019 cmp r2, #160
23725
- movne r10, #1
23726
- bne .L3978
23727
- ldrb r2, [r6, #-3124] @ zero_extendqisi2
23728
- cmp r2, #2
23729
- uxth r10, r2
23730
- orr r7, r7, r2, asl #24
23731
- ldreqh r8, [r3, #-10]
23732
- subeq r8, r8, #1
23733
- uxtheq r8, r8
23734
-.L3978:
24020
+ sub r2, r6, #3104
24021
+ movne r8, #1
24022
+ bne .L3898
24023
+ ldrb r8, [r6, #-3128] @ zero_extendqisi2
24024
+ cmp r8, #2
24025
+ ldrheq r3, [r2, #-14]
24026
+ orr r1, r1, r8, lsl #24
24027
+ uxthne r8, r8
24028
+ subeq r3, r3, #1
24029
+ uxtheq r3, r3
24030
+.L3898:
24031
+ orr r3, r3, r1
24032
+ str r2, [sp, #12]
2373524033 mov r0, #1
23736
- str r3, [sp, #12]
24034
+ str r3, [sp, #8]
2373724035 bl buf_alloc
23738
- orr r7, r8, r7
24036
+ ldr r3, [sp, #8]
2373924037 mov r1, #1
23740
- str r7, [r0, #24]
23741
- mov r8, r0
24038
+ mov r9, r0
24039
+ str r3, [r0, #24]
2374224040 bl sblk_read_page
24041
+ ldr r2, [sp, #12]
2374324042 mov r1, #255
23744
- ldr r0, [r6, #-3128]
23745
- ldr r3, [sp, #12]
23746
- ldrh r2, [r3, #-10]
23747
- ldrb r3, [r6, #-3123] @ zero_extendqisi2
23748
- mul r2, r3, r2
23749
- mov r2, r2, asl #2
24043
+ ldr r0, [r6, #-3132]
24044
+ ldrh r3, [r2, #-14]
24045
+ ldrb r2, [r6, #-3127] @ zero_extendqisi2
24046
+ mul r2, r2, r3
24047
+ lsl r2, r2, #2
2375024048 bl ftl_memset
23751
- ldr r2, [r8, #36]
24049
+ ldr r2, [r9, #36]
2375224050 cmn r2, #1
2375324051 cmpne r2, #512
2375424052 moveq r2, #1
2375524053 movne r2, #0
23756
- moveq r0, r4
23757
- moveq r1, #1
2375824054 moveq r2, #0
23759
- beq .L4002
23760
- ldr r3, [r8, #12]
24055
+ beq .L3921
24056
+ ldr r3, [r9, #12]
2376124057 ldr r1, [r3]
23762
- ldr r3, .L4004+16
24058
+ ldr r3, .L3922+16
2376324059 cmp r1, r3
23764
- beq .L3980
23765
- mov r0, r4
24060
+ beq .L3901
24061
+.L3921:
2376624062 mov r1, #1
23767
-.L4002:
24063
+ mov r0, r7
2376824064 bl gc_add_sblk
23769
- mov r0, r8
24065
+ mov r0, r9
2377024066 bl zbuf_free
23771
- b .L3966
23772
-.L3980:
23773
- ldr r3, .L4004+12
23774
- mov r7, r2
23775
- ldrh fp, [fp, #-8]
23776
- ldrb r3, [r3, #-3123] @ zero_extendqisi2
23777
- smulbb fp, r3, fp
23778
- smulbb fp, fp, r10
23779
- ldr r10, [r8, #4]
23780
- uxth r3, fp
24067
+ b .L3888
24068
+.L3901:
24069
+ ldrh r3, [fp, #-8]
2378124070 mov fp, r2
24071
+ ldrb r1, [r6, #-3127] @ zero_extendqisi2
24072
+ smulbb r1, r1, r3
24073
+ smulbb r8, r1, r8
24074
+ uxth r3, r8
24075
+ mov r8, r2
2378224076 str r3, [sp, #12]
23783
-.L3981:
24077
+ ldr r3, [r9, #4]
24078
+ str r3, [sp, #8]
24079
+.L3902:
2378424080 ldr r3, [sp, #12]
2378524081 cmp fp, r3
23786
- bge .L4003
23787
- ldr r0, [r10, fp, asl #2]
24082
+ blt .L3905
24083
+ mov r0, r9
24084
+ lsl r6, r5, #1
24085
+ bl zbuf_free
24086
+ ldr r3, .L3922+20
24087
+ ldr r3, [r3]
24088
+ tst r3, #256
24089
+ beq .L3906
24090
+ ldr r3, [r4, #1092]
24091
+ mov r1, r5
24092
+ ldr r0, .L3922+24
24093
+ ldrh r2, [r3, r6]
24094
+ ldrb r3, [r10, #2] @ zero_extendqisi2
24095
+ lsr r3, r3, #5
24096
+ str r3, [sp]
24097
+ mov r3, r8
24098
+ bl printk
24099
+.L3906:
24100
+ ldr r3, [r4, #1092]
24101
+ cmp r8, #31
24102
+ strh r8, [r3, r6] @ movhi
24103
+ bhi .L3888
24104
+ mov r2, #0
24105
+ mov r1, #1
24106
+ mov r0, r7
24107
+ bl gc_add_sblk
24108
+ b .L3888
24109
+.L3905:
24110
+ ldr r3, [sp, #8]
24111
+ ldr r0, [r3, fp, lsl #2]
2378824112 cmn r0, #1
23789
- beq .L3982
24113
+ beq .L3903
2379024114 bl lpa_hash_get_ppa
2379124115 cmn r0, #1
2379224116 str r0, [sp, #20]
23793
- bne .L3983
23794
- ldr r0, [r10, fp, asl #2]
24117
+ bne .L3904
24118
+ ldr r3, [sp, #8]
24119
+ mov r2, #0
2379524120 add r1, sp, #20
23796
- mov r2, #0
24121
+ ldr r0, [r3, fp, lsl #2]
2379724122 bl pm_log2phys
23798
-.L3983:
23799
- ldr r3, .L4004+20
23800
- ldrb r2, [r5, #1189] @ zero_extendqisi2
23801
- ldr r0, [sp, #20]
23802
- ldrh r1, [r3]
23803
- rsb r2, r2, #24
24123
+.L3904:
24124
+ ldr r2, .L3922+28
2380424125 mov r3, #1
23805
- rsb r2, r1, r2
23806
- mov r2, r3, asl r2
24126
+ ldr r0, [sp, #20]
24127
+ ldrb r1, [r6, #-3136] @ zero_extendqisi2
24128
+ ldrh ip, [r2]
24129
+ ldrb r2, [r4, #1153] @ zero_extendqisi2
24130
+ rsb r2, r2, #24
24131
+ sub r2, r2, ip
24132
+ lsl r2, r3, r2
2380724133 sub r2, r2, #1
23808
- and r0, r2, r0, lsr r1
23809
- ldrb r1, [r6, #-3130] @ zero_extendqisi2
24134
+ and r0, r2, r0, lsr ip
2381024135 bl __aeabi_uidiv
23811
- cmp r0, r4
23812
- addeq r7, r7, #1
23813
- uxtheq r7, r7
23814
-.L3982:
24136
+ cmp r5, r0
24137
+ addeq r8, r8, #1
24138
+ uxtheq r8, r8
24139
+.L3903:
2381524140 add fp, fp, #1
23816
- b .L3981
23817
-.L4003:
23818
- mov r0, r8
23819
- mov r6, r4, asl #1
23820
- bl zbuf_free
23821
- ldr r3, .L4004+24
23822
- ldr r3, [r3]
23823
- tst r3, #256
23824
- beq .L3985
23825
- ldr r3, [r5, #1088]
23826
- mov r1, r4
23827
- ldr r0, .L4004+28
23828
- ldrh r2, [r3, r6]
23829
- ldrb r3, [r9, #2] @ zero_extendqisi2
23830
- mov r3, r3, lsr #5
23831
- str r3, [sp]
23832
- mov r3, r7
23833
- bl printk
23834
-.L3985:
23835
- ldr r3, [r5, #1088]
23836
- cmp r7, #31
23837
- strh r7, [r3, r6] @ movhi
23838
- bhi .L3966
23839
- mov r0, r4
23840
- mov r1, #1
23841
- mov r2, #0
23842
- bl gc_add_sblk
23843
-.L3966:
23844
- add sp, sp, #44
23845
- @ sp needed
23846
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
23847
-.L4005:
24141
+ b .L3902
24142
+.L3923:
2384824143 .align 2
23849
-.L4004:
24144
+.L3922:
2385024145 .word .LANCHOR0
23851
- .word .LANCHOR1+2648
24146
+ .word .LANCHOR1+2431
2385224147 .word .LC0
2385324148 .word .LANCHOR3
2385424149 .word -178307901
23855
- .word .LANCHOR3-3132
2385624150 .word .LANCHOR2
23857
- .word .LC256
24151
+ .word .LC255
24152
+ .word .LANCHOR3-3138
2385824153 .fnend
2385924154 .size gc_block_vpn_scan, .-gc_block_vpn_scan
2386024155 .align 2
2386124156 .global ftl_sblk_dump
24157
+ .syntax unified
24158
+ .arm
24159
+ .fpu softvfp
2386224160 .type ftl_sblk_dump, %function
2386324161 ftl_sblk_dump:
2386424162 .fnstart
23865
- @ args = 0, pretend = 0, frame = 88
24163
+ @ args = 0, pretend = 0, frame = 80
2386624164 @ frame_needed = 0, uses_anonymous_args = 0
23867
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
24165
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2386824166 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
23869
- mov fp, r0, asl #2
23870
- ldr r4, .L4044
23871
- .pad #132
23872
- sub sp, sp, #132
24167
+ lsl r3, r0, #2
24168
+ ldr r4, .L3961
24169
+ .pad #124
24170
+ sub sp, sp, #124
24171
+ lsl r2, r0, #2
2387324172 mov r7, r0
24173
+ str r3, [sp, #68]
24174
+ ldr r3, [r4, #1084]
2387424175 str r1, [sp, #60]
23875
- ldr r2, [r4, #1080]
23876
- add r3, r2, fp
23877
- ldrh r1, [r2, fp]
23878
- ldrb r3, [r3, #2] @ zero_extendqisi2
23879
- ubfx r1, r1, #0, #11
23880
- str r1, [sp]
23881
- ldr r10, [r2, r0, asl #2]
23882
- mov r1, r7
23883
- mov r2, r3, lsr #5
23884
- ldr r0, .L4044+4
23885
- ubfx r3, r3, #3, #2
23886
- ubfx r10, r10, #11, #8
23887
- str r10, [sp, #4]
24176
+ ldr r1, [r3, r0, lsl #2]
24177
+ add r2, r3, r2
24178
+ ldrb r2, [r2, #2] @ zero_extendqisi2
24179
+ ubfx r1, r1, #11, #8
24180
+ str r1, [sp, #4]
24181
+ lsl r1, r0, #2
24182
+ ldrh r3, [r3, r1]
24183
+ mov r1, r0
24184
+ ldr r0, .L3961+4
24185
+ ubfx r3, r3, #0, #11
24186
+ str r3, [sp]
24187
+ ubfx r3, r2, #3, #2
24188
+ lsr r2, r2, #5
2388824189 bl printk
2388924190 movw r3, #65535
2389024191 cmp r7, r3
23891
- beq .L4029
23892
- movw r3, #1076
24192
+ beq .L3947
24193
+ movw r3, #1080
2389324194 ldrh r3, [r4, r3]
2389424195 cmp r3, r7
23895
- bls .L4029
23896
- ldr r3, [r4, #1080]
23897
- add r1, sp, #112
24196
+ bls .L3947
24197
+ ldr r3, [r4, #1084]
24198
+ lsl r2, r7, #2
24199
+ add r1, sp, #104
24200
+ strh r7, [sp, #88] @ movhi
2389824201 mov r0, r7
23899
- strh r7, [sp, #96] @ movhi
23900
- add r3, r3, fp
2390124202 mov r5, #0
23902
- mov r9, r5
24203
+ add r3, r3, r2
24204
+ mov fp, r5
2390324205 ldrb r3, [r3, #2] @ zero_extendqisi2
2390424206 and r3, r3, #224
2390524207 cmp r3, #160
23906
- ldreq r3, .L4044+8
23907
- movne r10, #1
23908
- ldreqb r10, [r3, #-3124] @ zero_extendqisi2
24208
+ ldreq r3, .L3961+8
24209
+ movne r9, #1
24210
+ ldrbeq r9, [r3, #-3128] @ zero_extendqisi2
2390924211 bl ftl_get_blk_list_in_sblk
23910
- ldr r3, .L4044+12
23911
- mov r1, r7
23912
- mov r2, r3
23913
- ldrh r3, [r2, #-8]!
24212
+ ldr r3, .L3961+12
2391424213 uxtb r0, r0
24214
+ lsl r2, r7, #2
24215
+ strh r5, [sp, #90] @ movhi
24216
+ strb r0, [sp, #97]
24217
+ mov r1, r7
24218
+ ldrh r3, [r3, #-8]
24219
+ strb r5, [sp, #93]
2391524220 strh r5, [sp, #98] @ movhi
23916
- strb r0, [sp, #105]
2391724221 smulbb r3, r3, r0
23918
- strb r5, [sp, #101]
23919
- str r2, [sp, #64]
23920
- strh r5, [sp, #106] @ movhi
23921
- strh r3, [sp, #102] @ movhi
23922
- ldr r3, [r4, #1080]
23923
- add r3, r3, fp
24222
+ strh r3, [sp, #94] @ movhi
24223
+ ldr r3, [r4, #1084]
24224
+ add r3, r3, r2
2392424225 ldrb r2, [r3, #2] @ zero_extendqisi2
23925
- mov r3, r10
24226
+ mov r3, r9
2392624227 str r0, [sp]
23927
- ldr r0, .L4044+16
23928
- mov r2, r2, lsr #5
24228
+ ldr r0, .L3961+16
24229
+ lsr r2, r2, #5
2392924230 bl printk
2393024231 mov r0, #1
2393124232 bl buf_alloc
2393224233 mov r6, r0
2393324234 str r5, [sp, #44]
2393424235 str r5, [sp, #52]
23935
-.L4009:
23936
- ldr r3, [sp, #64]
23937
- uxth r2, r5
23938
- str r2, [sp, #48]
23939
- ldrh r3, [r3]
23940
- cmp r3, r2
23941
- bls .L4026
23942
- mov r3, r2, asl #1
23943
- add r2, r3, r2
23944
- sub r3, r3, #1
24236
+.L3927:
24237
+ ldr r3, .L3961+20
24238
+ ldrh r2, [r3]
24239
+ uxth r3, r5
24240
+ cmp r2, r3
24241
+ bls .L3944
2394524242 str r3, [sp, #72]
24243
+ lsl r3, r3, #1
24244
+ sub r2, r3, #1
24245
+ str r2, [sp, #76]
24246
+ uxth r2, r5
24247
+ add r3, r3, r2
24248
+ sub r3, r3, #1
24249
+ str r3, [sp, #64]
2394624250 mov r3, #0
23947
- sub r2, r2, #1
23948
- str r2, [sp, #68]
23949
-.L4042:
24251
+ b .L3960
24252
+.L3941:
24253
+ ldrh r3, [sp, #48]
24254
+ add r2, sp, #120
24255
+ add r3, r2, r3, lsl #1
24256
+ ldrh r3, [r3, #-16]
2395024257 str r3, [sp, #56]
23951
- ldrb r2, [sp, #105] @ zero_extendqisi2
23952
- ldrh r3, [sp, #56]
23953
- cmp r2, r3
23954
- bls .L4024
23955
- mov r8, #1
23956
- add r3, r3, #8
23957
- str r3, [sp, #76]
23958
-.L4025:
23959
- cmp r8, r10
23960
- bhi .L4043
23961
- ldr r2, [sp, #76]
23962
- add r3, sp, #128
23963
- add r3, r3, r2, asl #1
23964
- ldrh r2, [r3, #-32]
2396524258 movw r3, #65535
24259
+ ldr r2, [sp, #56]
2396624260 cmp r2, r3
23967
- beq .L4010
23968
- ldr r3, .L4044+20
23969
- cmp r10, #3
23970
- ldrh r3, [r3]
23971
- mul r3, r3, r2
23972
- bne .L4011
23973
- ldr r1, .L4044
23974
- ldrb r0, [r1, #1196] @ zero_extendqisi2
23975
- cmp r0, #0
23976
- ldrne r1, [sp, #68]
23977
- bne .L4040
23978
- ldrb r1, [r1, #1197] @ zero_extendqisi2
23979
- mov r4, r8, asl #24
24261
+ beq .L3928
24262
+ ldr r3, .L3961+24
24263
+ cmp r9, #3
24264
+ ldrh r4, [r3, #-2]
24265
+ mul r3, r2, r4
24266
+ bne .L3929
24267
+ ldr r2, .L3961
24268
+ ldrb r1, [r2, #1158] @ zero_extendqisi2
2398024269 cmp r1, #0
24270
+ ldrne r2, [sp, #64]
24271
+ bne .L3958
24272
+ ldrb r2, [r2, #1159] @ zero_extendqisi2
24273
+ lsl r4, r8, #24
24274
+ cmp r2, #0
24275
+ ldrne r2, [sp, #64]
2398124276 uxtaheq r3, r3, r5
23982
- ldrne r1, [sp, #68]
23983
- addne r3, r3, r1
24277
+ addne r3, r3, r2
2398424278 addne r3, r3, r8
2398524279 orr r4, r4, r3
23986
- b .L4013
23987
-.L4011:
23988
- cmp r10, #2
23989
- uxtahne r4, r3, r5
23990
- bne .L4013
23991
- ldr r1, [sp, #72]
23992
-.L4040:
23993
- add r3, r3, r1
23994
- ldr r1, .L4044+8
23995
- add r3, r3, r8
23996
- ldrb r4, [r1, #-3124] @ zero_extendqisi2
23997
- orr r4, r3, r4, asl #24
23998
-.L4013:
24280
+.L3931:
2399924281 mov r1, #1
2400024282 str r4, [r6, #24]
2400124283 mov r0, r6
24002
- str r2, [sp, #84]
2400324284 bl sblk_read_page
24004
- ldr r1, [r6, #4]
24005
- ldr ip, [r6, #36]
24006
- ldr r3, [r6, #12]
24007
- str ip, [sp]
24008
- ldr r0, [r1]
24009
- ldr r2, [sp, #84]
24010
- str ip, [sp, #80]
24011
- str r0, [sp, #4]
24012
- ldr r0, [r1, #4]
24013
- str r0, [sp, #8]
24014
- ldr r0, [r1, #8]
24015
- str r0, [sp, #12]
24016
- ldr r1, [r1, #12]
24017
- ldr r0, .L4044+24
24018
- str r1, [sp, #16]
24019
- ldr r1, [r3]
24020
- str r1, [sp, #20]
24021
- ldr r1, [r3, #4]
24022
- str r1, [sp, #24]
24023
- ldr r1, [r3, #8]
24285
+ ldr r2, [r6, #12]
24286
+ ldr r3, [r6, #4]
24287
+ ldr r10, [r6, #36]
24288
+ ldr r1, [r2, #12]
24289
+ ldr r0, .L3961+28
24290
+ str r1, [sp, #32]
24291
+ ldr r1, [r2, #8]
2402424292 str r1, [sp, #28]
24025
- mov r1, r2
24026
- ldr r3, [r3, #12]
24027
- ldr r2, [sp, #48]
24028
- str r3, [sp, #32]
24293
+ ldr r1, [r2, #4]
24294
+ str r1, [sp, #24]
24295
+ ldr r2, [r2]
24296
+ ldr r1, [sp, #56]
24297
+ str r2, [sp, #20]
24298
+ ldr r2, [r3, #12]
24299
+ str r2, [sp, #16]
24300
+ ldr r2, [r3, #8]
24301
+ str r2, [sp, #12]
24302
+ ldr r2, [r3, #4]
24303
+ str r2, [sp, #8]
24304
+ ldr r3, [r3]
24305
+ ldr r2, [sp, #72]
24306
+ str r10, [sp]
24307
+ str r3, [sp, #4]
2402924308 mov r3, r4
2403024309 bl printk
24031
- ldr r0, .L4044+28
24032
- ldr ip, [sp, #80]
2403324310 ldr r3, [sp, #52]
24034
- cmn ip, #1
24035
- cmpne ip, #512
24311
+ cmn r10, #1
24312
+ cmpne r10, #512
2403624313 moveq r3, #1
24314
+ ldr r0, .L3961+32
2403724315 str r3, [sp, #52]
24038
- ldr r3, .L4044+32
24316
+ ldr r3, .L3961+36
2403924317 ldr r3, [r3, #4]
2404024318 blx r3
24041
- ldr r3, .L4044
24042
- ldr r3, [r3, #1080]
24043
- add r3, r3, fp
24319
+ ldr r3, .L3961
24320
+ ldr r2, [sp, #68]
24321
+ ldr r3, [r3, #1084]
24322
+ add r3, r3, r2
2404424323 ldrb r2, [r3, #2] @ zero_extendqisi2
2404524324 and r2, r2, #224
24046
- cmp r2, #224
24047
- cmpne r2, #32
24048
- moveq r2, #1
24049
- movne r2, #0
24050
- beq .L4010
24325
+ cmp r2, #32
24326
+ cmpne r2, #224
24327
+ moveq r10, #1
24328
+ movne r10, #0
24329
+ beq .L3928
2405124330 ldr r3, [r6, #12]
24052
- str r2, [sp, #80]
2405324331 ldr r0, [r3, #4]
2405424332 bl lpa_hash_get_ppa
2405524333 cmn r0, #1
24056
- str r0, [sp, #92]
24057
- ldr r2, [sp, #80]
24058
- bne .L4017
24334
+ str r0, [sp, #84]
24335
+ bne .L3935
2405924336 ldr r3, [r6, #12]
24060
- add r1, sp, #92
24337
+ mov r2, r10
24338
+ add r1, sp, #84
2406124339 ldr r0, [r3, #4]
2406224340 bl pm_log2phys
24063
-.L4017:
24064
- ldr r3, [sp, #92]
24065
- cmp r3, r4
24066
- bne .L4018
24341
+.L3935:
24342
+ ldr r3, [sp, #84]
24343
+ cmp r4, r3
24344
+ bne .L3936
2406724345 ldr r3, [sp, #44]
2406824346 mov r1, r4
24069
- ldr r0, .L4044+36
24347
+ ldr r2, [r6, #12]
24348
+ ldr r0, .L3961+40
2407024349 add r3, r3, #1
24350
+ ldr r2, [r2, #4]
2407124351 str r3, [sp, #44]
24072
- ldr r3, [r6, #12]
24073
- ldr r2, [r3, #4]
24074
- ldr r3, [sp, #44]
2407524352 bl printk
24076
-.L4018:
24353
+.L3936:
2407724354 ldr r3, [sp, #60]
2407824355 cmp r3, #0
24079
- beq .L4020
24080
- ldr r2, [r3, r9, asl #2]
24081
- mov r4, r9, asl #2
24356
+ beq .L3938
24357
+ ldr r2, [r3, fp, lsl #2]
24358
+ lsl r4, fp, #2
2408224359 ldr r3, [r6, #12]
2408324360 ldr r3, [r3, #4]
2408424361 cmp r3, r2
24085
- beq .L4021
24086
- ldr r3, .L4044+40
24362
+ beq .L3939
24363
+ ldr r3, .L3961+44
2408724364 ldr r3, [r3]
2408824365 tst r3, #4096
24089
- beq .L4021
24090
- ldr r0, .L4044+44
24091
- mov r1, r9
24366
+ beq .L3939
24367
+ mov r1, fp
24368
+ ldr r0, .L3961+48
2409224369 bl printk
24093
-.L4021:
24370
+.L3939:
2409424371 ldr r3, [sp, #60]
2409524372 ldr r2, [r6, #12]
2409624373 ldr r3, [r3, r4]
2409724374 ldr r2, [r2, #4]
2409824375 cmp r2, r3
2409924376 cmnne r3, #1
24100
- beq .L4020
24101
- ldr r1, .L4044+48
24377
+ beq .L3938
2410224378 movw r2, #1575
24103
- ldr r0, .L4044+52
24379
+ ldr r1, .L3961+52
24380
+ ldr r0, .L3961+56
2410424381 bl printk
2410524382 bl dump_stack
24106
-.L4020:
24107
- add r9, r9, #1
24108
-.L4010:
24383
+.L3938:
24384
+ add fp, fp, #1
24385
+.L3928:
2410924386 add r8, r8, #1
2411024387 uxth r8, r8
24111
- b .L4025
24112
-.L4043:
24113
- ldr r3, [sp, #56]
24388
+.L3943:
24389
+ cmp r9, r8
24390
+ bcs .L3941
24391
+ ldr r3, [sp, #48]
2411424392 add r3, r3, #1
24115
- b .L4042
24116
-.L4024:
24393
+.L3960:
24394
+ str r3, [sp, #48]
24395
+ ldrb r2, [sp, #97] @ zero_extendqisi2
24396
+ ldrh r3, [sp, #48]
24397
+ cmp r2, r3
24398
+ bls .L3942
24399
+ mov r8, #1
24400
+ b .L3943
24401
+.L3929:
24402
+ cmp r9, #2
24403
+ uxtahne r4, r3, r5
24404
+ bne .L3931
24405
+ ldr r2, [sp, #76]
24406
+.L3958:
24407
+ add r4, r3, r2
24408
+ ldr r2, .L3961+8
24409
+ add r3, r4, r8
24410
+ ldrb r4, [r2, #-3128] @ zero_extendqisi2
24411
+ orr r4, r3, r4, lsl #24
24412
+ b .L3931
24413
+.L3942:
2411724414 add r5, r5, #1
24118
- b .L4009
24119
-.L4026:
24415
+ b .L3927
24416
+.L3944:
2412024417 mov r0, r6
2412124418 bl zbuf_free
24122
- ldr r3, .L4044
24123
- ldr r0, .L4044+56
24124
- mov r1, r7
24125
- ldr r2, [r3, #1088]
24126
- mov r3, r7, asl #1
24127
- ldrh r2, [r2, r3]
24419
+ ldr r3, .L3961
24420
+ lsl r2, r7, #1
24421
+ ldr r0, .L3961+60
24422
+ ldr r1, [r3, #1092]
2412824423 ldr r3, [sp, #44]
24424
+ ldrh r2, [r1, r2]
24425
+ mov r1, r7
2412924426 bl printk
2413024427 ldr r0, [sp, #52]
24131
- b .L4007
24132
-.L4029:
24133
- mov r0, #0
24134
-.L4007:
24135
- add sp, sp, #132
24428
+.L3924:
24429
+ add sp, sp, #124
2413624430 @ sp needed
24137
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
24138
-.L4045:
24431
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
24432
+.L3947:
24433
+ mov r0, #0
24434
+ b .L3924
24435
+.L3962:
2413924436 .align 2
24140
-.L4044:
24437
+.L3961:
2414124438 .word .LANCHOR0
24142
- .word .LC257
24439
+ .word .LC256
2414324440 .word .LANCHOR3
2414424441 .word .LANCHOR3-3088
24145
- .word .LC258
24146
- .word .LANCHOR3-3066
24147
- .word .LC196
24442
+ .word .LC257
24443
+ .word .LANCHOR3-3096
24444
+ .word .LANCHOR3-3072
24445
+ .word .LC195
2414824446 .word 644245000
2414924447 .word arm_delay_ops
24150
- .word .LC259
24448
+ .word .LC258
2415124449 .word .LANCHOR2
24152
- .word .LC260
24153
- .word .LANCHOR1+2668
24450
+ .word .LC259
24451
+ .word .LANCHOR1+2449
2415424452 .word .LC0
24155
- .word .LC261
24453
+ .word .LC260
2415624454 .fnend
2415724455 .size ftl_sblk_dump, .-ftl_sblk_dump
2415824456 .align 2
2415924457 .global zftl_read
24458
+ .syntax unified
24459
+ .arm
24460
+ .fpu softvfp
2416024461 .type zftl_read, %function
2416124462 zftl_read:
2416224463 .fnstart
2416324464 @ args = 0, pretend = 0, frame = 48
2416424465 @ frame_needed = 0, uses_anonymous_args = 0
24165
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
24466
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2416624467 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
24167
- mov r6, r3
24168
- ldr r3, .L4113
24468
+ mov r7, r3
24469
+ ldr r3, .L4026
2416924470 .pad #76
2417024471 sub sp, sp, #76
24171
- mov r8, r0
24172
- mov r4, r1
24173
- mov r5, r2
24472
+ mov r4, r0
24473
+ mov r6, r1
24474
+ str r2, [sp, #24]
2417424475 ldr r3, [r3]
2417524476 tst r3, #4096
24176
- beq .L4047
24177
- ldr r0, .L4113+4
24178
- mov r1, r8
24179
- mov r2, r4
24180
- mov r3, r5
24477
+ beq .L3964
24478
+ mov r3, r2
24479
+ mov r2, r1
24480
+ mov r1, r0
24481
+ ldr r0, .L4026+4
2418124482 bl printk
24182
-.L4047:
24183
- cmp r8, #0
24184
- ldreq r3, .L4113+8
24185
- moveq ip, #24576
24186
- ldreq r8, [r3, #1032]
24187
- beq .L4049
24188
-.L4048:
24189
- cmp r8, #3
24190
- bhi .L4078
24191
- mov ip, r8, asl #13
24192
- mov r8, #8192
24193
-.L4049:
24194
- cmp r5, r8
24195
- cmpls r4, r8
24196
- movcs r7, #1
24197
- movcc r7, #0
24198
- bcs .L4078
24199
- add r3, r4, r5
24200
- cmp r3, r8
24201
- bhi .L4078
24202
- ldr r2, .L4113+8
24203
- add r3, ip, r4
24483
+.L3964:
24484
+ cmp r4, #0
24485
+ bne .L3965
24486
+ ldr r3, .L4026+8
24487
+ mov r4, #24576
24488
+ ldr r3, [r3, #1032]
24489
+.L3966:
24490
+ ldr r2, [sp, #24]
24491
+ cmp r3, r2
24492
+ cmpcs r3, r6
24493
+ movls r5, #1
24494
+ movhi r5, #0
24495
+ bls .L3995
24496
+ add r2, r6, r2
24497
+ cmp r3, r2
24498
+ bcc .L3995
24499
+ add r3, r4, r6
24500
+ ldr r4, .L4026+8
2420424501 str r3, [sp, #28]
24502
+ ldr r1, [sp, #24]
24503
+ ldr r2, [r4, #2800]
2420524504 ldr r0, [sp, #28]
24206
- ldr r1, [r2, #2804]
24207
- ldrb r4, [r2, #2772] @ zero_extendqisi2
24208
- ldr r3, [r1, #24]
24209
- add r3, r3, r5
24210
- str r3, [r1, #24]
24211
- mov r1, r4
24505
+ ldr r3, [r2, #24]
24506
+ add r3, r3, r1
24507
+ str r3, [r2, #24]
24508
+ ldr r3, .L4026+12
24509
+ ldrb r6, [r3, #-2546] @ zero_extendqisi2
24510
+ mov r1, r6
2421224511 bl __aeabi_uidiv
24213
- mov r1, r4
24214
- ldr r3, [sp, #28]
24512
+ ldr r3, [sp, #24]
24513
+ mov r1, r6
24514
+ ldr r2, [sp, #28]
2421524515 str r0, [sp, #36]
24216
- add r3, r3, r5
24217
- str r3, [sp, #44]
24516
+ add r3, r3, r2
2421824517 sub r0, r3, #1
24518
+ str r3, [sp, #44]
2421924519 bl __aeabi_uidiv
2422024520 ldr r3, [sp, #36]
24221
- str r7, [sp, #40]
24222
- ldr r4, [sp, #36]
24521
+ str r5, [sp, #40]
24522
+ ldr r6, [sp, #36]
24523
+ ldr r5, .L4026+12
2422324524 rsb r3, r3, #1
24224
- ldr r7, .L4113+12
2422524525 add r3, r3, r0
2422624526 str r0, [sp, #48]
2422724527 str r3, [sp, #32]
24228
-.L4051:
24528
+.L3968:
2422924529 ldr r3, [sp, #32]
2423024530 cmp r3, #0
24231
- beq .L4110
24531
+ bne .L3992
24532
+ bl timer_get_time
24533
+ str r0, [r5, #-8]
24534
+ ldr r0, [sp, #40]
24535
+.L3963:
24536
+ add sp, sp, #76
24537
+ @ sp needed
24538
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
24539
+.L3965:
24540
+ cmp r4, #3
24541
+ bhi .L3995
24542
+ lsl r4, r4, #13
24543
+ mov r3, #8192
24544
+ b .L3966
24545
+.L3992:
2423224546 ldr r3, [sp, #36]
24233
- ldr r8, .L4113+8
24234
- rsb r2, r3, r4
24235
- ldr r3, [sp, #48]
24236
- clz r2, r2
24237
- rsb r3, r3, r4
24238
- ldrb r1, [r8, #2772] @ zero_extendqisi2
24239
- clz r3, r3
24240
- mov r2, r2, lsr #5
24241
- mov r9, r8
24242
- mov r3, r3, lsr #5
24243
- uxth r10, r1
24244
- orrs fp, r3, r2
24245
- beq .L4052
24246
- cmp r2, #0
24247
- beq .L4053
24547
+ ldr r2, [sp, #48]
24548
+ ldrb r1, [r5, #-2546] @ zero_extendqisi2
24549
+ cmp r6, r2
24550
+ cmpne r6, r3
24551
+ moveq r10, #1
24552
+ movne r10, #0
24553
+ uxth r8, r1
24554
+ bne .L3969
24555
+ cmp r6, r3
24556
+ bne .L3970
2424824557 ldr r0, [sp, #28]
2424924558 bl __aeabi_uidivmod
24250
- uxth fp, r1
24251
- rsb r10, fp, r10
24252
- uxth r10, r10
24253
- cmp r10, r5
24254
- uxthhi r10, r5
24255
- b .L4052
24256
-.L4053:
24257
- cmp r3, #0
24258
- ldrne r3, [sp, #28]
24259
- movne fp, r2
24260
- moveq fp, r3
24261
- addne r3, r3, r5
24262
- mlsne r1, r4, r1, r3
24263
- uxtbne r10, r1
24264
-.L4052:
24265
- ldr r2, .L4113+16
24559
+ uxth r10, r1
24560
+ ldr r3, [sp, #24]
24561
+ sub r8, r8, r10
24562
+ uxth r8, r8
24563
+ cmp r3, r8
24564
+ ldrhcc r8, [sp, #24]
24565
+.L3969:
24566
+ ldr r2, .L4026+16
2426624567 mov r3, #0
24267
-.L4056:
24568
+ mov r9, r2
24569
+.L3973:
2426824570 ldr r1, [r2, #20]
24269
- cmp r1, r4
24270
- bne .L4054
24571
+ cmp r6, r1
24572
+ bne .L3971
2427124573 ldrb r1, [r2, #2] @ zero_extendqisi2
2427224574 tst r1, #8
24273
- beq .L4054
24274
- ldr r1, .L4113+8
24575
+ beq .L3971
2427524576 mov r2, #48
24276
- mov r10, r10, asl #9
24277
- mov r0, r6
24278
- add r6, r6, r10
24279
- mla r3, r2, r3, r1
24280
- mov r2, r10
24281
- ldr r1, [r3, #1240]
24282
- add r1, r1, fp, asl #9
24577
+ lsl r8, r8, #9
24578
+ mov r0, r7
24579
+ mla r3, r2, r3, r4
24580
+ add r7, r7, r8
24581
+ mov r2, r8
24582
+ ldr r1, [r3, #1236]
24583
+ add r1, r1, r10, lsl #9
2428324584 bl ftl_memcpy
24284
- b .L4055
24285
-.L4054:
24585
+.L3972:
24586
+ ldr r3, [sp, #32]
24587
+ add r6, r6, #1
24588
+ sub r3, r3, #1
24589
+ str r3, [sp, #32]
24590
+.L3979:
24591
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
24592
+ ldr r2, [sp, #32]
24593
+ cmp r2, #0
24594
+ cmpne r3, #2
24595
+ bhi .L3968
24596
+ ldrb r1, [r5, #-2535] @ zero_extendqisi2
24597
+ cmp r1, #0
24598
+ beq .L3968
24599
+ ldrb r0, [r5, #-2536] @ zero_extendqisi2
24600
+ add r0, r0, r0, lsl #1
24601
+ add r0, r9, r0, lsl #4
24602
+ bl sblk_read_page
24603
+.L3981:
24604
+ ldrb r3, [r5, #-2535] @ zero_extendqisi2
24605
+ cmp r3, #0
24606
+ bne .L3991
24607
+ mvn r2, #0
24608
+ strb r3, [r5, #-2535]
24609
+ strb r2, [r5, #-2536]
24610
+ b .L3968
24611
+.L3970:
24612
+ ldr r3, [sp, #28]
24613
+ mov r10, #0
24614
+ ldr r2, [sp, #24]
24615
+ add r8, r3, r2
24616
+ mls r1, r6, r1, r8
24617
+ uxtb r8, r1
24618
+ b .L3969
24619
+.L3971:
2428624620 add r3, r3, #1
2428724621 add r2, r2, #48
2428824622 cmp r3, #32
24289
- bne .L4056
24290
- mov r0, r4
24623
+ bne .L3973
24624
+ mov r0, r6
2429124625 bl lpa_hash_get_ppa
2429224626 cmn r0, #1
2429324627 str r0, [sp, #68]
24294
- bne .L4057
24295
- mov r0, r4
24296
- add r1, sp, #68
24628
+ bne .L3974
2429724629 mov r2, #0
24630
+ add r1, sp, #68
24631
+ mov r0, r6
2429824632 bl pm_log2phys
24299
-.L4057:
24633
+.L3974:
2430024634 ldr r3, [sp, #68]
2430124635 cmn r3, #1
24302
- moveq r10, #0
24303
- bne .L4111
24304
-.L4059:
24305
- ldrb r3, [r9, #2772] @ zero_extendqisi2
24306
- cmp r10, r3
24307
- bcs .L4055
24308
- mla r3, r3, r4, r10
24309
- ldr r2, [sp, #28]
24310
- ldr r1, [sp, #44]
24311
- cmp r3, r2
24312
- movcs r2, #1
24313
- movcc r2, #0
24314
- cmp r3, r1
24315
- movcs r2, #0
24316
- cmp r2, #0
24317
- beq .L4060
24318
- mov r0, r6
24319
- mov r1, #0
24320
- mov r2, #512
24321
- add r6, r6, #512
24322
- bl ftl_memset
24323
-.L4060:
24324
- add r10, r10, #1
24325
- b .L4059
24326
-.L4111:
24636
+ moveq r8, #0
24637
+ beq .L3976
2432724638 mov r0, #0
2432824639 bl buf_alloc
2432924640 subs r3, r0, #0
24330
- beq .L4062
24331
- ldr r2, .L4113+8
24332
- ldr r1, [r2, #2804]
24641
+ beq .L3979
24642
+ ldr r1, [r4, #2800]
2433324643 ldr r2, [r1, #40]
2433424644 add r2, r2, #1
2433524645 str r2, [r1, #40]
2433624646 ldr r2, [sp, #68]
24337
- str r6, [r3, #8]
24338
- add r6, r6, r10, asl #9
24339
- str r4, [r3, #20]
24647
+ str r7, [r3, #8]
24648
+ add r7, r7, r8, lsl #9
24649
+ str r6, [r3, #20]
2434024650 str r2, [r3, #24]
2434124651 str r2, [r3, #28]
24342
- strb r10, [r3, #40]
24343
- strb fp, [r3, #41]
24652
+ strb r8, [r3, #40]
24653
+ strb r10, [r3, #41]
2434424654 bl zftl_add_read_buf
24345
-.L4055:
24346
- ldr r3, [sp, #32]
24347
- add r4, r4, #1
24348
- sub r3, r3, #1
24349
- str r3, [sp, #32]
24350
-.L4062:
24351
- ldrb r3, [r8, #2774] @ zero_extendqisi2
24352
- ldr r2, [sp, #32]
24655
+ b .L3972
24656
+.L3978:
24657
+ mla r3, r3, r6, r8
24658
+ ldr r2, [sp, #28]
24659
+ ldr r1, [sp, #44]
24660
+ cmp r2, r3
24661
+ movls r2, #1
24662
+ movhi r2, #0
24663
+ cmp r1, r3
24664
+ movls r2, #0
2435324665 cmp r2, #0
24354
- cmpne r3, #2
24355
- bhi .L4051
24356
- ldrb r1, [r7, #-2529] @ zero_extendqisi2
24357
- cmp r1, #0
24358
- beq .L4051
24359
- ldrb r2, [r7, #-2530] @ zero_extendqisi2
24360
- mov r0, #48
24361
- ldr r3, .L4113+16
24362
- mla r0, r0, r2, r3
24363
- bl sblk_read_page
24364
-.L4064:
24365
- ldrb r3, [r7, #-2529] @ zero_extendqisi2
24366
- cmp r3, #0
24367
- beq .L4112
24368
- ldrb r3, [r7, #-2530] @ zero_extendqisi2
24666
+ beq .L3977
24667
+ mov r0, r7
24668
+ add r7, r7, #512
24669
+ mov r2, #512
24670
+ mov r1, #0
24671
+ bl ftl_memset
24672
+.L3977:
24673
+ add r8, r8, #1
24674
+.L3976:
24675
+ ldrb r3, [r5, #-2546] @ zero_extendqisi2
24676
+ cmp r8, r3
24677
+ bcc .L3978
24678
+ b .L3972
24679
+.L3991:
24680
+ ldrb r3, [r5, #-2536] @ zero_extendqisi2
2436924681 cmp r3, #255
24370
- bne .L4065
24371
- ldr r1, .L4113+20
24372
- movw r2, #1283
24373
- ldr r0, .L4113+24
24682
+ bne .L3982
24683
+ movw r2, #1284
24684
+ ldr r1, .L4026+20
24685
+ ldr r0, .L4026+24
2437424686 bl printk
2437524687 bl dump_stack
24376
-.L4065:
24377
- ldr r3, .L4113+12
24378
- mov ip, #48
24379
- ldr r8, .L4113+8
24380
- ldr r1, .L4113+12
24381
- ldrb r10, [r3, #-2530] @ zero_extendqisi2
24382
- ldr r3, .L4113+16
24383
- mul ip, ip, r10
24384
- add r2, r8, ip
24385
- add r3, r3, ip
24688
+.L3982:
24689
+ ldr r3, .L4026+12
24690
+ ldr r1, .L4026+12
24691
+ ldrb r9, [r3, #-2536] @ zero_extendqisi2
24692
+ ldr r3, .L4026+16
24693
+ add r2, r9, r9, lsl #1
24694
+ add r3, r3, r2, lsl #4
24695
+ mov r2, #48
24696
+ mla r2, r2, r9, r4
2438624697 str r3, [sp, #52]
24387
- ldr r9, [r2, #1272]
24388
- ldrb r3, [r2, #1236] @ zero_extendqisi2
24389
- cmn r9, #1
24390
- strb r3, [r1, #-2530]
24391
- bne .L4066
24392
- ldr r2, [r8, #1092]
24393
- str r9, [sp, #40]
24698
+ ldr r10, [r2, #1268]
24699
+ ldrb r3, [r2, #1232] @ zero_extendqisi2
24700
+ cmn r10, #1
24701
+ strb r3, [r1, #-2536]
24702
+ bne .L3983
24703
+ ldr r2, [r4, #1096]
24704
+ str r10, [sp, #40]
2439424705 ldr r3, [r2, #552]
2439524706 add r3, r3, #1
2439624707 str r3, [r2, #552]
24397
- b .L4067
24398
-.L4066:
24399
- cmp r9, #256
24400
- bne .L4067
24401
- ldr r1, .L4113+28
24402
- ldr r3, [r2, #1260]
24403
- str r2, [sp, #60]
24404
- ldrh r0, [r1]
24405
- ldrb r1, [r8, #1189] @ zero_extendqisi2
24406
- mov r8, #1
24407
- str r3, [sp, #56]
24408
- rsb r1, r1, #24
24409
- rsb r1, r0, r1
24410
- mov r1, r8, asl r1
24411
- sub r1, r1, #1
24412
- and r0, r1, r3, lsr r0
24413
- ldrb r1, [r7, #-3130] @ zero_extendqisi2
24414
- bl __aeabi_uidiv
24415
- ldr r2, [sp, #60]
24416
- uxth fp, r0
24417
- ldr r3, [sp, #56]
24418
- mov r1, fp
24419
- ldr r0, .L4113+32
24420
- ldr r2, [r2, #1256]
24421
- bl printk
24422
- mov r0, fp
24423
- mov r1, r8
24424
- mov r2, #0
24425
- bl gc_add_sblk
24426
-.L4067:
24427
- ldr r1, .L4113+8
24428
- mov r0, #48
24429
- cmn r9, #1
24430
- mla r0, r0, r10, r1
24708
+.L3984:
24709
+ mov r1, #48
24710
+ cmn r10, #1
24711
+ mla r1, r1, r9, r4
2443124712 movne r2, #0
2443224713 moveq r2, #1
24433
- ldr r3, [r0, #1248]
24434
- ldr ip, [r0, #1256]
24435
- ldr lr, [r3, #4]
24436
- cmp lr, ip
24714
+ ldr r3, [r1, #1244]
24715
+ ldr r0, [r1, #1252]
24716
+ ldr ip, [r3, #4]
24717
+ cmp ip, r0
2443724718 orrne r2, r2, #1
2443824719 cmp r2, #0
24439
- beq .L4068
24440
- ldr r9, [r0, #1240]
24720
+ beq .L3985
24721
+ ldrb r0, [r4, #1153] @ zero_extendqisi2
2444124722 mvn ip, #0
24442
- ldr r8, [r0, #1260]
24443
- ldr r2, [r0, #1244]
24444
- ldrb fp, [r0, #1276] @ zero_extendqisi2
24445
- ldrb r0, [r1, #1189] @ zero_extendqisi2
24446
- ldrb lr, [r1, #2772] @ zero_extendqisi2
24723
+ ldr lr, [r1, #1256]
24724
+ ldrb fp, [r1, #1272] @ zero_extendqisi2
24725
+ ldrb r8, [r5, #-2546] @ zero_extendqisi2
24726
+ mvn ip, ip, lsl r0
24727
+ ldr r10, [r1, #1236]
24728
+ ldr r2, [r1, #1240]
2444724729 rsb r1, r0, #24
24448
- mvn ip, ip, asl r0
24449
- cmp fp, lr
24450
- and r0, ip, r8, lsr r1
24451
- str lr, [sp]
24452
- movcc r2, r9
24453
- bic r1, r8, ip, asl r1
24730
+ and r0, ip, lr, lsr r1
24731
+ cmp fp, r8
24732
+ movcc r2, r10
24733
+ str r8, [sp]
24734
+ bic r1, lr, ip, lsl r1
2445424735 uxtb r0, r0
2445524736 bl flash_read_page_en
24456
- mov r9, r0
24457
-.L4068:
24458
- ldr ip, .L4113+8
24737
+ mov r10, r0
24738
+.L3985:
2445924739 mov r8, #48
24460
- cmn r9, #1
24461
- mla r8, r8, r10, ip
24740
+ cmn r10, #1
24741
+ mla r8, r8, r9, r4
2446224742 movne fp, #0
2446324743 moveq fp, #1
24464
- add r3, r8, #1232
24465
- add r3, r3, #12
24466
- ldr r2, [r8, #1248]
24467
- ldr r1, [r8, #1256]
24468
- ldr r2, [r2, #4]
24469
- cmp r2, r1
24470
- moveq r2, fp
24471
- orrne r2, fp, #1
24472
- cmp r2, #0
24473
- beq .L4070
24474
- ldr r1, [ip, #1092]
24475
- ldr r0, .L4113+36
24476
- str ip, [sp, #56]
24477
- ldr r2, [r1, #552]
24478
- add r2, r2, #1
24479
- str r2, [r1, #552]
24744
+ ldr r3, [r8, #1244]
24745
+ ldr r2, [r8, #1252]
2448024746 ldr r3, [r3, #4]
24481
- ldr r2, [r8, #1260]
24482
- ldrb r1, [r8, #1237] @ zero_extendqisi2
24483
- str r2, [sp]
24484
- ldr r2, [r3]
24485
- str r2, [sp, #4]
24486
- ldr r2, [r3, #4]
24487
- str r2, [sp, #8]
24747
+ cmp r3, r2
24748
+ moveq r3, fp
24749
+ orrne r3, fp, #1
24750
+ cmp r3, #0
24751
+ beq .L3987
24752
+ ldr r2, [r4, #1096]
24753
+ ldr r0, .L4026+28
24754
+ ldr r3, [r2, #552]
24755
+ add r3, r3, #1
24756
+ str r3, [r2, #552]
24757
+ ldr r3, [r8, #1244]
24758
+ ldrb r1, [r8, #1233] @ zero_extendqisi2
24759
+ ldr r2, [r3, #12]
24760
+ str r2, [sp, #16]
2448824761 ldr r2, [r3, #8]
2448924762 str r2, [sp, #12]
24490
- mov r2, r9
24491
- ldr r3, [r3, #12]
24492
- str r3, [sp, #16]
24763
+ ldr r2, [r3, #4]
24764
+ str r2, [sp, #8]
24765
+ mov r2, r10
24766
+ ldr r3, [r3]
24767
+ str r3, [sp, #4]
2449324768 ldr r3, [r8, #1256]
24769
+ str r3, [sp]
24770
+ ldr r3, [r8, #1252]
2449424771 bl printk
24495
- ldr r3, .L4113+28
24496
- ldr r2, [r8, #1260]
24497
- ldrb r1, [r7, #-3130] @ zero_extendqisi2
24498
- ldrh r0, [r3]
24499
- mov r2, r2, lsr r0
24500
- ldr ip, [sp, #56]
24501
- ldrb r3, [ip, #1189] @ zero_extendqisi2
24772
+ ldr r3, .L4026+32
24773
+ ldr r2, [r8, #1256]
24774
+ ldrb r1, [r5, #-3136] @ zero_extendqisi2
24775
+ ldrh r0, [r3, #-2]
24776
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
24777
+ lsr r2, r2, r0
2450224778 rsb r3, r3, #24
24503
- rsb r3, r0, r3
24779
+ sub r3, r3, r0
2450424780 mvn r0, #0
24505
- bic r0, r2, r0, asl r3
24781
+ bic r0, r2, r0, lsl r3
2450624782 bl __aeabi_uidiv
2450724783 mov r1, #0
2450824784 uxth r0, r0
2450924785 bl ftl_sblk_dump
24510
-.L4070:
24511
- ldr r8, .L4113+8
24786
+.L3987:
2451224787 mov r3, #48
24513
- mla r3, r3, r10, r8
24514
- mov r9, r8
24515
- ldr r2, [r3, #1248]
24516
- ldr r3, [r3, #1256]
24788
+ mla r3, r3, r9, r4
24789
+ ldr r2, [r3, #1244]
24790
+ ldr r3, [r3, #1252]
2451724791 ldr r2, [r2, #4]
2451824792 cmp r2, r3
2451924793 orrne fp, fp, #1
2452024794 cmp fp, #0
24521
- beq .L4071
24522
- ldr r1, .L4113+20
24523
- movw r2, #1319
24524
- ldr r0, .L4113+24
24795
+ beq .L3988
24796
+ movw r2, #1320
24797
+ ldr r1, .L4026+20
24798
+ ldr r0, .L4026+24
2452524799 bl printk
2452624800 bl dump_stack
24527
-.L4071:
24801
+.L3988:
2452824802 mov r3, #48
24529
- mla r10, r3, r10, r9
24530
- ldrb r3, [r8, #2772] @ zero_extendqisi2
24531
- ldrb r2, [r10, #1276] @ zero_extendqisi2
24803
+ mla r9, r3, r9, r4
24804
+ ldrb r3, [r5, #-2546] @ zero_extendqisi2
24805
+ ldrb r2, [r9, #1272] @ zero_extendqisi2
2453224806 cmp r3, r2
24533
- ldrlsb r3, [r10, #1238] @ zero_extendqisi2
24807
+ ldrbls r3, [r9, #1234] @ zero_extendqisi2
2453424808 bicls r3, r3, #8
24535
- strlsb r3, [r10, #1238]
24536
- bls .L4073
24537
- ldrb r1, [r10, #1277] @ zero_extendqisi2
24538
- mov r2, r2, asl #9
24539
- ldr r3, [r10, #1240]
24540
- ldr r0, [r10, #1244]
24541
- add r1, r3, r1, asl #9
24809
+ strbls r3, [r9, #1234]
24810
+ bls .L3990
24811
+ ldrb r1, [r9, #1273] @ zero_extendqisi2
24812
+ lsl r2, r2, #9
24813
+ ldr r3, [r9, #1236]
24814
+ ldr r0, [r9, #1240]
24815
+ add r1, r3, r1, lsl #9
2454224816 bl ftl_memcpy
24543
-.L4073:
24817
+.L3990:
2454424818 ldr r1, [sp, #52]
24545
- ldr r0, .L4113+40
24819
+ ldr r0, .L4026+36
2454624820 bl buf_remove_buf
2454724821 ldr r0, [sp, #52]
2454824822 bl zbuf_free
24549
- ldrb r3, [r7, #-2529] @ zero_extendqisi2
24823
+ ldrb r3, [r5, #-2535] @ zero_extendqisi2
2455024824 sub r3, r3, #1
24551
- strb r3, [r7, #-2529]
24552
- b .L4064
24553
-.L4112:
24554
- ldr r1, .L4113+12
24555
- mvn r2, #0
24556
- strb r3, [r1, #-2529]
24557
- strb r2, [r1, #-2530]
24558
- b .L4051
24559
-.L4110:
24560
- bl timer_get_time
24561
- ldr r3, .L4113+12
24562
- str r0, [r3, #548]
24563
- ldr r0, [sp, #40]
24564
- b .L4050
24565
-.L4078:
24825
+ strb r3, [r5, #-2535]
24826
+ b .L3981
24827
+.L3983:
24828
+ cmp r10, #256
24829
+ bne .L3984
24830
+ ldr r1, .L4026+40
24831
+ mov fp, #1
24832
+ ldrb r0, [r4, #1153] @ zero_extendqisi2
24833
+ ldr r3, [r2, #1256]
24834
+ ldrh ip, [r1]
24835
+ rsb r0, r0, #24
24836
+ str r2, [sp, #60]
24837
+ ldr r2, .L4026+12
24838
+ sub r0, r0, ip
24839
+ str r3, [sp, #56]
24840
+ lsl r0, fp, r0
24841
+ ldrb r1, [r2, #-3136] @ zero_extendqisi2
24842
+ sub r0, r0, #1
24843
+ and r0, r0, r3, lsr ip
24844
+ bl __aeabi_uidiv
24845
+ ldr r2, [sp, #60]
24846
+ mov r8, r0
24847
+ uxth r1, r0
24848
+ ldr r3, [sp, #56]
24849
+ ldr r0, .L4026+44
24850
+ ldr r2, [r2, #1252]
24851
+ bl printk
24852
+ mov r2, #0
24853
+ mov r1, fp
24854
+ uxth r0, r8
24855
+ bl gc_add_sblk
24856
+ b .L3984
24857
+.L3995:
2456624858 mvn r0, #0
24567
-.L4050:
24568
- add sp, sp, #76
24569
- @ sp needed
24570
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
24571
-.L4114:
24859
+ b .L3963
24860
+.L4027:
2457224861 .align 2
24573
-.L4113:
24862
+.L4026:
2457424863 .word .LANCHOR2
24575
- .word .LC262
24864
+ .word .LC261
2457624865 .word .LANCHOR0
2457724866 .word .LANCHOR3
24578
- .word .LANCHOR0+1236
24579
- .word .LANCHOR1+2684
24867
+ .word .LANCHOR0+1232
24868
+ .word .LANCHOR1+2463
2458024869 .word .LC0
24581
- .word .LANCHOR3-3132
2458224870 .word .LC263
24583
- .word .LC264
24584
- .word .LANCHOR0+2776
24871
+ .word .LANCHOR3-3136
24872
+ .word .LANCHOR0+2771
24873
+ .word .LANCHOR3-3138
24874
+ .word .LC262
2458524875 .fnend
2458624876 .size zftl_read, .-zftl_read
2458724877 .align 2
2458824878 .global zftl_vendor_read
24879
+ .syntax unified
24880
+ .arm
24881
+ .fpu softvfp
2458924882 .type zftl_vendor_read, %function
2459024883 zftl_vendor_read:
2459124884 .fnstart
2459224885 @ args = 0, pretend = 0, frame = 0
2459324886 @ frame_needed = 0, uses_anonymous_args = 0
2459424887 @ link register save eliminated.
24595
- mov ip, r1
2459624888 mov r3, r2
24889
+ mov r2, r1
2459724890 add r1, r0, #512
24598
- mov r2, ip
2459924891 mov r0, #2
2460024892 b zftl_read
2460124893 .fnend
2460224894 .size zftl_vendor_read, .-zftl_vendor_read
2460324895 .align 2
2460424896 .global zftl_sys_read
24897
+ .syntax unified
24898
+ .arm
24899
+ .fpu softvfp
2460524900 .type zftl_sys_read, %function
2460624901 zftl_sys_read:
2460724902 .fnstart
2460824903 @ args = 0, pretend = 0, frame = 0
2460924904 @ frame_needed = 0, uses_anonymous_args = 0
24610
- str lr, [sp, #-4]!
24611
- .save {lr}
24612
- mov ip, r1
24613
- mov lr, r0
24905
+ @ link register save eliminated.
2461424906 mov r3, r2
24615
- mov r1, lr
24907
+ mov r2, r1
24908
+ mov r1, r0
2461624909 mov r0, #2
24617
- mov r2, ip
24618
- ldr lr, [sp], #4
2461924910 b zftl_read
2462024911 .fnend
2462124912 .size zftl_sys_read, .-zftl_sys_read
2462224913 .align 2
24914
+ .syntax unified
24915
+ .arm
24916
+ .fpu softvfp
2462324917 .type zftl_debug_proc_write, %function
2462424918 zftl_debug_proc_write:
2462524919 .fnstart
24626
- @ args = 0, pretend = 0, frame = 88
24920
+ @ args = 0, pretend = 0, frame = 96
2462724921 @ frame_needed = 0, uses_anonymous_args = 0
24628
- stmfd sp!, {r4, r5, r6, r7, r8, r9, lr}
24629
- .save {r4, r5, r6, r7, r8, r9, lr}
24922
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
24923
+ .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2463024924 cmp r2, #79
24631
- .pad #124
24632
- sub sp, sp, #124
24633
- mov r5, r2
24634
- add r4, sp, #40
24925
+ .pad #132
24926
+ sub sp, sp, #132
2463524927 mvnhi r0, #21
24636
- str r4, [sp, #36]
24637
- bhi .L4119
24638
- mov r0, r4
24928
+ add r6, sp, #48
24929
+ str r6, [sp, #44]
24930
+ bhi .L4030
24931
+ mov r0, r6
24932
+ mov r4, r2
2463924933 bl rk_copy_from_user
2464024934 cmp r0, #0
2464124935 mvnne r0, #13
24642
- bne .L4119
24643
- add r3, sp, #120
24644
- mov r1, r4
24645
- add r3, r3, r5
24936
+ bne .L4030
24937
+ add r3, sp, #128
24938
+ mov r1, r6
24939
+ add r3, r3, r4
2464624940 strb r0, [r3, #-80]
24647
- ldr r0, .L4144
24941
+ ldr r0, .L4056
2464824942 bl printk
24649
- ldr r0, .L4144+4
24650
- mov r1, r4
24651
- mov r2, #1
2465224943 mov r3, #16
24944
+ mov r2, #1
24945
+ mov r1, r6
24946
+ ldr r0, .L4056+4
2465324947 bl rknand_print_hex
2465424948 bl rknand_device_lock
24655
- mov r0, r4
24656
- ldr r1, .L4144+8
2465724949 mov r2, #7
24950
+ ldr r1, .L4056+8
24951
+ mov r0, r6
2465824952 bl memcmp
24659
- subs r6, r0, #0
24660
- bne .L4120
24661
- ldr r4, .L4144+12
24662
- movw ip, #698
24663
- ldr r0, .L4144+16
24953
+ subs r7, r0, #0
24954
+ bne .L4032
24955
+ ldr r5, .L4056+12
24956
+ movw r3, #698
2466424957 mov r2, #4
24665
- ldr r7, .L4144+20
24958
+ ldr r0, .L4056+16
24959
+ ldr r6, .L4056+20
2466624960 movw r8, #65535
24667
- ldr r3, [r4, #2804]
24668
- add r1, r3, #704
24669
- ldrh r3, [r3, ip]
24961
+ ldr r1, [r5, #2800]
24962
+ ldrh r3, [r1, r3]
24963
+ add r1, r1, #704
2467024964 bl rknand_print_hex
24671
- ldr r1, [r4, #2804]
24672
- ldr r0, .L4144+24
24965
+ ldr r1, [r5, #2800]
2467324966 mov r2, #2
24967
+ ldrh r3, [r6, #-176]
24968
+ ldr r0, .L4056+24
2467424969 add r1, r1, #416
24675
- ldrh r3, [r7, #-152]
2467624970 bl rknand_print_hex
24677
-.L4121:
24678
- ldrh r3, [r7, #-152]
24679
- cmp r6, r3
24680
- bge .L4124
24971
+.L4033:
24972
+ ldrh r3, [r6, #-176]
24973
+ cmp r7, r3
24974
+ blt .L4035
24975
+.L4036:
24976
+ bl rknand_device_unlock
24977
+ mov r0, r4
24978
+.L4030:
24979
+ add sp, sp, #132
24980
+ @ sp needed
24981
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
24982
+.L4035:
2468124983 mov r0, #300
2468224984 bl msleep
24683
- add r3, r6, #208
24684
- ldr r2, [r4, #2804]
24685
- mov r3, r3, asl #1
24985
+ ldr r2, [r5, #2800]
24986
+ add r3, r7, #208
24987
+ lsl r3, r3, #1
2468624988 ldrh r0, [r2, r3]
2468724989 cmp r0, r8
24688
- beq .L4122
24990
+ beq .L4034
2468924991 mov r1, #0
2469024992 bl ftl_sblk_dump
24691
-.L4122:
24692
- add r6, r6, #1
24693
- b .L4121
24694
-.L4120:
24695
- mov r0, r4
24696
- ldr r1, .L4144+28
24993
+.L4034:
24994
+ add r7, r7, #1
24995
+ b .L4033
24996
+.L4032:
2469724997 mov r2, #7
24998
+ ldr r1, .L4056+28
24999
+ mov r0, r6
2469825000 bl memcmp
24699
- subs r6, r0, #0
24700
- bne .L4125
24701
- ldr r7, .L4144+12
24702
- movw ip, #698
24703
- ldr r0, .L4144+16
25001
+ subs r5, r0, #0
25002
+ bne .L4037
25003
+ ldr r8, .L4056+12
25004
+ movw r3, #698
2470425005 mov r2, #4
24705
- ldr r9, .L4144+20
24706
- ldr r3, [r7, #2804]
24707
- add r1, r3, #704
24708
- ldrh r3, [r3, ip]
25006
+ ldr r0, .L4056+16
25007
+ ldr r7, .L4056+20
25008
+ ldr r1, [r8, #2800]
25009
+ ldr r10, .L4056+32
25010
+ ldr fp, .L4056+36
25011
+ ldrh r3, [r1, r3]
25012
+ add r1, r1, #704
2470925013 bl rknand_print_hex
24710
- ldr r1, [r7, #2804]
24711
- ldrh r3, [r9, #-152]
25014
+ ldr r1, [r8, #2800]
2471225015 mov r2, #2
25016
+ ldrh r3, [r7, #-176]
25017
+ ldr r0, .L4056+24
2471325018 add r1, r1, #416
24714
- ldr r0, .L4144+24
2471525019 bl rknand_print_hex
2471625020 mov r0, #50
2471725021 bl msleep
24718
- ldr r0, .L4144+32
24719
- sub r9, r9, #2528
24720
- add r4, sp, #120
24721
- add r1, sp, #47
24722
- str r1, [r4, #-84]!
25022
+ ldr r0, .L4056+40
25023
+ add r6, sp, #128
25024
+ add r1, sp, #55
25025
+ str r1, [r6, #-84]!
2472325026 bl printk
24724
- mov r1, r4
24725
- mov r4, r6
24726
- ldr r0, [sp, #36]
24727
- bl rk_simple_strtoull.constprop.34
24728
- uxth r8, r0
24729
- str r0, [sp, #32]
24730
-.L4127:
24731
- add r6, r9, r4
24732
- ldr r0, .L4144+36
24733
- ldrh r1, [r9, r4]
24734
- ldrh r2, [r6, #2]
24735
- bl printk
24736
- ldrh r3, [r4, r9]
24737
- cmp r3, r8
24738
- bne .L4126
24739
- ldrb r3, [r7, #2772] @ zero_extendqisi2
24740
- mov r2, #4
24741
- ldr r0, .L4144+40
24742
- ldr r1, [r6, #4]
24743
- mov r3, r3, asl #7
24744
- bl rknand_print_hex
24745
- mov r0, #50
24746
- bl msleep
24747
-.L4126:
24748
- add r4, r4, #8
24749
- cmp r4, #256
24750
- bne .L4127
24751
- mov r0, #300
24752
- add r8, r8, #176
24753
- bl msleep
24754
- mov r0, #1
24755
- bl buf_alloc
24756
- ldr r3, [r7, #2804]
24757
- mov r1, #1
24758
- ldr r3, [r3, r8, asl #2]
24759
- str r3, [r0, #24]
24760
- mov r4, r0
25027
+ mov r1, r6
25028
+ ldr r0, [sp, #44]
25029
+ bl rk_simple_strtoull.constprop.33
25030
+ str r8, [sp, #36]
25031
+ uxth r3, r0
25032
+ ldr r8, .L4056+44
25033
+ mov r6, r0
25034
+ str r0, [sp, #40]
2476125035 str r3, [sp, #32]
24762
- bl sblk_read_page
24763
- ldr ip, [r4, #4]
24764
- ldr r3, [r4, #12]
24765
- ldr r0, .L4144+44
24766
- ldr r2, [ip, #4]
24767
- str r2, [sp]
24768
- ldr r2, [ip, #8]
24769
- ldr r1, [sp, #32]
24770
- str r2, [sp, #4]
24771
- ldr r2, [ip, #12]
24772
- str r2, [sp, #8]
24773
- ldr r2, [r3]
24774
- str r2, [sp, #12]
24775
- ldr r2, [r3, #4]
24776
- str r2, [sp, #16]
24777
- ldr r2, [r3, #8]
24778
- str r2, [sp, #20]
24779
- ldr r3, [r3, #12]
24780
- str r3, [sp, #24]
24781
- ldr r2, [r4, #36]
24782
- ldr r3, [ip]
25036
+.L4039:
25037
+ add r9, r8, r5
25038
+ ldrh r1, [r8, r5]
25039
+ ldrh r2, [r9, #2]
25040
+ mov r0, r10
2478325041 bl printk
24784
- ldrb r3, [r7, #2772] @ zero_extendqisi2
24785
- ldr r0, .L4144+48
25042
+ ldrh r3, [r5, r8]
25043
+ ldr r2, [sp, #32]
25044
+ cmp r3, r2
25045
+ bne .L4038
25046
+ ldrb r3, [r7, #-2546] @ zero_extendqisi2
25047
+ mov r0, fp
2478625048 mov r2, #4
24787
- ldr r1, [r4, #4]
24788
- mov r3, r3, asl #7
24789
- b .L4143
24790
-.L4125:
24791
- mov r0, r4
24792
- ldr r1, .L4144+52
24793
- mov r2, #7
24794
- bl memcmp
24795
- cmp r0, #0
24796
- bne .L4128
24797
- bl dump_ftl_info
24798
- b .L4124
24799
-.L4128:
24800
- mov r0, r4
24801
- ldr r1, .L4144+56
24802
- mov r2, #9
24803
- bl memcmp
24804
- cmp r0, #0
24805
- bne .L4129
24806
- add r1, sp, #120
24807
- add r0, sp, #49
24808
- str r0, [r1, #-84]!
24809
- bl rk_simple_strtoull.constprop.34
24810
- ldr r3, .L4144+60
24811
- str r0, [sp, #32]
24812
- strh r0, [r3, #-12] @ movhi
24813
- bl dump_all_list_info
24814
- b .L4124
24815
-.L4129:
24816
- mov r0, r4
24817
- ldr r1, .L4144+64
24818
- mov r2, #8
24819
- bl memcmp
24820
- cmp r0, #0
24821
- beq .L4124
24822
- mov r0, r4
24823
- ldr r1, .L4144+68
24824
- mov r2, #8
24825
- bl memcmp
24826
- cmp r0, #0
24827
- bne .L4131
24828
- add r4, sp, #120
24829
- add r1, sp, #48
24830
- ldr r0, .L4144+32
24831
- str r1, [r4, #-84]!
24832
- bl printk
24833
- mov r1, r4
24834
- ldr r6, .L4144+12
24835
- ldr r0, [sp, #36]
24836
- bl rk_simple_strtoull.constprop.34
24837
- str r0, [sp, #32]
25049
+ ldr r1, [r9, #4]
25050
+ lsl r3, r3, #7
25051
+ bl rknand_print_hex
25052
+ mov r0, #50
25053
+ bl msleep
25054
+.L4038:
25055
+ add r5, r5, #8
25056
+ cmp r5, #256
25057
+ bne .L4039
25058
+ mov r0, #300
25059
+ uxth r6, r6
25060
+ bl msleep
2483825061 mov r0, #1
25062
+ add r6, r6, #176
2483925063 bl buf_alloc
25064
+ ldr r3, [sp, #36]
25065
+ mov r5, r0
2484025066 mov r1, #1
24841
- ldr r3, [sp, #32]
24842
- mov r4, r0
25067
+ ldr r3, [r3, #2800]
25068
+ ldr r3, [r3, r6, lsl #2]
2484325069 str r3, [r0, #24]
25070
+ str r3, [sp, #40]
2484425071 bl sblk_read_page
24845
- ldr r3, [r4, #4]
24846
- ldr r2, [r4, #12]
24847
- ldr r0, .L4144+44
24848
- ldr r1, [r3, #4]
24849
- str r1, [sp]
24850
- ldr r1, [r3, #8]
24851
- str r1, [sp, #4]
24852
- ldr r1, [r3, #12]
24853
- str r1, [sp, #8]
24854
- ldr r1, [r2]
24855
- str r1, [sp, #12]
24856
- ldr r1, [r2, #4]
24857
- str r1, [sp, #16]
25072
+ ldr r2, [r5, #12]
25073
+ ldr r3, [r5, #4]
25074
+ ldr r0, .L4056+48
25075
+ ldr r1, [r2, #12]
25076
+ str r1, [sp, #24]
2485825077 ldr r1, [r2, #8]
2485925078 str r1, [sp, #20]
24860
- ldr r2, [r2, #12]
24861
- ldr r1, [sp, #32]
24862
- str r2, [sp, #24]
24863
- ldr r2, [r4, #36]
25079
+ ldr r1, [r2, #4]
25080
+ str r1, [sp, #16]
25081
+ ldr r2, [r2]
25082
+ ldr r1, [sp, #40]
25083
+ str r2, [sp, #12]
25084
+ ldr r2, [r3, #12]
25085
+ str r2, [sp, #8]
25086
+ ldr r2, [r3, #8]
25087
+ str r2, [sp, #4]
25088
+ ldr r2, [r3, #4]
25089
+ str r2, [sp]
2486425090 ldr r3, [r3]
25091
+ ldr r2, [r5, #36]
2486525092 bl printk
24866
- ldrb r3, [r6, #2772] @ zero_extendqisi2
24867
- ldr r0, .L4144+72
25093
+ ldrb r3, [r7, #-2546] @ zero_extendqisi2
2486825094 mov r2, #4
24869
- ldr r1, [r4, #4]
24870
- mov r3, r3, asl #7
25095
+ ldr r1, [r5, #4]
25096
+ ldr r0, .L4056+52
25097
+ lsl r3, r3, #7
25098
+.L4055:
2487125099 bl rknand_print_hex
24872
- ldrb r3, [r6, #2772] @ zero_extendqisi2
24873
- ldr r0, .L4144+76
24874
- mov r2, #4
24875
- ldr r1, [r4, #12]
24876
- mov r3, r3, asl #1
24877
-.L4143:
24878
- bl rknand_print_hex
24879
- mov r0, r4
25100
+ mov r0, r5
2488025101 bl zbuf_free
24881
- b .L4124
24882
-.L4131:
24883
- mov r0, r4
24884
- ldr r1, .L4144+80
24885
- mov r2, #8
24886
- bl memcmp
24887
- subs r6, r0, #0
24888
- bne .L4132
24889
- add r4, sp, #120
24890
- add r1, sp, #48
24891
- ldr r0, .L4144+32
24892
- str r1, [r4, #-84]!
24893
- bl printk
24894
- mov r1, r4
24895
- ldr r0, [sp, #36]
24896
- bl rk_simple_strtoull.constprop.34
24897
- mov r1, r6
24898
- str r0, [sp, #32]
24899
- uxth r0, r0
24900
- bl ftl_sblk_dump
24901
- b .L4124
24902
-.L4132:
24903
- mov r0, r4
24904
- ldr r1, .L4144+84
24905
- mov r2, #10
25102
+ b .L4036
25103
+.L4037:
25104
+ mov r2, #7
25105
+ ldr r1, .L4056+56
25106
+ mov r0, r6
2490625107 bl memcmp
2490725108 cmp r0, #0
24908
- bne .L4133
24909
- add r4, sp, #120
24910
- add r1, sp, #50
24911
- ldr r0, .L4144+32
24912
- str r1, [r4, #-84]!
24913
- bl printk
24914
- mov r1, r4
24915
- ldr r0, [sp, #36]
24916
- bl rk_simple_strtoull.constprop.34
24917
- ldr r3, .L4144+88
24918
- str r0, [sp, #32]
24919
- str r0, [r3]
24920
- b .L4124
24921
-.L4133:
24922
- mov r0, r4
24923
- ldr r1, .L4144+92
25109
+ bne .L4040
25110
+ bl dump_ftl_info
25111
+ b .L4036
25112
+.L4040:
25113
+ mov r2, #9
25114
+ ldr r1, .L4056+60
25115
+ mov r0, r6
25116
+ bl memcmp
25117
+ cmp r0, #0
25118
+ bne .L4041
25119
+ add r1, sp, #128
25120
+ add r0, sp, #57
25121
+ str r0, [r1, #-84]!
25122
+ bl rk_simple_strtoull.constprop.33
25123
+ ldr r3, .L4056+64
25124
+ str r0, [sp, #40]
25125
+ strh r0, [r3, #-4] @ movhi
25126
+ bl dump_all_list_info
25127
+ b .L4036
25128
+.L4041:
2492425129 mov r2, #8
25130
+ ldr r1, .L4056+68
25131
+ mov r0, r6
25132
+ bl memcmp
25133
+ cmp r0, #0
25134
+ beq .L4036
25135
+ mov r2, #8
25136
+ ldr r1, .L4056+72
25137
+ mov r0, r6
25138
+ bl memcmp
25139
+ cmp r0, #0
25140
+ bne .L4043
25141
+ add r5, sp, #128
25142
+ add r1, sp, #56
25143
+ ldr r0, .L4056+40
25144
+ str r1, [r5, #-84]!
25145
+ bl printk
25146
+ mov r1, r5
25147
+ ldr r0, [sp, #44]
25148
+ bl rk_simple_strtoull.constprop.33
25149
+ str r0, [sp, #40]
25150
+ mov r0, #1
25151
+ bl buf_alloc
25152
+ ldr r3, [sp, #40]
25153
+ mov r5, r0
25154
+ mov r1, #1
25155
+ ldr r6, .L4056+20
25156
+ str r3, [r0, #24]
25157
+ bl sblk_read_page
25158
+ ldr r2, [r5, #12]
25159
+ ldr r3, [r5, #4]
25160
+ ldr r0, .L4056+48
25161
+ ldr r1, [r2, #12]
25162
+ str r1, [sp, #24]
25163
+ ldr r1, [r2, #8]
25164
+ str r1, [sp, #20]
25165
+ ldr r1, [r2, #4]
25166
+ str r1, [sp, #16]
25167
+ ldr r2, [r2]
25168
+ ldr r1, [sp, #40]
25169
+ str r2, [sp, #12]
25170
+ ldr r2, [r3, #12]
25171
+ str r2, [sp, #8]
25172
+ ldr r2, [r3, #8]
25173
+ str r2, [sp, #4]
25174
+ ldr r2, [r3, #4]
25175
+ str r2, [sp]
25176
+ ldr r3, [r3]
25177
+ ldr r2, [r5, #36]
25178
+ bl printk
25179
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
25180
+ mov r2, #4
25181
+ ldr r1, [r5, #4]
25182
+ ldr r0, .L4056+76
25183
+ lsl r3, r3, #7
25184
+ bl rknand_print_hex
25185
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
25186
+ mov r2, #4
25187
+ ldr r1, [r5, #12]
25188
+ ldr r0, .L4056+80
25189
+ lsl r3, r3, #1
25190
+ b .L4055
25191
+.L4043:
25192
+ mov r2, #8
25193
+ ldr r1, .L4056+84
25194
+ mov r0, r6
25195
+ bl memcmp
25196
+ subs r7, r0, #0
25197
+ bne .L4044
25198
+ add r5, sp, #128
25199
+ add r1, sp, #56
25200
+ ldr r0, .L4056+40
25201
+ str r1, [r5, #-84]!
25202
+ bl printk
25203
+ mov r1, r5
25204
+ ldr r0, [sp, #44]
25205
+ bl rk_simple_strtoull.constprop.33
25206
+ mov r1, r7
25207
+ str r0, [sp, #40]
25208
+ uxth r0, r0
25209
+ bl ftl_sblk_dump
25210
+ b .L4036
25211
+.L4044:
25212
+ mov r2, #10
25213
+ ldr r1, .L4056+88
25214
+ mov r0, r6
25215
+ bl memcmp
25216
+ cmp r0, #0
25217
+ bne .L4045
25218
+ add r1, sp, #58
25219
+ add r5, sp, #128
25220
+ ldr r0, .L4056+40
25221
+ str r1, [r5, #-84]!
25222
+ bl printk
25223
+ mov r1, r5
25224
+ ldr r0, [sp, #44]
25225
+ bl rk_simple_strtoull.constprop.33
25226
+ ldr r3, .L4056+92
25227
+ str r0, [sp, #40]
25228
+ str r0, [r3]
25229
+ b .L4036
25230
+.L4045:
25231
+ mov r0, r6
25232
+ mov r2, #8
25233
+ ldr r1, .L4056+96
2492525234 bl memcmp
2492625235 subs r6, r0, #0
24927
- bne .L4134
24928
- add r4, sp, #120
24929
- add r1, sp, #48
24930
- ldr r0, .L4144+32
24931
- str r1, [r4, #-84]!
25236
+ bne .L4046
25237
+ add r5, sp, #128
25238
+ add r1, sp, #56
25239
+ ldr r0, .L4056+40
25240
+ str r1, [r5, #-84]!
2493225241 bl printk
24933
- mov r1, r4
24934
- ldr r0, [sp, #36]
24935
- bl rk_simple_strtoull.constprop.34
24936
- mov r4, r0
25242
+ mov r1, r5
25243
+ ldr r0, [sp, #44]
25244
+ bl rk_simple_strtoull.constprop.33
25245
+ mov r5, r0
2493725246 bl lpa_hash_get_ppa
2493825247 cmn r0, #1
24939
- str r0, [sp, #32]
24940
- bne .L4135
24941
- mov r0, r4
24942
- add r1, sp, #32
25248
+ str r0, [sp, #40]
25249
+ bne .L4047
2494325250 mov r2, r6
24944
- bl pm_log2phys
24945
-.L4135:
24946
- mov r1, r4
24947
- ldr r2, [sp, #32]
24948
- ldr r0, .L4144+96
24949
- bl printk
24950
- b .L4124
24951
-.L4134:
24952
- ldr r0, .L4144+100
24953
- bl printk
24954
- ldr r0, .L4144+104
24955
- bl printk
24956
- ldr r0, .L4144+108
24957
- bl printk
24958
- ldr r0, .L4144+112
24959
- bl printk
24960
- ldr r0, .L4144+116
24961
- bl printk
24962
- ldr r0, .L4144+120
24963
- bl printk
24964
- ldr r0, .L4144+124
24965
- bl printk
24966
- ldr r0, .L4144+128
24967
- bl printk
24968
- ldr r0, .L4144+132
24969
- bl printk
24970
-.L4124:
24971
- bl rknand_device_unlock
25251
+ add r1, sp, #40
2497225252 mov r0, r5
24973
-.L4119:
24974
- add sp, sp, #124
24975
- @ sp needed
24976
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
24977
-.L4145:
25253
+ bl pm_log2phys
25254
+.L4047:
25255
+ ldr r2, [sp, #40]
25256
+ mov r1, r5
25257
+ ldr r0, .L4056+100
25258
+ bl printk
25259
+ b .L4036
25260
+.L4046:
25261
+ ldr r0, .L4056+104
25262
+ bl printk
25263
+ ldr r0, .L4056+108
25264
+ bl printk
25265
+ ldr r0, .L4056+112
25266
+ bl printk
25267
+ ldr r0, .L4056+116
25268
+ bl printk
25269
+ ldr r0, .L4056+120
25270
+ bl printk
25271
+ ldr r0, .L4056+124
25272
+ bl printk
25273
+ ldr r0, .L4056+128
25274
+ bl printk
25275
+ ldr r0, .L4056+132
25276
+ bl printk
25277
+ ldr r0, .L4056+136
25278
+ bl printk
25279
+ b .L4036
25280
+.L4057:
2497825281 .align 2
24979
-.L4144:
25282
+.L4056:
25283
+ .word .LC264
2498025284 .word .LC265
2498125285 .word .LC266
24982
- .word .LC267
2498325286 .word .LANCHOR0
24984
- .word .LC268
25287
+ .word .LC267
2498525288 .word .LANCHOR3
25289
+ .word .LC268
2498625290 .word .LC269
24987
- .word .LC270
2498825291 .word .LC271
2498925292 .word .LC272
25293
+ .word .LC270
25294
+ .word .LANCHOR3-2532
25295
+ .word .LC245
2499025296 .word .LC273
24991
- .word .LC246
2499225297 .word .LC274
2499325298 .word .LC275
25299
+ .word .LANCHOR3-3072
2499425300 .word .LC276
24995
- .word .LANCHOR3-3056
2499625301 .word .LC277
25302
+ .word .LC218
25303
+ .word .LC240
2499725304 .word .LC278
24998
- .word .LC219
24999
- .word .LC241
2500025305 .word .LC279
25001
- .word .LC280
2500225306 .word .LANCHOR2
25307
+ .word .LC280
2500325308 .word .LC281
2500425309 .word .LC282
2500525310 .word .LC283
....@@ -25010,418 +25315,442 @@
2501025315 .word .LC288
2501125316 .word .LC289
2501225317 .word .LC290
25013
- .word .LC291
2501425318 .fnend
2501525319 .size zftl_debug_proc_write, .-zftl_debug_proc_write
25320
+ .global __aeabi_idivmod
2501625321 .align 2
2501725322 .global ftl_update_l2p_map
25323
+ .syntax unified
25324
+ .arm
25325
+ .fpu softvfp
2501825326 .type ftl_update_l2p_map, %function
2501925327 ftl_update_l2p_map:
2502025328 .fnstart
25021
- @ args = 0, pretend = 0, frame = 16
25329
+ @ args = 0, pretend = 0, frame = 24
2502225330 @ frame_needed = 0, uses_anonymous_args = 0
25023
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
25331
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2502425332 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
25025
- mov r6, r0
25026
- ldr r5, .L4177
25027
- .pad #20
25028
- sub sp, sp, #20
25029
- ldrb r7, [r0, #9] @ zero_extendqisi2
25030
- sub r3, r5, #3088
25031
- ldrh r4, [r0, #12]
25333
+ mov r7, r0
25334
+ ldr r6, .L4088
25335
+ .pad #28
25336
+ sub sp, sp, #28
25337
+ ldrb r8, [r0, #9] @ zero_extendqisi2
25338
+ sub r3, r6, #3088
25339
+ ldr r4, [r6, #-2556]
2503225340 ldrh r3, [r3, #-8]
25033
- mul r7, r7, r3
25034
- ldr r3, [r5, #-2548]
25035
- add r4, r3, r4, asl #2
25036
- sub r3, r7, #-1073741823
25037
- ldr r3, [r4, r3, asl #2]
25341
+ mul r8, r8, r3
25342
+ ldrh r3, [r0, #12]
25343
+ add r4, r4, r3, lsl #2
25344
+ sub r3, r8, #-1073741823
25345
+ ldr r3, [r4, r3, lsl #2]
2503825346 cmn r3, #1
25039
- beq .L4147
25040
- ldr r1, .L4177+4
25347
+ beq .L4059
2504125348 movw r2, #1998
25042
- ldr r0, .L4177+8
25349
+ ldr r1, .L4088+4
25350
+ ldr r0, .L4088+8
2504325351 bl printk
2504425352 bl dump_stack
25045
-.L4147:
25353
+.L4059:
2504625354 mov r5, #0
2504725355 sub r4, r4, #4
25048
- mov r9, r5
25049
-.L4148:
25050
- cmp r9, r7
25051
- beq .L4176
25052
- ldr r8, [r4, #4]!
25053
- cmn r8, #1
25054
- beq .L4149
25055
- ldr r3, .L4177+12
25056
- mov r0, r8
25057
- ldrb r1, [r3, #2772] @ zero_extendqisi2
25058
- mov r1, r1, asl #7
25059
- bl __aeabi_uidiv
25060
- ldr r3, .L4177+16
25356
+ mov r10, r5
25357
+.L4060:
25358
+ cmp r10, r8
25359
+ bne .L4066
25360
+ ldr r3, .L4088+12
25361
+ ldr r4, .L4088+16
2506125362 ldr r3, [r3]
2506225363 tst r3, #4096
25063
- uxth fp, r0
25064
- beq .L4150
25065
- ldr r0, .L4177+20
25066
- mov r1, fp
25067
- mov r2, r8
25068
- mov r3, r9
25364
+ beq .L4067
25365
+ ldrh r1, [r7]
25366
+ ldr r2, [r4, #1092]
25367
+ ldr r0, .L4088+20
25368
+ lsl r3, r1, #1
25369
+ ldrh r3, [r2, r3]
25370
+ mov r2, r5
2506925371 bl printk
25070
-.L4150:
25071
- mov r8, r4
25072
- mov r10, r9
25073
-.L4153:
25074
- ldr r0, [r8]
25075
- cmn r0, #1
25076
- beq .L4151
25077
- ldr r3, .L4177+12
25078
- ldrb r1, [r3, #2772] @ zero_extendqisi2
25079
- mov r1, r1, asl #7
25372
+.L4067:
25373
+ ldrh r3, [r7]
25374
+ ldr r2, [r4, #1092]
25375
+ lsl r3, r3, #1
25376
+ strh r5, [r2, r3] @ movhi
25377
+ add sp, sp, #28
25378
+ @ sp needed
25379
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
25380
+.L4066:
25381
+ ldr r9, [r4, #4]!
25382
+ cmn r9, #1
25383
+ beq .L4061
25384
+ ldrb r1, [r6, #-2546] @ zero_extendqisi2
25385
+ mov r0, r9
25386
+ lsl r1, r1, #7
2508025387 bl __aeabi_uidiv
25081
- uxth r0, r0
25082
- cmp r0, fp
25083
- bne .L4151
25084
- ldrb r3, [r6, #9] @ zero_extendqisi2
25085
- mov r0, r10
25086
- mov r1, r3
25388
+ uxth r3, r0
2508725389 str r3, [sp, #4]
25088
- bl __aeabi_idiv
25089
- ldr r2, .L4177+24
25090
- ldrh r2, [r2]
25390
+ ldr r3, .L4088+12
25391
+ ldr r3, [r3]
25392
+ tst r3, #4096
25393
+ beq .L4062
25394
+ mov r3, r10
25395
+ mov r2, r9
25396
+ ldr r1, [sp, #4]
25397
+ ldr r0, .L4088+24
25398
+ bl printk
25399
+.L4062:
25400
+ mov r9, r4
25401
+ mov fp, r10
25402
+.L4065:
25403
+ ldr r0, [r9]
25404
+ cmn r0, #1
25405
+ beq .L4063
25406
+ ldrb r1, [r6, #-2546] @ zero_extendqisi2
25407
+ lsl r1, r1, #7
25408
+ bl __aeabi_uidiv
2509125409 ldr r3, [sp, #4]
25092
- mls r3, r3, r0, r10
25093
- add r3, r6, r3, asl #1
25094
- ldrh r3, [r3, #16]
25095
- mla r2, r2, r3, r0
25096
- ldr r0, .L4177+28
25097
- str r2, [sp, #12]
25098
- ldr r1, [r8]
25410
+ uxth r0, r0
25411
+ cmp r3, r0
25412
+ bne .L4063
25413
+ ldrb r3, [r7, #9] @ zero_extendqisi2
25414
+ mov r0, fp
25415
+ mov r1, r3
25416
+ str r3, [sp, #12]
25417
+ bl __aeabi_idivmod
25418
+ ldr r2, .L4088+28
25419
+ add r1, r7, r1, lsl #1
25420
+ ldr r3, [sp, #12]
25421
+ ldrh r0, [r1, #16]
25422
+ ldrh r2, [r2]
25423
+ mov r1, r3
25424
+ mul r2, r2, r0
25425
+ mov r0, fp
25426
+ str r2, [sp, #8]
25427
+ bl __aeabi_idiv
25428
+ ldr r2, [sp, #8]
25429
+ add r2, r2, r0
25430
+ ldr r0, .L4088+32
25431
+ str r2, [sp, #20]
25432
+ ldr r1, [r9]
2509925433 bl pm_ppa_update_check
2510025434 cmp r0, #0
25101
- beq .L4152
25102
- ldr r3, .L4177
25435
+ beq .L4064
25436
+ mov r3, r8
2510325437 mov r2, #4
25104
- ldr r0, .L4177+32
25105
- ldr r1, [r3, #-2548]
25106
- mov r3, r7
25438
+ ldr r1, [r6, #-2556]
25439
+ ldr r0, .L4088+36
2510725440 bl rknand_print_hex
25108
-.L4152:
25441
+.L4064:
2510925442 add r5, r5, #1
25110
- ldr r0, [r8]
25111
- add r1, sp, #12
2511225443 mov r2, #1
2511325444 uxth r5, r5
25445
+ add r1, sp, #20
25446
+ ldr r0, [r9]
2511425447 bl pm_log2phys
2511525448 mvn r3, #0
25116
- str r3, [r8]
25117
-.L4151:
25449
+ str r3, [r9]
25450
+.L4063:
25451
+ add fp, fp, #1
25452
+ add r9, r9, #4
25453
+ cmp r8, fp
25454
+ bne .L4065
25455
+.L4061:
2511825456 add r10, r10, #1
25119
- add r8, r8, #4
25120
- cmp r10, r7
25121
- bne .L4153
25122
-.L4149:
25123
- add r9, r9, #1
25124
- b .L4148
25125
-.L4176:
25126
- ldr r3, .L4177+16
25127
- ldr r4, .L4177+12
25128
- ldr r3, [r3]
25129
- tst r3, #4096
25130
- beq .L4155
25131
- ldrh r1, [r6]
25132
- mov r2, r5
25133
- ldr ip, [r4, #1088]
25134
- ldr r0, .L4177+36
25135
- mov r3, r1, asl #1
25136
- ldrh r3, [ip, r3]
25137
- bl printk
25138
-.L4155:
25139
- ldrh r3, [r6]
25140
- ldr r2, [r4, #1088]
25141
- mov r3, r3, asl #1
25142
- strh r5, [r2, r3] @ movhi
25143
- add sp, sp, #20
25144
- @ sp needed
25145
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
25146
-.L4178:
25457
+ b .L4060
25458
+.L4089:
2514725459 .align 2
25148
-.L4177:
25460
+.L4088:
2514925461 .word .LANCHOR3
25150
- .word .LANCHOR1+2696
25462
+ .word .LANCHOR1+2473
2515125463 .word .LC0
25152
- .word .LANCHOR0
2515325464 .word .LANCHOR2
25154
- .word .LC292
25155
- .word .LANCHOR3-3066
25156
- .word .LC293
25465
+ .word .LANCHOR0
2515725466 .word .LC294
25158
- .word .LC295
25467
+ .word .LC291
25468
+ .word .LANCHOR3-3074
25469
+ .word .LC292
25470
+ .word .LC293
2515925471 .fnend
2516025472 .size ftl_update_l2p_map, .-ftl_update_l2p_map
2516125473 .align 2
2516225474 .global ftl_alloc_new_data_sblk
25475
+ .syntax unified
25476
+ .arm
25477
+ .fpu softvfp
2516325478 .type ftl_alloc_new_data_sblk, %function
2516425479 ftl_alloc_new_data_sblk:
2516525480 .fnstart
2516625481 @ args = 0, pretend = 0, frame = 0
2516725482 @ frame_needed = 0, uses_anonymous_args = 0
25168
- stmfd sp!, {r4, r5, r6, lr}
25483
+ push {r4, r5, r6, lr}
2516925484 .save {r4, r5, r6, lr}
25170
- mov r6, r0
25171
- ldrh r5, [r0]
25485
+ mov r5, r0
25486
+ ldrh r6, [r0]
2517225487 bl ftl_update_l2p_map
2517325488 bl pm_flush
25174
- ldrh r0, [r6]
25489
+ ldrh r0, [r5]
2517525490 movw r3, #65535
2517625491 cmp r0, r3
25177
- beq .L4180
25492
+ beq .L4091
2517825493 bl zftl_insert_data_list
25179
-.L4180:
25180
- ldr r4, .L4188
25181
- mov r0, r6
25182
- ldr r1, [r4, #1092]
25494
+.L4091:
25495
+ ldr r4, .L4099
25496
+ mov r0, r5
25497
+ ldr r1, [r4, #1096]
2518325498 add r1, r1, #16
25184
- cmp r1, r6
25185
- movw r6, #65535
25499
+ cmp r5, r1
25500
+ movw r5, #65535
2518625501 moveq r1, #2
2518725502 movne r1, #3
2518825503 bl ftl_open_sblk_init
25189
- ldr r3, [r4, #1092]
25190
- cmp r5, r6
25504
+ ldr r3, [r4, #1096]
25505
+ cmp r6, r5
2519125506 ldr r3, [r3, #560]
25192
- rsb r3, r5, r3
25507
+ sub r3, r3, r6
2519325508 clz r3, r3
25194
- mov r3, r3, lsr #5
25509
+ lsr r3, r3, #5
2519525510 moveq r3, #0
2519625511 cmp r3, #0
25197
- beq .L4182
25198
- mov r1, r5
25199
- ldr r0, .L4188+4
25512
+ beq .L4093
25513
+ mov r1, r6
25514
+ ldr r0, .L4099+4
2520025515 bl printk
25201
- ldr r3, [r4, #1092]
25516
+ ldr r3, [r4, #1096]
2520225517 ldr r0, [r3, #564]
2520325518 bl gc_mark_bad_ppa
25204
- ldr r3, [r4, #1092]
25519
+ ldr r3, [r4, #1096]
2520525520 mvn r2, #0
25206
- str r6, [r3, #560]
25521
+ str r5, [r3, #560]
2520725522 str r2, [r3, #564]
25208
-.L4182:
25523
+.L4093:
2520925524 bl ftl_ext_info_flush
2521025525 mov r0, #0
2521125526 bl ftl_info_flush
2521225527 bl lpa_rebuild_hash
2521325528 mov r0, #0
25214
- ldmfd sp!, {r4, r5, r6, pc}
25215
-.L4189:
25529
+ pop {r4, r5, r6, pc}
25530
+.L4100:
2521625531 .align 2
25217
-.L4188:
25532
+.L4099:
2521825533 .word .LANCHOR0
25219
- .word .LC296
25534
+ .word .LC295
2522025535 .fnend
2522125536 .size ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
2522225537 .align 2
2522325538 .global ftl_write_commit
25539
+ .syntax unified
25540
+ .arm
25541
+ .fpu softvfp
2522425542 .type ftl_write_commit, %function
2522525543 ftl_write_commit:
2522625544 .fnstart
2522725545 @ args = 0, pretend = 0, frame = 24
2522825546 @ frame_needed = 0, uses_anonymous_args = 0
25229
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
25547
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2523025548 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2523125549 .pad #36
2523225550 sub sp, sp, #36
25233
- ldr r7, .L4258
25234
- mov r8, r7
25235
-.L4191:
25236
- ldrb r2, [r7, #2800] @ zero_extendqisi2
25551
+ ldr r8, .L4167
25552
+ mov r9, r8
25553
+.L4102:
25554
+ ldrb r2, [r8, #2796] @ zero_extendqisi2
2523725555 cmp r2, #0
25238
- beq .L4193
25239
- ldrb r3, [r7, #2824] @ zero_extendqisi2
25556
+ beq .L4104
25557
+ ldrb r3, [r8, #2820] @ zero_extendqisi2
2524025558 sub r2, r2, #1
25241
- strb r2, [r7, #2800]
25242
- str r3, [sp, #16]
25559
+ ldr r1, .L4167+4
25560
+ strb r2, [r8, #2796]
25561
+ str r3, [sp, #12]
25562
+ add r3, r3, r3, lsl #1
25563
+ add r3, r1, r3, lsl #4
25564
+ ldr r1, [sp, #12]
25565
+ str r3, [sp, #20]
2524325566 mov r3, #48
25244
- ldr r1, [sp, #16]
25245
- mul r3, r3, r1
25246
- ldr r1, .L4258+4
25247
- add r1, r1, r3
25248
- add r3, r7, r3
25249
- str r1, [sp, #20]
25250
- ldr r2, [r3, #1256]
25251
- ldrb r1, [r3, #1236] @ zero_extendqisi2
25252
- ldr r3, [r7, #2784]
25567
+ mla r3, r3, r1, r8
25568
+ ldrb r1, [r3, #1232] @ zero_extendqisi2
25569
+ ldr r2, [r3, #1252]
25570
+ ldr r3, [r8, #2780]
25571
+ strb r1, [r8, #2820]
2525325572 cmp r2, r3
25254
- strb r1, [r7, #2824]
25255
- bcc .L4194
25256
- ldr r1, .L4258+8
25257
- movw r2, #606
25258
- ldr r0, .L4258+12
25573
+ bcc .L4106
25574
+ movw r2, #607
25575
+ ldr r1, .L4167+8
25576
+ ldr r0, .L4167+12
2525925577 bl printk
2526025578 bl dump_stack
25261
-.L4194:
25262
- ldr r2, [sp, #16]
25579
+.L4106:
25580
+ ldr r2, [sp, #12]
2526325581 mov r3, #48
25264
- ldr r1, [r8, #2784]
25265
- mla r2, r3, r2, r8
25266
- ldr r9, [r2, #1256]
25267
- cmp r9, r1
25268
- bcc .L4195
25582
+ mla r3, r3, r2, r9
25583
+ ldr r2, [r9, #2780]
25584
+ ldr r7, [r3, #1252]
25585
+ cmp r7, r2
25586
+ bcc .L4107
2526925587 ldr r0, [sp, #20]
2527025588 bl zbuf_free
2527125589 mvn r0, #0
25272
- b .L4254
25273
-.L4195:
25274
- ldr r1, [r2, #1248]
25275
- ldr fp, [r2, #1240]
25276
- ldrb r5, [r2, #1277] @ zero_extendqisi2
25277
- ldrb r2, [r2, #1276] @ zero_extendqisi2
25278
- str r1, [sp, #8]
25279
- str r2, [sp, #12]
25280
- ldrb r2, [r7, #2801] @ zero_extendqisi2
25281
- cmp r2, #0
25282
- beq .L4197
25283
- ldr r2, .L4258+16
25284
- ldrb r4, [r2, #-96] @ zero_extendqisi2
25285
- ldr r2, .L4258+4
25286
- mla r4, r3, r4, r2
25287
-.L4198:
25288
- ldrb r2, [r4] @ zero_extendqisi2
25289
- cmp r2, #255
25290
- ldrne r1, .L4258+4
25291
- mlane r4, r3, r2, r1
25292
- bne .L4198
25293
-.L4256:
25590
+.L4101:
25591
+ add sp, sp, #36
25592
+ @ sp needed
25593
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
25594
+.L4107:
25595
+ ldr r2, [r3, #1244]
25596
+ ldr fp, [r3, #1236]
25597
+ ldrb r5, [r3, #1273] @ zero_extendqisi2
25598
+ ldrb r3, [r3, #1272] @ zero_extendqisi2
25599
+ str r2, [sp, #8]
25600
+ str r3, [sp, #16]
25601
+ ldrb r3, [r9, #2797] @ zero_extendqisi2
25602
+ cmp r3, #0
25603
+ beq .L4109
25604
+ ldr r6, .L4167+16
25605
+ ldr r3, .L4167+4
25606
+ ldrb r4, [r6, #-88] @ zero_extendqisi2
25607
+ add r4, r4, r4, lsl #1
25608
+ add r4, r3, r4, lsl #4
25609
+.L4110:
25610
+ ldrb r3, [r4] @ zero_extendqisi2
25611
+ cmp r3, #255
25612
+ bne .L4111
2529425613 ldr r3, [r4, #20]
25295
- cmp r3, r9
25296
- bne .L4197
25297
- ldr r3, [sp, #12]
25298
- mov r1, r5, asl #9
25614
+ cmp r7, r3
25615
+ bne .L4109
25616
+ ldr r3, [sp, #16]
25617
+ lsl r5, r5, #9
2529925618 ldr r0, [r4, #4]
25300
- mov r2, r3, asl #9
25301
- add r0, r0, r1
25302
- add r1, fp, r1
25619
+ add r1, fp, r5
25620
+ lsl r2, r3, #9
25621
+ add r0, r0, r5
2530325622 bl ftl_memcpy
25304
- ldrb r3, [r8, #2772] @ zero_extendqisi2
25305
- ldr r1, [r4, #12]
25623
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
2530625624 mov r0, #2
25307
- sub r3, r3, #2
2530825625 ldr r2, [r4, #4]
25626
+ ldr r1, [r4, #12]
25627
+ sub r3, r3, #2
25628
+ add r2, r2, r3, lsl #9
2530925629 add r1, r1, #16
25310
- add r2, r2, r3, asl #9
2531125630 bl ftl_debug_info_fill
2531225631 ldr r0, [sp, #20]
2531325632 bl zbuf_free
25314
- b .L4191
25315
-.L4197:
25316
- mov r0, r9
25633
+ b .L4102
25634
+.L4111:
25635
+ ldr r2, .L4167+4
25636
+ add r3, r3, r3, lsl #1
25637
+ add r4, r2, r3, lsl #4
25638
+ b .L4110
25639
+.L4109:
25640
+ mov r0, r7
2531725641 bl lpa_hash_get_ppa
2531825642 cmn r0, #1
2531925643 str r0, [sp, #28]
25320
- bne .L4201
25321
- mov r0, r9
25322
- add r1, sp, #28
25644
+ bne .L4113
2532325645 mov r2, #0
25646
+ add r1, sp, #28
25647
+ mov r0, r7
2532425648 bl pm_log2phys
25325
-.L4201:
25326
- ldr r6, [r8, #1092]
25649
+.L4113:
25650
+ ldr r6, [r9, #1096]
2532725651 mov r1, #0
25328
- ldr r3, .L4258+4
25652
+ ldr r3, .L4167+4
2532925653 mov r4, r1
2533025654 ldr ip, [sp, #28]
2533125655 add r6, r6, #16
2533225656 add r0, r3, #1536
25333
-.L4203:
25657
+.L4115:
2533425658 ldr r2, [r3, #20]
25335
- cmp r2, r9
25336
- bne .L4202
25659
+ cmp r7, r2
25660
+ bne .L4114
2533725661 ldrb r2, [r3, #2] @ zero_extendqisi2
2533825662 tst r2, #8
25339
- bicne r2, r2, #8
25340
- strneb r2, [r3, #2]
2534125663 ldrne r4, [r3, #4]
2534225664 movne r1, #1
2534325665 ldrne ip, [r3, #24]
25344
-.L4202:
25666
+ bicne r2, r2, #8
25667
+ strbne r2, [r3, #2]
25668
+.L4114:
2534525669 add r3, r3, #48
2534625670 cmp r3, r0
25347
- bne .L4203
25348
- ldrb r3, [r8, #2772] @ zero_extendqisi2
25671
+ bne .L4115
25672
+ ldr r3, .L4167+16
2534925673 cmp r1, #0
25350
- ldr r2, [sp, #12]
25674
+ ldr r2, [sp, #16]
2535125675 strne ip, [sp, #28]
25676
+ ldrb r3, [r3, #-2546] @ zero_extendqisi2
2535225677 cmp r2, r3
25353
- bcs .L4230
25678
+ bcs .L4142
2535425679 cmp r4, #0
25355
- beq .L4206
25680
+ beq .L4118
2535625681 cmp r5, #0
25357
- beq .L4207
25358
- mov r0, fp
25682
+ beq .L4119
25683
+ lsl r2, r5, #9
2535925684 mov r1, r4
25360
- mov r2, r5, asl #9
25685
+ mov r0, fp
2536125686 bl ftl_memcpy
25362
- ldr r6, [r7, #1092]
25687
+ ldr r6, [r9, #1096]
2536325688 add r6, r6, #48
25364
-.L4207:
25365
- ldr r3, [sp, #12]
25366
- ldrb r10, [r8, #2772] @ zero_extendqisi2
25367
- add r2, r5, r3
25368
- cmp r2, r10
25369
- ldrcs r6, [r7, #1092]
25689
+.L4119:
25690
+ ldr r3, [sp, #16]
25691
+ add r5, r5, r3
25692
+ ldr r3, .L4167+16
25693
+ ldrb r2, [r3, #-2546] @ zero_extendqisi2
25694
+ cmp r5, r2
25695
+ ldrcs r6, [r9, #1096]
2537025696 addcs r6, r6, #16
25371
- bcs .L4230
25372
- mov r1, r2, asl #9
25373
- rsb r2, r2, r10
25374
- add r0, fp, r1
25375
- add r1, r4, r1
25376
- mov r2, r2, asl #9
25697
+ bcs .L4142
25698
+ lsl r0, r5, #9
25699
+ sub r2, r2, r5
25700
+ lsl r2, r2, #9
25701
+ add r1, r4, r0
25702
+ add r0, fp, r0
2537725703 bl ftl_memcpy
25378
- b .L4230
25379
-.L4206:
25704
+.L4142:
25705
+ mov r10, #0
25706
+ b .L4117
25707
+.L4118:
2538025708 ldr r3, [sp, #28]
2538125709 cmn r3, #1
25382
- beq .L4209
25710
+ beq .L4121
2538325711 mov r0, #1
2538425712 bl buf_alloc
25385
- mov r1, #1
2538625713 ldr r3, [sp, #28]
2538725714 mov r4, r0
25388
- str r9, [r0, #20]
25715
+ str r7, [r0, #20]
25716
+ mov r1, #1
2538925717 str r3, [r0, #24]
2539025718 bl sblk_read_page
2539125719 ldr r3, [r4, #12]
2539225720 ldr r2, [r3, #4]
2539325721 ldr r10, [r3, #12]
25394
- cmp r2, r9
25722
+ cmp r7, r2
2539525723 add r10, r10, #1
25396
- bne .L4210
25724
+ bne .L4122
2539725725 ldr r2, [r4, #36]
2539825726 cmn r2, #1
25399
- bne .L4211
25400
-.L4210:
25401
- ldr ip, [r4, #24]
25402
- mvn r0, #0
25403
- ldrb r2, [r8, #1189] @ zero_extendqisi2
25404
- ldrb lr, [r8, #2772] @ zero_extendqisi2
25727
+ bne .L4123
25728
+.L4122:
25729
+ ldrb r2, [r9, #1153] @ zero_extendqisi2
25730
+ mvn ip, #0
25731
+ ldr lr, [r4, #24]
2540525732 rsb r1, r2, #24
25406
- mvn r2, r0, asl r2
25407
- and r0, r2, ip, lsr r1
25408
- str lr, [sp]
25409
- bic r1, ip, r2, asl r1
25733
+ mvn ip, ip, lsl r2
25734
+ ldr r2, .L4167+16
25735
+ and r0, ip, lr, lsr r1
25736
+ bic r1, lr, ip, lsl r1
25737
+ ldrb r2, [r2, #-2546] @ zero_extendqisi2
2541025738 uxtb r0, r0
25739
+ str r2, [sp]
2541125740 ldr r2, [r4, #4]
2541225741 bl flash_read_page_en
2541325742 str r0, [r4, #36]
25414
-.L4211:
25743
+.L4123:
2541525744 ldr r3, [r4, #12]
2541625745 ldr r3, [r3, #4]
25417
- cmp r3, r9
25418
- bne .L4212
25746
+ cmp r7, r3
25747
+ bne .L4124
2541925748 ldr r3, [r4, #36]
2542025749 cmn r3, #1
25421
- bne .L4213
25422
-.L4212:
25423
- ldr r2, [r7, #1092]
25424
- ldr r0, .L4258+20
25750
+ bne .L4125
25751
+.L4124:
25752
+ ldr r2, [r8, #1096]
25753
+ ldr r0, .L4167+20
2542525754 ldr r3, [r2, #552]
2542625755 add r3, r3, #1
2542725756 str r3, [r2, #552]
....@@ -25429,155 +25758,127 @@
2542925758 ldrb r1, [r4, #1] @ zero_extendqisi2
2543025759 ldr r2, [sp, #28]
2543125760 str r3, [sp]
25432
- mov r3, r9
25761
+ mov r3, r7
2543325762 bl printk
25434
- mov r2, #4
25435
- ldr r0, .L4258+24
25436
- mov r3, r2
25763
+ mov r3, #4
2543725764 ldr r1, [r4, #12]
25765
+ mov r2, r3
25766
+ ldr r0, .L4167+24
2543825767 bl rknand_print_hex
25439
-.L4213:
25768
+.L4125:
2544025769 ldr r3, [r4, #12]
2544125770 ldr r3, [r3, #4]
25442
- cmp r3, r9
25443
- bne .L4214
25771
+ cmp r7, r3
25772
+ bne .L4126
2544425773 ldr r3, [r4, #36]
2544525774 cmn r3, #1
25446
- bne .L4215
25447
-.L4214:
25448
- ldr r1, .L4258+8
25449
- movw r2, #698
25450
- ldr r0, .L4258+12
25775
+ bne .L4127
25776
+.L4126:
25777
+ movw r2, #699
25778
+ ldr r1, .L4167+8
25779
+ ldr r0, .L4167+12
2545125780 bl printk
2545225781 bl dump_stack
25453
-.L4215:
25782
+.L4127:
2545425783 cmp r5, #0
25455
- beq .L4216
25784
+ beq .L4128
2545625785 ldr r3, [sp, #28]
25457
- mov r2, r5, asl #9
25786
+ lsl r2, r5, #9
2545825787 cmn r3, #1
25459
- beq .L4217
25460
- mov r0, fp
25788
+ beq .L4129
2546125789 ldr r1, [r4, #4]
25462
- bl ftl_memcpy
25463
- b .L4218
25464
-.L4209:
25465
- cmp r5, #0
25466
- moveq r4, r5
25467
- moveq r10, r5
25468
- beq .L4216
25469
- mov r2, r5, asl #9
25470
- mov r10, r4
25471
-.L4217:
2547225790 mov r0, fp
25473
- mov r1, #0
25474
- bl ftl_memset
25475
-.L4218:
25476
- ldr r6, [r7, #1092]
25791
+ bl ftl_memcpy
25792
+.L4130:
25793
+ ldr r6, [r8, #1096]
2547725794 add r6, r6, #48
25478
-.L4216:
25479
- ldr r3, [sp, #12]
25480
- ldrb r2, [r7, #2772] @ zero_extendqisi2
25795
+.L4128:
25796
+ ldr r3, [sp, #16]
2548125797 add r5, r5, r3
25798
+ ldr r3, .L4167+16
25799
+ ldrb r2, [r3, #-2546] @ zero_extendqisi2
2548225800 cmp r5, r2
25483
- bcc .L4219
25484
- ldrhi r6, [r7, #1092]
25801
+ bcc .L4131
25802
+ ldrhi r6, [r8, #1096]
2548525803 addhi r6, r6, #16
25486
- b .L4220
25487
-.L4219:
25488
- ldr r3, [sp, #28]
25489
- rsb r2, r5, r2
25490
- mov r5, r5, asl #9
25491
- cmn r3, #1
25492
- mov r2, r2, asl #9
25493
- beq .L4221
25494
- ldr r1, [r4, #4]
25495
- add r0, fp, r5
25496
- add r1, r1, r5
25497
- bl ftl_memcpy
25498
- b .L4220
25499
-.L4221:
25500
- add r0, fp, r5
25501
- mov r1, #0
25502
- bl ftl_memset
25503
-.L4220:
25804
+.L4132:
2550425805 cmp r4, #0
25505
- beq .L4205
25806
+ beq .L4117
2550625807 ldrb r3, [r4, #2] @ zero_extendqisi2
2550725808 mov r1, r4
25508
- ldr r0, .L4258+28
25809
+ ldr r0, .L4167+28
2550925810 bic r3, r3, #8
2551025811 strb r3, [r4, #2]
2551125812 bl buf_remove_buf
2551225813 mov r0, r4
2551325814 bl zbuf_free
25514
- b .L4205
25515
-.L4230:
25516
- mov r10, #0
25517
-.L4205:
25815
+.L4117:
2551825816 ldrh r3, [r6, #6]
2551925817 cmp r3, #0
25520
- bne .L4222
25818
+ bne .L4134
2552125819 bl ftl_flush
2552225820 mov r0, r6
2552325821 bl ftl_alloc_new_data_sblk
25524
-.L4222:
25822
+.L4134:
2552525823 mov r0, r6
2552625824 mov r4, #48
2552725825 bl ftl_get_new_free_page
25528
- ldr r3, [sp, #16]
25529
- str r0, [sp, #12]
25826
+ ldr r3, [sp, #12]
25827
+ str r0, [sp, #16]
2553025828 mov r0, #2
2553125829 mul r4, r4, r3
2553225830 ldr r3, [sp, #8]
25533
- add r5, r8, r4
2553425831 mov r1, r3
25535
- ldr r2, [r5, #1252]
25832
+ add r5, r9, r4
25833
+ ldr r2, [r5, #1248]
2553625834 str r10, [r3, #12]
25537
- stmia r3, {r2, r9}
25835
+ stm r3, {r2, r7}
2553825836 ldr r2, [sp, #28]
25539
- ldrb ip, [r8, #2772] @ zero_extendqisi2
2554025837 str r2, [r3, #8]
2554125838 mov r2, #0
25839
+ ldr r3, .L4167+16
2554225840 str r2, [r1, #16]!
25543
- sub r2, ip, #2
25544
- add r2, fp, r2, asl #9
25841
+ ldrb r2, [r3, #-2546] @ zero_extendqisi2
25842
+ sub r2, r2, #2
25843
+ add r2, fp, r2, lsl #9
2554525844 bl ftl_debug_info_fill
25546
- ldr r3, [sp, #12]
25845
+ ldr r3, [sp, #16]
2554725846 ldr r1, [sp, #20]
25548
- str r3, [r5, #1260]
25847
+ ldr r0, .L4167+32
25848
+ str r3, [r5, #1256]
2554925849 ldr r3, [sp, #28]
25550
- str r3, [r5, #1264]
25850
+ str r3, [r5, #1260]
2555125851 mvn r3, #0
25552
- strb r3, [r5, #1236]
25553
- ldrb r3, [r5, #1238] @ zero_extendqisi2
25852
+ strb r3, [r5, #1232]
25853
+ ldrb r3, [r5, #1234] @ zero_extendqisi2
2555425854 orr r3, r3, #10
25555
- strb r3, [r5, #1238]
25556
- ldr r3, .L4258+4
25557
- ldrh r10, [r6, #10]
25558
- ldrh r9, [r6, #12]
25855
+ strb r3, [r5, #1234]
25856
+ ldr r3, .L4167+4
25857
+ ldrh r2, [r6, #12]
2555925858 add r4, r3, r4
25560
- add r9, r10, r9
25561
- sub r9, r9, #1
25562
- strh r9, [r4, #32] @ movhi
25563
- ldr r4, .L4258+16
25564
- sub r0, r4, #96
25859
+ ldrh r3, [r6, #10]
25860
+ add r3, r3, r2
25861
+ sub r3, r3, #1
25862
+ strh r3, [r4, #32] @ movhi
2556525863 bl buf_add_tail
25566
- ldrb r3, [r8, #2801] @ zero_extendqisi2
25864
+ ldrb r3, [r9, #2797] @ zero_extendqisi2
25865
+ ldr r4, .L4167
2556725866 add r3, r3, #1
25568
- strb r3, [r8, #2801]
25867
+ strb r3, [r9, #2797]
2556925868 bl timer_get_time
25570
- ldrb r3, [r8, #2801] @ zero_extendqisi2
25869
+ ldr r3, .L4167+16
2557125870 ldrh r2, [r6, #6]
25871
+ str r0, [r3, #-84]
25872
+ ldrb r3, [r9, #2797] @ zero_extendqisi2
2557225873 cmp r3, #2
25573
- str r0, [r4, #-92]
25574
- bhi .L4223
25874
+ bhi .L4135
2557525875 cmp r2, #1
25576
- bne .L4193
25577
-.L4223:
25876
+ bne .L4105
25877
+.L4135:
25878
+ ldr lr, .L4167+16
25879
+ mov r5, #48
2557825880 ldrb r1, [r6, #5] @ zero_extendqisi2
25579
- mov lr, #48
25580
- ldrb r0, [r4, #-96] @ zero_extendqisi2
25881
+ ldrb r0, [lr, #-88] @ zero_extendqisi2
2558125882 cmp r1, #0
2558225883 mov r1, #0
2558325884 moveq ip, #1
....@@ -25585,1853 +25886,1822 @@
2558525886 cmp r2, #1
2558625887 mov r2, r0
2558725888 moveq ip, r3
25588
-.L4227:
25889
+.L4139:
2558925890 cmp r1, ip
25590
- mlane r2, lr, r2, r7
25591
- addne r1, r1, #1
25592
- ldrneb r2, [r2, #1236] @ zero_extendqisi2
25593
- bne .L4227
25594
-.L4257:
25595
- strb r2, [r4, #-96]
25891
+ bne .L4140
2559625892 uxtb r1, r1
25597
- ldr r2, .L4258+4
25598
- rsb r3, r1, r3
25599
- strb r3, [r8, #2801]
25600
- mov r3, #48
25601
- mla r0, r3, r0, r2
25893
+ add r0, r0, r0, lsl #1
25894
+ strb r2, [lr, #-88]
25895
+ sub r3, r3, r1
25896
+ strb r3, [r4, #2797]
25897
+ ldr r3, .L4167+4
25898
+ add r0, r3, r0, lsl #4
2560225899 bl sblk_prog_page
2560325900 ldrh r3, [r6, #6]
2560425901 cmp r3, #1
25605
- bne .L4193
25902
+ bne .L4105
2560625903 bl sblk_wait_write_queue_completed
2560725904 bl ftl_write_completed
2560825905 mov r0, r6
2560925906 bl ftl_write_last_log_page
2561025907 mov r0, r6
2561125908 bl ftl_alloc_new_data_sblk
25612
-.L4193:
25613
- ldrb r4, [r7, #2800] @ zero_extendqisi2
25614
- cmp r4, #0
25615
- bne .L4191
25909
+.L4105:
25910
+ ldrb r3, [r4, #2796] @ zero_extendqisi2
25911
+ cmp r3, #0
25912
+ bne .L4102
25913
+.L4104:
2561625914 bl ftl_write_completed
25617
- mov r0, r4
25618
-.L4254:
25619
- add sp, sp, #36
25620
- @ sp needed
25621
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
25622
-.L4259:
25915
+ mov r0, #0
25916
+ b .L4101
25917
+.L4131:
25918
+ ldr r3, [sp, #28]
25919
+ sub r2, r2, r5
25920
+ lsl r2, r2, #9
25921
+ lsl r0, r5, #9
25922
+ cmn r3, #1
25923
+ beq .L4133
25924
+ ldr r1, [r4, #4]
25925
+ add r1, r1, r0
25926
+ add r0, fp, r0
25927
+ bl ftl_memcpy
25928
+ b .L4132
25929
+.L4133:
25930
+ mov r1, #0
25931
+ add r0, fp, r0
25932
+ bl ftl_memset
25933
+ b .L4132
25934
+.L4140:
25935
+ mla r2, r5, r2, r4
25936
+ add r1, r1, #1
25937
+ ldrb r2, [r2, #1232] @ zero_extendqisi2
25938
+ b .L4139
25939
+.L4121:
25940
+ cmp r5, #0
25941
+ moveq r10, r5
25942
+ moveq r4, r5
25943
+ beq .L4128
25944
+ lsl r2, r5, #9
25945
+ mov r10, r4
25946
+.L4129:
25947
+ mov r1, #0
25948
+ mov r0, fp
25949
+ bl ftl_memset
25950
+ b .L4130
25951
+.L4168:
2562325952 .align 2
25624
-.L4258:
25953
+.L4167:
2562525954 .word .LANCHOR0
25626
- .word .LANCHOR0+1236
25627
- .word .LANCHOR1+2716
25955
+ .word .LANCHOR0+1232
25956
+ .word .LANCHOR1+2492
2562825957 .word .LC0
2562925958 .word .LANCHOR3
25630
- .word .LC297
25631
- .word .LC241
25632
- .word .LANCHOR0+2776
25959
+ .word .LC296
25960
+ .word .LC240
25961
+ .word .LANCHOR0+2771
25962
+ .word .LANCHOR3-88
2563325963 .fnend
2563425964 .size ftl_write_commit, .-ftl_write_commit
2563525965 .align 2
2563625966 .global gc_do_copy_back
25967
+ .syntax unified
25968
+ .arm
25969
+ .fpu softvfp
2563725970 .type gc_do_copy_back, %function
2563825971 gc_do_copy_back:
2563925972 .fnstart
25640
- @ args = 0, pretend = 0, frame = 64
25973
+ @ args = 0, pretend = 0, frame = 72
2564125974 @ frame_needed = 0, uses_anonymous_args = 0
25642
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
25975
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2564325976 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
25644
- .pad #76
25645
- sub sp, sp, #76
25646
- ldr r8, .L4408
25647
- ldr r5, .L4408+4
25648
- ldrb r0, [r8, #-3115] @ zero_extendqisi2
25649
- ldr r3, [r5, #1092]
25977
+ .pad #84
25978
+ sub sp, sp, #84
25979
+ ldr r7, .L4307
25980
+ ldrb r0, [r7, #-3119] @ zero_extendqisi2
2565025981 cmp r0, #0
25651
- str r3, [sp, #12]
25652
- bne .L4261
25982
+ bne .L4170
2565325983 bl buf_alloc
2565425984 subs r4, r0, #0
25655
- beq .L4260
25656
- ldr r7, .L4408+8
25657
- ldrh r6, [r7, #22]
25658
- mov r0, r6
25659
- add r6, r6, #1
25985
+ beq .L4169
25986
+ ldr r5, .L4307+4
25987
+ ldrh r2, [r5, #22]
25988
+ mov r0, r2
2566025989 bl gc_get_src_ppa_from_index
2566125990 mov r1, #1
25662
- strh r6, [r7, #22] @ movhi
25991
+ add r2, r2, #1
2566325992 str r0, [r4, #24]
25664
- mov r9, r0
25993
+ mov r6, r0
2566525994 mov r0, r4
25995
+ strh r2, [r5, #22] @ movhi
2566625996 bl sblk_read_page
2566725997 ldr r3, [r4, #36]
2566825998 cmn r3, #1
2566925999 cmpne r3, #512
25670
- bne .L4263
25671
- ldr r1, .L4408+12
26000
+ bne .L4172
2567226001 movw r2, #1032
25673
- ldr r0, .L4408+16
26002
+ ldr r1, .L4307+8
26003
+ ldr r0, .L4307+12
2567426004 bl printk
2567526005 bl dump_stack
25676
-.L4263:
26006
+.L4172:
2567726007 ldr r3, [r4, #12]
25678
- ldr r6, [r3, #4]
25679
- mov r0, r6
26008
+ ldr r8, [r3, #4]
26009
+ mov r0, r8
2568026010 bl lpa_hash_get_ppa
2568126011 cmn r0, #1
25682
- str r0, [sp, #48]
25683
- bne .L4264
25684
- mov r0, r6
25685
- add r1, sp, #48
26012
+ str r0, [sp, #56]
26013
+ bne .L4173
2568626014 mov r2, #0
26015
+ add r1, sp, #56
26016
+ mov r0, r8
2568726017 bl pm_log2phys
25688
-.L4264:
25689
- ldr r8, [sp, #48]
25690
- cmp r8, r9
25691
- bne .L4265
25692
- ldr r1, .L4408+20
26018
+.L4173:
26019
+ ldr r9, [sp, #56]
26020
+ cmp r6, r9
26021
+ bne .L4174
26022
+ ldr r2, .L4307+16
2569326023 mov r3, #0
25694
-.L4268:
25695
- add r2, r1, r3
25696
- ldr r0, [r2, #20]
25697
- cmp r0, r6
25698
- bne .L4266
25699
- ldrb r2, [r2, #2] @ zero_extendqisi2
25700
- tst r2, #2
25701
- beq .L4266
26024
+ sub r10, r2, #1232
26025
+.L4177:
26026
+ add r1, r2, r3
26027
+ ldr r0, [r1, #20]
26028
+ cmp r8, r0
26029
+ bne .L4175
26030
+ ldrb r1, [r1, #2] @ zero_extendqisi2
26031
+ tst r1, #2
26032
+ beq .L4175
2570226033 mov r0, r4
2570326034 bl zbuf_free
25704
- ldr r3, .L4408+24
26035
+ ldr r3, .L4307+20
2570526036 ldr r3, [r3]
2570626037 tst r3, #256
25707
- beq .L4260
25708
- mov r1, r6
25709
- mov r2, r8
25710
- ldrh r3, [r7, #22]
25711
- ldr r0, .L4408+28
26038
+ beq .L4169
26039
+ ldrh r3, [r5, #22]
26040
+ mov r2, r6
26041
+ mov r1, r8
26042
+ ldr r0, .L4307+24
2571226043 bl printk
25713
- b .L4260
25714
-.L4266:
26044
+.L4169:
26045
+ add sp, sp, #84
26046
+ @ sp needed
26047
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
26048
+.L4175:
2571526049 add r3, r3, #48
2571626050 cmp r3, #1536
25717
- bne .L4268
25718
- ldrb r3, [r5, #2772] @ zero_extendqisi2
26051
+ bne .L4177
26052
+ ldrb r3, [r7, #-2546] @ zero_extendqisi2
2571926053 mov r2, #0
25720
- str r6, [r4, #20]
26054
+ str r8, [r4, #20]
2572126055 strb r2, [r4, #41]
2572226056 strb r3, [r4, #40]
2572326057 ldr r3, [r4, #12]
2572426058 ldr r1, [r3]
2572526059 str r1, [r4, #16]
2572626060 str r2, [r3, #16]
25727
- ldr r3, .L4408+24
26061
+ ldr r3, .L4307+20
2572826062 ldr r3, [r3]
2572926063 tst r3, #256
25730
- beq .L4269
25731
- mov r0, r6
26064
+ beq .L4178
26065
+ mov r0, r8
2573226066 bl lpa_hash_get_ppa
25733
- mov r1, r6
25734
- str r8, [sp]
26067
+ ldrh r3, [r5, #22]
26068
+ mov r2, r9
26069
+ str r6, [sp]
26070
+ mov r1, r8
26071
+ str r3, [sp, #4]
2573526072 mov r3, r0
25736
- ldrh r2, [r7, #22]
25737
- ldr r0, .L4408+32
25738
- str r2, [sp, #4]
25739
- mov r2, r8
26073
+ ldr r0, .L4307+28
2574026074 bl printk
25741
-.L4269:
26075
+.L4178:
2574226076 mov r0, r4
2574326077 bl ftl_gc_write_buf
2574426078 bl ftl_write_commit
25745
- ldr r2, [r5, #2804]
26079
+ ldr r2, [r10, #2800]
2574626080 ldr r3, [r2, #60]
2574726081 add r3, r3, #1
2574826082 str r3, [r2, #60]
25749
- ldrh r3, [r7, #24]
26083
+ ldrh r3, [r5, #24]
2575026084 add r3, r3, #1
25751
- strh r3, [r7, #24] @ movhi
25752
- b .L4260
25753
-.L4265:
25754
- ldr r3, .L4408+24
26085
+ strh r3, [r5, #24] @ movhi
26086
+ b .L4169
26087
+.L4174:
26088
+ ldr r3, .L4307+20
2575526089 ldr r3, [r3]
2575626090 tst r3, #256
25757
- beq .L4271
25758
- mov r0, r6
26091
+ beq .L4179
26092
+ mov r0, r8
2575926093 bl lpa_hash_get_ppa
25760
- mov r1, r6
25761
- str r9, [sp]
26094
+ ldrh r3, [r5, #22]
26095
+ mov r2, r9
26096
+ str r6, [sp]
26097
+ mov r1, r8
26098
+ str r3, [sp, #4]
2576226099 mov r3, r0
25763
- ldrh r2, [r7, #22]
25764
- ldr r0, .L4408+32
25765
- str r2, [sp, #4]
25766
- mov r2, r8
26100
+ ldr r0, .L4307+28
2576726101 bl printk
25768
-.L4271:
26102
+.L4179:
2576926103 mov r0, r4
2577026104 bl zbuf_free
25771
- b .L4260
25772
-.L4261:
25773
- ldr r3, [sp, #12]
26105
+ b .L4169
26106
+.L4170:
26107
+ ldr r10, .L4307+32
26108
+ ldr r3, [r10, #1096]
2577426109 ldrb r9, [r3, #89] @ zero_extendqisi2
25775
- ldrb r3, [r8, #-3123] @ zero_extendqisi2
25776
- uxth fp, r9
25777
- cmp r3, fp
26110
+ str r3, [sp, #12]
26111
+ ldrb r3, [r7, #-3127] @ zero_extendqisi2
26112
+ uxth r8, r9
26113
+ cmp r3, r8
2577826114 movhi r6, #1
25779
- bhi .L4273
25780
- cmp fp, #2
25781
- movcc r6, fp
26115
+ bhi .L4180
26116
+ cmp r8, #2
26117
+ movcc r6, r8
2578226118 movcs r6, #2
25783
-.L4273:
25784
- ldrb r4, [r8, #-3124] @ zero_extendqisi2
25785
- ldr r10, .L4408
25786
- cmp r4, #3
25787
- ldr r3, .L4408+8
25788
- bne .L4274
25789
- ldrb r2, [r5, #1196] @ zero_extendqisi2
26119
+.L4180:
26120
+ ldrb r5, [r7, #-3128] @ zero_extendqisi2
26121
+ ldr r3, .L4307+4
26122
+ cmp r5, #3
26123
+ bne .L4181
26124
+ ldrb r2, [r10, #1158] @ zero_extendqisi2
2579026125 cmp r2, #0
25791
- beq .L4275
26126
+ beq .L4182
2579226127 movw r2, #2102
2579326128 mov r1, r9
25794
- ldrh r7, [r3, r2]
25795
- mov r0, r7
26129
+ ldrh fp, [r3, r2]
26130
+ mov r0, fp
2579626131 bl __aeabi_idiv
25797
- ldrb r3, [r10, #-2536] @ zero_extendqisi2
26132
+ ldrb r3, [r7, #-2542] @ zero_extendqisi2
26133
+ uxth r4, r0
2579826134 cmp r3, #0
25799
- uxth r5, r0
25800
- beq .L4276
25801
- ldr r3, .L4408+36
25802
- mov r0, r0, asl #1
26135
+ beq .L4183
26136
+ ldr r3, .L4307+36
26137
+ lsl r0, r0, #1
2580326138 ldrh r3, [r3, r0]
2580426139 cmp r3, #0
25805
- moveq r4, #1
25806
- movne r4, #2
25807
- b .L4277
25808
-.L4276:
25809
- ldrb r3, [r10, #541] @ zero_extendqisi2
26140
+ moveq r5, #1
26141
+ movne r5, #2
26142
+.L4184:
26143
+ smulbb r8, r8, r4
26144
+ sub r8, fp, r8
26145
+ uxth r3, r8
26146
+ str r3, [sp, #20]
26147
+.L4185:
26148
+ mul r3, r6, r5
26149
+ ldr r9, .L4307+36
26150
+ mov r8, #0
26151
+ str r3, [sp, #16]
26152
+ add r9, r9, r4, lsl #1
26153
+ ldr r3, .L4307+4
26154
+.L4189:
26155
+ ldr r1, [sp, #16]
26156
+ uxth r0, r8
26157
+ mov r2, r0
26158
+ cmp r0, r1
26159
+ bge .L4242
26160
+ ldr r1, .L4307+40
26161
+ add r2, fp, r2
26162
+ ldrh ip, [r1]
26163
+ ldr r1, [sp, #12]
26164
+ ldrb r1, [r1, #89] @ zero_extendqisi2
26165
+ mul r1, r1, ip
26166
+ ldrb ip, [r7, #-11] @ zero_extendqisi2
26167
+ sub r1, r1, ip
26168
+ cmp r2, r1
26169
+ blt .L4190
26170
+ ldrb r1, [r7, #-2542] @ zero_extendqisi2
26171
+ cmp r1, #0
26172
+ beq .L4242
26173
+ ldrh r1, [r9]
26174
+ cmp r1, r4
26175
+ bcc .L4191
26176
+.L4242:
26177
+ mov r3, #1
26178
+ str r3, [sp, #24]
26179
+ b .L4187
26180
+.L4183:
26181
+ ldrb r3, [r7, #-15] @ zero_extendqisi2
2581026182 cmp r3, #0
25811
- moveq r4, #1
25812
- beq .L4277
25813
- sub r3, r5, #62
26183
+ moveq r5, #1
26184
+ beq .L4184
26185
+ sub r3, r4, #62
2581426186 cmp r3, #2160
25815
- movcs r4, #2
25816
- bcs .L4277
25817
- mov r1, r4
25818
- mov r0, r5
26187
+ movcs r5, #2
26188
+ bcs .L4184
26189
+ mov r1, r5
26190
+ mov r0, r4
2581926191 bl __aeabi_uidivmod
2582026192 uxth r1, r1
2582126193 cmp r1, #0
25822
- movne r4, #1
25823
- moveq r4, #2
25824
-.L4277:
25825
- smulbb r1, r5, fp
25826
- rsb r1, r1, r7
25827
- uxth r3, r1
25828
- str r3, [sp, #16]
25829
- b .L4280
25830
-.L4275:
25831
- ldrb r2, [r10, #-3116] @ zero_extendqisi2
26194
+ movne r5, #1
26195
+ moveq r5, #2
26196
+ b .L4184
26197
+.L4182:
26198
+ ldrb r2, [r7, #-3120] @ zero_extendqisi2
2583226199 cmp r2, #0
2583326200 movw r2, #2102
25834
- ldrh r7, [r3, r2]
25835
- mov r0, r7
25836
- beq .L4279
25837
- add r1, r9, r9, asl #1
26201
+ beq .L4186
26202
+ ldrh fp, [r3, r2]
26203
+ add r1, r9, r9, lsl #1
26204
+ mov r0, fp
2583826205 bl __aeabi_idiv
25839
- ldr r2, .L4408+40
25840
- mul r9, r9, r0
25841
- uxth r5, r0
25842
- sub r9, r9, r9, asl #2
25843
- add r1, r7, r9
25844
- smull r2, r3, r1, r2
25845
- sub r1, r3, r1, asr #31
25846
- uxth r3, r1
25847
- str r3, [sp, #16]
25848
- ldr r3, .L4408+4
25849
- ldrb r3, [r3, #1197] @ zero_extendqisi2
26206
+ mul r9, r0, r9
26207
+ ldr r2, .L4307+44
26208
+ uxth r4, r0
26209
+ sub r9, r9, r9, lsl #2
26210
+ add r9, r9, fp
26211
+ smull r2, r3, r9, r2
26212
+ sub r9, r3, r9, asr #31
26213
+ uxth r3, r9
26214
+ str r3, [sp, #20]
26215
+ ldrb r3, [r10, #1159] @ zero_extendqisi2
2585026216 cmp r3, #0
25851
- addne r5, r5, r5, asl #1
25852
- uxthne r5, r5
25853
- b .L4280
25854
-.L4279:
26217
+ addne r4, r4, r4, lsl #1
26218
+ uxthne r4, r4
26219
+ b .L4185
26220
+.L4186:
26221
+ ldrh r10, [r3, r2]
2585526222 mov r1, r9
26223
+ mov r0, r10
2585626224 bl __aeabi_idiv
25857
- ldr r2, .L4408+44
25858
- smulbb r1, r0, fp
25859
- mov r3, r0, asl #1
25860
- ldrh r2, [r2, r3]
25861
- rsb r1, r1, r7
25862
- and r3, r2, #7
26225
+ ldr r2, .L4307+48
26226
+ lsl r3, r0, #1
26227
+ smulbb r8, r0, r8
26228
+ ldrh r3, [r2, r3]
26229
+ sub r10, r10, r8
26230
+ lsr r4, r3, #3
26231
+ and r3, r3, #7
26232
+ str r3, [sp, #24]
26233
+ uxth r3, r10
26234
+ mla r9, r9, r4, r3
2586326235 str r3, [sp, #20]
25864
- mov r5, r2, lsr #3
25865
- uxth r3, r1
25866
- str r3, [sp, #16]
25867
- mla r9, r9, r5, r3
25868
- ldr r3, [sp, #20]
26236
+ ldr r3, [sp, #24]
26237
+ add r9, r9, r9, lsl #1
2586926238 cmp r3, #1
25870
- add r9, r9, r9, asl #1
25871
- uxth r7, r9
25872
- bne .L4281
25873
- b .L4280
25874
-.L4274:
25875
- ldrb r2, [r10, #-3122] @ zero_extendqisi2
26239
+ uxth fp, r9
26240
+ beq .L4185
26241
+.L4187:
26242
+ mul r3, r6, r5
26243
+ str r3, [sp, #36]
26244
+ lsl r3, r6, #1
26245
+ uxth r3, r3
26246
+ str r3, [sp, #44]
26247
+ ldrh r3, [sp, #44]
26248
+ smulbb r3, r3, r5
26249
+ sub r3, fp, r3
26250
+ uxth r3, r3
26251
+ str r3, [sp, #48]
26252
+ mov r3, #0
26253
+ str r3, [sp, #32]
26254
+ ldr r3, .L4307+36
26255
+ add r3, r3, r4, lsl #1
26256
+ str r3, [sp, #40]
26257
+.L4192:
26258
+ ldrh r9, [sp, #32]
26259
+ ldr r2, [sp, #36]
26260
+ ldr r7, .L4307
26261
+ str r9, [sp, #28]
26262
+ cmp r9, r2
26263
+ blt .L4216
26264
+ ldrb r3, [r7, #-3128] @ zero_extendqisi2
26265
+ cmp r3, #3
26266
+ bne .L4217
26267
+ ldr r3, .L4307+32
26268
+ ldrb r1, [r3, #1158] @ zero_extendqisi2
26269
+ cmp r1, #0
26270
+ movne r3, r2
26271
+ movne r1, #0
26272
+ subne r2, r3, #1
26273
+ bne .L4219
26274
+ ldrb r2, [r7, #-3120] @ zero_extendqisi2
26275
+ ldr r3, [sp, #56]
26276
+ cmp r2, #0
26277
+ strbne r1, [r3, #44]
26278
+ bne .L4305
26279
+ ldr r1, [sp, #24]
26280
+ cmp r1, #1
26281
+ moveq r2, #9
26282
+ beq .L4225
26283
+ ldr r1, [sp, #24]
26284
+ cmp r1, #2
26285
+ moveq r2, #13
26286
+.L4225:
26287
+ strb r2, [r3, #44]
26288
+.L4305:
26289
+ mov r2, r6
26290
+ add r1, sp, #68
26291
+ add r0, sp, #56
26292
+ bl sblk_xlc_prog_pages
26293
+.L4221:
26294
+ ldrb r3, [r7, #-3120] @ zero_extendqisi2
26295
+ ldr r2, .L4307+32
26296
+ cmp r3, #0
26297
+ addne r6, r6, r6, lsl #1
26298
+ uxthne r6, r6
26299
+ bne .L4231
26300
+ ldrb r3, [r7, #-3126] @ zero_extendqisi2
26301
+ cmp r3, #0
26302
+ ldrne r6, [sp, #44]
26303
+ bne .L4231
26304
+ ldrb r3, [r2, #1158] @ zero_extendqisi2
26305
+ cmp r3, #0
26306
+ beq .L4231
26307
+ smulbb r5, r6, r5
26308
+ ldrb r3, [r7, #-2542] @ zero_extendqisi2
26309
+ uxth r5, r5
26310
+ cmp r3, #0
26311
+ moveq r6, r5
26312
+ beq .L4231
26313
+ ldr r1, .L4307+36
26314
+ lsl r3, r4, #1
26315
+ ldrh r3, [r1, r3]
26316
+ cmp r3, r4
26317
+ movcs r6, r5
26318
+.L4231:
26319
+ ldr r1, [r2, #2800]
26320
+ ldr r0, .L4307+4
26321
+ ldr r3, [r1, #52]
26322
+ add r3, r3, r6
26323
+ str r3, [r1, #52]
26324
+ movw r1, #2102
26325
+ ldrh r3, [r0, r1]
26326
+ add r6, r6, r3
26327
+ ldr r3, .L4307+52
26328
+ uxth r6, r6
26329
+ strh r6, [r0, r1] @ movhi
26330
+ ldrh r1, [r3, #-14]
26331
+ ldr r3, [sp, #12]
26332
+ ldrb r3, [r3, #89] @ zero_extendqisi2
26333
+ mul r3, r3, r1
26334
+ cmp r6, r3
26335
+ ldrge r3, [r2, #1096]
26336
+ movge r2, #0
26337
+ strhge r2, [r3, #86] @ movhi
26338
+ bl gc_write_completed
26339
+ b .L4169
26340
+.L4181:
26341
+ ldrb r2, [r7, #-3126] @ zero_extendqisi2
2587626342 mov r1, r9
2587726343 cmp r2, #0
2587826344 movw r2, #2102
25879
- ldrh r7, [r3, r2]
25880
- mov r0, r7
25881
- bne .L4282
26345
+ ldrh fp, [r3, r2]
26346
+ mov r0, fp
26347
+ bne .L4188
2588226348 bl __aeabi_idiv
25883
- mov r4, #1
25884
- uxth r5, r0
25885
- smulbb r1, r5, fp
25886
- rsb r1, r1, r7
25887
- uxth r3, r1
25888
- str r3, [sp, #16]
25889
- b .L4280
25890
-.L4282:
26349
+ uxth r4, r0
26350
+ mov r5, #1
26351
+ smulbb r8, r8, r4
26352
+ sub r8, fp, r8
26353
+ uxth r3, r8
26354
+ str r3, [sp, #20]
26355
+ b .L4185
26356
+.L4188:
2589126357 bl __aeabi_idiv
25892
- mov r4, #2
25893
- uxth r5, r0
25894
- smulbb r1, r5, fp
25895
- rsb r1, r1, r7
25896
- uxth r3, r1
25897
- str r3, [sp, #16]
25898
-.L4280:
25899
- mul r3, r6, r4
25900
- ldr r10, .L4408+36
25901
- mov r2, #0
25902
- ldr ip, .L4408
25903
- add r10, r10, r5, asl #1
25904
- ldr r1, .L4408+8
26358
+ uxth r4, r0
26359
+ mov r5, #2
26360
+ smulbb r8, r8, r4
26361
+ sub r8, fp, r8
26362
+ uxth r3, r8
2590526363 str r3, [sp, #20]
25906
- b .L4283
25907
-.L4403:
25908
- ldrh r0, [r10]
25909
- cmp r0, r5
25910
- bcs .L4341
25911
- tst lr, #1
25912
- beq .L4341
25913
-.L4284:
25914
- ldr fp, [r8, #-168]
25915
- ldr r0, [fp, r3, asl #2]
25916
- cmn r0, #1
25917
- beq .L4402
25918
-.L4287:
25919
- add r2, r2, #1
25920
-.L4283:
25921
- ldr r3, [sp, #20]
25922
- uxth lr, r2
25923
- cmp lr, r3
25924
- bge .L4341
25925
- ldr r0, .L4408+48
25926
- add r3, r7, lr
25927
- ldr r9, [sp, #12]
25928
- ldrh r0, [r0]
25929
- ldrb r9, [r9, #89] @ zero_extendqisi2
25930
- mul r0, r9, r0
25931
- ldrb r9, [r8, #545] @ zero_extendqisi2
25932
- rsb r0, r9, r0
25933
- cmp r3, r0
25934
- blt .L4284
25935
- ldrb r0, [ip, #-2536] @ zero_extendqisi2
25936
- cmp r0, #0
25937
- bne .L4403
25938
-.L4341:
25939
- mov r3, #1
25940
- str r3, [sp, #20]
25941
-.L4281:
25942
- rsb r1, r6, r6, asl #15
25943
- mul r3, r6, r4
25944
- mov r1, r1, asl #1
25945
- smulbb r1, r1, r4
25946
- str r3, [sp, #24]
25947
- add r1, r7, r1
25948
- uxth r3, r1
25949
- ldr r1, .L4408+36
25950
- str r3, [sp, #36]
25951
- mov r3, #0
25952
- str r3, [sp, #28]
25953
- add r3, r1, r5, asl #1
25954
- str r3, [sp, #32]
25955
- b .L4286
25956
-.L4402:
25957
- ldrh r9, [r1, #22]
25958
- ldrh r0, [r1, #20]
25959
- cmp r0, r9
25960
- bls .L4260
25961
- ldrb r0, [ip, #-2536] @ zero_extendqisi2
25962
- cmp r0, #0
25963
- beq .L4288
25964
- ldrh r0, [r10]
25965
- cmp r0, r5
25966
- bcs .L4288
25967
- tst lr, #1
25968
- ldrne r0, [fp, r0, asl #2]
25969
- strne r0, [fp, r3, asl #2]
25970
- bne .L4287
25971
-.L4288:
25972
- mov r0, r9
25973
- str r1, [sp, #36]
25974
- str ip, [sp, #32]
25975
- add r9, r9, #1
25976
- str r2, [sp, #28]
26364
+ b .L4185
26365
+.L4191:
26366
+ tst r0, #1
26367
+ beq .L4242
26368
+.L4190:
26369
+ ldr r10, [r7, #-128]
26370
+ ldr r1, [r10, r2, lsl #2]
26371
+ cmn r1, #1
26372
+ bne .L4193
26373
+ ldrh r1, [r3, #22]
26374
+ ldrh ip, [r3, #20]
26375
+ cmp ip, r1
26376
+ bls .L4169
26377
+ ldrb ip, [r7, #-2542] @ zero_extendqisi2
26378
+ cmp ip, #0
26379
+ beq .L4194
26380
+ ldrh ip, [r9]
26381
+ cmp ip, r4
26382
+ bcs .L4194
26383
+ tst r0, #1
26384
+ ldrne r1, [r10, ip, lsl #2]
26385
+ strne r1, [r10, r2, lsl #2]
26386
+ bne .L4193
26387
+.L4194:
26388
+ mov r0, r1
2597726389 str r3, [sp, #24]
2597826390 bl gc_get_src_ppa_from_index
25979
- ldr r3, .L4408+8
25980
- strh r9, [r3, #22] @ movhi
2598126391 ldr r3, [sp, #24]
25982
- ldr r1, [sp, #36]
25983
- ldr ip, [sp, #32]
25984
- str r0, [fp, r3, asl #2]
25985
- ldr r2, [sp, #28]
25986
- b .L4287
25987
-.L4312:
25988
- ldr r3, [fp, #-3120]
25989
- add r10, r7, r9
25990
- ldrb r3, [r3, r10] @ zero_extendqisi2
25991
- cmp r3, #255
25992
- beq .L4404
25993
-.L4290:
25994
- ldr r1, .L4408
25995
- add r2, sp, #72
25996
- add r2, r2, r9, asl #2
25997
- ldr r0, .L4408+20
25998
- ldr ip, .L4408+4
25999
- ldr r3, [r1, #-3120]
26000
- ldrb r8, [r3, r10] @ zero_extendqisi2
26001
- mov r3, #48
26002
- mul r3, r3, r8
26003
- add r0, r0, r3
26004
- str r0, [r2, #-24]
26005
- ldrb r2, [sp, #20] @ zero_extendqisi2
26006
- add r3, ip, r3
26007
- strb r2, [r3, #1281]
26008
- mov r2, #2
26009
- strh r2, [r0, #34] @ movhi
26010
- ldrb r2, [r1, #-3124] @ zero_extendqisi2
26011
- cmp r2, #3
26012
- bne .L4303
26013
- ldrb r2, [ip, #1196] @ zero_extendqisi2
26014
- cmp r2, #0
26015
- beq .L4304
26016
- ldrb r1, [r1, #-2536] @ zero_extendqisi2
26017
- and r2, r9, #1
26018
- add r3, r5, r2
26019
- cmp r1, #0
26020
- beq .L4305
26021
- ldr r1, [sp, #32]
26022
- ldrh r1, [r1]
26023
- cmp r1, r5
26024
- movcs r2, #0
26025
- andcc r2, r2, #1
26026
- cmp r2, #0
26027
- movne r3, r1
26028
-.L4305:
26029
- ldr r2, .L4408+4
26030
- mov r1, r4
26031
- mov fp, #48
26032
- mov r0, r9
26033
- str r3, [sp, #40]
26034
- mla fp, fp, r8, r2
26035
- bl __aeabi_uidiv
26036
- ldr r1, .L4408+52
26037
- ldrh r1, [r1]
26038
- ldr r3, [sp, #16]
26039
- uxtah r0, r3, r0
26040
- ldr r3, [sp, #12]
26041
- add r0, r3, r0, asl #1
26042
- ldr r3, [sp, #40]
26043
- ldrh r2, [r0, #96]
26044
- mla r3, r1, r2, r3
26045
- orr r3, r3, #50331648
26046
- str r3, [fp, #1260]
26047
-.L4306:
26048
- mov r3, #48
26049
- mul r8, r3, r8
26050
- ldr r3, .L4408+4
26051
- add r3, r3, r8
26052
- ldr r1, [r3, #1260]
26053
- ldr r3, .L4408+20
26054
- add r8, r3, r8
26055
- ldr r3, .L4408
26056
- ldrh r2, [r8, #32]
26057
- ldr r3, [r3, #-164]
26058
- str r1, [r3, r2, asl #2]
26059
-.L4331:
26060
- ldr r8, .L4408
26061
- ldrb r3, [r8, #-2536] @ zero_extendqisi2
26062
- cmp r3, #0
26063
- bne .L4405
26064
-.L4311:
26392
+ add r1, r1, #1
26393
+ strh r1, [r3, #22] @ movhi
26394
+ str r0, [r10, r2, lsl #2]
26395
+.L4193:
26396
+ add r8, r8, #1
26397
+ b .L4189
26398
+.L4216:
2606526399 ldr r3, [sp, #28]
26066
- add r3, r3, #1
26067
- str r3, [sp, #28]
26068
-.L4286:
26069
- ldrh r9, [sp, #28]
26070
- ldr r3, [sp, #24]
26071
- ldr fp, .L4408
26072
- cmp r9, r3
26073
- blt .L4312
26074
- b .L4406
26075
-.L4404:
26400
+ add r3, fp, r3
26401
+ str r3, [sp, #16]
26402
+ ldr r2, [sp, #16]
26403
+ ldr r3, [r7, #-3124]
26404
+ ldrb r3, [r3, r2] @ zero_extendqisi2
26405
+ cmp r3, #255
26406
+ bne .L4196
2607626407 mov r0, #0
2607726408 bl buf_alloc
26078
- subs r8, r0, #0
26079
- bne .L4291
26409
+ subs r7, r0, #0
26410
+ bne .L4197
2608026411 bl sblk_wait_write_queue_completed
2608126412 bl ftl_write_completed
2608226413 bl gc_write_completed
2608326414 bl gc_free_temp_buf
26084
- mov r0, r8
26415
+ mov r0, r7
2608526416 bl buf_alloc
26086
- subs r8, r0, #0
26087
- beq .L4260
26088
-.L4291:
26089
- ldrb r2, [r8, #1] @ zero_extendqisi2
26090
- ldr r3, [fp, #-3120]
26091
- strb r2, [r3, r10]
26092
- ldr r2, .L4408+4
26093
- ldrb r3, [r2, #2835] @ zero_extendqisi2
26417
+ subs r7, r0, #0
26418
+ beq .L4169
26419
+.L4197:
26420
+ ldr r2, .L4307
26421
+ ldrb r1, [r7, #1] @ zero_extendqisi2
26422
+ ldr r0, [sp, #16]
26423
+ ldr r3, [r2, #-3124]
26424
+ strb r1, [r3, r0]
26425
+ ldr r1, .L4307+32
26426
+ ldrb r3, [r1, #2831] @ zero_extendqisi2
2609426427 add r3, r3, #1
26095
- strb r3, [r2, #2835]
26096
- add r3, r9, r7
26097
- strh r3, [r8, #32] @ movhi
26098
- ldrb r3, [sp, #20] @ zero_extendqisi2
26099
- strb r3, [r8, #45]
26100
- ldr r3, .L4408+48
26101
- ldrh r2, [r3]
26428
+ strb r3, [r1, #2831]
26429
+ add r3, r9, fp
26430
+ strh r3, [r7, #32] @ movhi
26431
+ ldrb r3, [sp, #24] @ zero_extendqisi2
26432
+ strb r3, [r7, #45]
26433
+ sub r3, r2, #3104
26434
+ ldrh r1, [r3, #-14]
2610226435 ldr r3, [sp, #12]
2610326436 ldrb r3, [r3, #89] @ zero_extendqisi2
26104
- mul r3, r3, r2
26105
- ldrb r2, [fp, #545] @ zero_extendqisi2
26106
- rsb r3, r2, r3
26107
- cmp r10, r3
26108
- blt .L4292
26109
- ldr r3, .L4408
26110
- ldrb r3, [r3, #-2536] @ zero_extendqisi2
26111
- cmp r3, #0
26112
- beq .L4293
26113
- ldr r3, [sp, #32]
26114
- ldrh r3, [r3]
26115
- cmp r3, r5
26116
- bcs .L4293
26117
- tst r9, #1
26118
- bne .L4292
26119
-.L4293:
26120
- ldr r3, .L4408
26121
- mvn r1, #0
26122
- ldr fp, .L4408+56
26123
- ldr r2, [r3, #-172]
26124
- str r1, [r2, r10, asl #2]
26125
- ldrb r2, [r3, #545] @ zero_extendqisi2
26126
- cmp r2, #2
26127
- bne .L4294
26128
- ldr r2, .L4408+48
26129
- ldr ip, .L4408+60
26130
- ldrh r0, [r2]
26131
- ldr r2, [sp, #12]
26132
- ldrb r2, [r2, #89] @ zero_extendqisi2
26133
- mul r2, r2, r0
26134
- sub r2, r2, #2
26135
- cmp r10, r2
26136
- bne .L4295
26137
- ldrh r2, [ip]
26138
- ldr r1, [r3, #-172]
26139
- ldr r0, [r8, #4]
26140
- str ip, [sp, #44]
26141
- bl ftl_memcpy
26142
- ldr r3, .L4408+4
26143
- mov r1, #0
26144
- ldr r0, [r8, #12]
26145
- ldrb r2, [r3, #2772] @ zero_extendqisi2
26146
- mov r2, r2, asl #1
26147
- str r3, [sp, #40]
26148
- bl ftl_memset
26149
- ldr r2, [r8, #12]
26150
- str fp, [r2]
26151
- ldr r0, [r8, #4]
26152
- ldr fp, [r8, #12]
26153
- ldr ip, [sp, #44]
26154
- ldrh r1, [ip]
26155
- bl js_hash
26156
- ldr r3, [sp, #40]
26157
- str r0, [fp, #4]
26158
- ldr r2, [r8, #12]
26159
- ldr r3, [r3, #1092]
26160
- ldr r3, [r3, #132]
26161
- str r3, [r2, #8]
26162
- mov r2, #0
26163
- ldr r3, [r8, #12]
26164
- b .L4398
26165
-.L4295:
26166
- ldrb r2, [r3, #-3123] @ zero_extendqisi2
26167
- ldrh r1, [ip]
26168
- ldr r3, [r3, #-172]
26169
- mul r0, r2, r0
26170
- rsb ip, r1, r0, asl #2
26171
- mov r1, r1, lsr #2
26172
- ldr r0, [r8, #4]
26173
- mov r2, ip
26174
- add r1, r3, r1, asl #2
26175
- str ip, [sp, #44]
26176
- bl ftl_memcpy
26177
- ldr r3, .L4408+4
26178
- mov r1, #0
26179
- ldr r0, [r8, #12]
26180
- ldrb r2, [r3, #2772] @ zero_extendqisi2
26181
- mov r2, r2, asl #1
26182
- str r3, [sp, #40]
26183
- bl ftl_memset
26184
- ldr r2, [r8, #12]
26185
- str fp, [r2]
26186
- ldr r0, [r8, #4]
26187
- ldr fp, [r8, #12]
26188
- ldr ip, [sp, #44]
26189
- mov r1, ip
26190
- bl js_hash
26191
- ldr r3, [sp, #40]
26192
- str r0, [fp, #4]
26193
- ldr r2, [r8, #12]
26194
- ldr r3, [r3, #1092]
26195
- ldr r3, [r3, #132]
26196
- str r3, [r2, #8]
26197
- mov r2, #1
26198
- ldr r3, [r8, #12]
26199
-.L4398:
26200
- str r2, [r3, #12]
26201
- b .L4296
26202
-.L4294:
26203
- ldr ip, .L4408+48
26204
- ldrb r2, [r3, #-3123] @ zero_extendqisi2
26205
- ldr r0, [r8, #4]
26206
- ldrh r1, [ip]
26207
- str ip, [sp, #44]
26208
- str r3, [sp, #40]
26209
- mul r2, r2, r1
26210
- ldr r1, [r3, #-172]
26211
- mov r2, r2, asl #2
26212
- bl ftl_memcpy
26213
- ldr r0, [r8, #4]
26214
- ldr ip, [sp, #44]
26215
- ldr r3, [sp, #40]
26216
- ldrh r1, [ip]
26217
- ldrb r3, [r3, #-3123] @ zero_extendqisi2
26218
- ldr ip, .L4408
2621926437 mul r3, r3, r1
26220
- ldr r1, .L4408+4
26221
- str ip, [sp, #44]
26222
- ldrb r1, [r1, #2772] @ zero_extendqisi2
26223
- cmp r1, r3, asr #6
26224
- mov r2, r3, asl #2
26225
- ldrlt r1, .L4408+60
26226
- mov r3, r2
26227
- add r0, r0, r3
26228
- ldrlth r1, [r1]
26229
- rsblt r2, r2, r1
26230
- ldr r1, [ip, #-168]
26231
- bl ftl_memcpy
26232
- ldr r3, .L4408+4
26233
- mov r1, #0
26234
- ldr r0, [r8, #12]
26235
- ldrb r2, [r3, #2772] @ zero_extendqisi2
26236
- mov r2, r2, asl #1
26237
- str r3, [sp, #40]
26238
- bl ftl_memset
26239
- ldr r2, [r8, #12]
26240
- str fp, [r2]
26241
- ldr r2, .L4408+48
26242
- ldr r0, [r8, #4]
26243
- ldr fp, [r8, #12]
26244
- ldrh r1, [r2]
26245
- ldr ip, [sp, #44]
26246
- ldrb r2, [ip, #-3123] @ zero_extendqisi2
26247
- mul r1, r2, r1
26248
- mov r1, r1, asl #2
26249
- bl js_hash
26438
+ ldrb r1, [r2, #-11] @ zero_extendqisi2
26439
+ sub r3, r3, r1
26440
+ cmp r0, r3
26441
+ blt .L4198
26442
+ ldrb r3, [r2, #-2542] @ zero_extendqisi2
26443
+ cmp r3, #0
26444
+ beq .L4199
2625026445 ldr r3, [sp, #40]
26251
- str r0, [fp, #4]
26252
- ldr r2, [r8, #12]
26253
- ldr r3, [r3, #1092]
26254
- ldr r3, [r3, #132]
26255
- str r3, [r2, #8]
26256
- b .L4296
26257
-.L4292:
26258
- ldr fp, .L4408
26259
- mov r0, r8
26446
+ ldrh r3, [r3]
26447
+ cmp r3, r4
26448
+ bcs .L4199
26449
+ tst r9, #1
26450
+ bne .L4198
26451
+.L4199:
26452
+ ldr r8, .L4307
26453
+ mvn r2, #0
26454
+ ldr r1, [sp, #16]
26455
+ ldr r10, .L4307+56
26456
+ ldr r3, [r8, #-132]
26457
+ str r2, [r3, r1, lsl #2]
26458
+ ldrb r3, [r8, #-11] @ zero_extendqisi2
26459
+ cmp r3, #2
26460
+ bne .L4200
26461
+ sub r3, r8, #3104
26462
+ ldr r2, [sp, #16]
26463
+ ldrh r1, [r3, #-14]
26464
+ ldr r3, [sp, #12]
26465
+ ldrb r3, [r3, #89] @ zero_extendqisi2
26466
+ mul r3, r1, r3
26467
+ sub r3, r3, #2
26468
+ cmp r2, r3
26469
+ ldrh r2, [r8, #-14]
26470
+ bne .L4201
26471
+ ldr r1, [r8, #-132]
26472
+ ldr r0, [r7, #4]
26473
+ bl ftl_memcpy
26474
+ ldrb r2, [r8, #-2546] @ zero_extendqisi2
26475
+ mov r1, #0
26476
+ ldr r0, [r7, #12]
26477
+ lsl r2, r2, #1
26478
+ bl ftl_memset
26479
+ ldr r3, [r7, #12]
26480
+ str r10, [r3]
26481
+ ldrh r1, [r8, #-14]
26482
+ ldr r0, [r7, #4]
26483
+ ldr r10, [r7, #12]
26484
+ bl js_hash
26485
+ ldr r2, .L4307+32
26486
+ str r0, [r10, #4]
26487
+ ldr r3, [r7, #12]
26488
+ ldr r2, [r2, #1096]
26489
+ ldr r2, [r2, #132]
26490
+ str r2, [r3, #8]
26491
+ mov r2, #0
26492
+ ldr r3, [r7, #12]
26493
+.L4301:
26494
+ str r2, [r3, #12]
26495
+.L4202:
26496
+ ldr r3, [r7, #12]
26497
+ mov r2, #0
26498
+ str r2, [r3, #16]
26499
+.L4196:
26500
+ ldr r3, .L4307
26501
+ ldr r1, [sp, #16]
26502
+ ldrb lr, [sp, #24] @ zero_extendqisi2
26503
+ ldr r2, [r3, #-3124]
26504
+ ldrb r7, [r2, r1] @ zero_extendqisi2
26505
+ add r2, sp, #80
26506
+ ldr r1, [sp, #28]
26507
+ add r0, r7, r7, lsl #1
26508
+ add ip, r2, r1, lsl #2
26509
+ ldr r2, .L4307+32
26510
+ add r1, r2, #1232
26511
+ add r0, r1, r0, lsl #4
26512
+ str r0, [ip, #-24]
26513
+ mov ip, #48
26514
+ mul ip, ip, r7
26515
+ add r1, r1, ip
26516
+ add r0, r2, ip
26517
+ mov ip, #2
26518
+ strb lr, [r0, #1277]
26519
+ strh ip, [r1, #34] @ movhi
26520
+ ldrb r1, [r3, #-3128] @ zero_extendqisi2
26521
+ cmp r1, #3
26522
+ bne .L4207
26523
+ ldrb r1, [r2, #1158] @ zero_extendqisi2
26524
+ cmp r1, #0
26525
+ beq .L4208
26526
+ ldrb r3, [r3, #-2542] @ zero_extendqisi2
26527
+ and r8, r9, #1
26528
+ add r8, r8, r4
26529
+ cmp r3, #0
26530
+ beq .L4209
26531
+ ldr r3, [sp, #40]
26532
+ ldr r2, [sp, #32]
26533
+ ldrh r3, [r3]
26534
+ cmp r3, r4
26535
+ movcs r2, #0
26536
+ andcc r2, r2, #1
26537
+ cmp r2, #0
26538
+ movne r8, r3
26539
+.L4209:
26540
+ ldr r3, .L4307+32
26541
+ mov r10, #48
26542
+ mov r1, r5
26543
+ mov r0, r9
26544
+ mla r10, r10, r7, r3
26545
+ bl __aeabi_uidiv
26546
+ ldr r3, [sp, #20]
26547
+ ldr r2, .L4307+60
26548
+ uxtah r0, r3, r0
26549
+ ldr r3, [sp, #12]
26550
+ ldrh r2, [r2]
26551
+ add r0, r3, r0, lsl #1
26552
+ ldrh r3, [r0, #96]
26553
+ mla r8, r2, r3, r8
26554
+ orr r8, r8, #50331648
26555
+ str r8, [r10, #1256]
26556
+.L4214:
26557
+ mov r2, #48
26558
+ ldr r3, .L4307+32
26559
+ mul r7, r2, r7
26560
+ add r2, r3, r7
26561
+ add r3, r3, #1232
26562
+ add r3, r3, r7
26563
+ ldr r2, [r2, #1256]
26564
+ ldrh r1, [r3, #32]
26565
+ ldr r3, .L4307
26566
+ ldr r3, [r3, #-124]
26567
+ str r2, [r3, r1, lsl #2]
26568
+ b .L4233
26569
+.L4201:
26570
+ ldrb r3, [r8, #-3127] @ zero_extendqisi2
26571
+ ldr r0, [r8, #-132]
26572
+ mul r3, r1, r3
26573
+ lsr r1, r2, #2
26574
+ add r1, r0, r1, lsl #2
26575
+ ldr r0, [r7, #4]
26576
+ rsb r3, r2, r3, lsl #2
26577
+ mov r2, r3
26578
+ str r3, [sp, #52]
26579
+ bl ftl_memcpy
26580
+ ldrb r2, [r8, #-2546] @ zero_extendqisi2
26581
+ mov r1, #0
26582
+ ldr r0, [r7, #12]
26583
+ lsl r2, r2, #1
26584
+ bl ftl_memset
26585
+ ldr r2, [r7, #12]
26586
+ ldr r3, [sp, #52]
26587
+ str r10, [r2]
26588
+ mov r1, r3
26589
+ ldr r0, [r7, #4]
26590
+ ldr r8, [r7, #12]
26591
+ bl js_hash
26592
+ ldr r2, .L4307+32
26593
+ str r0, [r8, #4]
26594
+ ldr r3, [r7, #12]
26595
+ ldr r2, [r2, #1096]
26596
+ ldr r2, [r2, #132]
26597
+ str r2, [r3, #8]
26598
+ mov r2, #1
26599
+ ldr r3, [r7, #12]
26600
+ b .L4301
26601
+.L4200:
26602
+ ldr r3, .L4307+52
26603
+ ldrb r2, [r8, #-3127] @ zero_extendqisi2
26604
+ ldr r1, [r8, #-132]
26605
+ ldrh r3, [r3, #-14]
26606
+ ldr r0, [r7, #4]
26607
+ mul r2, r2, r3
26608
+ lsl r2, r2, #2
26609
+ bl ftl_memcpy
26610
+ ldr r3, .L4307+52
26611
+ ldrb r1, [r8, #-2546] @ zero_extendqisi2
26612
+ ldr r0, [r7, #4]
26613
+ ldrh r2, [r3, #-14]
26614
+ ldrb r3, [r8, #-3127] @ zero_extendqisi2
26615
+ mul r3, r3, r2
26616
+ cmp r1, r3, asr #6
26617
+ lsl r2, r3, #2
26618
+ ldrhlt r1, [r8, #-14]
26619
+ mov r3, r2
26620
+ ldr r8, .L4307
26621
+ add r0, r0, r3
26622
+ sublt r2, r1, r2
26623
+ ldr r1, [r8, #-128]
26624
+ bl ftl_memcpy
26625
+ ldrb r2, [r8, #-2546] @ zero_extendqisi2
26626
+ mov r1, #0
26627
+ ldr r0, [r7, #12]
26628
+ lsl r2, r2, #1
26629
+ bl ftl_memset
26630
+ ldr r3, [r7, #12]
26631
+ str r10, [r3]
26632
+ sub r3, r8, #3104
26633
+ ldrh r3, [r3, #-14]
26634
+ ldrb r1, [r8, #-3127] @ zero_extendqisi2
26635
+ ldr r0, [r7, #4]
26636
+ ldr r10, [r7, #12]
26637
+ mul r1, r1, r3
26638
+ lsl r1, r1, #2
26639
+ bl js_hash
26640
+ ldr r2, .L4307+32
26641
+ str r0, [r10, #4]
26642
+ ldr r3, [r7, #12]
26643
+ ldr r2, [r2, #1096]
26644
+ ldr r2, [r2, #132]
26645
+.L4302:
26646
+ str r2, [r3, #8]
26647
+ b .L4202
26648
+.L4198:
26649
+ ldr r8, .L4307
2626026650 mov r1, #1
26261
- ldr r3, [fp, #-168]
26262
- ldr r3, [r3, r10, asl #2]
26263
- str r3, [r8, #24]
26651
+ ldr r2, [sp, #16]
26652
+ mov r0, r7
26653
+ ldr r3, [r8, #-128]
26654
+ ldr r3, [r3, r2, lsl #2]
26655
+ str r3, [r7, #24]
2626426656 bl sblk_read_page
26265
- ldr r3, [r8, #36]
26657
+ ldr r3, [r7, #36]
2626626658 cmn r3, #1
2626726659 cmpne r3, #512
26268
- bne .L4299
26269
- ldr r3, .L4408+64
26270
- ldr r2, [r8, #24]
26271
- ldrb r1, [fp, #-3130] @ zero_extendqisi2
26272
- ldrh r0, [r3]
26273
- ldr r3, .L4408+4
26274
- mov r2, r2, lsr r0
26275
- ldrb r3, [r3, #1189] @ zero_extendqisi2
26276
- rsb r3, r3, #24
26277
- rsb r3, r0, r3
26660
+ bne .L4205
26661
+ ldr r3, .L4307+64
2627826662 mvn r0, #0
26279
- bic r0, r2, r0, asl r3
26663
+ ldr r2, [r7, #24]
26664
+ ldrh r1, [r3]
26665
+ ldr r3, .L4307+32
26666
+ ldrb r3, [r3, #1153] @ zero_extendqisi2
26667
+ lsr r2, r2, r1
26668
+ rsb r3, r3, #24
26669
+ sub r3, r3, r1
26670
+ ldrb r1, [r8, #-3136] @ zero_extendqisi2
26671
+ bic r0, r2, r0, lsl r3
2628026672 bl __aeabi_uidiv
2628126673 mov r1, #0
2628226674 uxth r0, r0
2628326675 bl ftl_sblk_dump
26284
- ldr r3, [r8, #36]
26676
+ ldr r3, [r7, #36]
2628526677 cmn r3, #1
2628626678 cmpne r3, #512
26287
- ldreq r3, [r8, #12]
26288
- mvneq r2, #0
26289
- streq r2, [r3, #4]
26290
-.L4299:
26291
- ldr r3, [r8, #36]
26292
- cmn r3, #1
26679
+ bne .L4205
26680
+ ldr r3, [r7, #12]
26681
+ mvn r2, #0
26682
+ str r2, [r3, #4]
26683
+ ldr r3, [r7, #36]
26684
+ cmp r3, r2
2629326685 cmpne r3, #512
26294
- bne .L4301
26295
- ldr r1, .L4408+12
26686
+ bne .L4205
2629626687 movw r2, #1223
26297
- ldr r0, .L4408+16
26688
+ ldr r1, .L4307+8
26689
+ ldr r0, .L4307+12
2629826690 bl printk
2629926691 bl dump_stack
26300
-.L4301:
26301
- ldr r3, [r8, #12]
26302
- ldr r2, .L4408+4
26692
+.L4205:
26693
+ ldr r3, [r7, #12]
26694
+ ldr r2, .L4307+32
2630326695 ldr r1, [r3, #4]
26304
- ldr r2, [r2, #2784]
26696
+ ldr r2, [r2, #2780]
2630526697 cmp r1, r2
26698
+ ldr r1, [sp, #16]
2630626699 mvncs r2, #0
2630726700 strcs r2, [r3, #4]
26308
- ldr r3, [r8, #12]
26701
+ ldr r3, [r7, #12]
2630926702 ldr r2, [r3, #4]
26310
- ldr r3, .L4408
26311
- ldr r3, [r3, #-172]
26312
- str r2, [r3, r10, asl #2]
26313
- ldr r3, [r8, #12]
26314
- ldr r2, [r8, #24]
26315
- str r2, [r3, #8]
26316
-.L4296:
26317
- ldr r3, [r8, #12]
26318
- mov r2, #0
26319
- str r2, [r3, #16]
26320
- b .L4290
26321
-.L4304:
26322
- ldrb r2, [ip, #1197] @ zero_extendqisi2
26323
- cmp r2, #0
26324
- ldr r2, .L4408+68
26325
- umull r0, r1, r9, r2
26326
- beq .L4307
26327
- mov r1, r1, lsr #1
26328
- ldr r0, [sp, #16]
26703
+ ldr r3, .L4307
26704
+ ldr r3, [r3, #-132]
26705
+ str r2, [r3, r1, lsl #2]
26706
+ ldr r3, [r7, #12]
26707
+ ldr r2, [r7, #24]
26708
+ b .L4302
26709
+.L4208:
26710
+ ldrb r3, [r2, #1159] @ zero_extendqisi2
26711
+ ldr r1, .L4307+68
26712
+ cmp r3, #0
26713
+ umull r2, r3, r9, r1
26714
+ beq .L4211
26715
+ ldr r2, [sp, #20]
26716
+ lsr r3, r3, #1
2632926717 ldr ip, [sp, #12]
26330
- uxtah r0, r0, r1
26331
- add r1, r1, r1, asl #1
26332
- rsb r1, r1, r9
26333
- add r0, ip, r0, asl #1
26334
- ldr ip, .L4408+52
26335
- ldrh r0, [r0, #96]
26718
+ uxtah r2, r2, r3
26719
+ add r3, r3, r3, lsl #1
26720
+ add r2, ip, r2, lsl #1
26721
+ ldr ip, .L4307+60
26722
+ sub r3, r9, r3
26723
+ ldrh r2, [r2, #96]
2633626724 ldrh ip, [ip]
26337
- mla r0, ip, r0, r5
26338
- uxtah r0, r0, r1
26339
- str r0, [r3, #1260]
26340
- b .L4308
26341
-.L4307:
26342
- ldr r0, [sp, #16]
26343
- ubfx r1, r1, #1, #16
26344
- add r1, r0, r1
26345
- ldr r0, [sp, #12]
26346
- add r1, r0, r1, asl #1
26347
- ldr r0, .L4408+52
26348
- ldrh r1, [r1, #96]
26349
- ldrh r0, [r0]
26350
- mla r1, r0, r1, r5
26351
- str r1, [r3, #1260]
26352
- b .L4308
26353
-.L4303:
26354
- cmp r2, #2
26355
- bne .L4306
26356
- ldrb r2, [r1, #-3122] @ zero_extendqisi2
26725
+ mla r2, ip, r2, r4
26726
+ uxtah r3, r2, r3
26727
+.L4306:
26728
+ str r3, [r0, #1256]
26729
+ mov r0, #48
26730
+ mul r7, r0, r7
26731
+ ldr r3, .L4307+32
26732
+ umull r0, r1, r9, r1
26733
+ add r2, r3, #1232
26734
+ add r2, r2, r7
26735
+ add r7, r3, r7
26736
+ ldrh ip, [r2, #32]
26737
+ ldr r2, .L4307
26738
+ lsr r1, r1, #1
26739
+ ldr r3, [r7, #1256]
26740
+ add r1, r1, r1, lsl #1
26741
+ ldr r2, [r2, #-124]
26742
+ sub r1, r9, r1
26743
+ lsl r1, r1, #24
26744
+ add r1, r1, #16777216
26745
+ orr r1, r1, r3
26746
+ str r1, [r2, ip, lsl #2]
26747
+.L4233:
26748
+ ldr r3, .L4307
26749
+ ldrb r2, [r3, #-2542] @ zero_extendqisi2
2635726750 cmp r2, #0
26358
- ldr r2, [sp, #16]
26359
- bne .L4310
26360
- ldr r1, [sp, #12]
26361
- add r2, r2, r9
26362
- add r2, r1, r2, asl #1
26363
- ldr r1, .L4408+52
26364
- ldrh r2, [r2, #96]
26365
- ldrh r1, [r1]
26366
- mla r2, r1, r2, r5
26367
- b .L4399
26368
-.L4310:
26369
- ldr r1, [sp, #12]
26370
- add r2, r2, r9, lsr #1
26371
- add r2, r1, r2, asl #1
26372
- ldr r1, .L4408+52
26373
- ldrh r2, [r2, #96]
26374
- ldrh r1, [r1]
26375
- mla r2, r1, r2, r5
26376
- and r1, r9, #1
26377
- add r2, r2, r1
26378
-.L4399:
26379
- orr r2, r2, #33554432
26380
- str r2, [r3, #1260]
26381
- b .L4306
26382
-.L4405:
26383
- ldr r3, [sp, #32]
26384
- ldrh r3, [r3]
26385
- cmp r3, r5
26386
- bcs .L4311
26751
+ beq .L4215
26752
+ ldr r2, [sp, #40]
26753
+ ldrh r2, [r2]
26754
+ cmp r2, r4
26755
+ bcs .L4215
2638726756 tst r9, #1
26388
- beq .L4311
26389
- ldr r2, [r8, #-3120]
26390
- mvn r3, #0
26391
- ldrh r1, [sp, #36]
26392
- ldr r0, [sp, #36]
26393
- strb r3, [r2, r10]
26394
- add r2, sp, #72
26395
- add r9, r2, r9, asl #2
26396
- ldr r2, [r9, #-24]
26397
- strh r1, [r2, #32] @ movhi
26398
- ldrb r1, [r2, #1] @ zero_extendqisi2
26399
- ldr r2, [r8, #-3120]
26400
- strb r1, [r2, r0]
26401
- ldr r2, [r8, #-168]
26402
- str r3, [r2, r10, asl #2]
26403
- b .L4311
26404
-.L4406:
26405
- ldrb r3, [fp, #-3124] @ zero_extendqisi2
26406
- cmp r3, #3
26407
- bne .L4313
26408
- ldr r3, .L4408+4
26409
- ldrb r1, [r3, #1196] @ zero_extendqisi2
26410
- cmp r1, #0
26411
- ldrne r3, [sp, #24]
26412
- movne r2, #0
26413
- subne r1, r3, #1
26414
- beq .L4407
26415
-.L4315:
26416
- uxth r3, r2
26417
- add r2, r2, #1
26418
- cmp r3, r1
26419
- bge .L4400
26420
- add ip, sp, #72
26421
- add r0, sp, #72
26422
- add ip, ip, r3, asl #2
26423
- add r0, r0, r3, asl #2
26424
- ldr r3, [ip, #-20]
26425
- ldr r0, [r0, #-24]
26426
- ldrb r3, [r3, #1] @ zero_extendqisi2
26427
- strb r3, [r0]
26428
- b .L4315
26429
-.L4407:
26430
- ldrb r2, [fp, #-3116] @ zero_extendqisi2
26431
- ldr r3, [sp, #48]
26432
- cmp r2, #0
26433
- strneb r1, [r3, #44]
26434
- bne .L4401
26435
- ldr r1, [sp, #20]
26436
- cmp r1, #1
26437
- moveq r2, #9
26438
- beq .L4321
26439
- ldr r1, [sp, #20]
26440
- cmp r1, #2
26441
- moveq r2, #13
26442
-.L4321:
26443
- strb r2, [r3, #44]
26444
-.L4401:
26445
- add r1, sp, #60
26446
- mov r2, r6
26447
- add r0, sp, #48
26448
- bl sblk_xlc_prog_pages
26449
- b .L4317
26450
-.L4313:
26451
- ldrb r3, [fp, #-3122] @ zero_extendqisi2
26452
- cmp r3, #0
26453
- beq .L4322
26454
- ldrb r3, [fp, #-3121] @ zero_extendqisi2
26455
- cmp r3, #0
26456
- bne .L4323
26457
-.L4322:
26458
- ldr r3, [sp, #24]
26459
- mov r2, #0
26460
- sub r1, r3, #1
26461
- b .L4324
26462
-.L4323:
26463
- mov r1, r6
26464
- add r0, sp, #48
26465
- bl sblk_3d_mlc_prog_pages
26466
- b .L4317
26467
-.L4324:
26468
- uxth r3, r2
26469
- add r2, r2, #1
26470
- cmp r3, r1
26471
- bge .L4400
26472
- add ip, sp, #72
26473
- add r0, sp, #72
26474
- add ip, ip, r3, asl #2
26475
- add r0, r0, r3, asl #2
26476
- ldr r3, [ip, #-20]
26477
- ldr r0, [r0, #-24]
26478
- ldrb r3, [r3, #1] @ zero_extendqisi2
26479
- strb r3, [r0]
26480
- b .L4324
26481
-.L4400:
26482
- add r3, sp, #72
26757
+ beq .L4215
26758
+ ldr r1, [r3, #-3124]
2648326759 mvn r2, #0
26484
- add r1, r3, r1, asl #2
26485
- ldr r3, [r1, #-24]
26486
- smulbb r1, r4, r6
26760
+ ldr r0, [sp, #16]
26761
+ ldr ip, [sp, #48]
26762
+ strb r2, [r1, r0]
26763
+ add r1, sp, #80
26764
+ ldr r0, [sp, #28]
26765
+ add r1, r1, r0, lsl #2
26766
+ ldrh r0, [sp, #48]
26767
+ ldr r1, [r1, #-24]
26768
+ strh r0, [r1, #32] @ movhi
26769
+ ldrb r0, [r1, #1] @ zero_extendqisi2
26770
+ ldr r1, [r3, #-3124]
26771
+ strb r0, [r1, ip]
26772
+ ldr r1, [sp, #16]
26773
+ ldr r3, [r3, #-128]
26774
+ str r2, [r3, r1, lsl #2]
26775
+.L4215:
26776
+ ldr r3, [sp, #32]
26777
+ add r3, r3, #1
26778
+ str r3, [sp, #32]
26779
+ b .L4192
26780
+.L4211:
26781
+ ldr r2, [sp, #20]
26782
+ ubfx r3, r3, #1, #16
26783
+ add r3, r2, r3
26784
+ ldr r2, [sp, #12]
26785
+ add r3, r2, r3, lsl #1
26786
+ ldr r2, .L4307+60
26787
+ ldrh r3, [r3, #96]
26788
+ ldrh r2, [r2]
26789
+ mla r3, r2, r3, r4
26790
+ b .L4306
26791
+.L4207:
26792
+ cmp r1, #2
26793
+ bne .L4214
26794
+ ldrb r3, [r3, #-3126] @ zero_extendqisi2
26795
+ cmp r3, #0
26796
+ bne .L4213
26797
+ ldr r2, [sp, #20]
26798
+ ldr r3, [sp, #28]
26799
+ add r3, r3, r2
26800
+ ldr r2, [sp, #12]
26801
+ add r3, r2, r3, lsl #1
26802
+ ldr r2, .L4307+60
26803
+ ldrh r3, [r3, #96]
26804
+ ldrh r2, [r2]
26805
+ mla r3, r2, r3, r4
26806
+.L4303:
26807
+ orr r3, r3, #33554432
26808
+ str r3, [r0, #1256]
26809
+ b .L4214
26810
+.L4213:
26811
+ ldr r3, [sp, #20]
26812
+ ldr r2, [sp, #12]
26813
+ add r3, r3, r9, lsr #1
26814
+ add r3, r2, r3, lsl #1
26815
+ ldr r2, .L4307+60
26816
+ ldrh r3, [r3, #96]
26817
+ ldrh r2, [r2]
26818
+ mla r3, r2, r3, r4
26819
+ and r2, r9, #1
26820
+ add r3, r3, r2
26821
+ b .L4303
26822
+.L4220:
26823
+ add r0, sp, #80
26824
+ add ip, sp, #80
26825
+ add r0, r0, r3, lsl #2
26826
+ add r3, ip, r3, lsl #2
26827
+ ldr r3, [r3, #-20]
26828
+ ldr r0, [r0, #-24]
26829
+ ldrb r3, [r3, #1] @ zero_extendqisi2
26830
+ strb r3, [r0]
26831
+.L4219:
26832
+ uxth r3, r1
26833
+ add r1, r1, #1
26834
+ cmp r3, r2
26835
+ blt .L4220
26836
+ add r3, sp, #80
26837
+ add r2, r3, r2, lsl #2
26838
+ ldr r3, [r2, #-24]
26839
+.L4304:
26840
+ smulbb r1, r6, r5
26841
+ mvn r2, #0
2648726842 strb r2, [r3]
26488
- ldr r0, [sp, #48]
26843
+ ldr r0, [sp, #56]
2648926844 uxtb r1, r1
2649026845 bl sblk_prog_page
26491
-.L4317:
26492
- ldrb r3, [fp, #-3116] @ zero_extendqisi2
26493
- ldr r2, .L4408
26846
+ b .L4221
26847
+.L4217:
26848
+ ldrb r3, [r7, #-3126] @ zero_extendqisi2
2649426849 cmp r3, #0
26495
- ldr r3, .L4408+4
26496
- addne r4, r6, r6, asl #1
26497
- bne .L4327
26498
- ldrb r1, [r2, #-3122] @ zero_extendqisi2
26499
- cmp r1, #0
26500
- movne r4, r6, asl #1
26501
- bne .L4327
26502
- ldrb r1, [r3, #1196] @ zero_extendqisi2
26503
- cmp r1, #0
26504
- moveq r4, r6
26505
- beq .L4327
26506
- ldrb r2, [r2, #-2536] @ zero_extendqisi2
26507
- mul r4, r4, r6
26508
- cmp r2, #0
26509
- beq .L4327
26510
- ldr r1, .L4408+36
26511
- mov r2, r5, asl #1
26512
- ldrh r2, [r1, r2]
26513
- cmp r2, r5
26514
- movcc r4, r6
26515
-.L4327:
26516
- ldr r2, [r3, #2804]
26517
- ldr r3, [r2, #52]
26518
- add r3, r3, r4
26519
- str r3, [r2, #52]
26520
- ldr r2, .L4408+8
26521
- movw r3, #2102
26522
- ldrh r1, [r2, r3]
26523
- add r4, r4, r1
26524
- uxth r4, r4
26525
- strh r4, [r2, r3] @ movhi
26526
- ldr r3, .L4408+72
26527
- ldrh r2, [r3, #-10]
26528
- ldr r3, [sp, #12]
26529
- ldrb r3, [r3, #89] @ zero_extendqisi2
26530
- mul r3, r3, r2
26531
- cmp r4, r3
26532
- ldrge r3, .L4408+4
26533
- movge r2, #0
26534
- ldrge r3, [r3, #1092]
26535
- strgeh r2, [r3, #86] @ movhi
26536
- bl gc_write_completed
26537
- b .L4260
26850
+ beq .L4226
26851
+ ldrb r3, [r7, #-3125] @ zero_extendqisi2
26852
+ cmp r3, #0
26853
+ bne .L4227
26854
+.L4226:
26855
+ ldr r2, [sp, #36]
26856
+ sub r1, r2, #1
26857
+.L4228:
26858
+ uxth r2, r3
26859
+ add r3, r3, #1
26860
+ cmp r2, r1
26861
+ blt .L4229
26862
+ add r3, sp, #80
26863
+ add r1, r3, r1, lsl #2
26864
+ ldr r3, [r1, #-24]
26865
+ b .L4304
26866
+.L4227:
26867
+ mov r1, r6
26868
+ add r0, sp, #56
26869
+ bl sblk_3d_mlc_prog_pages
26870
+ b .L4221
26871
+.L4229:
26872
+ add r0, sp, #80
26873
+ add ip, sp, #80
26874
+ add r0, r0, r2, lsl #2
26875
+ add r2, ip, r2, lsl #2
26876
+ ldr r2, [r2, #-20]
26877
+ ldr r0, [r0, #-24]
26878
+ ldrb r2, [r2, #1] @ zero_extendqisi2
26879
+ strb r2, [r0]
26880
+ b .L4228
2653826881 .L4308:
26539
- mov r0, #48
26540
- ldr r3, .L4408+20
26541
- mul r0, r0, r8
26542
- ldr ip, .L4408+4
26543
- add r3, r3, r0
26544
- add r0, ip, r0
26545
- ldrh r1, [r3, #32]
26546
- ldr r3, .L4408
26547
- ldr r0, [r0, #1260]
26548
- ldr lr, [r3, #-164]
26549
- umull r2, r3, r9, r2
26550
- mov r2, r3, lsr #1
26551
- add r2, r2, r2, asl #1
26552
- rsb r2, r2, r9
26553
- mov r2, r2, asl #24
26554
- add r2, r2, #16777216
26555
- orr r2, r2, r0
26556
- str r2, [lr, r1, asl #2]
26557
- b .L4331
26558
-.L4260:
26559
- add sp, sp, #76
26560
- @ sp needed
26561
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
26562
-.L4409:
2656326882 .align 2
26564
-.L4408:
26883
+.L4307:
2656526884 .word .LANCHOR3
26566
- .word .LANCHOR0
26567
- .word .LANCHOR0+2828
26568
- .word .LANCHOR1+2736
26885
+ .word .LANCHOR0+2824
26886
+ .word .LANCHOR1+2509
2656926887 .word .LC0
26570
- .word .LANCHOR0+1236
26888
+ .word .LANCHOR0+1232
2657126889 .word .LANCHOR2
26890
+ .word .LC297
2657226891 .word .LC298
26573
- .word .LC299
26574
- .word .LANCHOR2+2120
26892
+ .word .LANCHOR0
26893
+ .word .LANCHOR2+2114
26894
+ .word .LANCHOR3-3118
2657526895 .word 1431655766
26576
- .word .LANCHOR2+3656
26577
- .word .LANCHOR3-3114
26578
- .word .LANCHOR3-3066
26579
- .word -178307901
26580
- .word .LANCHOR3+542
26581
- .word .LANCHOR3-3132
26582
- .word -1431655765
26896
+ .word .LANCHOR2+3650
2658326897 .word .LANCHOR3-3104
26898
+ .word -178307901
26899
+ .word .LANCHOR3-3074
26900
+ .word .LANCHOR3-3138
26901
+ .word -1431655765
2658426902 .fnend
2658526903 .size gc_do_copy_back, .-gc_do_copy_back
2658626904 .align 2
2658726905 .global zftl_do_gc
26906
+ .syntax unified
26907
+ .arm
26908
+ .fpu softvfp
2658826909 .type zftl_do_gc, %function
2658926910 zftl_do_gc:
2659026911 .fnstart
26591
- @ args = 0, pretend = 0, frame = 16
26912
+ @ args = 0, pretend = 0, frame = 8
2659226913 @ frame_needed = 0, uses_anonymous_args = 0
26593
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
26914
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2659426915 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
26595
- movw r3, #2792
26596
- ldr r4, .L4635+60
26597
- cmp r0, #1
26598
- .pad #44
26599
- sub sp, sp, #44
26600
- mov fp, r0
26601
- ldr r5, .L4635+32
26602
- ldrh r9, [r4, r3]
2660326916 movw r3, #2788
26604
- ldrh r7, [r4, r3]
26605
- movw r3, #2790
26606
- ldr r6, [r4, #1092]
26607
- add r7, r9, r7
26917
+ ldr r4, .L4535
26918
+ cmp r0, #1
26919
+ .pad #36
26920
+ sub sp, sp, #36
26921
+ mov r10, r0
26922
+ ldr r5, .L4535+4
26923
+ add r9, r4, #2784
2660826924 ldrh r8, [r4, r3]
26609
- uxth r7, r7
26610
- beq .L4411
26611
-.L4422:
26612
- ldrb r3, [r5, #-182] @ zero_extendqisi2
26925
+ ldrh r6, [r9]
26926
+ movw r3, #2786
26927
+ ldr r7, [r4, #1096]
26928
+ ldrh fp, [r4, r3]
26929
+ add r6, r8, r6
26930
+ uxth r6, r6
26931
+ beq .L4310
26932
+.L4322:
26933
+ ldrb r3, [r5, #-144] @ zero_extendqisi2
2661326934 cmp r3, #6
2661426935 ldrls pc, [pc, r3, asl #2]
26615
- b .L4536
26616
-.L4414:
26617
- .word .L4413
26618
- .word .L4415
26619
- .word .L4416
26620
- .word .L4417
26621
- .word .L4418
26622
- .word .L4537
26623
- .word .L4420
26624
-.L4411:
26625
- ldr r10, [r5, #548]
26626
- cmp r10, #0
26627
- bne .L4421
26628
- ldr r3, [r5, #552]
26936
+ b .L4435
26937
+.L4313:
26938
+ .word .L4312
26939
+ .word .L4314
26940
+ .word .L4315
26941
+ .word .L4316
26942
+ .word .L4317
26943
+ .word .L4318
26944
+ .word .L4319
26945
+.L4318:
26946
+ ldr r8, .L4535+40
26947
+ mov r7, #0
26948
+.L4320:
26949
+ bl gc_check_data_one_wl
26950
+ subs r9, r0, #0
26951
+ beq .L4431
26952
+ ldr r3, [r4, #1096]
26953
+ mov r6, #0
26954
+ strh r6, [r8, #52] @ movhi
26955
+ ldrh r0, [r3, #80]
26956
+ bl ftl_free_sblk
26957
+ ldr r2, [r4, #1096]
26958
+ mvn r3, #0
26959
+ ldr r1, [r4, #2800]
26960
+ ldr r0, [r4, #2832]
26961
+ strh r3, [r2, #80] @ movhi
26962
+ strh r3, [r1, #126] @ movhi
26963
+ strh r3, [r2, #130] @ movhi
26964
+ bl zbuf_free
26965
+ str r6, [r4, #2832]
26966
+ strb r6, [r5, #-144]
26967
+ b .L4532
26968
+.L4310:
26969
+ ldr r3, [r5, #-8]
2662926970 cmp r3, #0
26630
- beq .L4422
26631
-.L4421:
26632
- ldr r3, .L4635+32
26633
- sub r2, r3, #3072
26634
- ldrh r2, [r2, #-14]
26635
- cmp r7, r2, lsr #2
26636
- bls .L4422
26637
- movw r2, #2808
26971
+ bne .L4321
26972
+ ldr r2, [r5, #-4]
26973
+ cmp r2, #0
26974
+ beq .L4322
26975
+.L4321:
26976
+ ldr r2, .L4535+60
26977
+ ldrh r2, [r2, #-4]
26978
+ cmp r6, r2, lsr #2
26979
+ bls .L4322
26980
+ movw r2, #2804
2663826981 ldrh r2, [r4, r2]
26639
- cmp r2, r7
26640
- bcs .L4422
26641
- str r3, [sp, #28]
26982
+ cmp r2, r6
26983
+ bcs .L4322
26984
+ str r3, [sp, #24]
2664226985 bl timer_get_time
26643
- add r10, r10, #20
26644
- ldr r3, [sp, #28]
26645
- cmp r10, r0
26646
- ldr r10, [r5, #552]
26647
- movcc r2, #0
26648
- strcc r2, [r3, #548]
26986
+ ldr r3, [sp, #24]
26987
+ add r3, r3, #20
26988
+ cmp r3, r0
26989
+ movcc r3, #0
26990
+ strcc r3, [r5, #-8]
26991
+ ldr r3, [r5, #-4]
26992
+ add r3, r3, #20
26993
+ str r3, [sp, #24]
2664926994 bl timer_get_time
26650
- add r10, r10, #20
26651
- cmp r10, r0
26652
- ldrcc r3, .L4635+32
26653
- movcc r2, #0
26654
- strcc r2, [r3, #552]
26655
- ldr r3, [r4, #1092]
26995
+ ldr r3, [sp, #24]
26996
+ cmp r3, r0
26997
+ movcc r3, #0
26998
+ strcc r3, [r5, #-4]
26999
+ ldr r3, [r4, #1096]
2665627000 ldrh r3, [r3, #124]
2665727001 cmp r3, #0
26658
- beq .L4536
26659
- b .L4422
26660
-.L4413:
26661
- movw r2, #2794
26662
- movw r3, #2796
27002
+ bne .L4322
27003
+.L4435:
27004
+ mov r7, #16
27005
+ b .L4309
27006
+.L4312:
27007
+ movw r3, #2790
27008
+ ldrh r2, [r7, #80]
27009
+ ldrh r9, [r4, r3]
27010
+ movw r3, #2792
2666327011 ldrh r3, [r4, r3]
26664
- add r8, r8, r9
26665
- ldrh r10, [r4, r2]
26666
- ldrh r2, [r6, #80]
27012
+ add r8, r8, fp
2666727013 uxth r8, r8
26668
- add r10, r3, r10
27014
+ add r9, r9, r3
2666927015 movw r3, #65535
2667027016 cmp r2, r3
26671
- ldr r9, .L4635+60
26672
- uxth r10, r10
26673
- beq .L4425
26674
- cmp fp, #0
26675
- bne .L4426
26676
- movw r3, #2808
26677
- ldrh r3, [r9, r3]
26678
- cmp r7, r3, asl #1
26679
- bge .L4536
26680
-.L4426:
26681
- ldr fp, .L4635+32
26682
- sub r9, fp, #3088
26683
- sub r0, r9, #12
26684
- ldrh r1, [r9]
27017
+ uxth r9, r9
27018
+ beq .L4325
27019
+ cmp r10, #0
27020
+ bne .L4326
27021
+ movw r3, #2804
27022
+ ldrh r3, [r4, r3]
27023
+ cmp r6, r3, lsl #1
27024
+ bge .L4435
27025
+.L4326:
27026
+ ldr r10, .L4535+60
27027
+ ldrh r1, [r10, #-6]
27028
+ sub r0, r10, #12
2668527029 add r1, r1, #1
2668627030 uxth r1, r1
26687
- strh r1, [r9] @ movhi
27031
+ strh r1, [r10, #-6] @ movhi
2668827032 bl _list_get_gc_head_node
2668927033 movw r3, #65535
2669027034 cmp r0, r3
26691
- beq .L4428
26692
- ldr ip, [r4, #1088]
26693
- mov r2, r0, asl #1
26694
- ldr r3, [fp, #-180]
26695
- ldr r1, .L4635+60
26696
- ldrh r2, [ip, r2]
27035
+ beq .L4328
27036
+ ldr r1, [r4, #1092]
27037
+ lsl r2, r0, #1
27038
+ ldr r3, [r5, #-140]
27039
+ ldrh r2, [r1, r2]
27040
+ ldrh r1, [r10, #-8]
2669727041 add r3, r3, #1
26698
- ldrh ip, [r9, #-8]
26699
- str r3, [fp, #-180]
26700
- cmp ip, r2
26701
- bcs .L4429
26702
- movw ip, #1076
26703
- ldrh ip, [r1, ip]
26704
- cmp r3, ip, lsr #4
26705
- bls .L4428
26706
- movw r3, #2810
26707
- ldrh r3, [r1, r3]
27042
+ str r3, [r5, #-140]
27043
+ cmp r1, r2
27044
+ bcs .L4329
27045
+ movw r1, #1080
27046
+ ldrh r1, [r4, r1]
27047
+ cmp r3, r1, lsr #4
27048
+ bls .L4328
27049
+ movw r3, #2808
27050
+ ldrh r3, [r4, r3]
2670827051 cmp r3, r2
26709
- bls .L4428
26710
-.L4429:
27052
+ bls .L4328
27053
+.L4329:
27054
+ ldrb r2, [r5, #-3119] @ zero_extendqisi2
2671127055 mov r1, #0
26712
- ldrb r2, [r5, #-3115] @ zero_extendqisi2
2671327056 bl gc_add_sblk
26714
- ldr r9, .L4635+32
2671527057 cmp r0, #0
26716
- beq .L4430
27058
+ beq .L4330
2671727059 mov r3, #1
26718
- strb r3, [r9, #-182]
27060
+ strb r3, [r5, #-144]
2671927061 mov r3, #0
26720
- str r3, [r9, #-180]
26721
- b .L4536
26722
-.L4428:
27062
+ str r3, [r5, #-140]
27063
+ b .L4435
27064
+.L4328:
2672327065 mov r3, #0
26724
- strh r3, [r9] @ movhi
26725
-.L4430:
27066
+ strh r3, [r10, #-6] @ movhi
27067
+.L4330:
2672627068 cmp r8, #15
2672727069 movls r9, #2
26728
- bls .L4431
26729
- ldr r2, .L4635
26730
- movw r3, #2798
26731
- ldrh r3, [r4, r3]
26732
- ldrh r2, [r2, #-12]
26733
- cmp r3, r2
26734
- movls r3, #0
26735
- movhi r3, #1
26736
- cmp r10, #0
26737
- movne r10, r3
26738
- orreq r10, r3, #1
26739
- cmp r10, #0
27070
+ bls .L4331
27071
+ movw r3, #2794
27072
+ clz r9, r9
27073
+ ldrh r2, [r4, r3]
27074
+ lsr r9, r9, #5
27075
+ ldrh r3, [r10, #-2]
27076
+ cmp r2, r3
27077
+ orrhi r9, r9, #1
27078
+ cmp r9, #0
2674027079 movne r9, #2
2674127080 moveq r9, #1
26742
-.L4431:
26743
- ldr r3, .L4635+4
27081
+.L4331:
27082
+ ldr r3, .L4535+8
2674427083 ldr r3, [r3]
2674527084 tst r3, #256
26746
- beq .L4432
26747
- ldr r3, [r4, #1092]
26748
- ldrb r2, [r5, #-3115] @ zero_extendqisi2
26749
- str r8, [sp]
26750
- ldrh r1, [r3, #124]
26751
- ldr r0, .L4635+8
26752
- str r1, [sp, #4]
27085
+ beq .L4332
27086
+ ldrh r1, [r7, #80]
27087
+ ldr r3, [r4, #1096]
27088
+ ldrb r2, [r5, #-3119] @ zero_extendqisi2
27089
+ str r1, [sp, #16]
27090
+ ldrh r1, [r3, #122]
27091
+ ldr r0, .L4535+12
27092
+ str r1, [sp, #12]
2675327093 ldrh r1, [r3, #120]
2675427094 str r1, [sp, #8]
2675527095 movw r1, #2807
26756
- ldrh r3, [r3, #122]
26757
- str r3, [sp, #12]
26758
- ldrh r3, [r6, #80]
26759
- str r3, [sp, #16]
26760
- mov r3, r7
27096
+ ldrh r3, [r3, #124]
27097
+ str r8, [sp]
27098
+ str r3, [sp, #4]
27099
+ mov r3, r6
2676127100 bl printk
26762
-.L4432:
26763
- ldrb r0, [r5, #-3115] @ zero_extendqisi2
27101
+.L4332:
27102
+ mov r2, #1
2676427103 mov r1, r9
26765
- mov r2, #1
27104
+ ldrb r0, [r5, #-3119] @ zero_extendqisi2
2676627105 bl gc_search_src_blk
2676727106 cmp r0, #0
26768
- ble .L4433
26769
-.L4434:
27107
+ ble .L4333
27108
+.L4334:
2677027109 mov r3, #1
26771
- b .L4631
26772
-.L4433:
26773
- ldr r3, .L4635+32
26774
- mov r1, #3
27110
+.L4533:
27111
+ strb r3, [r5, #-144]
27112
+ b .L4435
27113
+.L4333:
2677527114 mov r2, #1
26776
- ldrb r0, [r3, #-3115] @ zero_extendqisi2
27115
+ mov r1, #3
27116
+ ldrb r0, [r5, #-3119] @ zero_extendqisi2
2677727117 bl gc_search_src_blk
2677827118 cmp r0, #0
26779
- bgt .L4434
26780
- b .L4536
26781
-.L4425:
26782
- cmp fp, #1
26783
- bne .L4435
26784
- ldr r3, [r9, #2804]
27119
+ bgt .L4334
27120
+ b .L4435
27121
+.L4325:
27122
+ cmp r10, #1
27123
+ bne .L4335
27124
+ ldr r3, [r4, #2800]
2678527125 ldrh r3, [r3, #150]
2678627126 cmp r3, #0
26787
- beq .L4436
26788
- movw r3, #2792
26789
- ldrh r3, [r9, r3]
27127
+ beq .L4336
27128
+ movw r3, #2788
27129
+ ldrh r3, [r4, r3]
2679027130 cmp r3, #8
26791
- bls .L4436
27131
+ bls .L4336
2679227132 bl gc_ink_check_sblk
26793
-.L4436:
27133
+.L4336:
2679427134 bl gc_scan_static_data
26795
- ldr r3, [r4, #1092]
27135
+ ldr r3, [r4, #1096]
2679627136 ldrh r3, [r3, #122]
2679727137 cmp r3, #0
26798
- beq .L4437
26799
-.L4438:
27138
+ beq .L4337
27139
+.L4338:
2680027140 mov r3, #1
26801
- strb r3, [r5, #-3115]
26802
- b .L4631
26803
-.L4437:
27141
+ strb r3, [r5, #-3119]
27142
+ b .L4533
27143
+.L4337:
2680427144 bl gc_static_wearleveling
26805
- cmp r0, #0
26806
- bne .L4438
27145
+ subs r7, r0, #0
27146
+ bne .L4338
2680727147 bl gc_block_vpn_scan
2680827148 cmp r8, #0
26809
- beq .L4439
26810
- cmp r7, r10
26811
- ldr r6, .L4635
26812
- bcs .L4440
26813
- ldrh r3, [r6, #-14]
26814
- cmp r3, r7
26815
- bhi .L4441
26816
-.L4440:
26817
- ldrh r2, [r6, #-14]
26818
- add r3, r7, r10
27149
+ ldr fp, .L4535+60
27150
+ beq .L4339
27151
+ cmp r6, r9
27152
+ bcs .L4340
27153
+ ldrh r3, [fp, #-4]
27154
+ cmp r3, r6
27155
+ bhi .L4341
27156
+.L4340:
27157
+ ldrh r2, [fp, #-4]
27158
+ add r3, r6, r9
2681927159 cmp r3, r2
26820
- blt .L4441
26821
- movw r3, #2798
27160
+ blt .L4341
27161
+ movw r3, #2794
2682227162 ldrh r2, [r4, r3]
26823
- ldr r3, .L4635
26824
- ldrh r3, [r3, #-12]
27163
+ ldrh r3, [fp, #-2]
2682527164 cmp r2, r3
26826
- bcc .L4439
26827
-.L4441:
26828
- ldr r0, .L4635+12
26829
- mov r1, #16
26830
- mov ip, #1
26831
- strb ip, [r5, #-3115]
26832
- str ip, [sp, #28]
26833
- bl _list_get_gc_head_node
27165
+ bcc .L4339
27166
+.L4341:
27167
+ mov r1, #1
27168
+ mov r0, #16
27169
+ strb r1, [r5, #-3119]
27170
+ str r1, [sp, #24]
27171
+ bl zftl_get_gc_node.part.10
2683427172 movw r2, #65535
26835
- ldr r9, .L4635+32
2683627173 cmp r0, r2
26837
- beq .L4442
26838
- ldr r2, [r4, #1088]
26839
- mov r3, r0, asl #1
26840
- ldr ip, [sp, #28]
27174
+ beq .L4342
27175
+ ldr r2, [r4, #1092]
27176
+ lsl r3, r0, #1
27177
+ ldr r1, [sp, #24]
2684127178 ldrh r3, [r2, r3]
26842
- ldrh r2, [r9, #-176]
27179
+ ldrh r2, [r5, #-136]
2684327180 cmp r3, r2
2684427181 movcs r3, #0
2684527182 movcc r3, #1
26846
- cmp r7, #2
27183
+ cmp r6, #2
2684727184 movls r3, #0
2684827185 cmp r3, #0
26849
- beq .L4442
27186
+ beq .L4342
2685027187 mov r2, #0
26851
- mov r1, ip
26852
- strb r2, [r9, #-3115]
26853
- str r2, [r9, #-180]
27188
+ strb r2, [r5, #-3119]
27189
+ str r2, [r5, #-140]
2685427190 bl gc_add_sblk
2685527191 cmp r0, #0
26856
- bne .L4434
26857
-.L4442:
26858
- ldr r9, .L4635+32
27192
+ bne .L4334
27193
+.L4342:
2685927194 mov r1, #0
26860
- sub r0, r9, #3104
27195
+ ldr r0, .L4535+16
2686127196 bl _list_get_gc_head_node
2686227197 movw r2, #65535
2686327198 cmp r0, r2
26864
- beq .L4443
26865
- ldr r2, [r4, #1088]
26866
- mov r3, r0, asl #1
27199
+ beq .L4343
27200
+ ldr r2, [r4, #1092]
27201
+ lsl r3, r0, #1
2686727202 ldrh r3, [r2, r3]
26868
- ldrh r2, [r9, #-176]
27203
+ ldrh r2, [r5, #-136]
2686927204 cmp r3, r2
2687027205 movcs r3, #0
2687127206 movcc r3, #1
26872
- cmp r7, #2
27207
+ cmp r6, #2
2687327208 movls r3, #0
2687427209 cmp r3, #0
26875
- beq .L4443
27210
+ beq .L4343
2687627211 mov r2, #0
2687727212 mov r1, #1
26878
- strb r2, [r9, #-3115]
26879
- str r2, [r9, #-180]
27213
+ strb r2, [r5, #-3119]
27214
+ str r2, [r5, #-140]
2688027215 bl gc_add_sblk
2688127216 cmp r0, #0
26882
- bne .L4434
26883
-.L4443:
26884
- ldr r1, .L4635+32
26885
- mov r9, #0
26886
- ldrh r3, [r5, #-176]
26887
- sub r2, r1, #3088
26888
- ldr ip, .L4635+60
27217
+ bne .L4334
27218
+.L4343:
27219
+ ldrh r3, [r5, #-136]
27220
+ ldrh r2, [fp, #-8]
27221
+ ldr r0, .L4535+16
2688927222 add r3, r3, #1
26890
- ldrh r2, [r2, #-8]
27223
+ ldr r1, [r5, #-140]
2689127224 uxth r3, r3
26892
- strh r3, [r5, #-176] @ movhi
27225
+ str r2, [sp, #28]
2689327226 cmp r3, r2, lsr #5
26894
- movhi r3, #4
26895
- strhih r3, [r1, #-176] @ movhi
26896
- ldr r3, .L4635+32
26897
- ldr r1, [r5, #-180]
26898
- sub r0, r3, #3104
27227
+ strh r3, [r5, #-136] @ movhi
2689927228 add r1, r1, #1
26900
- str r1, [r5, #-180]
26901
- strh r9, [r0, #-8] @ movhi
26902
- strh r9, [r0, #-6] @ movhi
26903
- strh r9, [r0, #-4] @ movhi
26904
- movw r0, #1076
27229
+ movhi r3, #4
27230
+ str r1, [r5, #-140]
27231
+ strhhi r3, [r5, #-136] @ movhi
27232
+ mov r3, #0
27233
+ strh r3, [r0, #-8] @ movhi
27234
+ strh r3, [r0, #-6] @ movhi
27235
+ strh r3, [r0, #-4] @ movhi
27236
+ movw r0, #1080
2690527237 ldrh r0, [r4, r0]
2690627238 cmp r1, r0, lsr #5
26907
- bls .L4445
26908
- movw r1, #2798
26909
- ldrh r1, [ip, r1]
27239
+ bls .L4345
27240
+ movw r1, #2794
27241
+ ldrh r1, [r4, r1]
2691027242 cmp r1, r8
26911
- bls .L4445
26912
- mov r1, r9
26913
- ldr r0, .L4635+16
26914
- str ip, [sp, #36]
26915
- str r3, [sp, #32]
26916
- str r2, [sp, #28]
27243
+ bls .L4345
27244
+ mov r1, r3
27245
+ sub r0, fp, #12
27246
+ str r3, [sp, #24]
2691727247 bl _list_get_gc_head_node
2691827248 movw r1, #65535
27249
+ ldr r3, [sp, #24]
2691927250 cmp r0, r1
26920
- beq .L4541
26921
- ldr ip, [sp, #36]
26922
- mov r0, r0, asl #1
26923
- ldr r3, [sp, #32]
2692427251 ldr r2, [sp, #28]
26925
- ldr r1, [ip, #1088]
26926
- ldrh r0, [r1, r0]
26927
- ldrb r1, [r3, #-3123] @ zero_extendqisi2
26928
- mul r2, r1, r2
26929
- cmp r0, r2
26930
- strle r9, [r3, #-180]
26931
- ldrleb r0, [r3, #-3115] @ zero_extendqisi2
26932
- movle r1, #2
26933
- bgt .L4541
26934
- b .L4624
26935
-.L4445:
26936
- movw r2, #2798
26937
- ldr r3, .L4635+60
26938
- ldrh r1, [r4, r2]
26939
- ldrh r2, [r6, #-12]
27252
+ bne .L4346
27253
+.L4519:
27254
+ mov r7, #16
27255
+ b .L4347
27256
+.L4346:
27257
+ ldr r1, [r4, #1092]
27258
+ lsl r0, r0, #1
27259
+ ldrh r1, [r1, r0]
27260
+ ldrb r0, [r5, #-3127] @ zero_extendqisi2
27261
+ mul r2, r2, r0
2694027262 cmp r1, r2
26941
- ldrcs r3, .L4635+32
26942
- movcs r1, #2
26943
- movcs r2, #1
26944
- ldrcsb r0, [r3, #-3115] @ zero_extendqisi2
26945
- bcs .L4623
26946
-.L4448:
26947
- movw r2, #2794
26948
- ldrh r2, [r3, r2]
26949
- cmp r2, #0
26950
- bne .L4449
26951
- movw r2, #2796
26952
- ldrh r3, [r3, r2]
26953
- cmp r3, #8
26954
- bls .L4450
26955
-.L4449:
26956
- ldrb r0, [r5, #-3115] @ zero_extendqisi2
26957
- mov r1, #1
26958
-.L4624:
26959
- mov r2, #4
26960
-.L4623:
27263
+ strle r3, [r5, #-140]
27264
+ movle r2, #4
27265
+ bgt .L4519
27266
+.L4527:
27267
+ mov r1, #2
27268
+.L4518:
27269
+ ldrb r0, [r5, #-3119] @ zero_extendqisi2
2696127270 bl gc_search_src_blk
2696227271 uxth r0, r0
2696327272 cmp r0, #0
26964
- bne .L4434
26965
- b .L4541
26966
-.L4450:
26967
- ldr r2, .L4635+56
27273
+ beq .L4519
27274
+ b .L4334
27275
+.L4345:
27276
+ movw r3, #2794
27277
+ ldrh r2, [r4, r3]
27278
+ ldrh r3, [fp, #-2]
27279
+ cmp r2, r3
27280
+ movcs r2, #1
27281
+ bcs .L4527
27282
+.L4350:
27283
+ movw r3, #2790
27284
+ ldrh r3, [r4, r3]
27285
+ cmp r3, #0
27286
+ bne .L4351
27287
+ movw r3, #2792
27288
+ ldrh r3, [r4, r3]
27289
+ cmp r3, #8
27290
+ bls .L4352
27291
+.L4351:
27292
+ mov r2, #4
27293
+ mov r1, #1
27294
+ b .L4518
27295
+.L4352:
27296
+ ldr r2, .L4535+40
2696827297 movw r3, #2106
2696927298 ldrh r3, [r2, r3]
2697027299 cmp r3, #0
26971
- movne r6, #16
26972
- moveq r6, #0
26973
- b .L4451
26974
-.L4439:
26975
- ldr r3, .L4635+32
26976
- sub r2, r3, #3088
26977
- ldrh r1, [r2, #-8]
26978
- ldrh r2, [r5, #-176]
26979
- cmp r2, r1, lsr #5
26980
- movcs r2, #4
26981
- strcsh r2, [r3, #-176] @ movhi
26982
- b .L4541
26983
-.L4435:
26984
- movw r3, #2808
26985
- ldrh r3, [r9, r3]
26986
- cmp r3, r7
26987
- bcs .L4541
26988
- ldr r3, [r9, #1092]
26989
- ldrh r3, [r3, #124]
27300
+ bne .L4519
27301
+.L4347:
27302
+ ldr r3, [r4, #2812]
2699027303 cmp r3, #0
26991
- beq .L4536
26992
-.L4541:
26993
- mov r6, #16
26994
-.L4451:
26995
- ldr r3, [r4, #2820]
26996
- cmp r3, #0
26997
- beq .L4453
26998
- ldr r3, .L4635+60
26999
- cmp r7, #15
27000
- mov r2, #0
27001
- ldr r0, .L4635+16
27304
+ beq .L4353
27305
+ mov r3, #0
2700227306 mov r1, #0
27003
- str r2, [r3, #2820]
27004
- movhi r3, #0
27005
- movls r3, #1
27006
- cmp r8, r2
27007
- moveq r3, #0
27008
- cmp r3, r2
27307
+ str r3, [r4, #2812]
27308
+ subs r3, r8, r3
2700927309 movne r3, #1
27010
- strb r3, [r5, #-3115]
27310
+ cmp r6, #15
27311
+ movhi r3, #0
27312
+ ldr r0, .L4535+20
27313
+ cmp r3, #0
27314
+ movne r3, #1
27315
+ strb r3, [r5, #-3119]
2701127316 bl _list_get_gc_head_node
2701227317 movw r2, #65535
2701327318 cmp r0, r2
27014
- beq .L4456
27015
- ldr r2, [r4, #1088]
27016
- mov r3, r0, asl #1
27319
+ beq .L4356
27320
+ ldr r2, [r4, #1092]
27321
+ lsl r3, r0, #1
2701727322 ldrh r3, [r2, r3]
2701827323 cmp r3, #8
27019
- bhi .L4456
27020
- ldr r3, .L4635+60
27021
- mov r2, #1
27324
+ bhi .L4356
27325
+ mov r3, #1
27326
+ ldrb r2, [r5, #-3119] @ zero_extendqisi2
2702227327 mov r1, #0
27023
- str r2, [r3, #2820]
27024
- ldr r3, .L4635+32
27025
- ldrb r2, [r3, #-3115] @ zero_extendqisi2
27328
+ str r3, [r4, #2812]
2702627329 bl gc_add_sblk
2702727330 cmp r0, #0
27028
- bne .L4434
27029
-.L4456:
27030
- ldr r9, .L4635+32
27331
+ bne .L4334
27332
+.L4356:
2703127333 mov r1, #0
27032
- sub r0, r9, #3104
27334
+ ldr r0, .L4535+16
2703327335 bl _list_get_gc_head_node
2703427336 movw r2, #65535
2703527337 cmp r0, r2
27036
- beq .L4457
27037
- ldr r2, [r4, #1088]
27038
- mov r3, r0, asl #1
27039
- ldrh r3, [r2, r3]
27040
- cmp r3, #4
27041
- bhi .L4457
27042
- ldr r3, .L4635+60
27043
- mov r2, #1
27044
- mov r1, #0
27045
- str r2, [r3, #2820]
27046
- ldrb r2, [r9, #-3115] @ zero_extendqisi2
27047
- bl gc_add_sblk
27048
- cmp r0, #0
27049
- bne .L4434
27050
-.L4457:
27051
- ldr r0, .L4635+12
27052
- mov r1, #0
27053
- bl _list_get_gc_head_node
27054
- movw r2, #65535
27055
- cmp r0, r2
27056
- beq .L4453
27057
- ldr r2, [r4, #1088]
27058
- mov r3, r0, asl #1
27059
- ldrh r3, [r2, r3]
27060
- cmp r3, #4
27061
- bhi .L4453
27062
- ldr r3, .L4635+60
27063
- mov r1, #1
27064
- str r1, [r3, #2820]
27065
- ldr r3, .L4635+32
27066
- ldrb r2, [r3, #-3115] @ zero_extendqisi2
27067
- bl gc_add_sblk
27068
- cmp r0, #0
27069
- bne .L4434
27070
-.L4453:
27338
+ beq .L4357
2707127339 ldr r2, [r4, #1092]
27072
- mov r1, #1
27073
- ldr r9, .L4635+32
27074
- ldr r3, .L4635+60
27075
- ldrh ip, [r2, #124]
27076
- strb r1, [r5, #-3115]
27077
- cmp ip, #0
27078
- strneb r1, [r9, #-182]
27079
- movne r3, #0
27080
- strneb r3, [r9, #-3115]
27081
- bne .L4459
27082
- movw r2, #2808
27083
- ldrh r0, [r3, r2]
27084
- cmp r7, r0
27085
- bcs .L4460
27086
- cmp r8, #0
27087
- beq .L4461
27088
- cmp r8, #16
27089
- bls .L4462
27090
- sub r2, r9, #3072
27091
- movw r0, #2798
27092
- ldrh r0, [r3, r0]
27093
- ldrh r2, [r2, #-12]
27340
+ lsl r3, r0, #1
27341
+ ldrh r3, [r2, r3]
27342
+ cmp r3, #4
27343
+ bhi .L4357
27344
+ mov r3, #1
27345
+ ldrb r2, [r5, #-3119] @ zero_extendqisi2
27346
+ mov r1, #0
27347
+ str r3, [r4, #2812]
27348
+ bl gc_add_sblk
27349
+ cmp r0, #0
27350
+ bne .L4334
27351
+.L4357:
27352
+ mov r0, #0
27353
+ bl zftl_get_gc_node.part.10
27354
+ movw r2, #65535
2709427355 cmp r0, r2
27095
- bhi .L4462
27096
- mov r0, r1
27356
+ beq .L4353
27357
+ ldr r2, [r4, #1092]
27358
+ lsl r3, r0, #1
27359
+ ldrh r3, [r2, r3]
27360
+ cmp r3, #4
27361
+ bhi .L4353
27362
+ mov r1, #1
27363
+ ldrb r2, [r5, #-3119] @ zero_extendqisi2
27364
+ str r1, [r4, #2812]
27365
+ bl gc_add_sblk
27366
+ cmp r0, #0
27367
+ bne .L4334
27368
+.L4353:
27369
+ ldr r3, [r4, #1096]
27370
+ mov r1, #1
27371
+ strb r1, [r5, #-3119]
27372
+ ldrh fp, [r3, #124]
27373
+ cmp fp, #0
27374
+ movne r3, #0
27375
+ strbne r1, [r5, #-144]
27376
+ strbne r3, [r5, #-3119]
27377
+ bne .L4309
27378
+ movw r3, #2804
27379
+ ldrh r2, [r4, r3]
27380
+ cmp r6, r2
27381
+ bcs .L4359
27382
+ cmp r8, #0
27383
+ beq .L4360
27384
+ cmp r8, #16
27385
+ bls .L4361
27386
+ ldr r6, .L4535+60
27387
+ movw r3, #2794
27388
+ ldrh r2, [r4, r3]
27389
+ ldrh r3, [r6, #-2]
27390
+ cmp r2, r3
27391
+ bhi .L4361
2709727392 mov r2, #4
27098
- str ip, [sp, #32]
27099
- str r3, [sp, #28]
27393
+ mov r0, r1
2710027394 bl gc_search_src_blk
2710127395 uxth r0, r0
27102
- ldr r3, [sp, #28]
2710327396 cmp r0, #0
27104
- ldr ip, [sp, #32]
27105
- beq .L4628
27106
- sub r7, r9, #3088
27107
- mov r1, ip
27108
- sub r0, r7, #12
27109
- str r3, [sp, #28]
27397
+ bne .L4362
27398
+.L4523:
27399
+ ldrb r0, [r5, #-3119] @ zero_extendqisi2
27400
+ mov r2, #4
27401
+ mov r1, #3
27402
+.L4525:
27403
+ bl gc_search_src_blk
27404
+ uxth r0, r0
27405
+.L4363:
27406
+ cmp r0, #0
27407
+ bne .L4365
27408
+ b .L4309
27409
+.L4339:
27410
+ ldrh r3, [r5, #-136]
27411
+ ldrh r2, [fp, #-8]
27412
+ cmp r3, r2, lsr #5
27413
+ movcs r3, #4
27414
+ strhcs r3, [r5, #-136] @ movhi
27415
+ b .L4519
27416
+.L4335:
27417
+ movw r3, #2804
27418
+ ldrh r3, [r4, r3]
27419
+ cmp r3, r6
27420
+ bcs .L4519
27421
+ ldr r3, [r4, #1096]
27422
+ ldrh r3, [r3, #124]
27423
+ cmp r3, #0
27424
+ beq .L4435
27425
+ b .L4519
27426
+.L4362:
27427
+ mov r1, fp
27428
+ sub r0, r6, #12
2711027429 bl _list_get_gc_head_node
27111
- movw r2, #65535
27112
- cmp r0, r2
27113
- beq .L4534
27114
- ldr r3, [sp, #28]
27115
- mov r1, r0, asl #1
27116
- ldr r2, [r9, #-180]
27117
- ldr ip, [r3, #1088]
27118
- add r2, r2, #1
27119
- str r2, [r9, #-180]
27120
- ldrh r1, [ip, r1]
27121
- ldrh ip, [r7, #-8]
27122
- cmp ip, r1
27123
- bcs .L4466
27124
- movw ip, #1076
27125
- ldrh ip, [r3, ip]
27126
- cmp r2, ip, lsr #4
27127
- bls .L4534
27128
- movw r2, #2810
27129
- ldrh r3, [r3, r2]
27130
- cmp r3, r1
27131
- bls .L4534
27132
-.L4466:
27430
+ movw r3, #65535
27431
+ cmp r0, r3
27432
+ beq .L4365
27433
+ ldr r1, [r4, #1092]
27434
+ lsl r2, r0, #1
27435
+ ldr r3, [r5, #-140]
27436
+ ldrh r2, [r1, r2]
27437
+ ldrh r1, [r6, #-8]
27438
+ add r3, r3, #1
27439
+ str r3, [r5, #-140]
27440
+ cmp r1, r2
27441
+ bcs .L4366
27442
+ movw r1, #1080
27443
+ ldrh r1, [r4, r1]
27444
+ cmp r3, r1, lsr #4
27445
+ bls .L4365
27446
+ movw r3, #2808
27447
+ ldrh r3, [r4, r3]
27448
+ cmp r3, r2
27449
+ bls .L4365
27450
+.L4366:
27451
+ ldrb r2, [r5, #-3119] @ zero_extendqisi2
2713327452 mov r1, #0
27134
- ldrb r2, [r5, #-3115] @ zero_extendqisi2
2713527453 bl gc_add_sblk
2713627454 mov r3, #1
27137
- str r3, [r4, #2820]
27455
+ str r3, [r4, #2812]
2713827456 mov r3, #0
27139
- str r3, [r5, #-180]
27140
- b .L4534
27141
-.L4462:
27142
- mov r0, #1
27457
+ str r3, [r5, #-140]
27458
+.L4365:
27459
+ mov r3, #1
27460
+ b .L4526
27461
+.L4361:
27462
+ mov r2, #1
2714327463 mov r1, #2
27144
- mov r2, r0
27464
+ mov r0, r2
27465
+.L4529:
2714527466 bl gc_search_src_blk
2714627467 uxth r0, r0
2714727468 cmp r0, #0
27148
- ldreqb r0, [r5, #-3115] @ zero_extendqisi2
27149
- bne .L4534
27150
- b .L4627
27151
-.L4461:
27152
- cmp r7, #16
27153
- strb r8, [r9, #-3115]
27154
- mov r0, r8
27155
- bhi .L4627
27469
+ bne .L4365
27470
+ b .L4523
27471
+.L4360:
27472
+ cmp r6, #16
27473
+ strb r8, [r5, #-3119]
27474
+ movhi r2, #4
27475
+ movhi r1, #3
27476
+ movhi r0, r8
27477
+ bhi .L4525
2715627478 mov r2, r1
27157
- bl gc_search_src_blk
27158
- uxth r0, r0
27159
- cmp r0, #0
27160
- bne .L4534
27161
-.L4628:
27162
- ldrb r0, [r9, #-3115] @ zero_extendqisi2
27163
-.L4627:
27164
- mov r1, #3
27165
- mov r2, #4
27166
- bl gc_search_src_blk
27167
- uxth r0, r0
27168
- b .L4464
27169
-.L4460:
27170
- cmp fp, #1
27171
- bne .L4459
27172
- cmp r7, r0, asl #1
27173
- bge .L4469
27174
- cmp r10, r8, lsr #1
27175
- bcs .L4470
27176
- sub r9, r9, #3072
27177
- movw r1, #2798
27178
- ldrh r0, [r3, r1]
27179
- ldrh r1, [r9, #-12]
27479
+ mov r0, r8
27480
+ b .L4529
27481
+.L4359:
27482
+ cmp r10, #1
27483
+ bne .L4309
27484
+ cmp r6, r2, lsl #1
27485
+ bge .L4369
27486
+ cmp r9, r8, lsr #1
27487
+ bcs .L4370
27488
+ ldr r2, .L4535+60
27489
+ movw r1, #2794
27490
+ ldrh r0, [r4, r1]
27491
+ ldrh r1, [r2, #-2]
2718027492 cmp r0, r1
27181
- ldrcch r1, [r9, #-14]
27182
- movcc r1, r1, lsr #2
27183
- strcch r1, [r3, r2] @ movhi
27184
- bcc .L4459
27185
-.L4470:
27186
- ldr r0, .L4635+12
27187
- mov r1, #8
27188
- bl _list_get_gc_head_node
27493
+ ldrhcc r2, [r2, #-4]
27494
+ lsrcc r2, r2, #2
27495
+ strhcc r2, [r4, r3] @ movhi
27496
+ bcc .L4309
27497
+.L4370:
27498
+ mov r0, #8
27499
+ bl zftl_get_gc_node.part.10
2718927500 movw r2, #65535
27190
- ldr r9, .L4635+32
2719127501 cmp r0, r2
27192
- beq .L4471
27193
- ldr r2, [r4, #1088]
27194
- mov r3, r0, asl #1
27502
+ beq .L4371
27503
+ ldr r2, [r4, #1092]
27504
+ lsl r3, r0, #1
2719527505 ldrh r3, [r2, r3]
2719627506 cmp r3, #3
2719727507 movhi r3, #0
2719827508 movls r3, #1
27199
- cmp r7, #0
27509
+ cmp r6, #0
2720027510 moveq r3, #0
2720127511 cmp r3, #0
27202
- beq .L4471
27512
+ beq .L4371
2720327513 mov r2, #0
2720427514 mov r1, #1
27205
- strb r2, [r9, #-3115]
27515
+ strb r2, [r5, #-3119]
2720627516 bl gc_add_sblk
2720727517 cmp r0, #0
27208
- bne .L4634
27209
-.L4471:
27210
- ldr r0, .L4635+16
27518
+ bne .L4365
27519
+.L4371:
2721127520 mov r1, #0
27521
+ ldr r0, .L4535+20
2721227522 bl _list_get_gc_head_node
2721327523 movw r3, #65535
27214
- ldr r9, .L4635+32
27215
- cmp r0, r3
2721627524 mov fp, r0
27217
- bne .L4472
27218
-.L4477:
27525
+ cmp r0, r3
27526
+ ldr r10, .L4535+60
27527
+ bne .L4372
27528
+.L4377:
2721927529 cmp r8, #1
27220
- bhi .L4473
27221
- b .L4474
27222
-.L4472:
27223
- movw r1, #1076
27224
- ldr r3, [r9, #-180]
27225
- ldrh r1, [r4, r1]
27226
- mov ip, r0, asl #1
27227
- add r3, r3, #1
27228
- ldr r2, .L4635+60
27229
- str r3, [r9, #-180]
27230
- cmp r3, r1, lsr #4
27231
- bls .L4475
27232
- ldr r3, [r2, #1088]
27233
- mov r1, #0
27234
- str r1, [r9, #-180]
27235
- ldrh lr, [r3, ip]
27236
- movw r3, #2810
27237
- ldrh r3, [r2, r3]
27238
- cmp lr, r3
27239
- bcs .L4475
27240
- mov r3, #1
27241
- str ip, [sp, #32]
27242
- mov r2, r3
27243
- strb r3, [r9, #-3115]
27244
- str r3, [sp, #28]
27245
- bl gc_add_sblk
27246
- cmp r0, #0
27247
- ldr r3, [sp, #28]
27248
- ldr ip, [sp, #32]
27249
- bne .L4633
27250
-.L4475:
27251
- ldr r2, [r4, #1088]
27252
- ldr r9, .L4635+32
27253
- ldr r3, .L4635+60
27254
- ldrh r1, [r2, ip]
27255
- sub r2, r9, #3088
27256
- ldrh r2, [r2, #-8]
27257
- cmp r1, r2, lsr #1
27258
- bhi .L4476
27259
- mov r0, fp
27260
- mov r1, #1
27261
- mov r2, #0
27262
- bl gc_add_sblk
27263
-.L4634:
27264
- mov r3, #1
27265
-.L4633:
27266
- strb r3, [r9, #-182]
27267
- b .L4459
27268
-.L4476:
27269
- movw r2, #2794
27270
- movw r0, #2796
27271
- ldrh r0, [r3, r0]
27272
- sub r9, r9, #3072
27273
- ldrh r2, [r3, r2]
27274
- add r2, r2, r0
27275
- ldrh r0, [r9, #-14]
27276
- cmp r2, r0, asl #1
27277
- ble .L4477
27278
- movw r2, #2810
27279
- ldrh r3, [r3, r2]
27280
- cmp r3, r1
27281
- bcc .L4474
27282
- b .L4477
27283
-.L4473:
27284
- ldr r9, .L4635+32
27285
- cmp r8, #16
27286
- mov r0, #1
27287
- strb r0, [r5, #-3115]
27288
- sub r8, r9, #3072
27289
- bls .L4478
27290
- movw r3, #2798
27291
- ldrh r2, [r4, r3]
27292
- ldrh r3, [r8, #-12]
27293
- cmp r2, r3
27294
- bhi .L4478
27295
- mov r1, r0
27296
- mov r2, #4
27297
- bl gc_search_src_blk
27298
- uxth r0, r0
27299
- cmp r0, #0
27300
- ldreqb r0, [r9, #-3115] @ zero_extendqisi2
27301
- bne .L4479
27302
- b .L4626
27303
-.L4478:
27304
- mov r0, #1
27305
- mov r1, #2
27306
- mov r2, r0
27307
- bl gc_search_src_blk
27308
- uxth r0, r0
27309
- cmp r0, #0
27310
- bne .L4479
27311
- ldrb r0, [r5, #-3115] @ zero_extendqisi2
27312
-.L4626:
27313
- mov r1, #3
27314
- mov r2, #4
27315
- bl gc_search_src_blk
27316
- uxth r0, r0
27317
-.L4479:
27318
- ldrh r3, [r8, #-14]
27319
- cmp r7, r10, lsr #1
27320
- movw r2, #2808
27321
- movhi r3, r3, lsr #2
27322
- movls r3, r3, lsr #1
27323
- strh r3, [r4, r2] @ movhi
27324
- b .L4464
27325
-.L4474:
27326
- cmp r7, r10
27327
- ldr r8, .L4635
27328
- bcs .L4481
27329
- sub r0, r8, #20
27330
- mov r1, #4
27331
- mov r9, #0
27332
- strb r9, [r5, #-3115]
27333
- bl _list_get_gc_head_node
27530
+ bhi .L4373
27531
+.L4374:
27532
+ cmp r6, r9
27533
+ bcs .L4381
27534
+ mov r6, #0
27535
+ mov r0, #4
27536
+ strb r6, [r5, #-3119]
27537
+ bl zftl_get_gc_node.part.10
2733427538 movw r3, #65535
2733527539 cmp r0, r3
27336
- beq .L4481
27337
- ldr r3, [r4, #1088]
27338
- mov r0, r0, asl #1
27339
- ldrh r1, [r8, #-24]
27340
- ldr r7, .L4635+60
27540
+ beq .L4381
27541
+ ldr r3, [r4, #1092]
27542
+ lsl r0, r0, #1
27543
+ ldrh r1, [r10, #-8]
2734127544 ldrh r2, [r3, r0]
27342
- ldrb r3, [r8, #-51] @ zero_extendqisi2
27545
+ ldrb r3, [r5, #-3127] @ zero_extendqisi2
2734327546 mul r3, r3, r1
2734427547 cmp r2, r3, asr #1
27345
- ldrgth r3, [r8, #-14]
27346
- movwgt r2, #2808
27347
- movgt r3, r3, lsr #2
27348
- strgth r3, [r7, r2] @ movhi
27349
- bgt .L4459
27350
-.L4483:
27351
- mov r2, #4
27352
- mov r0, r9
27353
- mov r1, #3
27354
- bl gc_search_src_blk
27355
- ldrh r3, [r8, #-14]
27356
- movw r2, #2808
27357
- mov r3, r3, lsr #1
27358
- strh r3, [r7, r2] @ movhi
27359
- uxth r0, r0
27360
- b .L4464
27361
-.L4481:
27362
- ldrh r3, [r8, #-14]
27363
- movw r2, #2808
27364
- mov r3, r3, lsr #2
27548
+ ble .L4383
27549
+.L4381:
27550
+ ldrh r3, [r10, #-4]
27551
+ movw r2, #2804
27552
+ lsr r3, r3, #2
2736527553 strh r3, [r4, r2] @ movhi
27366
- b .L4459
27367
-.L4469:
27368
- sub r9, r9, #3072
27369
- ldrh r1, [r9, #-14]
27370
- mov r1, r1, lsr #2
27371
- strh r1, [r3, r2] @ movhi
27372
- ldr r2, .L4635+56
27554
+.L4309:
27555
+ mov r0, r7
27556
+ add sp, sp, #36
27557
+ @ sp needed
27558
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
27559
+.L4372:
27560
+ movw r2, #1080
27561
+ ldr r3, [r5, #-140]
27562
+ ldrh r2, [r4, r2]
27563
+ add r3, r3, #1
27564
+ str r3, [r5, #-140]
27565
+ cmp r3, r2, lsr #4
27566
+ lsl r3, r0, #1
27567
+ str r3, [sp, #24]
27568
+ bls .L4375
27569
+ ldr r3, [r4, #1092]
27570
+ lsl r2, r0, #1
27571
+ mov r1, #0
27572
+ str r1, [r5, #-140]
27573
+ ldrh r2, [r3, r2]
27574
+ movw r3, #2808
27575
+ ldrh r3, [r4, r3]
27576
+ cmp r2, r3
27577
+ bcs .L4375
27578
+ mov r3, #1
27579
+ mov r2, r3
27580
+ strb r3, [r5, #-3119]
27581
+ str r3, [sp, #24]
27582
+ bl gc_add_sblk
27583
+ cmp r0, #0
27584
+ ldr r3, [sp, #24]
27585
+ beq .L4375
27586
+.L4526:
27587
+ strb r3, [r5, #-144]
27588
+ b .L4309
27589
+.L4375:
27590
+ ldr r3, [r4, #1092]
27591
+ lsl r2, fp, #1
27592
+ ldrh r2, [r3, r2]
27593
+ ldrh r3, [r10, #-8]
27594
+ cmp r2, r3, lsr #1
27595
+ bhi .L4376
27596
+ mov r2, #0
27597
+ mov r1, #1
27598
+ mov r0, fp
27599
+ bl gc_add_sblk
27600
+ b .L4365
27601
+.L4376:
27602
+ movw r3, #2790
27603
+ movw r1, #2792
27604
+ ldrh r1, [r4, r1]
27605
+ ldrh r3, [r4, r3]
27606
+ add r3, r3, r1
27607
+ ldrh r1, [r10, #-4]
27608
+ cmp r3, r1, lsl #1
27609
+ ble .L4377
27610
+ movw r3, #2808
27611
+ ldrh r3, [r4, r3]
27612
+ cmp r3, r2
27613
+ bcc .L4374
27614
+ b .L4377
27615
+.L4373:
27616
+ cmp r8, #16
27617
+ mov r1, #1
27618
+ strb r1, [r5, #-3119]
27619
+ bls .L4378
27620
+ movw r3, #2794
27621
+ ldrh r2, [r4, r3]
27622
+ ldrh r3, [r10, #-2]
27623
+ cmp r2, r3
27624
+ movls r2, #4
27625
+ movls r0, r1
27626
+ bls .L4531
27627
+.L4378:
27628
+ mov r2, #1
27629
+ mov r1, #2
27630
+ mov r0, r2
27631
+.L4531:
27632
+ bl gc_search_src_blk
27633
+ uxth r0, r0
27634
+ cmp r0, #0
27635
+ bne .L4379
27636
+ mov r2, #4
27637
+ mov r1, #3
27638
+ ldrb r0, [r5, #-3119] @ zero_extendqisi2
27639
+ bl gc_search_src_blk
27640
+ uxth r0, r0
27641
+.L4379:
27642
+ ldrh r3, [r10, #-4]
27643
+ cmp r6, r9, lsr #1
27644
+ movw r2, #2804
27645
+ lsrhi r3, r3, #2
27646
+ lsrls r3, r3, #1
27647
+.L4524:
27648
+ strh r3, [r4, r2] @ movhi
27649
+ b .L4363
27650
+.L4383:
27651
+ mov r2, #4
27652
+ mov r1, #3
27653
+ mov r0, r6
27654
+ bl gc_search_src_blk
27655
+ ldrh r3, [r10, #-4]
27656
+ uxth r0, r0
27657
+ movw r2, #2804
27658
+ lsr r3, r3, #1
27659
+ b .L4524
27660
+.L4369:
27661
+ ldr r2, .L4535+60
27662
+ ldrh r2, [r2, #-4]
27663
+ lsr r2, r2, #2
27664
+ strh r2, [r4, r3] @ movhi
2737327665 movw r3, #2106
27666
+ ldr r2, .L4535+40
2737427667 ldrh r3, [r2, r3]
2737527668 cmp r3, #0
27376
- moveq r6, #0
27377
- b .L4459
27378
-.L4464:
27379
- cmp r0, #0
27380
- beq .L4459
27381
-.L4534:
27382
- mov r3, #1
27383
- strb r3, [r5, #-182]
27384
- b .L4459
27385
-.L4415:
27386
- movw r6, #2828
27669
+ moveq r7, #0
27670
+ b .L4309
27671
+.L4314:
27672
+ movw r6, #2824
2738727673 movw r3, #65535
2738827674 ldrh r2, [r4, r6]
2738927675 cmp r2, r3
27390
- bne .L4484
27676
+ bne .L4384
2739127677 bl gc_get_src_blk
27392
- ldr r3, .L4635+60
27393
- strh r0, [r3, r6] @ movhi
27394
-.L4484:
27395
- movw r3, #2828
27396
- movw r0, #65535
27397
- ldrh r1, [r4, r3]
27398
- ldr r2, .L4635+60
27399
- cmp r1, r0
27400
- beq .L4485
27401
- movw r0, #1076
27402
- ldrh r0, [r2, r0]
27403
- cmp r0, r1
27404
- mvnls r1, #0
27405
- strlsh r1, [r2, r3] @ movhi
27406
-.L4485:
27407
- movw r3, #2828
27678
+ strh r0, [r4, r6] @ movhi
27679
+.L4384:
27680
+ movw r3, #2824
27681
+ movw r1, #65535
27682
+ ldrh r2, [r4, r3]
27683
+ cmp r2, r1
27684
+ beq .L4385
27685
+ movw r1, #1080
27686
+ ldrh r1, [r4, r1]
27687
+ cmp r1, r2
27688
+ mvnls r2, #0
27689
+ strhls r2, [r4, r3] @ movhi
27690
+.L4385:
27691
+ movw r3, #2824
2740827692 movw r1, #65535
2740927693 ldrh r3, [r4, r3]
27410
- ldr r2, .L4635+60
27694
+ ldr r2, .L4535+40
2741127695 cmp r3, r1
27412
- beq .L4632
27413
- ldr r0, .L4635+56
27414
- ldr r1, [r2, #1080]
27415
- ldrh ip, [r0, #52]
27416
- add r1, r1, r3, asl #2
27696
+ beq .L4534
27697
+ ldrh ip, [r2, #52]
27698
+ ldr r1, [r4, #1084]
2741727699 cmp ip, #0
27418
- addne r2, r2, #2880
27700
+ addne r2, r2, #52
2741927701 movne r0, #0
27420
- beq .L4487
27421
-.L4488:
27422
- uxth lr, r0
27423
- cmp lr, ip
27424
- bcs .L4487
27425
- ldrh lr, [r2, #2]!
27426
- add r0, r0, #1
27427
- cmp lr, r3
27428
- bne .L4488
27429
-.L4492:
27430
- movw r3, #2828
27431
- mvn r2, #0
27432
- strh r2, [r4, r3] @ movhi
27433
- b .L4536
27434
-.L4487:
27702
+ add r1, r1, r3, lsl #2
27703
+ bne .L4388
27704
+.L4387:
2743527705 ldrb r2, [r1, #2] @ zero_extendqisi2
2743627706 tst r2, #192
2743727707 and r2, r2, #224
....@@ -27441,216 +27711,201 @@
2744127711 movne r2, r1
2744227712 orreq r2, r1, #1
2744327713 cmp r2, #0
27444
- beq .L4490
27445
- ldr r2, [r4, #1088]
27446
- mov r3, r3, asl #1
27714
+ beq .L4390
27715
+ ldr r2, [r4, #1092]
27716
+ lsl r3, r3, #1
2744727717 ldrh r3, [r2, r3]
2744827718 cmp r3, #0
27449
- beq .L4492
27450
- ldr r1, .L4635+64
27719
+ beq .L4392
2745127720 movw r2, #3306
27452
- ldr r0, .L4635+68
27721
+ ldr r1, .L4535+64
27722
+ ldr r0, .L4535+68
2745327723 bl printk
2745427724 bl dump_stack
27455
- b .L4492
27456
-.L4490:
27725
+ b .L4392
27726
+.L4388:
27727
+ uxth lr, r0
27728
+ cmp lr, ip
27729
+ bcs .L4387
27730
+ ldrh lr, [r2, #2]!
27731
+ add r0, r0, #1
27732
+ cmp lr, r3
27733
+ bne .L4388
27734
+.L4392:
27735
+ mvn r2, #0
27736
+ movw r3, #2824
27737
+ strh r2, [r4, r3] @ movhi
27738
+ b .L4435
27739
+.L4390:
2745727740 mov r3, #2
27458
- b .L4631
27459
-.L4416:
27741
+ b .L4533
27742
+.L4315:
2746027743 bl gc_scan_src_blk
2746127744 cmn r0, #1
2746227745 moveq r3, #3
27463
- beq .L4631
27464
- movw r3, #2828
27465
- ldr r2, .L4635+56
27746
+ beq .L4533
27747
+ movw r3, #2824
27748
+ ldr r2, .L4535+40
2746627749 ldrh r3, [r4, r3]
2746727750 movw r1, #65535
27468
- cmp r3, r1
2746927751 mov r6, r2
27470
- beq .L4434
27752
+ cmp r3, r1
27753
+ beq .L4334
2747127754 ldrh r1, [r2, #20]
2747227755 cmp r1, #0
2747327756 movne r3, #4
27474
- strneb r3, [r5, #-182]
27757
+ strbne r3, [r5, #-144]
2747527758 movne r3, #0
27476
- strneh r3, [r2, #22] @ movhi
27477
- bne .L4536
27478
-.L4494:
27759
+ strhne r3, [r2, #22] @ movhi
27760
+ bne .L4435
27761
+.L4394:
2747927762 mov r2, #1
27480
- strb r2, [r5, #-182]
27481
- ldr r2, .L4635+60
27482
- mov r3, r3, asl #1
27483
- ldr r2, [r2, #1088]
27763
+ lsl r3, r3, #1
27764
+ strb r2, [r5, #-144]
27765
+ ldr r2, [r4, #1092]
2748427766 ldrh r3, [r2, r3]
2748527767 cmp r3, #0
27486
- beq .L4495
27487
- ldr r1, .L4635+64
27768
+ beq .L4395
2748827769 movw r2, #3336
27489
- ldr r0, .L4635+68
27770
+ ldr r1, .L4535+64
27771
+ ldr r0, .L4535+68
2749027772 bl printk
2749127773 bl dump_stack
27492
-.L4495:
27493
- movw r5, #2828
27494
- ldr r7, .L4635+56
27774
+.L4395:
27775
+ movw r5, #2824
2749527776 ldrh r0, [r4, r5]
2749627777 bl ftl_free_sblk
2749727778 ldrh r3, [r4, r5]
27498
- ldr r2, [r4, #1088]
2749927779 mov r5, #0
27500
- mov r3, r3, asl #1
27780
+ ldr r2, [r4, #1092]
27781
+ lsl r3, r3, #1
2750127782 strh r5, [r2, r3] @ movhi
2750227783 ldrh r3, [r6, #26]
2750327784 add r3, r3, #1
2750427785 uxth r3, r3
2750527786 cmp r3, #8
27506
- strlsh r3, [r7, #26] @ movhi
27507
- bls .L4492
27508
- strh r5, [r7, #26] @ movhi
27787
+ strhls r3, [r6, #26] @ movhi
27788
+ bls .L4392
27789
+ strh r5, [r6, #26] @ movhi
2750927790 bl ftl_flush
2751027791 bl pm_flush
2751127792 bl ftl_ext_info_flush
2751227793 mov r0, r5
2751327794 bl ftl_info_flush
27514
- b .L4492
27515
-.L4417:
27516
- ldr r6, .L4635+56
27517
-.L4594:
27795
+ b .L4392
27796
+.L4316:
27797
+ ldr r7, .L4535+40
27798
+ mov r8, r7
27799
+.L4489:
2751827800 bl gc_scan_src_blk_one_page
27519
- ldr r3, .L4635+20
27520
- ldrh r1, [r6, #2]
27521
- ldr r0, .L4635+60
27801
+ ldr r3, .L4535+24
27802
+ ldrh r2, [r7, #2]
2752227803 ldrh r3, [r3]
27523
- ldr r2, .L4635+32
27524
- cmp r1, r3
27525
- ldr r5, .L4635+56
27526
- bcs .L4498
27527
- cmp r7, #7
27528
- bls .L4594
27529
- b .L4536
27530
-.L4498:
27531
- ldrh r3, [r5, #20]
27532
- ldrh r1, [r5]
27533
- cmp r3, #0
27534
- beq .L4499
27535
- ldr r0, [r0, #1088]
27536
- mov ip, #4
27537
- strb ip, [r2, #-182]
27538
- mov r2, #0
27539
- strh r2, [r5, #22] @ movhi
27540
- mov r2, r1, asl #1
27541
- ldrh r2, [r0, r2]
2754227804 cmp r2, r3
27543
- beq .L4500
27544
- ldr r0, .L4635+4
27805
+ bcs .L4398
27806
+ cmp r6, #7
27807
+ bls .L4489
27808
+ b .L4435
27809
+.L4398:
27810
+ ldrh r3, [r7, #20]
27811
+ ldrh r1, [r7]
27812
+ cmp r3, #0
27813
+ beq .L4399
27814
+ mov r2, #4
27815
+ ldr r0, [r4, #1092]
27816
+ strb r2, [r5, #-144]
27817
+ mov r2, #0
27818
+ strh r2, [r7, #22] @ movhi
27819
+ lsl r2, r1, #1
27820
+ ldrh r2, [r0, r2]
27821
+ cmp r3, r2
27822
+ beq .L4400
27823
+ ldr r0, .L4535+8
2754527824 ldr r0, [r0]
2754627825 tst r0, #1024
27547
- beq .L4500
27548
- ldr r0, .L4635+24
27826
+ beq .L4400
27827
+ ldr r0, .L4535+28
2754927828 bl printk
27550
-.L4500:
27551
- movw r3, #2828
27552
- ldr r2, [r4, #1088]
27829
+.L4400:
27830
+ movw r3, #2824
27831
+ ldr r2, [r4, #1092]
2755327832 ldrh r3, [r4, r3]
27554
- mov r3, r3, asl #1
27833
+ lsl r3, r3, #1
2755527834 ldrh r2, [r2, r3]
27556
- ldrh r3, [r5, #20]
27835
+ ldrh r3, [r8, #20]
2755727836 cmp r2, r3
27558
- beq .L4501
27559
- ldr r1, .L4635+64
27837
+ beq .L4401
2756027838 movw r2, #3379
27561
- ldr r0, .L4635+68
27839
+ ldr r1, .L4535+64
27840
+ ldr r0, .L4535+68
2756227841 bl printk
2756327842 bl dump_stack
27564
-.L4501:
27565
- movw r3, #2828
27566
- ldrh r1, [r5, #20]
27843
+.L4401:
27844
+ movw r3, #2824
27845
+ ldrh r1, [r8, #20]
2756727846 ldrh r3, [r4, r3]
27568
- ldr r2, [r4, #1088]
27569
- mov r3, r3, asl #1
27847
+ ldr r2, [r4, #1092]
27848
+ lsl r3, r3, #1
2757027849 strh r1, [r2, r3] @ movhi
27571
- b .L4536
27572
-.L4499:
27850
+ b .L4435
27851
+.L4399:
2757327852 mov r3, #1
27574
- strb r3, [r2, #-182]
27575
- ldr r3, .L4635+4
27576
- ldr r6, [r0, #1080]
27853
+ ldr r6, [r4, #1084]
27854
+ strb r3, [r5, #-144]
27855
+ ldr r3, .L4535+8
27856
+ add r6, r6, r1, lsl #2
2757727857 ldr r3, [r3]
27578
- add r6, r6, r1, asl #2
2757927858 tst r3, #256
27580
- beq .L4502
27859
+ beq .L4402
2758127860 ldrb r2, [r6, #2] @ zero_extendqisi2
27582
- ldr r0, .L4635+28
27583
- mov r2, r2, lsr #5
27861
+ ldr r0, .L4535+32
27862
+ lsr r2, r2, #5
2758427863 bl printk
27585
-.L4502:
27864
+.L4402:
2758627865 ldrb r3, [r6, #2] @ zero_extendqisi2
27587
- tst r3, #192
27588
- and r3, r3, #224
27589
- moveq r2, #1
27590
- movne r2, #0
27591
- cmp r3, #224
27592
- movne r3, r2
27593
- orreq r3, r2, #1
27866
+ and r2, r3, #224
27867
+ and r3, r3, #192
2759427868 cmp r3, #0
27595
- beq .L4503
27596
- ldr r1, .L4635+64
27869
+ cmpne r2, #224
27870
+ bne .L4403
2759727871 movw r2, #3389
27598
- ldr r0, .L4635+68
27872
+ ldr r1, .L4535+64
27873
+ ldr r0, .L4535+68
2759927874 bl printk
2760027875 bl dump_stack
27601
-.L4503:
27602
- movw r7, #2828
27603
- ldr r6, .L4635+56
27604
- ldrh r0, [r4, r7]
27876
+.L4403:
27877
+ movw r5, #2824
27878
+ ldrh r0, [r4, r5]
2760527879 bl ftl_free_sblk
2760627880 mvn r3, #0
27607
- strh r3, [r4, r7] @ movhi
27608
- ldrh r3, [r5, #26]
27881
+ strh r3, [r4, r5] @ movhi
27882
+ ldrh r3, [r8, #26]
2760927883 add r3, r3, #1
2761027884 uxth r3, r3
2761127885 cmp r3, #8
27612
- strlsh r3, [r6, #26] @ movhi
2761327886 movhi r3, #0
27614
- strhih r3, [r6, #26] @ movhi
27615
- bls .L4536
27616
- b .L4630
27617
-.L4636:
27618
- .align 2
27619
-.L4635:
27620
- .word .LANCHOR3-3072
27621
- .word .LANCHOR2
27622
- .word .LC300
27623
- .word .LANCHOR3-3092
27624
- .word .LANCHOR3-3100
27625
- .word .LANCHOR3-3096
27626
- .word .LC301
27627
- .word .LC302
27628
- .word .LANCHOR3
27629
- .word .LANCHOR0+5010
27630
- .word .LANCHOR0+4096
27631
- .word 1145785929
27632
- .word .LANCHOR3-3120
27633
- .word .LANCHOR3-3088
27634
- .word .LANCHOR0+2828
27635
- .word .LANCHOR0
27636
- .word .LANCHOR1+2752
27637
- .word .LC0
27638
-.L4418:
27639
- cmp fp, #0
27640
- bne .L4505
27641
- movw r3, #2808
27887
+ strhls r3, [r8, #26] @ movhi
27888
+ strhhi r3, [r8, #26] @ movhi
27889
+ bls .L4435
27890
+.L4532:
27891
+ bl flt_sys_flush
27892
+ b .L4435
27893
+.L4317:
27894
+ cmp r10, #0
27895
+ bne .L4405
27896
+ movw r3, #2804
2764227897 ldrh r3, [r4, r3]
27643
- cmp r3, r7
27644
- bcc .L4536
27645
-.L4505:
27646
- ldrh r2, [r6, #80]
27898
+ cmp r3, r6
27899
+ bcc .L4435
27900
+.L4405:
27901
+ ldrh r2, [r7, #80]
2764727902 movw r3, #65535
2764827903 cmp r2, r3
27649
- bne .L4506
27650
- ldrb r8, [r5, #-3115] @ zero_extendqisi2
27904
+ bne .L4406
27905
+ ldrb r8, [r5, #-3119] @ zero_extendqisi2
2765127906 cmp r8, #1
27652
- bne .L4506
27653
- ldr r9, .L4635+56
27907
+ bne .L4406
27908
+ ldr r9, .L4535+40
2765427909 bl ftl_flush
2765527910 movw r3, #2180
2765627911 mov r1, #5
....@@ -27659,774 +27914,734 @@
2765927914 movne r0, r8
2766027915 bl zftl_gc_get_free_sblk
2766127916 movw r3, #65535
27917
+ mov r6, r0
2766227918 cmp r0, r3
27663
- mov r7, r0
27664
- beq .L4509
27665
- ldr r8, [r4, #1080]
27666
- add r8, r8, r0, asl #2
27919
+ beq .L4409
27920
+ ldr r8, [r4, #1084]
27921
+ add r8, r8, r0, lsl #2
2766727922 ldrb r3, [r8, #2] @ zero_extendqisi2
2766827923 tst r3, #224
27669
- beq .L4510
27670
- ldr r1, .L4635+64
27924
+ beq .L4410
2767127925 movw r2, #3423
27672
- ldr r0, .L4635+68
27926
+ ldr r1, .L4535+64
27927
+ ldr r0, .L4535+68
2767327928 bl printk
2767427929 bl dump_stack
27675
-.L4510:
27930
+.L4410:
2767627931 ldrb r3, [r8, #2] @ zero_extendqisi2
2767727932 and r3, r3, #15
2767827933 orr r3, r3, #176
2767927934 strb r3, [r8, #2]
27680
-.L4535:
27681
- mov r0, r7
27935
+.L4434:
2768227936 mov r1, #1
27937
+ mov r0, r6
2768327938 bl ftl_erase_sblk
2768427939 mov r3, #5
27685
- add r1, r6, #96
27686
- strb r3, [r6, #84]
27687
- mov r0, r7
27688
- ldr r10, .L4635+52
27940
+ add r1, r7, #96
27941
+ strb r3, [r7, #84]
27942
+ mov r0, r6
2768927943 bl ftl_get_blk_list_in_sblk
27690
- mov r8, #0
27691
- strh r7, [r6, #80] @ movhi
27692
- mov r1, #255
27693
- ldrh r3, [r10, #-8]
27694
- ldrh r2, [r10, #-26]
27695
- strh r8, [r6, #82] @ movhi
27696
- strb r8, [r6, #85]
27697
- strh r8, [r6, #90] @ movhi
27944
+ ldr r2, .L4535+60
2769827945 uxtb r0, r0
27699
- strb r0, [r6, #89]
27946
+ mov r8, #0
27947
+ strh r6, [r7, #80] @ movhi
27948
+ strb r0, [r7, #89]
27949
+ mov r1, #255
27950
+ ldrh r3, [r2, #-8]
27951
+ strh r8, [r7, #82] @ movhi
27952
+ strb r8, [r7, #85]
27953
+ strh r8, [r7, #90] @ movhi
2770027954 smulbb r0, r3, r0
27701
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
27702
- mul r2, r3, r2
27703
- strh r0, [r6, #86] @ movhi
27704
- ldr r0, [r5, #-172]
27705
- mov r2, r2, asl #2
27955
+ ldrh r3, [r2, #-30]
27956
+ strh r0, [r7, #86] @ movhi
27957
+ sub r7, r2, #16
27958
+ ldrb r2, [r5, #-3127] @ zero_extendqisi2
27959
+ ldr r0, [r5, #-132]
27960
+ mul r2, r2, r3
27961
+ lsl r2, r2, #2
2770627962 bl ftl_memset
27707
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
27708
- ldrh r2, [r10, #-26]
27963
+ ldrh r3, [r7, #-14]
2770927964 mov r1, #255
27710
- ldr r0, [r5, #-168]
27711
- mul r2, r3, r2
27712
- mov r2, r2, asl #2
27965
+ ldrb r2, [r5, #-3127] @ zero_extendqisi2
27966
+ ldr r0, [r5, #-128]
27967
+ mul r2, r2, r3
27968
+ lsl r2, r2, #2
2771327969 bl ftl_memset
27714
- ldrh r3, [r10, #-26]
27715
- ldrb r2, [r5, #-3123] @ zero_extendqisi2
27970
+ ldrh r3, [r7, #-14]
2771627971 mov r1, #255
27717
- ldr r0, [r5, #-3120]
27972
+ ldrb r2, [r5, #-3127] @ zero_extendqisi2
27973
+ ldr r0, [r5, #-3124]
2771827974 mvn r5, #0
2771927975 mul r2, r2, r3
2772027976 bl ftl_memset
27721
- ldr r3, [r4, #1092]
27977
+ ldr r3, [r4, #1096]
2772227978 strh r5, [r3, #128] @ movhi
2772327979 strh r5, [r3, #130] @ movhi
27724
- str r7, [r3, #132]
27980
+ str r6, [r3, #132]
2772527981 bl pm_flush
2772627982 bl ftl_ext_info_flush
27727
- ldr r3, [r4, #2804]
27983
+ ldr r3, [r4, #2800]
27984
+ movw r2, #2182
2772827985 mov r0, r8
2772927986 strh r8, [r9, #52] @ movhi
27730
- strh r7, [r3, #126] @ movhi
27987
+ strh r6, [r3, #126] @ movhi
2773127988 movw r3, #2102
2773227989 strh r8, [r9, r3] @ movhi
27733
- movw r3, #2104
27734
- strh r8, [r9, r3] @ movhi
27735
- movw r3, #2182
27736
- strh r8, [r9, r3] @ movhi
27737
- ldr r3, .L4635+40
27738
- str r5, [r3, #916]
27990
+ ldr r3, .L4535+36
27991
+ strh r8, [r9, r2] @ movhi
27992
+ strh r8, [r3] @ movhi
27993
+ str r5, [r3, #80]
2773927994 bl ftl_info_flush
27740
- b .L4536
27741
-.L4506:
27742
- cmp fp, #1
27743
- ldr r10, .L4635+56
27744
- ldr r9, .L4635+36
27995
+ b .L4435
27996
+.L4536:
27997
+ .align 2
27998
+.L4535:
27999
+ .word .LANCHOR0
28000
+ .word .LANCHOR3
28001
+ .word .LANCHOR2
28002
+ .word .LC299
28003
+ .word .LANCHOR3-3104
28004
+ .word .LANCHOR3-3100
28005
+ .word .LANCHOR3-3096
28006
+ .word .LC300
28007
+ .word .LC301
28008
+ .word .LANCHOR0+4928
28009
+ .word .LANCHOR0+2824
28010
+ .word .LANCHOR0+4096
28011
+ .word 1145785929
28012
+ .word .LANCHOR3-3136
28013
+ .word .LANCHOR0+1088
28014
+ .word .LANCHOR3-3088
28015
+ .word .LANCHOR1+2525
28016
+ .word .LC0
28017
+.L4406:
28018
+ cmp r10, #1
2774528019 movne r8, #1
2774628020 moveq r8, #4
27747
- cmp r7, #15
28021
+ cmp r6, #15
28022
+ ldr r6, .L4535+40
2774828023 addls r8, r8, #4
27749
-.L4513:
28024
+ add r10, r6, #2176
28025
+ add r10, r10, #6
28026
+.L4413:
2775028027 sub r8, r8, #1
2775128028 uxtb r8, r8
2775228029 cmp r8, #255
27753
- beq .L4536
28030
+ beq .L4435
2775428031 bl gc_do_copy_back
27755
- ldrb r3, [r5, #-3115] @ zero_extendqisi2
27756
- ldr fp, .L4635+32
28032
+ ldrb r3, [r5, #-3119] @ zero_extendqisi2
2775728033 cmp r3, #0
27758
- ldr r7, .L4635+56
27759
- bne .L4514
27760
- ldrb r3, [r4, #2774] @ zero_extendqisi2
28034
+ bne .L4414
28035
+ ldrb r3, [r4, #2769] @ zero_extendqisi2
2776128036 cmp r3, #3
27762
- bhi .L4515
28037
+ bhi .L4415
2776328038 bl ftl_write_commit
27764
-.L4515:
27765
- ldrh r2, [r10, #22]
27766
- ldrh r3, [r10, #20]
28039
+.L4415:
28040
+ ldrh r2, [r6, #22]
28041
+ ldrh r3, [r6, #20]
2776728042 cmp r2, r3
27768
- bcc .L4513
28043
+ bcc .L4413
2776928044 mov r3, #1
27770
- strb r3, [r5, #-182]
28045
+ strb r3, [r5, #-144]
2777128046 bl ftl_write_commit
2777228047 bl ftl_flush
27773
- ldr r3, .L4635+56
27774
- ldr r2, .L4635+60
27775
- ldrh r3, [r3]
27776
- ldr r2, [r2, #1088]
27777
- mov r3, r3, asl #1
28048
+ ldrh r3, [r6]
28049
+ ldr r2, [r4, #1092]
28050
+ lsl r3, r3, #1
2777828051 ldrh r3, [r2, r3]
2777928052 cmp r3, #0
27780
- beq .L4517
27781
- ldr r1, .L4635+64
28053
+ beq .L4417
2778228054 movw r2, #3507
27783
- ldr r0, .L4635+68
28055
+ ldr r1, .L4535+64
28056
+ ldr r0, .L4535+68
2778428057 bl printk
2778528058 bl dump_stack
27786
-.L4517:
27787
- movw r3, #2828
27788
- ldr r1, [r4, #1088]
28059
+.L4417:
28060
+ movw r3, #2824
28061
+ ldr r2, [r4, #1092]
2778928062 ldrh r0, [r4, r3]
27790
- mov r2, r0, asl #1
27791
- ldrh ip, [r1, r2]
27792
- cmp ip, #0
27793
- bne .L4518
27794
- strh ip, [r1, r2] @ movhi
27795
- ldr r2, .L4635+60
27796
- ldrh r0, [r2, r3]
27797
- bl ftl_free_sblk
27798
- b .L4492
27799
-.L4518:
27800
- mov r1, #0
27801
- mov r2, #1
27802
- bl gc_add_sblk
27803
- b .L4492
27804
-.L4514:
27805
- ldrh r3, [r9]
28063
+ lsl r3, r0, #1
28064
+ ldrh r3, [r2, r3]
2780628065 cmp r3, #0
27807
- beq .L4519
27808
- ldr r3, .L4635+36
27809
- mov r2, #0
27810
- ldr r8, .L4635+40
27811
- strh r2, [r3] @ movhi
28066
+ bne .L4418
28067
+ bl ftl_free_sblk
28068
+ b .L4392
28069
+.L4418:
28070
+ mov r2, #1
28071
+ mov r1, #0
28072
+ bl gc_add_sblk
28073
+ b .L4392
28074
+.L4414:
28075
+ ldrh r3, [r10]
28076
+ cmp r3, #0
28077
+ beq .L4419
28078
+ ldr r8, .L4535+44
28079
+ mov r3, #0
28080
+ strh r3, [r10] @ movhi
2781228081 bl sblk_wait_write_queue_completed
2781328082 bl gc_write_completed
27814
- ldr r0, [r8, #916]
28083
+ ldr r0, [r8, #912]
2781528084 cmn r0, #1
27816
- beq .L4520
27817
- ldrb r3, [fp, #-2536] @ zero_extendqisi2
28085
+ beq .L4420
28086
+ ldrb r3, [r5, #-2542] @ zero_extendqisi2
2781828087 cmp r3, #0
27819
- bne .L4521
27820
- ldrb r3, [fp, #-3122] @ zero_extendqisi2
28088
+ bne .L4421
28089
+ ldrb r3, [r5, #-3126] @ zero_extendqisi2
2782128090 cmp r3, #0
27822
- beq .L4522
27823
-.L4521:
27824
- ldr r3, [r4, #2804]
27825
- ldr r9, .L4635+60
28091
+ beq .L4422
28092
+.L4421:
28093
+ ldr r3, [r4, #2800]
2782628094 ldr r2, [r3, #156]
27827
- ldr r3, .L4635+44
28095
+ ldr r3, .L4535+48
2782828096 cmp r2, r3
27829
- bne .L4522
27830
- ldr r10, .L4635+48
27831
- ldrb r3, [r9, #1189] @ zero_extendqisi2
27832
- ldrb r1, [r5, #-3130] @ zero_extendqisi2
27833
- ldrh r2, [r10, #-12]
28097
+ bne .L4422
28098
+ ldr r7, .L4535+52
28099
+ ldrb r3, [r4, #1153] @ zero_extendqisi2
28100
+ ldrb r1, [r5, #-3136] @ zero_extendqisi2
28101
+ ldrh r2, [r7, #-2]
2783428102 rsb r3, r3, #24
27835
- rsb r3, r2, r3
27836
- mov r2, r0, lsr r2
28103
+ sub r3, r3, r2
28104
+ lsr r2, r0, r2
2783728105 mvn r0, #0
27838
- bic r0, r2, r0, asl r3
28106
+ bic r0, r2, r0, lsl r3
2783928107 bl __aeabi_uidiv
27840
- ldr r6, [r9, #1080]
27841
- mov ip, r0, asl #2
27842
- add r1, r6, ip
27843
- ldrb r3, [r1, #2] @ zero_extendqisi2
27844
- tst r3, #8
27845
- beq .L4520
27846
- movw r2, #2788
27847
- ldrh lr, [r10, #34]
27848
- ldrh r2, [r9, r2]
27849
- add r2, r2, #8
27850
- cmp r2, lr
27851
- bge .L4520
27852
- bfc r3, #3, #2
27853
- movw r2, #1084
27854
- strb r3, [r1, #2]
27855
- ldr r3, [r6, r0, asl #2]
27856
- ldrh r2, [r9, r2]
27857
- ubfx r3, r3, #11, #8
27858
- ldrh r1, [r6, ip]
27859
- mul r2, r2, r3
27860
- ubfx lr, r1, #0, #11
27861
- mov r3, r3, lsr #3
27862
- add r2, r2, r2, asl #1
27863
- add r2, lr, r2, asr #2
27864
- bfi r1, r2, #0, #11
27865
- strh r1, [r6, ip] @ movhi
27866
- ldr r2, [r6, r0, asl #2]
27867
- bfi r2, r3, #11, #8
27868
- str r2, [r6, r0, asl #2]
27869
- b .L4520
27870
-.L4522:
27871
- bl ftl_mask_bad_block
27872
-.L4520:
27873
- ldr r3, [r4, #1092]
27874
- mov r6, #0
27875
- str r6, [r8, #916]
27876
- strh r6, [r7, #52] @ movhi
28108
+ ldr r3, [r4, #1084]
28109
+ lsl lr, r0, #2
28110
+ add ip, r3, lr
28111
+ ldrb r2, [ip, #2] @ zero_extendqisi2
28112
+ tst r2, #8
28113
+ beq .L4420
28114
+ ldrh r1, [r9]
28115
+ ldrh r7, [r7, #44]
28116
+ add r1, r1, #8
28117
+ cmp r1, r7
28118
+ bge .L4420
28119
+ ldr r1, .L4535+56
28120
+ bfc r2, #3, #2
28121
+ strb r2, [ip, #2]
28122
+ ldr r2, [r3, r0, lsl #2]
28123
+ ldrh r1, [r1]
28124
+ ldrh ip, [r3, lr]
28125
+ ubfx r2, r2, #11, #8
28126
+ mul r1, r2, r1
28127
+ ubfx r7, ip, #0, #11
28128
+ lsr r2, r2, #3
28129
+ add r1, r1, r1, lsl #1
28130
+ add r1, r7, r1, asr #2
28131
+ bfi ip, r1, #0, #11
28132
+ strh ip, [r3, lr] @ movhi
28133
+ ldr r1, [r3, r0, lsl #2]
28134
+ bfi r1, r2, #11, #8
28135
+ str r1, [r3, r0, lsl #2]
28136
+.L4420:
28137
+ ldr r3, [r4, #1096]
28138
+ mov r7, #0
28139
+ str r7, [r8, #912]
28140
+ strh r7, [r6, #52] @ movhi
2787728141 ldrh r0, [r3, #80]
2787828142 bl ftl_free_sblk
27879
- ldr r0, [r4, #2836]
27880
- ldr r2, [r4, #1092]
28143
+ ldr r0, [r4, #2832]
2788128144 mvn r3, #0
27882
- ldr r1, [r4, #2804]
27883
- cmp r0, r6
28145
+ ldr r2, [r4, #1096]
28146
+ ldr r1, [r4, #2800]
28147
+ cmp r0, r7
2788428148 strh r3, [r2, #80] @ movhi
2788528149 strh r3, [r1, #126] @ movhi
2788628150 strh r3, [r2, #130] @ movhi
27887
- beq .L4523
28151
+ beq .L4423
2788828152 bl zbuf_free
27889
-.L4523:
27890
- str r6, [r4, #2836]
28153
+.L4423:
28154
+ str r7, [r4, #2832]
2789128155 bl flt_sys_flush
27892
- ldr r1, .L4635+64
2789328156 movw r2, #3567
27894
- ldr r0, .L4635+68
27895
- strb r6, [r5, #-182]
28157
+ ldr r1, .L4535+64
28158
+ ldr r0, .L4535+68
28159
+ strb r7, [r5, #-144]
2789628160 bl printk
2789728161 bl dump_stack
27898
- b .L4536
27899
-.L4519:
27900
- ldrh r3, [r6, #86]
27901
- ldrh r2, [r10, #22]
28162
+ b .L4435
28163
+.L4422:
28164
+ bl ftl_mask_bad_block
28165
+ b .L4420
28166
+.L4419:
28167
+ ldrh r3, [r7, #86]
28168
+ ldrh r2, [r6, #22]
2790228169 cmp r3, #1
27903
- ldrh r3, [r10, #20]
27904
- bls .L4524
28170
+ ldrh r3, [r6, #20]
28171
+ bls .L4424
2790528172 cmp r2, r3
27906
- bcc .L4513
28173
+ bcc .L4413
2790728174 mov r3, #1
27908
- strb r3, [fp, #-182]
27909
- ldrh r3, [r7, #52]
28175
+ strb r3, [r5, #-144]
28176
+ ldrh r3, [r6, #52]
2791028177 add r2, r3, #1
27911
- strh r2, [r7, #52] @ movhi
27912
- ldrh r2, [r7]
27913
- add r3, r7, r3, asl #1
28178
+ strh r2, [r6, #52] @ movhi
28179
+ add r3, r6, r3, lsl #1
28180
+ ldrh r2, [r6]
2791428181 strh r2, [r3, #54] @ movhi
2791528182 mvn r3, #0
27916
- strh r3, [r7] @ movhi
27917
- b .L4536
27918
-.L4524:
28183
+ strh r3, [r6] @ movhi
28184
+ b .L4435
28185
+.L4424:
2791928186 cmp r2, r3
2792028187 mov r1, #5
27921
- strb r1, [fp, #-182]
27922
- bcc .L4525
27923
- ldrh r3, [r7, #52]
28188
+ strb r1, [r5, #-144]
28189
+ bcc .L4425
28190
+ ldrh r3, [r6, #52]
2792428191 add r2, r3, #1
27925
- strh r2, [r7, #52] @ movhi
27926
- ldrh r2, [r7]
27927
- add r3, r7, r3, asl #1
28192
+ strh r2, [r6, #52] @ movhi
28193
+ add r3, r6, r3, lsl #1
28194
+ ldrh r2, [r6]
2792828195 strh r2, [r3, #54] @ movhi
2792928196 mvn r3, #0
27930
- strh r3, [r7] @ movhi
27931
-.L4525:
28197
+ strh r3, [r6] @ movhi
28198
+.L4425:
2793228199 bl ftl_flush
2793328200 bl sblk_wait_write_queue_completed
2793428201 bl gc_write_completed
27935
- ldrh r2, [r6, #80]
27936
- ldr r3, [r4, #1092]
28202
+ ldrh r2, [r7, #80]
28203
+ ldr r3, [r4, #1096]
2793728204 strh r2, [r3, #128] @ movhi
2793828205 bl pm_flush
2793928206 bl ftl_ext_info_flush
27940
- ldr r1, .L4635+52
27941
- ldrb r0, [r4, #1196] @ zero_extendqisi2
28207
+ ldr r2, .L4535+60
2794228208 mov r3, #0
27943
- strh r3, [r7, #12] @ movhi
27944
- ldrh r3, [r1, #-8]
27945
- cmp r0, #0
27946
- ldr r2, .L4635+56
27947
- ldrneh r1, [r1, #-26]
27948
- strh r3, [r7, #14] @ movhi
27949
- ldrb r3, [r5, #-3124] @ zero_extendqisi2
27950
- strneh r1, [r2, #14] @ movhi
27951
- movne r1, #1
27952
- strh r3, [r7, #16] @ movhi
27953
- strneh r1, [r2, #16] @ movhi
28209
+ ldrb r1, [r4, #1158] @ zero_extendqisi2
28210
+ strh r3, [r6, #12] @ movhi
28211
+ ldrh r3, [r2, #-8]
28212
+ cmp r1, #0
28213
+ ldrhne r2, [r2, #-30]
28214
+ strh r3, [r6, #14] @ movhi
28215
+ ldrb r3, [r5, #-3128] @ zero_extendqisi2
28216
+ strhne r2, [r6, #14] @ movhi
28217
+ movne r2, #1
28218
+ strh r3, [r6, #16] @ movhi
28219
+ strhne r2, [r6, #16] @ movhi
2795428220 cmp r3, #2
27955
- bne .L4528
27956
- ldrh r3, [r7, #14]
27957
- mov r3, r3, asl #1
27958
- strh r3, [r7, #14] @ movhi
27959
- ldrb r3, [r5, #-3122] @ zero_extendqisi2
28221
+ bne .L4428
28222
+ ldrh r3, [r6, #14]
28223
+ lsl r3, r3, #1
28224
+ strh r3, [r6, #14] @ movhi
28225
+ ldrb r3, [r5, #-3126] @ zero_extendqisi2
2796028226 cmp r3, #0
27961
- ldreq r3, .L4635+56
27962
- moveq r2, #1
27963
- streqh r2, [r3, #16] @ movhi
27964
-.L4528:
28227
+ moveq r3, #1
28228
+ strheq r3, [r6, #16] @ movhi
28229
+.L4428:
2796528230 mov r3, #0
27966
- strh r3, [r7, #18] @ movhi
27967
- b .L4536
27968
-.L4537:
27969
- ldr r8, .L4635+56
27970
- mov r6, #0
27971
-.L4419:
27972
- bl gc_check_data_one_wl
27973
- subs r10, r0, #0
27974
- beq .L4531
27975
- ldr r3, .L4635+56
27976
- mov r6, #0
27977
- strh r6, [r3, #52] @ movhi
27978
- ldr r3, [r4, #1092]
27979
- ldrh r0, [r3, #80]
27980
- bl ftl_free_sblk
27981
- ldr r2, [r4, #1092]
27982
- ldr r1, [r4, #2804]
27983
- mvn r3, #0
27984
- ldr r0, [r4, #2836]
27985
- strh r3, [r2, #80] @ movhi
27986
- strh r3, [r1, #126] @ movhi
27987
- strh r3, [r2, #130] @ movhi
27988
- bl zbuf_free
27989
- str r6, [r4, #2836]
27990
- strb r6, [r5, #-182]
27991
-.L4630:
27992
- bl flt_sys_flush
27993
- b .L4536
27994
-.L4531:
28231
+ strh r3, [r6, #18] @ movhi
28232
+ b .L4435
28233
+.L4431:
2799528234 ldrh r2, [r8, #12]
2799628235 ldrh r3, [r8, #14]
27997
- ldr r9, .L4635+60
2799828236 cmp r2, r3
27999
- bcc .L4532
28000
- ldr r0, [r9, #2836]
28237
+ bcc .L4432
2800128238 mov r3, #6
28002
- strb r3, [r5, #-182]
28239
+ ldr r0, [r4, #2832]
28240
+ strb r3, [r5, #-144]
2800328241 bl zbuf_free
28004
- str r10, [r9, #2836]
28005
- b .L4536
28006
-.L4532:
28007
- cmp r7, #15
28008
- bls .L4419
28009
- cmp fp, #1
28010
- bne .L4536
28011
- add r6, r6, #1
28012
- uxtb r6, r6
28013
- cmp r6, #4
28014
- bls .L4419
28015
- b .L4536
28016
-.L4420:
28242
+ str r9, [r4, #2832]
28243
+ b .L4435
28244
+.L4432:
28245
+ cmp r6, #15
28246
+ bls .L4320
28247
+ cmp r10, #1
28248
+ bne .L4435
28249
+ add r7, r7, #1
28250
+ uxtb r7, r7
28251
+ cmp r7, #4
28252
+ bls .L4320
28253
+ b .L4435
28254
+.L4319:
2801728255 bl gc_update_l2p_map_new
28018
- mvn r7, #0
2801928256 bl gc_free_src_blk
2802028257 bl ftl_flush
28258
+ mvn r6, #0
2802128259 bl pm_flush
28022
- strh r7, [r6, #80] @ movhi
28260
+ strh r6, [r7, #80] @ movhi
2802328261 bl ftl_ext_info_flush
28024
- ldr r3, [r4, #2804]
28262
+ ldr r3, [r4, #2800]
2802528263 mov r0, #0
28026
- strh r7, [r3, #126] @ movhi
28264
+ strh r6, [r3, #126] @ movhi
2802728265 bl ftl_info_flush
28028
-.L4632:
28266
+.L4534:
2802928267 mov r3, #0
28030
-.L4631:
28031
- strb r3, [r5, #-182]
28032
-.L4536:
28033
- mov r0, #16
28034
- b .L4621
28035
-.L4459:
28036
- mov r0, r6
28037
- b .L4621
28038
-.L4509:
28039
- ldr r1, .L4635+64
28268
+ b .L4533
28269
+.L4409:
2804028270 movw r2, #3430
28041
- ldr r0, .L4635+68
28271
+ ldr r1, .L4535+64
28272
+ ldr r0, .L4535+68
2804228273 bl printk
2804328274 bl dump_stack
28044
- b .L4535
28045
-.L4621:
28046
- add sp, sp, #44
28047
- @ sp needed
28048
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
28275
+ b .L4434
2804928276 .fnend
2805028277 .size zftl_do_gc, .-zftl_do_gc
2805128278 .align 2
2805228279 .global zftl_init
28280
+ .syntax unified
28281
+ .arm
28282
+ .fpu softvfp
2805328283 .type zftl_init, %function
2805428284 zftl_init:
2805528285 .fnstart
2805628286 @ args = 0, pretend = 0, frame = 24
2805728287 @ frame_needed = 0, uses_anonymous_args = 0
28058
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
28288
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2805928289 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
28290
+ mvn r3, #0
28291
+ ldr r5, .L4617
28292
+ mov r6, #0
2806028293 .pad #28
2806128294 sub sp, sp, #28
28062
- ldr r5, .L4721
28063
- mvn r3, #0
28064
- ldr r4, .L4721+4
28065
- mov r6, #0
28066
- ldr r1, .L4721+8
28067
- ldr r0, .L4721+12
28068
- strb r3, [r4, #2824]
28069
- strb r3, [r5, #-2530]
28070
- strb r3, [r5, #-96]
28071
- str r3, [r5, #556]
28072
- strb r6, [r4, #2800]
28073
- strb r6, [r5, #-2529]
28074
- strb r6, [r4, #2801]
28295
+ ldr r4, .L4617+4
28296
+ ldr r9, .L4617+8
28297
+ ldr r1, .L4617+12
28298
+ ldr r0, .L4617+16
28299
+ strb r3, [r4, #2820]
28300
+ strb r3, [r5, #-2536]
28301
+ strb r3, [r5, #-88]
28302
+ str r3, [r5]
28303
+ strb r6, [r4, #2796]
28304
+ strb r6, [r5, #-2535]
28305
+ strb r6, [r4, #2797]
2807528306 bl printk
28076
- ldr r8, .L4721+16
28307
+ ldrb r3, [r9, #16] @ zero_extendqisi2
2807728308 sub r2, r5, #3104
28078
- ldrb r3, [r8, #16] @ zero_extendqisi2
28079
- ldrb fp, [r8, #13] @ zero_extendqisi2
28080
- strb fp, [r4, #2772]
28081
- mov r9, fp, asl #9
28082
- uxth r9, r9
28309
+ ldrb r8, [r9, #13] @ zero_extendqisi2
2808328310 str r3, [sp, #4]
2808428311 ldrb r3, [sp, #4] @ zero_extendqisi2
2808528312 ldr r1, [sp, #4]
28086
- strb r3, [r5, #-3124]
28087
- ldrh r3, [r8, #14]
28088
- strh r3, [r2, #-10] @ movhi
28313
+ lsl r10, r8, #9
28314
+ strb r8, [r5, #-2546]
28315
+ strb r3, [r5, #-3128]
28316
+ uxth r10, r10
28317
+ ldrh r3, [r9, #14]
28318
+ strh r3, [r2, #-14] @ movhi
2808928319 mov r0, r3
28090
- str r3, [sp, #8]
28320
+ str r3, [sp, #12]
2809128321 bl __aeabi_idiv
28092
- sub r1, r5, #3088
28093
- ldrh r10, [r8, #18]
28094
- ldrh ip, [r4, #2]
28095
- strh r0, [r1, #-8] @ movhi
28096
- mov r2, r0
28097
- ldrb r1, [r4, #1101] @ zero_extendqisi2
28098
- ldrb r0, [r8, #17] @ zero_extendqisi2
28099
- ldr r3, [sp, #8]
28100
- strb r1, [r5, #-3064]
28101
- smulbb r1, r0, r1
28102
- strb r0, [r5, #-3130]
28103
- mov r0, #1
28104
- uxtb r7, r1
28105
- movw r1, #1076
28106
- strh r10, [r4, r1] @ movhi
28107
- movw r1, #542
28108
- strh r9, [r5, r1] @ movhi
28109
- sub r1, r5, #3056
28110
- strb r7, [r5, #-3123]
28111
- strh ip, [r1, #-10] @ movhi
28112
-.L4638:
28113
- cmp r0, ip
28114
- uxth r1, r6
28115
- add r6, r6, #1
28116
- movls r0, r0, asl #1
28117
- bls .L4638
28118
-.L4719:
28119
- ldr r0, .L4721+20
28120
- sub r1, r1, #1
28121
- strh r1, [r0, #-12] @ movhi
28122
- mov r0, #0
28123
- mul r1, r3, fp
28124
- mul r6, r10, r1
28125
- str r1, [sp, #8]
28322
+ str r0, [sp, #8]
28323
+ sub r2, r5, #3088
28324
+ ldrh r3, [sp, #8]
2812628325 mov r1, #1
28127
- mov ip, r6, lsr #21
28128
-.L4640:
28129
- cmp r1, ip
28130
- uxth lr, r0
28131
- add r0, r0, #1
28132
- movls r1, r1, asl #1
28133
- bls .L4640
28134
-.L4720:
28135
- ldr r1, .L4721+24
28136
- sub lr, lr, #1
28326
+ ldrb r7, [r4, #1109] @ zero_extendqisi2
28327
+ ldrh fp, [r9, #18]
28328
+ strh r3, [r2, #-8] @ movhi
28329
+ ldrb r2, [r9, #17] @ zero_extendqisi2
28330
+ strb r7, [r5, #-3072]
28331
+ ldr r3, [sp, #12]
28332
+ ldrh r0, [r4, #2]
28333
+ smulbb r7, r7, r2
28334
+ strb r2, [r5, #-3136]
28335
+ movw r2, #1080
28336
+ strh r10, [r5, #-14] @ movhi
28337
+ strh fp, [r4, r2] @ movhi
28338
+ sub r2, r5, #3072
28339
+ uxtb r7, r7
28340
+ strh r0, [r2, #-2] @ movhi
28341
+ strb r7, [r5, #-3127]
28342
+.L4538:
28343
+ cmp r0, r1
28344
+ uxth r2, r6
28345
+ add r6, r6, #1
28346
+ bcs .L4539
28347
+ ldr r1, .L4617+20
28348
+ sub r2, r2, #1
28349
+ mov ip, #0
2813728350 mov r0, #1
28351
+ strh r2, [r1, #-2] @ movhi
28352
+ mul r2, r3, r8
28353
+ mul r1, r2, fp
28354
+ str r2, [sp, #12]
28355
+ lsr lr, r1, #21
28356
+.L4540:
28357
+ cmp lr, r0
28358
+ uxth r2, ip
28359
+ add ip, ip, #1
28360
+ bcs .L4541
28361
+ ldr r9, .L4617+24
28362
+ sub r2, r2, #1
28363
+ uxth r2, r2
28364
+ mul r1, r7, r1
28365
+ ldr r6, .L4617
28366
+ lsr fp, fp, #4
2813828367 str r3, [sp, #20]
28139
- mul r6, r7, r6
28140
- uxth lr, lr
28141
- mul r1, r1, r7
28142
- mov lr, r0, asl lr
28143
- str r2, [sp, #12]
28144
- mov r10, r10, lsr #4
28145
- str r6, [r4, #2780]
28146
- ldr r6, .L4721
28147
- mul r8, lr, r1
28148
- mov r1, fp
28149
- add fp, r6, #564
28150
- add ip, r8, #24576
28151
- str ip, [r6, #560]
28152
- str ip, [sp, #16]
28153
- mov r0, ip
28154
- str r8, [r4, #1032]
28368
+ mul r0, r9, r7
28369
+ str r1, [r4, #2776]
28370
+ mov r1, r8
28371
+ sub r8, r6, #3088
28372
+ lsl r9, r0, r2
28373
+ add r2, r9, #24576
28374
+ str r9, [r4, #1032]
28375
+ str r2, [r6, #4]
28376
+ mov r0, r2
28377
+ str r2, [sp, #16]
2815528378 bl __aeabi_uidiv
28156
- sub r1, r9, #1
28157
- str r0, [r4, #2784]
28158
- add r0, r1, r0, asl #2
28159
- mov r1, r9
28379
+ sub ip, r10, #1
28380
+ str r0, [r4, #2780]
28381
+ mov r1, r10
28382
+ add r0, ip, r0, lsl #2
2816028383 bl __aeabi_uidiv
28161
- ldr r2, [sp, #12]
28162
- strh r0, [fp] @ movhi
28163
- uxth r0, r0
28164
- mul r1, r7, r2
28165
- mov r0, r0, asl #4
28166
- bl __aeabi_idiv
28167
- sub r2, r6, #3072
2816828384 ldr r3, [sp, #8]
28169
- ldr ip, [sp, #16]
28170
- strh r0, [r6, #-152] @ movhi
28385
+ strh r0, [r6, #8] @ movhi
28386
+ uxth r0, r0
28387
+ lsl r0, r0, #4
2817128388 mul r1, r7, r3
28172
- mov r0, ip
28173
- str r2, [sp, #12]
28389
+ bl __aeabi_idiv
28390
+ ldr r3, [sp, #12]
28391
+ ldr r2, [sp, #16]
28392
+ strh r0, [r6, #-176] @ movhi
28393
+ mul r1, r7, r3
28394
+ mov r0, r2
2817428395 sub r1, r1, #1
2817528396 bl __aeabi_uidiv
28176
- cmp r10, #79
28177
- movw ip, #1084
28178
- movls r1, #80
28179
- ldr r2, [sp, #12]
28397
+ cmp fp, #79
28398
+ strh fp, [r8, #-4] @ movhi
28399
+ movls r2, #80
28400
+ mov r1, #2000
28401
+ strhls r2, [r8, #-4] @ movhi
2818028402 add r0, r0, #8
28181
- ldr r3, [sp, #20]
28182
- strh r10, [r2, #-14] @ movhi
28183
- strlsh r1, [r2, #-14] @ movhi
28184
- ldr r1, .L4721
28185
- strh r0, [r2, #-12] @ movhi
28186
- mov r0, #2000
28187
- sub r2, r1, #2528
28188
- strh r0, [r2, #-4] @ movhi
28189
- mov r0, #50
28190
- strh r0, [r2, #-6] @ movhi
28191
- mov r0, #256
28192
- strh r0, [r6, #-156] @ movhi
28193
- mov r0, #48
28194
- strh r0, [r6, #-154] @ movhi
28403
+ ldr r2, .L4617+28
28404
+ strh r0, [r8, #-2] @ movhi
2819528405 mov r0, #32
28196
- strh r0, [r4, ip] @ movhi
28197
- ldr ip, [sp, #4]
28198
- cmp ip, #2
28199
- mov ip, r2
28200
- beq .L4643
28201
- ldrb lr, [r1, #-3116] @ zero_extendqisi2
28202
- cmp lr, #0
28203
- beq .L4644
28204
-.L4643:
28205
- mov r1, #150
28206
- strh r1, [ip, #-6] @ movhi
28207
- mov r1, #64
28208
- strh r1, [r6, #-154] @ movhi
28209
- movw r1, #1084
28210
- mov lr, #12
28211
- strh lr, [r4, r1] @ movhi
28212
- ldrb lr, [r4] @ zero_extendqisi2
28213
- ldr r2, .L4721
28214
- cmp lr, #0
28215
- sub r0, r2, #2528
28216
- bne .L4645
28217
- ldr lr, .L4721+4
28218
- mov r10, #4
28219
- strh r10, [lr, r1] @ movhi
28220
- mov r1, #600
28221
- strh r1, [r0, #-4] @ movhi
28222
- mov r1, #128
28223
- strh r1, [r2, #-156] @ movhi
28224
-.L4645:
28225
- ldrb r2, [r4, #1197] @ zero_extendqisi2
28406
+ ldr r3, [sp, #20]
28407
+ strh r1, [r2, #-10] @ movhi
28408
+ mov r1, #50
28409
+ strh r1, [r2, #-12] @ movhi
28410
+ mov r1, #256
28411
+ strh r1, [r6, #-180] @ movhi
28412
+ mov r1, #48
28413
+ strh r1, [r6, #-178] @ movhi
28414
+ ldr r1, .L4617+32
28415
+ strh r0, [r1] @ movhi
28416
+ ldr r1, [sp, #4]
28417
+ cmp r1, #2
28418
+ mov r1, r2
28419
+ beq .L4543
28420
+ ldrb ip, [r6, #-3120] @ zero_extendqisi2
28421
+ cmp ip, #0
28422
+ beq .L4544
28423
+.L4543:
28424
+ mov r2, #150
28425
+ mov r0, #12
28426
+ strh r2, [r1, #-12] @ movhi
28427
+ mov r2, #64
28428
+ strh r2, [r6, #-178] @ movhi
28429
+ ldr r2, .L4617+32
28430
+ strh r0, [r2] @ movhi
28431
+ ldrb r0, [r4] @ zero_extendqisi2
28432
+ cmp r0, #0
28433
+ moveq r0, #4
28434
+ strheq r0, [r2] @ movhi
28435
+ moveq r2, #600
28436
+ strheq r2, [r1, #-10] @ movhi
28437
+ moveq r2, #128
28438
+ strheq r2, [r6, #-180] @ movhi
28439
+ ldrb r2, [r4, #1159] @ zero_extendqisi2
2822628440 cmp r2, #0
2822728441 movne r2, #200
28228
- strneh r2, [ip, #-6] @ movhi
28442
+ strhne r2, [r1, #-12] @ movhi
2822928443 movne r2, #2000
28230
- strneh r2, [ip, #-4] @ movhi
28231
- b .L4647
28232
-.L4644:
28233
- ldr ip, .L4721+4
28234
- ldrb ip, [ip, #1196] @ zero_extendqisi2
28235
- cmp ip, #0
28236
- strneh r0, [r2, #-6] @ movhi
28237
- strneh r0, [r1, #-154] @ movhi
28238
- movne ip, #1200
28239
- strneh ip, [r2, #-4] @ movhi
28240
-.L4647:
28241
- mul r3, r7, r3
28242
- ldr r7, .L4721+16
28444
+ strhne r2, [r1, #-10] @ movhi
28445
+.L4547:
28446
+ mul r7, r7, r3
2824328447 mov r2, #0
28244
- str r2, [r4, #2820]
28448
+ str r2, [r4, #2812]
2824528449 mov r2, #1
28246
- strb r2, [r6, #545]
28247
- cmp r9, r3, asl #2
28248
- ldrlt r3, .L4721
28249
- movlt r2, #2
28250
- strltb r2, [r3, #545]
28450
+ strb r2, [r6, #-11]
28451
+ cmp r10, r7, lsl #2
28452
+ ldr r7, .L4617+8
28453
+ movlt r3, #2
28454
+ strblt r3, [r6, #-11]
2825128455 ldr r3, [r7]
2825228456 tst r3, #4096
28253
- beq .L4650
28254
- ldr r0, .L4721+28
28255
- mov r1, r8
28457
+ beq .L4550
28458
+ mov r1, r9
28459
+ ldr r0, .L4617+36
2825628460 bl printk
28257
-.L4650:
28461
+.L4550:
2825828462 ldr r3, [r7]
2825928463 tst r3, #4096
28260
- beq .L4651
28261
- ldr r0, .L4721+32
28464
+ beq .L4551
28465
+ ldr r1, [r4, #2776]
28466
+ ldr r0, .L4617+40
28467
+ bl printk
28468
+.L4551:
28469
+ ldr r3, [r7]
28470
+ tst r3, #4096
28471
+ beq .L4552
2826228472 ldr r1, [r4, #2780]
28473
+ ldr r0, .L4617+44
2826328474 bl printk
28264
-.L4651:
28475
+.L4552:
2826528476 ldr r3, [r7]
2826628477 tst r3, #4096
28267
- beq .L4652
28268
- ldr r0, .L4721+36
28269
- ldr r1, [r4, #2784]
28478
+ beq .L4553
28479
+ ldr r1, [r6, #4]
28480
+ ldr r0, .L4617+48
2827028481 bl printk
28271
-.L4652:
28482
+.L4553:
2827228483 ldr r3, [r7]
2827328484 tst r3, #4096
28274
- beq .L4653
28275
- ldr r0, .L4721+40
28276
- ldr r1, [r6, #560]
28485
+ beq .L4554
28486
+ ldrh r1, [r6, #8]
28487
+ ldr r0, .L4617+52
2827728488 bl printk
28278
-.L4653:
28489
+.L4554:
2827928490 ldr r3, [r7]
2828028491 tst r3, #4096
28281
- beq .L4654
28282
- ldr r0, .L4721+44
28283
- ldrh r1, [fp]
28492
+ beq .L4555
28493
+ ldrh r1, [r6, #-14]
28494
+ ldr r0, .L4617+56
2828428495 bl printk
28285
-.L4654:
28496
+.L4555:
2828628497 ldr r3, [r7]
2828728498 tst r3, #4096
28288
- beq .L4655
28289
- movw r3, #542
28290
- ldr r0, .L4721+48
28291
- ldrh r1, [r6, r3]
28499
+ beq .L4556
28500
+ ldrh r1, [r6, #-176]
28501
+ ldr r0, .L4617+60
2829228502 bl printk
28293
-.L4655:
28503
+.L4556:
2829428504 ldr r3, [r7]
2829528505 tst r3, #4096
28296
- beq .L4656
28297
- ldr r0, .L4721+52
28298
- ldrh r1, [r6, #-152]
28506
+ beq .L4557
28507
+ ldrh r1, [r8, #-4]
28508
+ ldr r0, .L4617+64
2829928509 bl printk
28300
-.L4656:
28510
+.L4557:
2830128511 ldr r3, [r7]
2830228512 tst r3, #4096
28303
- beq .L4657
28304
- ldr r3, .L4721+56
28305
- ldr r0, .L4721+60
28306
- ldrh r1, [r3, #-14]
28513
+ beq .L4558
28514
+ ldrh r1, [r8, #-2]
28515
+ ldr r0, .L4617+68
2830728516 bl printk
28308
-.L4657:
28309
- ldr r3, [r7]
28310
- tst r3, #4096
28311
- beq .L4658
28312
- ldr r3, .L4721+56
28313
- ldr r0, .L4721+64
28314
- ldrh r1, [r3, #-12]
28315
- bl printk
28316
-.L4658:
28517
+.L4558:
2831728518 bl zbuf_init
2831828519 mov r0, #16384
28520
+ movw r9, #1080
2831928521 bl ftl_malloc
28320
- movw r9, #1076
28321
- ldr r8, .L4721+68
28322
- str r0, [r5, #204]
28522
+ str r0, [r5, #-52]
2832328523 mov r0, #16384
2832428524 bl ftl_malloc
28325
- str r0, [r5, #212]
28525
+ str r0, [r5, #-44]
2832628526 mov r0, #16384
2832728527 bl ftl_malloc
28528
+ str r0, [r5, #12]
28529
+ mov r0, #256
28530
+ bl ftl_dma32_malloc
28531
+ str r0, [r5, #-76]
28532
+ mov r0, #256
28533
+ bl ftl_dma32_malloc
2832828534 ldrh r3, [r4, r9]
28329
- str r0, [r5, #568]
28535
+ str r0, [r5, #-40]
2833028536 mov r0, #6
2833128537 mul r0, r0, r3
28332
- bl ftl_malloc
28333
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
28538
+ bl ftl_dma32_malloc
28539
+ ldrh r3, [r8, #-8]
2833428540 str r0, [r4, #1036]
28335
- ldrh r0, [r8, #-8]
28336
- mul r0, r3, r0
28337
- mov r0, r0, asl #2
28338
- bl ftl_malloc
28339
- ldrb r3, [r5, #-3123] @ zero_extendqisi2
28541
+ ldrb r0, [r5, #-3127] @ zero_extendqisi2
28542
+ mul r0, r0, r3
28543
+ lsl r0, r0, #2
28544
+ bl ftl_dma32_malloc
2834028545 ldrh r1, [r8, #-8]
28341
- ldr r2, [r5, #212]
28342
- mul r1, r3, r1
28343
- str r2, [r5, #-2548]
28344
- add r3, r2, r1, asl #3
28345
- str r3, [r4, #1088]
28346
- str r0, [r5, #-2544]
28347
- ldrh r5, [r4, r9]
28546
+ str r0, [r5, #-2552]
28547
+ ldrb r0, [r5, #-3127] @ zero_extendqisi2
28548
+ ldr r2, [r5, #-44]
28549
+ ldrh ip, [r4, r9]
28550
+ mul r0, r0, r1
28551
+ str r2, [r5, #-2556]
28552
+ lsl r1, r0, #1
28553
+ add r3, r2, r0, lsl #3
2834828554 ldr r0, [r7]
28349
- mov r5, r5, lsr #1
28555
+ add r1, r1, ip, lsr #1
28556
+ str r3, [r4, #1092]
28557
+ add r1, r2, r1, lsl #2
2835028558 tst r0, #4096
28351
- add r1, r5, r1, asl #1
28352
- add r1, r2, r1, asl #2
28353
- str r1, [r4, #1092]
28354
- beq .L4659
28355
- ldr r0, .L4721+72
28559
+ str r1, [r4, #1096]
28560
+ beq .L4559
28561
+ ldr r0, .L4617+72
2835628562 bl printk
28357
-.L4659:
28358
- movw r3, #1076
28359
- ldrh r5, [r8, #-8]
28360
- ldrh r2, [r4, r3]
28361
- ldrb r3, [r6, #-3123] @ zero_extendqisi2
28362
- ldrh fp, [fp]
28363
- mul r5, r3, r5
28563
+.L4559:
28564
+ ldrh r2, [r8, #-8]
28565
+ movw r3, #1080
28566
+ ldrb r5, [r6, #-3127] @ zero_extendqisi2
28567
+ ldrh r3, [r4, r3]
28568
+ mul r5, r5, r2
28569
+ ldrh r2, [r6, #8]
28570
+ lsl r8, r3, #2
28571
+ add r5, r3, r5, lsl #2
2836428572 ldr r3, [r7]
28365
- mov fp, fp, asl #2
28573
+ add r8, r8, r2, lsl #2
28574
+ lsl r5, r5, #1
2836628575 tst r3, #4096
28367
- add fp, fp, r2, asl #2
28368
- add fp, fp, #704
28369
- add r5, r2, r5, asl #2
28370
- mov r5, r5, asl #1
2837128576 add r5, r5, #632
28372
- beq .L4660
28373
- ldr ip, .L4721
28374
- movw r3, #542
28375
- ldr r0, .L4721+76
28577
+ add r8, r8, #704
28578
+ beq .L4560
28579
+ ldrh r3, [r6, #-14]
28580
+ mov r2, r8
2837628581 mov r1, r5
28377
- mov r2, fp
28378
- ldrh r3, [ip, r3]
28582
+ ldr r0, .L4617+76
2837928583 bl printk
28380
-.L4660:
28381
- movw r3, #542
28382
- ldrh r3, [r6, r3]
28383
- cmp fp, r3
28384
- cmpls r5, r3
28385
- movhi fp, #1
28386
- movls fp, #0
28387
- bls .L4661
28388
-.L4717:
28389
- b .L4717
28390
-.L4661:
28584
+.L4560:
28585
+ ldrh r1, [r6, #-14]
28586
+ cmp r8, r1
28587
+ cmpls r5, r1
28588
+ movhi r5, #1
28589
+ movls r5, #0
28590
+ bls .L4561
28591
+.L4615:
28592
+ b .L4615
28593
+.L4539:
28594
+ lsl r1, r1, #1
28595
+ b .L4538
28596
+.L4541:
28597
+ lsl r0, r0, #1
28598
+ b .L4540
28599
+.L4544:
28600
+ ldrb r1, [r4, #1158] @ zero_extendqisi2
28601
+ cmp r1, #0
28602
+ movne r1, #1200
28603
+ strhne r0, [r2, #-12] @ movhi
28604
+ strhne r1, [r2, #-10] @ movhi
28605
+ strhne r0, [r6, #-178] @ movhi
28606
+ b .L4547
28607
+.L4561:
2839128608 bl sblk_init
2839228609 bl gc_init
2839328610 bl ftl_info_blk_init
2839428611 cmn r0, #1
28395
- beq .L4663
28612
+ beq .L4537
2839628613 bl ftl_ext_info_init
2839728614 mov r0, #1
2839828615 bl pm_init
2839928616 bl lpa_rebuild_hash
28400
- ldr r0, [r4, #1092]
28401
- mov r1, fp
28617
+ ldr r0, [r4, #1096]
28618
+ mov r1, r5
2840228619 add r0, r0, #16
2840328620 bl ftl_open_sblk_recovery
28404
- ldr r1, [r4, #1092]
28405
- add r0, r1, #48
28406
- add r1, r1, #16
28621
+ ldr r0, [r4, #1096]
28622
+ add r1, r0, #16
28623
+ add r0, r0, #48
2840728624 bl ftl_open_sblk_recovery
28408
- ldr r2, [r4, #2804]
28409
- ldr r0, [r4, #1092]
28625
+ ldr r2, [r4, #2800]
28626
+ ldr r0, [r4, #1096]
2841028627 ldr r3, [r2, #8]
2841128628 add r0, r0, #16
2841228629 add r3, r3, #16
2841328630 str r3, [r2, #8]
2841428631 bl ftl_info_data_recovery
28415
- ldr r0, [r4, #1092]
28632
+ ldr r0, [r4, #1096]
2841628633 add r0, r0, #48
2841728634 bl ftl_info_data_recovery
28418
- ldr r0, [r4, #1092]
28635
+ ldr r0, [r4, #1096]
2841928636 add r0, r0, #80
2842028637 bl ftl_info_data_recovery
2842128638 bl gc_recovery
2842228639 bl pm_flush
2842328640 mov r0, #1
2842428641 bl ftl_total_vpn_update
28425
- ldr r3, .L4721
28426
- ldrb r3, [r3, #209] @ zero_extendqisi2
28642
+ ldrb r3, [r6, #-47] @ zero_extendqisi2
2842728643 cmp r3, #0
28428
- ldrne r3, .L4721+4
28429
- ldrne r2, [r3, #2804]
28644
+ ldrne r2, [r4, #2800]
2843028645 ldrne r3, [r2, #68]
2843128646 addne r3, r3, #1
2843228647 strne r3, [r2, #68]
....@@ -28434,63 +28649,64 @@
2843428649 mov r0, #0
2843528650 bl ftl_info_flush
2843628651 bl print_ftl_debug_info
28437
- ldr r3, [r4, #1092]
28438
- ldr r2, .L4721+4
28652
+ ldr r3, [r4, #1096]
2843928653 ldrh r3, [r3, #124]
2844028654 cmp r3, #0
28441
- bne .L4669
28442
- movw r3, #2788
28443
- movw r1, #2792
28444
- ldrh r3, [r2, r3]
28445
- ldrh r2, [r2, r1]
28655
+ bne .L4571
28656
+ ldr r3, .L4617+80
28657
+ movw r2, #2788
28658
+ ldrh r2, [r4, r2]
28659
+ ldrh r3, [r3]
2844628660 add r3, r3, r2
2844728661 cmp r3, #7
28448
- ble .L4669
28449
-.L4667:
28662
+ ble .L4571
28663
+.L4567:
2845028664 mov r0, #0
28451
- b .L4663
28452
-.L4669:
28453
- ldr r6, .L4721+80
28665
+.L4537:
28666
+ add sp, sp, #28
28667
+ @ sp needed
28668
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
28669
+.L4571:
28670
+ ldr r6, .L4617+80
2845428671 mov r5, #16384
28455
-.L4700:
28672
+.L4568:
2845628673 mov r1, #1
2845728674 mov r0, #0
2845828675 bl zftl_do_gc
28459
- mov r0, #1
28460
- mov r1, r0
28676
+ mov r1, #1
28677
+ mov r0, r1
2846128678 bl zftl_do_gc
28462
- ldr r3, [r4, #1092]
28679
+ ldr r3, [r4, #1096]
2846328680 ldrh r2, [r3, #124]
2846428681 cmp r2, #0
28465
- bne .L4666
28682
+ bne .L4566
2846628683 ldrh r2, [r3, #80]
2846728684 movw r3, #65535
2846828685 cmp r2, r3
28469
- bne .L4666
28470
- ldr r2, .L4721+84
28686
+ bne .L4566
28687
+ ldr r2, .L4617+84
2847128688 ldrh r3, [r6]
2847228689 ldrh r2, [r2]
2847328690 add r3, r3, r2
2847428691 cmp r3, #7
28475
- bgt .L4667
28476
-.L4666:
28692
+ bgt .L4567
28693
+.L4566:
2847728694 subs r5, r5, #1
28478
- bne .L4700
28479
- b .L4667
28480
-.L4663:
28481
- add sp, sp, #28
28482
- @ sp needed
28483
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
28484
-.L4722:
28695
+ bne .L4568
28696
+ b .L4567
28697
+.L4618:
2848528698 .align 2
28486
-.L4721:
28699
+.L4617:
2848728700 .word .LANCHOR3
2848828701 .word .LANCHOR0
28489
- .word .LC2
28490
- .word .LC1
2849128702 .word .LANCHOR2
28492
- .word .LANCHOR3-3120
28703
+ .word .LC1
28704
+ .word .LC2
28705
+ .word .LANCHOR3-3136
2849328706 .word 1892352
28707
+ .word .LANCHOR3-2528
28708
+ .word .LANCHOR0+1088
28709
+ .word .LC302
2849428710 .word .LC303
2849528711 .word .LC304
2849628712 .word .LC305
....@@ -28498,202 +28714,205 @@
2849828714 .word .LC307
2849928715 .word .LC308
2850028716 .word .LC309
28501
- .word .LANCHOR3-3072
2850228717 .word .LC310
2850328718 .word .LC311
28504
- .word .LANCHOR3-3088
2850528719 .word .LC312
28506
- .word .LC313
28720
+ .word .LANCHOR0+2784
2850728721 .word .LANCHOR0+2788
28508
- .word .LANCHOR0+2792
2850928722 .fnend
2851028723 .size zftl_init, .-zftl_init
2851128724 .align 2
2851228725 .global rk_ftl_init
28726
+ .syntax unified
28727
+ .arm
28728
+ .fpu softvfp
2851328729 .type rk_ftl_init, %function
2851428730 rk_ftl_init:
2851528731 .fnstart
2851628732 @ args = 0, pretend = 0, frame = 0
2851728733 @ frame_needed = 0, uses_anonymous_args = 0
28518
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
28519
- .save {r3, r4, r5, r6, r7, lr}
28734
+ ldr r3, .L4634
2852028735 mov r0, #68
28521
- ldr r3, .L4739
28736
+ push {r4, r5, r6, r7, r8, lr}
28737
+ .save {r4, r5, r6, r7, r8, lr}
2852228738 mov r5, #0
28523
- ldr r4, .L4739+4
28739
+ ldr r4, .L4634+4
2852428740 ldr r3, [r3]
28525
- str r5, [r4, #-140]
28526
- strb r5, [r4, #572]
28527
- str r3, [r4, #-144]
28528
- bl ftl_malloc
28741
+ str r5, [r4, #-164]
28742
+ strb r5, [r4, #16]
28743
+ str r3, [r4, #-168]
28744
+ str r5, [r4, #-152]
28745
+ bl ftl_dma32_malloc
2852928746 cmp r0, r5
28530
- str r0, [r4, #-136]
28531
- bne .L4724
28532
-.L4726:
28533
- mvn r0, #0
28534
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
28535
-.L4724:
28747
+ str r0, [r4, #-160]
28748
+ bne .L4620
28749
+.L4622:
28750
+ mvn r5, #0
28751
+.L4619:
28752
+ mov r0, r5
28753
+ pop {r4, r5, r6, r7, r8, pc}
28754
+.L4620:
2853628755 mov r0, #2048
28537
- bl ftl_malloc
28538
- add r1, r4, #580
28539
- str r5, [r4, #-132]
28540
- str r5, [r4, #580]
28541
- str r0, [r4, #576]
28542
- sub r0, r4, #132
28756
+ bl ftl_dma32_malloc
28757
+ mov r1, r4
28758
+ str r0, [r4, #20]
28759
+ str r5, [r1, #24]!
28760
+ sub r0, r4, #156
28761
+ str r5, [r4, #-156]
2854328762 bl rknand_get_reg_addr
28544
- ldr r3, [r4, #-132]
28763
+ ldr r3, [r4, #-156]
2854528764 cmp r3, #0
28546
- beq .L4726
28765
+ beq .L4622
2854728766 bl rk_nandc_irq_init
28548
- mov r1, r5
28549
- mov r2, r5
2855028767 mov r3, #2048
28551
- ldr r0, [r4, #576]
28768
+ mov r2, r5
28769
+ mov r1, r5
28770
+ ldr r0, [r4, #20]
2855228771 bl flash_sram_load_store
2855328772 bl rknand_flash_cs_init
28554
- ldr r3, [r4, #-136]
28555
- ldr r2, .L4739+8
28556
- ldr r0, [r4, #-132]
28773
+ ldr r3, [r4, #-160]
28774
+ ldr r2, .L4634+8
28775
+ ldr r0, [r4, #-156]
2855728776 str r2, [r3, #40]
28558
- ldr r2, .L4739+12
28777
+ ldr r2, .L4634+12
2855928778 str r2, [r3, #32]
28560
- ldr r2, .L4739+16
28779
+ ldr r2, .L4634+16
2856128780 str r2, [r3, #44]
28562
- ldr r2, .L4739+20
28781
+ ldr r2, .L4634+20
2856328782 str r2, [r3, #48]
28564
- ldr r2, .L4739+24
28783
+ ldr r2, .L4634+24
2856528784 str r2, [r3, #36]
28566
- ldr r2, .L4739+28
28785
+ ldr r2, .L4634+28
2856728786 str r2, [r3, #56]
28568
- ldr r2, .L4739+32
28787
+ ldr r2, .L4634+32
2856928788 str r2, [r3, #20]
28570
- ldr r2, .L4739+36
28789
+ ldr r2, .L4634+36
2857128790 str r2, [r3, #24]
28572
- ldr r2, .L4739+40
28791
+ ldr r2, .L4634+40
2857328792 str r2, [r3, #12]
28574
- ldr r2, .L4739+44
28793
+ ldr r2, .L4634+44
2857528794 str r2, [r3, #16]
28576
- ldr r2, .L4739+48
28795
+ ldr r2, .L4634+48
2857728796 str r2, [r3, #4]
28578
- ldr r2, .L4739+52
28797
+ ldr r2, .L4634+52
2857928798 str r2, [r3, #8]
28580
- ldr r2, .L4739+56
28799
+ ldr r2, .L4634+56
2858128800 str r2, [r3, #60]
28582
- ldr r2, .L4739+60
28801
+ ldr r2, .L4634+60
2858328802 str r2, [r3, #64]
28584
- ldr r2, .L4739+64
28803
+ ldr r2, .L4634+64
2858528804 str r2, [r3, #52]
28586
- ldr r2, .L4739+68
28805
+ ldr r2, .L4634+68
2858728806 str r2, [r3, #28]
2858828807 bl nand_flash_init
2858928808 subs r7, r0, #0
28590
- bne .L4727
28809
+ bne .L4623
2859128810 bl zftl_init
2859228811 mov r5, r0
2859328812 bl zftl_proc_debug_init
2859428813 mov r3, #1
28595
- strb r3, [r4, #572]
28596
- b .L4728
28597
-.L4727:
28598
- ldr r3, [r4, #-136]
28814
+ strb r3, [r4, #16]
28815
+.L4624:
28816
+ mov r1, r5
28817
+ ldr r0, .L4634+72
28818
+ bl printk
28819
+ b .L4619
28820
+.L4623:
28821
+ ldr r3, [r4, #-160]
2859928822 mov r6, r4
28600
- ldr r2, .L4739+72
28601
- ldr r0, [r4, #-132]
28602
- ldr r4, .L4739+76
28823
+ ldr r2, .L4634+76
28824
+ ldr r0, [r4, #-156]
28825
+ ldr r4, .L4634+80
2860328826 str r2, [r3, #40]
28604
- ldr r2, .L4739+80
28827
+ ldr r2, .L4634+84
2860528828 str r2, [r3, #32]
28606
- ldr r2, .L4739+84
28829
+ ldr r2, .L4634+88
2860728830 str r2, [r3, #44]
28608
- ldr r2, .L4739+88
28831
+ ldr r2, .L4634+92
2860928832 str r2, [r3, #48]
28610
- ldr r2, .L4739+92
28833
+ ldr r2, .L4634+96
2861128834 str r2, [r3, #36]
28612
- ldr r2, .L4739+96
28835
+ ldr r2, .L4634+100
2861328836 str r2, [r3, #56]
28614
- ldr r2, .L4739+100
28837
+ ldr r2, .L4634+104
2861528838 str r2, [r3, #20]
28616
- ldr r2, .L4739+104
28839
+ ldr r2, .L4634+108
2861728840 str r2, [r3, #24]
28618
- ldr r2, .L4739+108
28841
+ ldr r2, .L4634+112
2861928842 str r2, [r3, #12]
28620
- ldr r2, .L4739+112
28843
+ ldr r2, .L4634+116
2862128844 str r2, [r3, #16]
28622
- ldr r2, .L4739+116
28845
+ ldr r2, .L4634+120
2862328846 str r2, [r3, #4]
28624
- ldr r2, .L4739+120
28847
+ ldr r2, .L4634+124
2862528848 str r2, [r3, #8]
28626
- ldr r2, .L4739+124
28849
+ ldr r2, .L4634+128
2862728850 str r2, [r3, #60]
28628
- ldr r2, .L4739+128
28851
+ ldr r2, .L4634+132
2862928852 str r2, [r3, #64]
28630
- ldr r2, .L4739+132
28853
+ ldr r2, .L4634+136
2863128854 str r2, [r3, #52]
28632
- ldr r2, .L4739+136
28855
+ ldr r2, .L4634+140
2863328856 str r2, [r3, #28]
2863428857 bl FlashInit
2863528858 cmn r7, #2
2863628859 mov r5, r0
28637
- bne .L4729
28638
- ldr r1, .L4739+140
28860
+ bne .L4625
2863928861 mov r2, #32
28862
+ ldr r1, .L4634+144
2864028863 add r0, r4, #4
2864128864 bl ftl_memcpy
2864228865 ldrb r0, [r4, #22] @ zero_extendqisi2
2864328866 bl flash_lsb_page_tbl_build
2864428867 ldrh r3, [r4, #14]
2864528868 strh r3, [r4, #30] @ movhi
28646
-.L4729:
28647
- ldr r3, .L4739+144
28869
+.L4625:
28870
+ ldr r3, .L4634+148
2864828871 ldr r2, [r3]
28649
- ldr r3, .L4739+148
28872
+ ldr r3, .L4634+152
2865028873 cmp r2, r3
28651
- ldr r2, .L4739+152
28652
- bne .L4730
28653
- ldr r3, .L4739+156
28874
+ ldr r2, .L4634+156
28875
+ bne .L4626
28876
+ ldr r3, .L4634+160
2865428877 ldrb r3, [r3] @ zero_extendqisi2
2865528878 cmp r3, #0
28656
- bne .L4731
28657
-.L4730:
28879
+ bne .L4627
28880
+.L4626:
2865828881 mov r3, #0
28659
- strb r3, [r2, #1102]
28882
+ strb r3, [r2, #1110]
2866028883 strb r3, [r2]
28661
-.L4731:
28662
- ldr r1, .L4739+160
28884
+.L4627:
28885
+ ldr r1, .L4634+164
2866328886 mov r0, #1
2866428887 ldrh ip, [r4, #14]
2866528888 mov r3, #0
28666
- str r3, [r6, #-108]
28889
+ str r3, [r6, #-100]
2866728890 ldrb r1, [r1] @ zero_extendqisi2
28668
- strb r1, [r2, #1100]
28669
- ldr r1, .L4739+164
28891
+ strb r1, [r2, #1108]
28892
+ ldr r1, .L4634+168
2867028893 ldrb r1, [r1] @ zero_extendqisi2
28671
- strb r1, [r2, #1172]
28672
-.L4732:
28673
- cmp r0, ip
28894
+ strb r1, [r2, #1193]
28895
+.L4628:
28896
+ cmp ip, r0
2867428897 uxth r1, r3
2867528898 add r3, r3, #1
28676
- movls r0, r0, asl #1
28677
- bls .L4732
28678
-.L4738:
28679
- ldr r3, .L4739+168
28680
- sub r1, r1, #1
28681
- strh r1, [r3, #-12] @ movhi
28899
+ bcs .L4629
28900
+ sub r3, r1, #1
28901
+ ldr r1, .L4634+172
28902
+ strh r3, [r1, #-2] @ movhi
2868228903 mov r3, #0
2868328904 cmp r5, r3
28684
- strb r3, [r2, #1135]
28685
- bne .L4728
28905
+ strb r3, [r2, #1143]
28906
+ bne .L4624
2868628907 bl FtlInit
2868728908 mov r5, r0
28688
-.L4728:
28689
- mov r1, r5
28690
- ldr r0, .L4739+172
28691
- bl printk
28692
- mov r0, r5
28693
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
28694
-.L4740:
28909
+ b .L4624
28910
+.L4629:
28911
+ lsl r0, r0, #1
28912
+ b .L4628
28913
+.L4635:
2869528914 .align 2
28696
-.L4739:
28915
+.L4634:
2869728916 .word jiffies
2869828917 .word .LANCHOR3
2869928918 .word zftl_deinit
....@@ -28712,6 +28931,7 @@
2871228931 .word zftl_proc_ftl_read
2871328932 .word zftl_do_gc
2871428933 .word zftl_discard
28934
+ .word .LC313
2871528935 .word ftl_deinit
2871628936 .word .LANCHOR2
2871728937 .word ftl_cache_flush
....@@ -28736,1196 +28956,1378 @@
2873628956 .word gFlashSlcMode
2873728957 .word gNandFlashIDBEccBits
2873828958 .word gNandFlashEccBits
28739
- .word .LANCHOR3-3120
28740
- .word .LC314
28959
+ .word .LANCHOR3-3136
2874128960 .fnend
2874228961 .size rk_ftl_init, .-rk_ftl_init
2874328962 .align 2
2874428963 .global zftl_write
28964
+ .syntax unified
28965
+ .arm
28966
+ .fpu softvfp
2874528967 .type zftl_write, %function
2874628968 zftl_write:
2874728969 .fnstart
28748
- @ args = 0, pretend = 0, frame = 16
28970
+ @ args = 0, pretend = 0, frame = 24
2874928971 @ frame_needed = 0, uses_anonymous_args = 0
28750
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
28972
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2875128973 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
28752
- mov r9, r3
28753
- ldr r3, .L4776
28754
- .pad #28
28755
- sub sp, sp, #28
28756
- mov r5, r0
28757
- mov r4, r1
28758
- mov r6, r2
28974
+ mov r10, r3
28975
+ ldr r3, .L4666
28976
+ .pad #36
28977
+ sub sp, sp, #36
28978
+ mov r4, r0
28979
+ mov r6, r1
28980
+ mov r5, r2
2875928981 ldr r3, [r3]
2876028982 tst r3, #4096
28761
- beq .L4742
28762
- ldr r3, [r9]
28763
- mov r1, r5
28764
- ldr r0, .L4776+4
28765
- mov r2, r4
28983
+ beq .L4637
28984
+ ldr r3, [r10]
2876628985 str r3, [sp]
28767
- mov r3, r6
28986
+ mov r3, r2
28987
+ mov r2, r1
28988
+ mov r1, r0
28989
+ ldr r0, .L4666+4
2876828990 bl printk
28769
-.L4742:
28770
- cmp r5, #0
28771
- ldreq r3, .L4776+8
28772
- moveq r5, #24576
28773
- ldreq r3, [r3, #1032]
28774
- beq .L4744
28775
-.L4743:
28776
- cmp r5, #3
28777
- bhi .L4762
28778
- mov r5, r5, asl #13
28779
- mov r3, #8192
28780
-.L4744:
28781
- cmp r6, r3
28782
- cmpls r4, r3
28783
- movcs fp, #1
28784
- movcc fp, #0
28785
- bcs .L4762
28786
- add r1, r4, r6
28787
- cmp r1, r3
28788
- bhi .L4762
28789
- add r4, r5, r4
28790
- ldr r5, .L4776+8
28991
+.L4637:
28992
+ cmp r4, #0
28993
+ bne .L4638
28994
+ ldr r3, .L4666+8
28995
+ mov r4, #24576
28996
+ ldr r2, [r3, #1032]
28997
+.L4639:
28998
+ cmp r2, r5
28999
+ cmpcs r2, r6
29000
+ movls fp, #1
29001
+ movhi fp, #0
29002
+ bls .L4657
29003
+ add r1, r6, r5
29004
+ cmp r2, r1
29005
+ bcc .L4657
29006
+ ldr r8, .L4666+12
29007
+ add r4, r4, r6
2879129008 mov r0, r4
28792
- ldrb r7, [r5, #2772] @ zero_extendqisi2
28793
- mov r1, r7
29009
+ ldrb r6, [r8, #-2546] @ zero_extendqisi2
29010
+ mov r1, r6
2879429011 bl __aeabi_uidiv
28795
- mov r1, r7
28796
- mov r10, r0
28797
- sub r0, r6, #1
29012
+ mov r9, r0
29013
+ sub r0, r5, #1
29014
+ mov r1, r6
2879829015 add r0, r0, r4
28799
- mov r8, r10
2880029016 bl __aeabi_uidiv
28801
- add r3, r4, r6
28802
- rsb r7, r10, r0
28803
- str r0, [sp, #8]
29017
+ str r8, [sp, #16]
29018
+ sub r7, r0, r9
29019
+ ldr r8, .L4666+8
2880429020 add r7, r7, #1
28805
- str fp, [sp, #12]
28806
- str r3, [sp, #16]
28807
-.L4746:
29021
+ mov r6, r9
29022
+ add r3, r4, r5
29023
+ str r0, [sp, #12]
29024
+ str fp, [sp, #20]
29025
+ str r3, [sp, #24]
29026
+.L4641:
2880829027 cmp r7, #0
28809
- beq .L4774
28810
- ldrb r3, [r5, #2800] @ zero_extendqisi2
28811
- cmp r3, #0
28812
- beq .L4747
28813
- ldr r3, .L4776+8
28814
- ldrb r3, [r3, #2774] @ zero_extendqisi2
28815
- cmp r3, #2
28816
- bhi .L4747
29028
+ bne .L4650
2881729029 bl ftl_write_commit
28818
-.L4747:
29030
+ mov r1, #1
29031
+ mov r0, r7
29032
+ bl zftl_do_gc
29033
+ ldr r3, [r8, #1096]
29034
+ ldr r4, .L4666+16
29035
+ ldrh r3, [r3, #124]
29036
+ cmp r3, #0
29037
+ bne .L4651
29038
+ movw r2, #2788
29039
+ ldrh r3, [r4]
29040
+ ldrh r2, [r8, r2]
29041
+ add r3, r3, r2
29042
+ cmp r3, #11
29043
+ bgt .L4652
29044
+.L4651:
29045
+ mov r1, #1
29046
+ mov r0, #0
29047
+ bl zftl_do_gc
29048
+.L4652:
29049
+ ldr r5, .L4666+20
29050
+.L4653:
29051
+ ldrh r3, [r4]
29052
+ ldrh r2, [r5]
29053
+ add r3, r3, r2
29054
+ cmp r3, #7
29055
+ ble .L4654
29056
+ bl timer_get_time
29057
+ ldr r3, [sp, #16]
29058
+ str r0, [r3, #-4]
29059
+ mov r0, #0
29060
+.L4636:
29061
+ add sp, sp, #36
29062
+ @ sp needed
29063
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29064
+.L4638:
29065
+ cmp r4, #3
29066
+ bhi .L4657
29067
+ lsl r4, r4, #13
29068
+ mov r2, #8192
29069
+ b .L4639
29070
+.L4650:
29071
+ ldrb r3, [r8, #2796] @ zero_extendqisi2
29072
+ cmp r3, #0
29073
+ beq .L4642
29074
+ ldrb r3, [r8, #2769] @ zero_extendqisi2
29075
+ cmp r3, #2
29076
+ bhi .L4642
29077
+ bl ftl_write_commit
29078
+.L4642:
2881929079 mov r0, #0
2882029080 bl buf_alloc
2882129081 subs fp, r0, #0
28822
- bne .L4748
29082
+ bne .L4643
2882329083 bl ftl_write_commit
28824
- b .L4746
28825
-.L4748:
28826
- ldrb r3, [sp, #12] @ zero_extendqisi2
28827
- rsb r0, r10, r8
28828
- clz r0, r0
28829
- ldrb r2, [r5, #2772] @ zero_extendqisi2
29084
+ b .L4641
29085
+.L4643:
29086
+ ldrb r3, [sp, #20] @ zero_extendqisi2
2883029087 strb r3, [fp, #41]
28831
- mov r0, r0, lsr #5
28832
- ldr r3, [sp, #8]
29088
+ ldr r3, [sp, #16]
29089
+ ldrb r2, [r3, #-2546] @ zero_extendqisi2
29090
+ ldr r3, [sp, #12]
2883329091 strb r2, [fp, #40]
28834
- rsb r1, r3, r8
28835
- clz r1, r1
28836
- mov r1, r1, lsr #5
28837
- orrs r3, r1, r0
28838
- beq .L4751
28839
- cmp r0, #0
28840
- beq .L4752
29092
+ cmp r6, r3
29093
+ cmpne r6, r9
29094
+ bne .L4646
29095
+ cmp r6, r9
29096
+ smulbbne r2, r6, r2
29097
+ ldrne r3, [sp, #24]
29098
+ subne r2, r3, r2
29099
+ bne .L4665
2884129100 mov r1, r2
2884229101 mov r0, r4
28843
- str r2, [sp, #20]
29102
+ str r2, [sp, #28]
2884429103 bl __aeabi_uidivmod
28845
- ldr r2, [sp, #20]
29104
+ ldr r2, [sp, #28]
2884629105 uxtb r1, r1
2884729106 strb r1, [fp, #41]
28848
- rsb r2, r1, r2
29107
+ sub r2, r2, r1
2884929108 uxtb r2, r2
28850
- cmp r2, r6
28851
- strhib r6, [fp, #40]
28852
- bhi .L4751
28853
- b .L4773
28854
-.L4752:
28855
- cmp r1, #0
28856
- beq .L4751
28857
- smulbb r2, r8, r2
28858
- ldr r3, [sp, #16]
28859
- rsb r2, r2, r3
28860
-.L4773:
29109
+ cmp r5, r2
29110
+ strbcc r5, [fp, #40]
29111
+ bcc .L4646
29112
+.L4665:
2886129113 strb r2, [fp, #40]
28862
-.L4751:
28863
- ldrb r0, [fp, #41] @ zero_extendqisi2
28864
- sub r7, r7, #1
29114
+.L4646:
29115
+ ldrb ip, [fp, #41] @ zero_extendqisi2
29116
+ mov r1, r10
2886529117 ldrb r2, [fp, #40] @ zero_extendqisi2
28866
- ldr r1, [fp, #4]
28867
- mov r2, r2, asl #9
28868
- add r0, r1, r0, asl #9
28869
- mov r1, r9
29118
+ sub r7, r7, #1
29119
+ ldr r0, [fp, #4]
29120
+ lsl r2, r2, #9
29121
+ add r0, r0, ip, lsl #9
2887029122 bl ftl_memcpy
28871
- ldr r1, [r5, #2804]
28872
- str r8, [fp, #20]
28873
- add r8, r8, #1
29123
+ ldr r1, [r8, #2800]
29124
+ str r6, [fp, #20]
29125
+ add r6, r6, #1
2887429126 ldr r2, [r1, #8]
2887529127 add r0, r2, #1
2887629128 str r0, [r1, #8]
28877
- str r2, [fp, #16]
2887829129 mov r0, fp
29130
+ str r2, [fp, #16]
2887929131 bl ftl_write_buf
2888029132 ldrb r3, [fp, #40] @ zero_extendqisi2
28881
- add r9, r9, r3, asl #9
28882
- b .L4746
28883
-.L4774:
28884
- bl ftl_write_commit
28885
- mov r0, r7
28886
- mov r1, #1
28887
- bl zftl_do_gc
28888
- ldr r3, [r5, #1092]
28889
- ldr r2, .L4776+8
28890
- ldrh r3, [r3, #124]
28891
- cmp r3, #0
28892
- bne .L4756
28893
- movw r3, #2788
28894
- movw r1, #2792
28895
- ldrh r3, [r2, r3]
28896
- ldrh r2, [r2, r1]
28897
- add r3, r3, r2
28898
- cmp r3, #11
28899
- bgt .L4757
28900
-.L4756:
28901
- mov r0, #0
28902
- mov r1, #1
28903
- bl zftl_do_gc
28904
-.L4757:
28905
- ldr r4, .L4776+12
28906
-.L4758:
28907
- ldr r2, .L4776+16
28908
- ldrh r3, [r4]
28909
- ldrh r2, [r2]
28910
- add r3, r3, r2
28911
- cmp r3, #7
28912
- bgt .L4775
29133
+ add r10, r10, r3, lsl #9
29134
+ b .L4641
29135
+.L4654:
2891329136 mov r1, #1
2891429137 mov r0, #0
2891529138 bl zftl_do_gc
28916
- mov r0, #1
28917
- mov r1, r0
29139
+ mov r1, #1
29140
+ mov r0, r1
2891829141 bl zftl_do_gc
28919
- b .L4758
28920
-.L4775:
28921
- bl timer_get_time
28922
- ldr r3, .L4776+20
28923
- str r0, [r3, #552]
28924
- mov r0, #0
28925
- b .L4745
28926
-.L4762:
29142
+ b .L4653
29143
+.L4657:
2892729144 mvn r0, #0
28928
-.L4745:
28929
- add sp, sp, #28
28930
- @ sp needed
28931
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
28932
-.L4777:
29145
+ b .L4636
29146
+.L4667:
2893329147 .align 2
28934
-.L4776:
29148
+.L4666:
2893529149 .word .LANCHOR2
28936
- .word .LC315
29150
+ .word .LC314
2893729151 .word .LANCHOR0
28938
- .word .LANCHOR0+2788
28939
- .word .LANCHOR0+2792
2894029152 .word .LANCHOR3
29153
+ .word .LANCHOR0+2784
29154
+ .word .LANCHOR0+2788
2894129155 .fnend
2894229156 .size zftl_write, .-zftl_write
2894329157 .align 2
2894429158 .global zftl_vendor_write
29159
+ .syntax unified
29160
+ .arm
29161
+ .fpu softvfp
2894529162 .type zftl_vendor_write, %function
2894629163 zftl_vendor_write:
2894729164 .fnstart
2894829165 @ args = 0, pretend = 0, frame = 0
2894929166 @ frame_needed = 0, uses_anonymous_args = 0
2895029167 @ link register save eliminated.
28951
- mov ip, r1
2895229168 mov r3, r2
29169
+ mov r2, r1
2895329170 add r1, r0, #512
28954
- mov r2, ip
2895529171 mov r0, #2
2895629172 b zftl_write
2895729173 .fnend
2895829174 .size zftl_vendor_write, .-zftl_vendor_write
2895929175 .align 2
2896029176 .global zftl_sys_write
29177
+ .syntax unified
29178
+ .arm
29179
+ .fpu softvfp
2896129180 .type zftl_sys_write, %function
2896229181 zftl_sys_write:
2896329182 .fnstart
2896429183 @ args = 0, pretend = 0, frame = 0
2896529184 @ frame_needed = 0, uses_anonymous_args = 0
28966
- str lr, [sp, #-4]!
28967
- .save {lr}
28968
- mov ip, r1
28969
- mov lr, r0
29185
+ @ link register save eliminated.
2897029186 mov r3, r2
28971
- mov r1, lr
29187
+ mov r2, r1
29188
+ mov r1, r0
2897229189 mov r0, #2
28973
- mov r2, ip
28974
- ldr lr, [sp], #4
2897529190 b zftl_write
2897629191 .fnend
2897729192 .size zftl_sys_write, .-zftl_sys_write
2897829193 .align 2
2897929194 .global zftl_discard
29195
+ .syntax unified
29196
+ .arm
29197
+ .fpu softvfp
2898029198 .type zftl_discard, %function
2898129199 zftl_discard:
2898229200 .fnstart
2898329201 @ args = 0, pretend = 0, frame = 24
2898429202 @ frame_needed = 0, uses_anonymous_args = 0
28985
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
29203
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2898629204 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
28987
- mov r4, r1
28988
- ldr r6, .L4832
2898929205 .pad #36
2899029206 sub sp, sp, #36
28991
- ldr r5, [r6, #1032]
28992
- cmp r1, r5
28993
- cmpls r0, r5
29207
+ ldr r7, .L4720
29208
+ ldr r3, [r7, #1032]
29209
+ cmp r1, r3
29210
+ cmpls r0, r3
2899429211 movcs r2, #1
2899529212 movcc r2, #0
28996
- bcs .L4803
28997
- add r3, r0, r1
28998
- cmp r3, r5
28999
- bhi .L4803
29000
- ldr r3, .L4832+4
29001
- add r7, r0, #24576
29002
- ldr fp, .L4832+8
29213
+ bcs .L4692
29214
+ mov r4, r1
29215
+ add r1, r0, r1
29216
+ cmp r3, r1
29217
+ bcc .L4692
29218
+ ldr r3, .L4720+4
29219
+ add r8, r0, #24576
29220
+ ldr r6, .L4720+8
2900329221 ldr r0, [r3]
29004
- ldr r5, [fp, #584]
29005
- mov r9, fp
29006
- tst r0, #4096
29222
+ ldr r1, [r6, #28]
2900729223 str r3, [sp, #16]
29008
- add r1, r1, r5
29009
- str r1, [fp, #584]
29010
- beq .L4783
29224
+ tst r0, #4096
29225
+ add r1, r4, r1
29226
+ str r1, [r6, #28]
29227
+ beq .L4672
2901129228 str r2, [sp]
2901229229 mov r3, r4
29013
- ldr r0, .L4832+12
29014
- mov r2, r7
29230
+ mov r2, r8
29231
+ ldr r0, .L4720+12
2901529232 bl printk
29016
-.L4783:
29017
- ldr r3, [r6, #2804]
29233
+.L4672:
29234
+ ldr r3, [r7, #2800]
2901829235 ldr r10, [r3, #8]
2901929236 add r2, r10, #1
2902029237 str r2, [r3, #8]
2902129238 bl ftl_write_commit
2902229239 bl ftl_flush
29023
- ldrb r8, [r6, #2772] @ zero_extendqisi2
29024
- mov r0, r7
29025
- mov r1, r8
29240
+ ldrb r9, [r6, #-2546] @ zero_extendqisi2
29241
+ mov r0, r8
29242
+ mov r1, r9
2902629243 bl __aeabi_uidiv
29027
- mls fp, r8, r0, r7
29244
+ mov r1, r9
2902829245 mov r5, r0
29029
- cmp fp, #0
29030
- beq .L4784
29031
- rsb r8, fp, r8
29032
- cmp r8, r4
29033
- movcs r8, r4
29246
+ mov r0, r8
29247
+ bl __aeabi_uidivmod
29248
+ subs fp, r1, #0
29249
+ beq .L4673
29250
+ sub r9, r9, fp
29251
+ mov r0, r5
29252
+ cmp r9, r4
29253
+ movcs r9, r4
2903429254 bl lpa_hash_get_ppa
2903529255 cmn r0, #1
2903629256 str r0, [sp, #24]
29037
- bne .L4785
29038
- mov r0, r5
29039
- add r1, sp, #24
29257
+ bne .L4674
2904029258 mov r2, #0
29259
+ add r1, sp, #24
29260
+ mov r0, r5
2904129261 bl pm_log2phys
29042
-.L4785:
29262
+.L4674:
2904329263 ldr r3, [sp, #24]
2904429264 cmn r3, #1
29045
- uxth r3, r8
29265
+ uxth r3, r9
2904629266 str r3, [sp, #12]
29047
- beq .L4787
29267
+ beq .L4676
2904829268 mov r0, #0
2904929269 bl buf_alloc
2905029270 subs r3, r0, #0
29051
- beq .L4787
29271
+ beq .L4676
2905229272 ldr r0, [r3, #4]
2905329273 mov r1, #0
2905429274 str r5, [r3, #20]
2905529275 strb fp, [r3, #41]
29056
- add r0, r0, fp, asl #9
29057
- strb r8, [r3, #40]
29276
+ strb r9, [r3, #40]
2905829277 str r10, [r3, #16]
29278
+ add r0, r0, fp, lsl #9
2905929279 str r3, [sp, #20]
2906029280 ldr r3, [sp, #12]
29061
- mov r2, r3, asl #9
29281
+ lsl r2, r3, #9
2906229282 bl ftl_memset
2906329283 ldr r3, [sp, #20]
2906429284 mov r0, r3
2906529285 bl ftl_write_buf
2906629286 bl ftl_write_commit
29067
- ldr r2, [r6, #2804]
29287
+ ldr r2, [r7, #2800]
2906829288 ldr r3, [r2, #76]
2906929289 add r3, r3, #1
2907029290 str r3, [r2, #76]
29071
-.L4787:
29291
+.L4676:
2907229292 ldr r3, [sp, #12]
2907329293 add r5, r5, #1
29074
- rsb r4, r3, r4
29075
-.L4784:
29294
+ sub r4, r4, r3
29295
+.L4673:
2907629296 cmp r4, #0
29077
- beq .L4789
29297
+ beq .L4678
2907829298 bl ftl_flush
29079
-.L4789:
29080
- ldr r8, .L4832
29299
+.L4678:
29300
+ mov r9, #0
2908129301 mvn r3, #0
29082
- ldr fp, .L4832+16
2908329302 str r3, [sp, #28]
29084
-.L4790:
29085
- ldrb r3, [r6, #2772] @ zero_extendqisi2
29303
+.L4679:
29304
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
2908629305 cmp r4, r3
29087
- bcc .L4831
29088
- mov r0, r5
29089
- bl lpa_hash_get_ppa
29090
- cmn r0, #1
29091
- str r0, [sp, #24]
29092
- beq .L4791
29093
- mov r0, #0
29094
- bl buf_alloc
29095
- subs r3, r0, #0
29096
- beq .L4793
29097
- ldrb r2, [r8, #2772] @ zero_extendqisi2
29098
- mov r1, #0
29099
- str r5, [r3, #20]
29100
- strb r1, [r3, #41]
29101
- strb r2, [r3, #40]
29102
- mov r2, r2, asl #9
29103
- str r10, [r3, #16]
29104
- ldr r0, [r3, #4]
29105
- str r3, [sp, #12]
29106
- bl ftl_memset
29107
- ldr r3, [sp, #12]
29108
- mov r0, r3
29109
- bl ftl_write_buf
29110
- bl ftl_write_commit
29111
- b .L4830
29112
-.L4791:
29113
- mov r0, r5
29114
- add r1, sp, #24
29115
- mov r2, #0
29116
- bl pm_log2phys
29117
- ldr r3, [sp, #24]
29118
- cmn r3, #1
29119
- beq .L4793
29120
- add r1, sp, #28
29121
- mov r2, #1
29122
- mov r0, r5
29123
- bl pm_log2phys
29124
- ldrb r3, [r8, #1189] @ zero_extendqisi2
29125
- ldrh r0, [fp]
29126
- rsb r3, r3, #24
29127
- ldrb r1, [r9, #-3130] @ zero_extendqisi2
29128
- rsb r3, r0, r3
29129
- ldr r2, [sp, #24]
29130
- mov r2, r2, lsr r0
29131
- mvn r0, #0
29132
- bic r0, r2, r0, asl r3
29133
- bl __aeabi_uidiv
29134
- uxth r0, r0
29135
- bl ftl_vpn_decrement
29136
-.L4830:
29137
- ldr r2, [r8, #2804]
29138
- ldr r3, [r2, #76]
29139
- add r3, r3, #1
29140
- str r3, [r2, #76]
29141
-.L4793:
29142
- ldrb r3, [r6, #2772] @ zero_extendqisi2
29143
- add r5, r5, #1
29144
- rsb r4, r3, r4
29145
- b .L4790
29146
-.L4831:
29306
+ bcs .L4684
2914729307 cmp r4, #0
29148
- beq .L4797
29308
+ beq .L4686
2914929309 mov r0, r5
2915029310 bl lpa_hash_get_ppa
2915129311 cmn r0, #1
2915229312 str r0, [sp, #24]
29153
- bne .L4798
29154
- mov r0, r5
29155
- add r1, sp, #24
29313
+ bne .L4687
2915629314 mov r2, #0
29315
+ add r1, sp, #24
29316
+ mov r0, r5
2915729317 bl pm_log2phys
29158
-.L4798:
29318
+.L4687:
2915929319 ldr r3, [sp, #24]
2916029320 cmn r3, #1
29161
- beq .L4797
29321
+ beq .L4686
2916229322 mov r0, #0
2916329323 bl buf_alloc
29164
- subs r8, r0, #0
29165
- beq .L4797
29324
+ subs r9, r0, #0
29325
+ beq .L4686
2916629326 mov r3, #0
29167
- strb r3, [r8, #41]
29168
- ldrb r3, [r6, #2772] @ zero_extendqisi2
29169
- str r5, [r8, #20]
29327
+ str r5, [r9, #20]
29328
+ strb r3, [r9, #41]
29329
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
29330
+ strb r4, [r9, #40]
29331
+ str r10, [r9, #16]
2917029332 cmp r4, r3
29171
- strb r4, [r8, #40]
29172
- str r10, [r8, #16]
29173
- bcc .L4800
29174
- ldr r1, .L4832+20
29175
- movw r2, #1495
29176
- ldr r0, .L4832+24
29333
+ bcc .L4689
29334
+ movw r2, #1496
29335
+ ldr r1, .L4720+16
29336
+ ldr r0, .L4720+20
2917729337 bl printk
2917829338 bl dump_stack
29179
-.L4800:
29180
- mov r2, r4, asl #9
29339
+.L4689:
29340
+ lsl r2, r4, #9
2918129341 mov r1, #0
29182
- ldr r0, [r8, #4]
29342
+ ldr r0, [r9, #4]
2918329343 bl ftl_memset
29184
- mov r0, r8
29344
+ mov r0, r9
2918529345 bl ftl_write_buf
2918629346 bl ftl_write_commit
29187
- ldr r2, [r6, #2804]
29347
+ ldr r2, [r7, #2800]
2918829348 ldr r3, [r2, #76]
2918929349 add r3, r3, #1
2919029350 str r3, [r2, #76]
29191
-.L4797:
29192
- ldr r1, [r9, #584]
29351
+.L4686:
29352
+ ldr r1, [r6, #28]
2919329353 cmp r1, #8192
29194
- bls .L4804
29354
+ bls .L4693
2919529355 ldr r3, [sp, #16]
2919629356 ldr r3, [r3]
2919729357 tst r3, #4096
29198
- beq .L4801
29358
+ beq .L4690
2919929359 mov r3, #0
29200
- ldr r0, .L4832+12
29360
+ mov r2, r8
2920129361 str r3, [sp]
29202
- mov r2, r7
2920329362 mov r3, r4
29363
+ ldr r0, .L4720+12
2920429364 bl printk
29205
-.L4801:
29365
+.L4690:
2920629366 mov r4, #0
29207
- str r4, [r9, #584]
29367
+ str r4, [r6, #28]
2920829368 bl flt_sys_flush
2920929369 mov r3, #1
29210
- str r3, [r6, #2820]
29211
- b .L4804
29212
-.L4803:
29213
- mvn r0, #0
29214
- b .L4782
29215
-.L4804:
29370
+ str r3, [r7, #2812]
29371
+.L4693:
2921629372 mov r0, #0
29217
-.L4782:
29373
+ b .L4670
29374
+.L4684:
29375
+ mov r0, r5
29376
+ bl lpa_hash_get_ppa
29377
+ cmn r0, #1
29378
+ str r0, [sp, #24]
29379
+ beq .L4680
29380
+ mov r0, #0
29381
+ bl buf_alloc
29382
+ subs fp, r0, #0
29383
+ beq .L4682
29384
+ ldrb r2, [r6, #-2546] @ zero_extendqisi2
29385
+ mov r1, #0
29386
+ str r5, [fp, #20]
29387
+ strb r9, [fp, #41]
29388
+ strb r2, [fp, #40]
29389
+ str r10, [fp, #16]
29390
+ lsl r2, r2, #9
29391
+ ldr r0, [fp, #4]
29392
+ bl ftl_memset
29393
+ mov r0, fp
29394
+ bl ftl_write_buf
29395
+ bl ftl_write_commit
29396
+.L4719:
29397
+ ldr r2, [r7, #2800]
29398
+ ldr r3, [r2, #76]
29399
+ add r3, r3, #1
29400
+ str r3, [r2, #76]
29401
+.L4682:
29402
+ ldrb r3, [r6, #-2546] @ zero_extendqisi2
29403
+ add r5, r5, #1
29404
+ sub r4, r4, r3
29405
+ b .L4679
29406
+.L4680:
29407
+ mov r2, #0
29408
+ add r1, sp, #24
29409
+ mov r0, r5
29410
+ bl pm_log2phys
29411
+ ldr r3, [sp, #24]
29412
+ cmn r3, #1
29413
+ beq .L4682
29414
+ mov r2, #1
29415
+ add r1, sp, #28
29416
+ mov r0, r5
29417
+ bl pm_log2phys
29418
+ ldr r3, .L4720+24
29419
+ ldr r2, [sp, #24]
29420
+ ldrb r1, [r6, #-3136] @ zero_extendqisi2
29421
+ ldrh r0, [r3]
29422
+ ldrb r3, [r7, #1153] @ zero_extendqisi2
29423
+ lsr r2, r2, r0
29424
+ rsb r3, r3, #24
29425
+ sub r3, r3, r0
29426
+ mvn r0, #0
29427
+ bic r0, r2, r0, lsl r3
29428
+ bl __aeabi_uidiv
29429
+ uxth r0, r0
29430
+ bl ftl_vpn_decrement
29431
+ b .L4719
29432
+.L4692:
29433
+ mvn r0, #0
29434
+.L4670:
2921829435 add sp, sp, #36
2921929436 @ sp needed
29220
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29221
-.L4833:
29437
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29438
+.L4721:
2922229439 .align 2
29223
-.L4832:
29440
+.L4720:
2922429441 .word .LANCHOR0
2922529442 .word .LANCHOR2
2922629443 .word .LANCHOR3
29227
- .word .LC316
29228
- .word .LANCHOR3-3132
29229
- .word .LANCHOR1+2764
29444
+ .word .LC315
29445
+ .word .LANCHOR1+2536
2923029446 .word .LC0
29447
+ .word .LANCHOR3-3138
2923129448 .fnend
2923229449 .size zftl_discard, .-zftl_discard
2923329450 .align 2
2923429451 .global dump_pm_blk
29452
+ .syntax unified
29453
+ .arm
29454
+ .fpu softvfp
2923529455 .type dump_pm_blk, %function
2923629456 dump_pm_blk:
2923729457 .fnstart
2923829458 @ args = 0, pretend = 0, frame = 0
2923929459 @ frame_needed = 0, uses_anonymous_args = 0
29240
- stmfd sp!, {r3, r4, r5, r6, r7, lr}
29241
- .save {r3, r4, r5, r6, r7, lr}
29242
- movw ip, #698
29243
- ldr r4, .L4840
29460
+ push {r4, r5, r6, r7, r8, lr}
29461
+ .save {r4, r5, r6, r7, r8, lr}
29462
+ movw r3, #698
29463
+ ldr r4, .L4727
2924429464 mov r2, #4
29245
- ldr r0, .L4840+4
29246
- mov r6, #0
29247
- ldr r5, .L4840+8
29465
+ mov r5, #0
2924829466 movw r7, #65535
29249
- ldr r3, [r4, #2804]
29250
- add r1, r3, #704
29251
- ldrh r3, [r3, ip]
29467
+ ldr r0, .L4727+4
29468
+ ldr r1, [r4, #2800]
29469
+ ldr r6, .L4727+8
29470
+ ldrh r3, [r1, r3]
29471
+ add r1, r1, #704
2925229472 bl rknand_print_hex
29253
- ldr r1, [r4, #2804]
29254
- ldr r0, .L4840+12
29473
+ ldr r1, [r4, #2800]
2925529474 mov r2, #2
29475
+ ldrh r3, [r6, #-176]
29476
+ ldr r0, .L4727+12
2925629477 add r1, r1, #416
29257
- ldrh r3, [r5, #-152]
2925829478 bl rknand_print_hex
29259
-.L4835:
29260
- ldrh r2, [r5, #-152]
29261
- uxth r3, r6
29479
+.L4723:
29480
+ ldrh r2, [r6, #-176]
29481
+ uxth r3, r5
2926229482 cmp r2, r3
29263
- bls .L4839
29483
+ bhi .L4725
29484
+ pop {r4, r5, r6, r7, r8, pc}
29485
+.L4725:
29486
+ uxth r3, r5
29487
+ ldr r2, [r4, #2800]
2926429488 add r3, r3, #208
29265
- ldr r2, [r4, #2804]
29266
- mov r3, r3, asl #1
29489
+ lsl r3, r3, #1
2926729490 ldrh r0, [r2, r3]
2926829491 cmp r0, r7
29269
- beq .L4836
29492
+ beq .L4724
2927029493 mov r1, #0
2927129494 bl ftl_sblk_dump
29272
-.L4836:
29273
- add r6, r6, #1
29274
- b .L4835
29275
-.L4839:
29276
- ldmfd sp!, {r3, r4, r5, r6, r7, pc}
29277
-.L4841:
29495
+.L4724:
29496
+ add r5, r5, #1
29497
+ b .L4723
29498
+.L4728:
2927829499 .align 2
29279
-.L4840:
29500
+.L4727:
2928029501 .word .LANCHOR0
29281
- .word .LC268
29502
+ .word .LC267
2928229503 .word .LANCHOR3
29283
- .word .LC269
29504
+ .word .LC268
2928429505 .fnend
2928529506 .size dump_pm_blk, .-dump_pm_blk
2928629507 .align 2
2928729508 .global id_block_prog_msb_ff_data
29509
+ .syntax unified
29510
+ .arm
29511
+ .fpu softvfp
2928829512 .type id_block_prog_msb_ff_data, %function
2928929513 id_block_prog_msb_ff_data:
2929029514 .fnstart
29291
- @ args = 0, pretend = 0, frame = 8
29515
+ @ args = 0, pretend = 0, frame = 0
2929229516 @ frame_needed = 0, uses_anonymous_args = 0
29293
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
29517
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
2929429518 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
29519
+ .pad #12
29520
+ ldr r5, .L4736
29521
+ ldrb r3, [r5, #1110] @ zero_extendqisi2
29522
+ cmp r3, #0
29523
+ bne .L4729
29524
+ ldr r3, [r5, #1104]
2929529525 mov r4, r2
29296
- ldr r5, .L4849
29297
- .pad #20
29298
- sub sp, sp, #20
29299
- ldrb r2, [r5, #1102] @ zero_extendqisi2
29300
- ldr r3, [r5, #1096]
29301
- cmp r2, #0
29526
+ mov r10, r0
29527
+ mov fp, r1
2930229528 ldrb r3, [r3, #19] @ zero_extendqisi2
29303
- bne .L4842
2930429529 sub r2, r3, #5
29305
- mov r8, r0
2930629530 cmp r3, #68
2930729531 cmpne r2, #2
29308
- mov r9, r1
29309
- bls .L4844
29532
+ bls .L4731
2931029533 sub r3, r3, #19
2931129534 tst r3, #239
29312
- bne .L4842
29313
-.L4844:
29314
- ldr fp, .L4849
29315
- ldr r6, .L4849+4
29316
- ldr r7, .L4849+8
29317
-.L4846:
29318
- ldr r3, [r5, #1096]
29535
+ bne .L4729
29536
+.L4731:
29537
+ ldr r6, .L4736+4
29538
+ sub r7, r6, #2272
29539
+.L4733:
29540
+ ldr r3, [r5, #1104]
2931929541 ldrh r3, [r3, #10]
2932029542 cmp r3, r4
29321
- bls .L4842
29322
- mov ip, r4, asl #1
29323
- add r10, r4, r9
29324
- ldr r0, .L4849+12
29543
+ bhi .L4734
29544
+.L4729:
29545
+ add sp, sp, #12
29546
+ @ sp needed
29547
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29548
+.L4734:
29549
+ lsl r9, r4, #1
29550
+ add r8, r4, fp
29551
+ mov r2, r8
29552
+ ldr r0, .L4736+8
29553
+ ldrh r3, [r7, r9]
2932529554 mov r1, r4
29326
- ldrh r3, [r7, ip]
29327
- mov r2, r10
29328
- str ip, [sp, #12]
2932929555 bl printk
29556
+ ldrh r2, [r7, r9]
2933029557 movw r3, #65535
29331
- ldr ip, [sp, #12]
29332
- ldrh r2, [r7, ip]
2933329558 cmp r2, r3
29334
- bne .L4842
29335
- mov r1, #255
29559
+ bne .L4729
2933629560 mov r2, #16384
29337
- ldr r0, [r6, #-128]
29561
+ mov r1, #255
29562
+ ldr r0, [r6, #-120]
2933829563 add r4, r4, #1
2933929564 bl ftl_memset
29340
- ldr r3, [fp, #1096]
29341
- ldr r2, [r6, #-128]
29342
- mov r0, r8
29343
- mov r1, r10
29565
+ ldr r3, [r5, #1104]
29566
+ mov r1, r8
29567
+ mov r0, r10
2934429568 uxth r4, r4
2934529569 ldrb r3, [r3, #9] @ zero_extendqisi2
2934629570 str r3, [sp]
29347
- mov r3, r2
29571
+ ldr r3, [r6, #-120]
29572
+ mov r2, r3
2934829573 bl flash_prog_page
29349
- b .L4846
29350
-.L4842:
29351
- add sp, sp, #20
29352
- @ sp needed
29353
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29354
-.L4850:
29574
+ b .L4733
29575
+.L4737:
2935529576 .align 2
29356
-.L4849:
29577
+.L4736:
2935729578 .word .LANCHOR0
2935829579 .word .LANCHOR3
29359
- .word .LANCHOR3-2268
29360
- .word .LC317
29580
+ .word .LC316
2936129581 .fnend
2936229582 .size id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
2936329583 .align 2
2936429584 .global write_idblock
29585
+ .syntax unified
29586
+ .arm
29587
+ .fpu softvfp
2936529588 .type write_idblock, %function
2936629589 write_idblock:
2936729590 .fnstart
29368
- @ args = 0, pretend = 0, frame = 136
29591
+ @ args = 0, pretend = 0, frame = 160
2936929592 @ frame_needed = 0, uses_anonymous_args = 0
29370
- ldr ip, .L4930
29371
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
29593
+ ldr r3, .L4848
29594
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
2937229595 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
29373
- .pad #156
29374
- sub sp, sp, #156
29375
- ldr r3, [ip, #1096]
29376
- ldr r5, [r1]
29377
- ldr r8, .L4930+4
29378
- ldrb r4, [r3, #9] @ zero_extendqisi2
29379
- ldrh r9, [r3, #10]
29380
- ldr r3, .L4930+8
29381
- ldr fp, .L4930+12
29382
- ldr r10, .L4930+16
29383
- ldrh r6, [r3, #30]
29384
- cmp r5, r8
29385
- cmpne r5, fp
29386
- ldrb r3, [ip] @ zero_extendqisi2
29387
- movne r7, #1
29388
- moveq r7, #0
29389
- cmp r5, r10
29390
- moveq r5, #0
29391
- andne r5, r7, #1
29392
- str r3, [sp, #60]
29393
- cmp r5, #0
29394
- ldrh r3, [sp, #60]
29395
- str r3, [sp, #44]
29396
- ldrb r3, [ip, #1102] @ zero_extendqisi2
29397
- str r3, [sp, #68]
29398
- bne .L4928
29596
+ .pad #180
29597
+ sub sp, sp, #180
29598
+ ldr lr, [r1]
29599
+ ldrb ip, [r3] @ zero_extendqisi2
29600
+ ldr r4, .L4848+4
29601
+ ldr r10, .L4848+8
29602
+ str ip, [sp, #76]
29603
+ ldrh ip, [sp, #76]
29604
+ ldr r9, .L4848+12
29605
+ cmp lr, r4
29606
+ cmpne lr, r10
29607
+ str ip, [sp, #40]
29608
+ movne ip, #1
29609
+ moveq ip, #0
29610
+ cmp lr, r9
29611
+ moveq ip, #0
29612
+ andne ip, ip, #1
29613
+ cmp ip, #0
29614
+ beq .L4739
29615
+.L4847:
29616
+ mvn r0, #0
29617
+.L4738:
29618
+ add sp, sp, #180
29619
+ @ sp needed
29620
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29621
+.L4739:
2939929622 cmp r0, #15
29400
- bls .L4928
29401
- mov r7, r0
29402
- mov r0, #256000
29403
- str ip, [sp, #20]
29623
+ bls .L4847
2940429624 mov r5, r2
29405
- str r1, [sp, #36]
29625
+ ldr r2, [r3, #1104]
29626
+ mov fp, r0
29627
+ mov r0, #256000
29628
+ str r3, [sp, #16]
29629
+ ldrb r6, [r2, #9] @ zero_extendqisi2
29630
+ ldrh r8, [r2, #10]
29631
+ ldr r2, .L4848+16
29632
+ str r1, [sp, #32]
29633
+ ldrh r7, [r2, #30]
29634
+ ldrb r2, [r3, #1110] @ zero_extendqisi2
29635
+ str r2, [sp, #96]
2940629636 bl ftl_malloc
2940729637 subs r3, r0, #0
29408
- str r3, [sp, #24]
29409
- beq .L4928
29410
- ldr r3, .L4930+20
29411
- ldr ip, [sp, #20]
29412
- ldrb r3, [r3, #572] @ zero_extendqisi2
29413
- cmp r3, #0
29414
- beq .L4927
29415
- ldrb r3, [ip] @ zero_extendqisi2
29416
- cmp r3, #0
29417
- ldrb r3, [ip, #1102] @ zero_extendqisi2
29638
+ str r3, [sp, #20]
29639
+ beq .L4847
29640
+ ldr r2, .L4848+20
29641
+ ldrb r2, [r2, #16] @ zero_extendqisi2
29642
+ cmp r2, #0
29643
+ streq r2, [sp, #16]
29644
+ beq .L4742
29645
+ ldr r3, [sp, #16]
29646
+ ldrb r2, [r3] @ zero_extendqisi2
29647
+ ldrb r3, [r3, #1110] @ zero_extendqisi2
29648
+ cmp r2, #0
2941829649 clzne r3, r3
29419
- movne r3, r3, lsr #5
29420
- bne .L4927
29650
+ lsrne r3, r3, #5
29651
+ bne .L4844
2942129652 cmp r3, #3
29422
- streq r3, [sp, #44]
29653
+ streq r3, [sp, #40]
2942329654 moveq r3, #2
29424
- beq .L4927
29655
+ beq .L4844
2942529656 cmp r3, #2
29426
- ldr r3, [sp, #44]
29657
+ ldr r3, [sp, #40]
2942729658 moveq r3, #2
29428
- str r3, [sp, #44]
29659
+ str r3, [sp, #40]
2942929660 movne r3, #0
2943029661 moveq r3, #3
29431
-.L4927:
29432
- str r3, [sp, #20]
29433
- ldr r3, [sp, #36]
29662
+.L4844:
29663
+ str r3, [sp, #16]
29664
+.L4742:
29665
+ add fp, fp, #508
29666
+ add fp, fp, #3
29667
+ lsr fp, fp, #9
29668
+ cmp fp, #8
29669
+ bls .L4798
29670
+ cmp fp, #500
29671
+ bhi .L4745
29672
+.L4744:
29673
+ ldr r3, [sp, #32]
2943429674 ldr r3, [r3]
29435
- cmp r3, r8
29436
- cmpne r3, fp
29437
- movne fp, #1
29438
- moveq fp, #0
29439
- cmp r3, r10
29440
- moveq r10, #0
29441
- andne r10, fp, #1
29442
- cmp r10, #0
29443
- beq .L4858
29444
- ldr r0, [sp, #24]
29675
+ cmp r3, r4
29676
+ cmpne r3, r10
29677
+ movne r4, #1
29678
+ moveq r4, #0
29679
+ cmp r3, r9
29680
+ moveq r9, #0
29681
+ andne r9, r4, #1
29682
+ cmp r9, #0
29683
+ beq .L4746
29684
+.L4745:
29685
+ ldr r0, [sp, #20]
2944529686 bl ftl_free
29446
-.L4928:
29447
- mvn r0, #0
29448
- b .L4853
29449
-.L4858:
29450
- mov r0, r10
29451
- add r7, r7, #508
29687
+ b .L4847
29688
+.L4798:
29689
+ mov fp, #8
29690
+ b .L4744
29691
+.L4746:
29692
+ mov r0, r9
29693
+ mul r8, r6, r8
2945229694 bl zftl_flash_exit_slc_mode
29453
- ldr r3, .L4930
29454
- mul r9, r9, r4
29455
- add r7, r7, #3
29456
- ldrb r2, [r3, #1102] @ zero_extendqisi2
29457
- sub r0, r9, #1
29458
- strb r2, [r3]
29459
- mov r3, r7, lsr #9
29460
- cmp r3, #8
29461
- mov r1, r9
29462
- movcs fp, r3
29463
- movcc fp, #8
29695
+ ldr r3, .L4848
29696
+ sub r0, r8, #1
29697
+ mov r1, r8
2946429698 add r0, r0, fp
29699
+ ldrb r2, [r3, #1110] @ zero_extendqisi2
29700
+ strb r2, [r3]
2946529701 bl __aeabi_uidiv
29466
- ldr ip, .L4930+24
29702
+ ldr r3, [sp, #32]
2946729703 movw r2, #63871
29468
- ldr r3, [sp, #36]
29469
- str r0, [sp, #72]
29704
+ ldr ip, .L4848+24
29705
+ str r0, [sp, #100]
2947029706 movw r0, #4094
2947129707 add r3, r3, #254976
2947229708 add r3, r3, #512
29473
-.L4864:
29709
+.L4752:
2947429710 ldr r1, [r3, #-4]!
2947529711 cmp r1, #0
29476
- bne .L4859
29477
- cmp r10, #0
29478
- streq ip, [r3, #512]
29712
+ bne .L4747
29713
+ cmp r9, #0
2947929714 sub r2, r2, #1
29480
- ldrne r1, [sp, #36]
29481
- ldrne r1, [r1, r10, asl #2]
29482
- add r10, r10, #1
29715
+ ldrne r1, [sp, #32]
29716
+ streq ip, [r3, #512]
29717
+ ldrne r1, [r1, r9, lsl #2]
29718
+ add r9, r9, #1
2948329719 strne r1, [r3, #512]
29484
- cmp r10, r0
29485
- movhi r10, #0
29720
+ cmp r9, r0
29721
+ movhi r9, #0
2948629722 cmp r2, #4096
29487
- bne .L4864
29488
- b .L4863
29489
-.L4859:
29490
- ldr r0, .L4930+28
29491
- bl printk
29492
-.L4863:
29493
- mul r3, r6, r4
29494
- ldr r0, .L4930+32
29495
- mov r1, r5
29723
+ bne .L4752
29724
+.L4751:
29725
+ mul r3, r6, r7
2949629726 mov r2, #4
29497
- ldr r4, .L4930
29498
- str r3, [sp, #56]
29727
+ mov r1, r5
29728
+ ldr r0, .L4848+28
29729
+ str r3, [sp, #72]
2949929730 mov r3, #5
2950029731 bl rknand_print_hex
29501
- ldr r0, .L4930+36
29502
- mov r1, fp
2950329732 mov r2, fp
29733
+ mov r1, fp
29734
+ ldr r0, .L4848+32
2950429735 bl printk
2950529736 sub r3, r5, #4
2950629737 str r3, [sp, #48]
2950729738 mov r3, #0
29508
- str r3, [sp, #40]
29509
- str r3, [sp, #28]
29510
-.L4889:
29511
- ldr r3, .L4930+20
29512
- ldrb r3, [r3, #572] @ zero_extendqisi2
29739
+ str r3, [sp, #36]
29740
+ str r3, [sp, #24]
29741
+.L4792:
29742
+ ldr r3, .L4848+20
29743
+ ldrb r3, [r3, #16] @ zero_extendqisi2
2951329744 cmp r3, #0
29514
- bne .L4865
29745
+ bne .L4753
2951529746 ldr r3, [sp, #48]
29516
- ldr r1, [sp, #72]
29747
+ ldr r1, [sp, #24]
2951729748 ldr r2, [r3, #4]
29518
- ldr r3, [sp, #56]
29519
- mul r6, r3, r2
29520
- ldr r3, [sp, #28]
29521
- cmp r3, #0
29522
- cmpne r1, #1
29523
- bls .L4866
29749
+ ldr r3, [sp, #72]
29750
+ mul r10, r2, r3
29751
+ ldr r3, [sp, #100]
29752
+ cmp r1, #0
29753
+ cmpne r3, #1
29754
+ bls .L4754
2952429755 ldr r3, [sp, #48]
2952529756 ldr r3, [r3]
2952629757 add r3, r3, #1
2952729758 cmp r2, r3
29528
- bne .L4866
29529
- b .L4867
29530
-.L4865:
29531
- ldr r3, [r4, #1176]
29532
- ldr r2, [sp, #28]
29533
- add r3, r3, r2
29534
- ldrb r6, [r3, #32] @ zero_extendqisi2
29535
- cmp r6, #255
29536
- beq .L4867
29537
- ldr r3, [sp, #56]
29538
- mul r6, r3, r6
29539
- ldr r3, [sp, #20]
29540
- cmp r3, #0
29541
- beq .L4866
29542
- ldr r3, [sp, #20]
29543
- and r5, r2, #1
29544
- cmp r3, #3
29545
- orreq r5, r5, #1
29546
- cmp r5, #0
29547
- ldrneb r3, [sp, #44] @ zero_extendqisi2
29548
- strneb r3, [r4]
29549
- strneb r3, [r4, #1102]
29550
- bne .L4866
29551
- mov r0, r5
29759
+ bne .L4754
29760
+.L4755:
29761
+ ldr r3, [sp, #24]
29762
+ add r3, r3, #1
29763
+ str r3, [sp, #24]
29764
+ ldr r3, [sp, #48]
29765
+ add r3, r3, #4
29766
+ str r3, [sp, #48]
29767
+ ldr r3, [sp, #24]
29768
+ cmp r3, #4
29769
+ bne .L4792
29770
+.L4794:
29771
+ mov r0, #0
2955229772 bl zftl_flash_exit_slc_mode
29553
- strb r5, [r4]
29554
- strb r5, [r4, #1102]
29555
-.L4866:
29773
+ ldr r3, .L4848
29774
+ mov r0, #0
29775
+ ldrb r2, [sp, #76] @ zero_extendqisi2
29776
+ strb r2, [r3]
29777
+ ldr r2, [sp, #16]
29778
+ cmp r2, #0
29779
+ ldrbne r2, [sp, #96] @ zero_extendqisi2
29780
+ strbne r2, [r3, #1110]
29781
+ mov r2, #2
29782
+ strb r2, [r3, #1154]
29783
+ bl zftl_flash_enter_slc_mode
29784
+ ldr r0, [sp, #20]
29785
+ bl ftl_free
29786
+ ldr r3, [sp, #36]
29787
+ clz r0, r3
29788
+ lsr r0, r0, #5
29789
+ rsb r0, r0, #0
29790
+ b .L4738
29791
+.L4747:
29792
+ ldr r0, .L4848+36
29793
+ bl printk
29794
+ b .L4751
29795
+.L4753:
29796
+ ldr r5, .L4848
29797
+ ldr r2, [sp, #24]
29798
+ ldr r3, [r5, #1040]
29799
+ add r3, r3, r2
29800
+ ldrb r3, [r3, #32] @ zero_extendqisi2
29801
+ cmp r3, #255
29802
+ beq .L4755
29803
+ ldr r2, [sp, #72]
29804
+ mul r10, r2, r3
29805
+ ldr r3, [sp, #16]
29806
+ cmp r3, #0
29807
+ beq .L4754
29808
+ ldr r3, [sp, #24]
29809
+ and r4, r3, #1
29810
+ ldr r3, [sp, #16]
29811
+ cmp r3, #3
29812
+ orreq r4, r4, #1
29813
+ cmp r4, #0
29814
+ ldrbne r3, [sp, #40] @ zero_extendqisi2
29815
+ strbne r3, [r5]
29816
+ strbne r3, [r5, #1110]
29817
+ bne .L4754
29818
+ mov r0, r4
29819
+ bl zftl_flash_exit_slc_mode
29820
+ strb r4, [r5]
29821
+ strb r4, [r5, #1110]
29822
+.L4754:
29823
+ ldr r5, .L4848
2955629824 mov r2, #512
2955729825 mov r1, #0
29558
- ldr r0, [sp, #24]
29559
- mov r7, #0
29826
+ ldr r0, [sp, #20]
2956029827 bl ftl_memset
29561
- ldr r3, [r4, #1096]
29562
- mov r0, r6
29563
- ldrb r10, [r3, #9] @ zero_extendqisi2
29564
- ldrh r8, [r3, #10]
29565
- ldr r3, .L4930+8
29566
- mov r1, r10
29567
- mul r8, r8, r10
29568
- ldrh r5, [r3, #30]
29569
- ldrb r3, [r4, #1168] @ zero_extendqisi2
29570
- strb r7, [r4, #1168]
29571
- mul r5, r5, r10
29572
- str r3, [sp, #76]
29828
+ ldr r3, [r5, #1104]
29829
+ mov r6, #0
29830
+ mov r0, r10
29831
+ ldrb r8, [r3, #9] @ zero_extendqisi2
29832
+ ldrh r7, [r3, #10]
29833
+ ldr r3, .L4848+16
29834
+ mov r1, r8
29835
+ ldrh r4, [r3, #30]
29836
+ mul r7, r8, r7
29837
+ ldrb r3, [r5, #1196] @ zero_extendqisi2
29838
+ strb r6, [r5, #1196]
29839
+ str r3, [sp, #104]
29840
+ mul r4, r8, r4
2957329841 bl __aeabi_uidiv
2957429842 mov r1, r0
29575
- mov r0, r7
29843
+ mov r0, r6
2957629844 bl flash_erase_block
29577
- cmp fp, r8
29578
- movls r0, #1
29579
- bls .L4869
29580
- mov r0, r7
29581
- add r1, r6, r5
29845
+ cmp r7, fp
29846
+ movcs r0, #1
29847
+ bcs .L4757
29848
+ add r1, r10, r4
29849
+ mov r0, r6
2958229850 bl flash_erase_block
2958329851 mov r0, #2
29584
-.L4869:
29585
- ldr r3, .L4930
29586
- ldr r2, [r3, #1096]
29852
+.L4757:
29853
+ ldr r2, [r5, #1104]
2958729854 ldrh r3, [r2, #10]
2958829855 ldrb r1, [r2, #12] @ zero_extendqisi2
29589
- mov r3, r3, asl #2
29856
+ lsl r3, r3, #2
2959029857 mul r0, r0, r3
2959129858 bl __aeabi_idiv
29592
- mov r1, r5
29593
- str r0, [sp, #80]
29594
- mov r0, r6
29859
+ mov r1, r4
29860
+ str r0, [sp, #64]
29861
+ mov r0, r10
2959529862 bl __aeabi_uidivmod
29596
- rsb r3, r1, r6
29597
- str r1, [sp, #64]
29598
- cmp r6, r3
29599
- str r3, [sp, #52]
29600
- bne .L4896
29601
- ldrb r3, [r4, #1028] @ zero_extendqisi2
29863
+ sub r3, r10, r1
29864
+ str r1, [sp, #56]
29865
+ cmp r10, r3
29866
+ str r3, [sp, #44]
29867
+ bne .L4801
29868
+ ldrb r3, [r5, #1028] @ zero_extendqisi2
2960229869 cmp r3, #9
29603
- bne .L4896
29604
- ldr r3, .L4930+20
29605
- mov r1, #0
29870
+ bne .L4801
29871
+ ldr r3, .L4848+20
2960629872 mov r2, #1024
29607
- ldr r5, [r3, #-104]
29608
- mov r0, r5
29873
+ mov r1, #0
29874
+ ldr r4, [r3, #-92]
29875
+ mov r0, r4
2960929876 bl ftl_memset
29610
- ldr r2, .L4930+40
29877
+ ldr r2, .L4848+40
2961129878 mov r3, #12
29612
- stmia r5, {r2, r3}
29879
+ stm r4, {r2, r3}
2961329880 mov r3, #0
29614
- strb r3, [r5, #16]
29615
- str r3, [r5, #12]
29616
- ldrb r3, [r4, #1102] @ zero_extendqisi2
29881
+ strb r3, [r4, #16]
29882
+ str r3, [r4, #12]
29883
+ ldrb r3, [r5, #1110] @ zero_extendqisi2
2961729884 cmp r3, #0
29618
- ldrne r3, [r4, #1096]
29619
- ldrneb r3, [r3, #29] @ zero_extendqisi2
29620
- strneb r3, [r5, #16]
29885
+ ldrne r3, [r5, #1104]
29886
+ ldrbne r3, [r3, #29] @ zero_extendqisi2
29887
+ strbne r3, [r4, #16]
2962129888 mov r3, #4
29622
- strb r3, [r5, #17]
29623
- ldr r3, [r4, #1096]
29889
+ strb r3, [r4, #17]
29890
+ ldr r3, .L4848
29891
+ ldr r3, [r3, #1104]
2962429892 ldrb r1, [r3, #12] @ zero_extendqisi2
2962529893 ldrh r0, [r3, #10]
2962629894 bl __aeabi_idiv
29627
- cmp r10, #8
29895
+ cmp r8, #8
2962829896 mov r3, #0
29629
- mov r1, #12
29630
- strb r3, [r5, #20]
2963129897 movhi r2, #70
2963229898 movls r2, #16
29633
- strh r3, [r5, #22] @ movhi
29634
- strh r0, [r5, #18] @ movhi
29635
- add r0, r5, #12
29636
- strb r2, [r5, #21]
29899
+ mov r1, #12
29900
+ strh r0, [r4, #18] @ movhi
29901
+ strb r3, [r4, #20]
29902
+ add r0, r4, r1
29903
+ strh r3, [r4, #22] @ movhi
29904
+ strb r2, [r4, #21]
2963729905 bl js_hash
2963829906 sub r3, fp, #4
29639
- str r0, [r5, #8]
29640
- str r3, [sp, #32]
29641
- b .L4870
29642
-.L4896:
29643
- mov r5, #0
29644
- str fp, [sp, #32]
29645
-.L4870:
29646
- ldr r8, [sp, #36]
29647
- mov r9, #0
29648
-.L4873:
29649
- ldr r3, [sp, #80]
29650
- cmp r9, r3
29651
- bcs .L4929
29907
+ str r0, [r4, #8]
29908
+ str r3, [sp, #28]
29909
+.L4758:
29910
+ ldr r9, [sp, #32]
29911
+ mov r6, #0
29912
+ ldr r7, .L4848
29913
+.L4761:
2965229914 ldr r3, [sp, #64]
29653
- ldrb r2, [r4, #1102] @ zero_extendqisi2
29654
- add r7, r9, r3
29655
- ubfx r7, r7, #2, #16
29656
- cmp r2, #0
29657
- add r0, r7, #1
29658
- mov r1, r0, asl #1
29659
- add r3, r4, r1
29660
- ldrh r3, [r3, #4]
29661
- beq .L4875
29662
- ldrb ip, [r4, #1] @ zero_extendqisi2
29663
- cmp ip, #0
29664
- moveq r3, r0
29665
- movne r3, r1
29666
-.L4875:
29667
- ldrb r1, [r4, #1028] @ zero_extendqisi2
29668
- ldr r0, .L4930
29669
- cmp r1, #9
29670
- movw r1, #61424
29671
- str r1, [sp, #92]
29672
- mov r1, r7, asl #1
29673
- add r0, r0, r1
29674
- subne r3, r3, #1
29675
- ldrh r0, [r0, #4]
29676
- movne r3, r3, asl #2
29677
- cmp r2, #0
29678
- str r3, [sp, #88]
29679
- moveq r7, r0
29680
- beq .L4879
29681
- ldrb r2, [r4, #1] @ zero_extendqisi2
29682
- cmp r2, #0
29683
- movne r7, r1
29684
-.L4879:
29685
- cmp r5, #0
29686
- mul r0, r10, r7
29687
- bne .L4880
29688
- ldr r2, [sp, #52]
29689
- str r8, [sp]
29690
- add ip, r0, r2
29691
- ldr r2, [r8]
29692
- ldr r0, .L4930+44
29693
- mov r1, ip
29694
- str ip, [sp, #84]
29695
- stmib sp, {r2, r3}
29696
- movw r3, #61424
29697
- mov r2, r9
29698
- str r3, [sp, #12]
29699
- mov r3, fp
29700
- bl printk
29701
- mov r1, r8
29702
- ldr ip, [sp, #84]
29703
- add r2, sp, #88
29704
- mov r0, ip
29705
- bl fw_flash_page_prog.constprop.30
29706
- ldrb r3, [r4, #1102] @ zero_extendqisi2
29915
+ cmp r3, r6
29916
+ bhi .L4772
29917
+ ldr r3, .L4848+16
29918
+ mov r4, #0
29919
+ strb r4, [r7, #1196]
29920
+ mov r0, r10
29921
+ ldr r5, .L4848
29922
+ mov r8, #4
29923
+ ldrb r2, [r3, #13] @ zero_extendqisi2
29924
+ ldrh r1, [r3, #30]
29925
+ str r2, [sp, #80]
29926
+ mul r1, r2, r1
29927
+ bl __aeabi_uidivmod
29928
+ sub r3, r10, r1
29929
+ ldr r6, [sp, #20]
29930
+ str r3, [sp, #84]
29931
+ and r3, r1, #3
29932
+ str r3, [sp, #56]
29933
+ ldr r3, [sp, #28]
29934
+ str r1, [sp, #52]
29935
+ str r4, [sp, #64]
29936
+ str r3, [sp, #68]
29937
+.L4773:
29938
+ ldr r3, [sp, #68]
29939
+ cmp r4, r3
29940
+ bcc .L4787
29941
+ ldrb r3, [sp, #104] @ zero_extendqisi2
29942
+ ldr r4, .L4848
29943
+ strb r3, [r4, #1196]
29944
+ ldr r3, [sp, #16]
2970729945 cmp r3, #0
29708
- bne .L4881
29709
- mov r1, r10
29710
- ldr r0, [sp, #52]
29711
- bl __aeabi_uidiv
29712
- add r2, r7, #1
29713
- uxth r2, r2
29714
- mov r1, r0
29715
- mov r0, r5
29716
- bl id_block_prog_msb_ff_data
29717
-.L4881:
29718
- ldr r3, [sp, #32]
29719
- add r8, r8, #2048
29720
- add r3, r3, #16
29721
- cmp r9, r3
29722
- bcc .L4882
29723
- ldr r3, [sp, #32]
29724
- add r3, r3, #20
29725
- cmp r9, r3
29726
- ldrcc r3, [sp, #36]
29727
- addcc r8, r3, #2048
29728
- b .L4882
29729
-.L4880:
29730
- ldr r3, [sp, #52]
29731
- mov r1, r5
29732
- add r2, sp, #88
29733
- add r0, r0, r3
29734
- bl fw_flash_page_prog.constprop.30
29735
-.L4882:
29736
- add r9, r9, #4
29737
- mov r5, #0
29738
- uxth r9, r9
29739
- b .L4873
29740
-.L4929:
29741
- ldr r3, .L4930
29742
- mov r0, r6
29743
- ldrb r2, [sp, #76] @ zero_extendqisi2
29744
- ldr r1, [sp, #32]
29745
- strb r2, [r3, #1168]
29746
- ldr r2, [sp, #24]
29747
- bl id_block_read_data.constprop.31
29748
- ldr r3, [sp, #20]
29749
- cmp r3, #0
29750
- beq .L4884
29946
+ beq .L4788
2975129947 mov r0, #0
2975229948 bl zftl_flash_exit_slc_mode
2975329949 mov r3, #0
2975429950 strb r3, [r4]
29755
- strb r3, [r4, #1102]
29756
-.L4884:
29757
- ldr r3, [sp, #32]
29758
- mov r5, #0
29759
- mov r8, r3, asl #7
29760
-.L4887:
29761
- ldr r3, [sp, #24]
29762
- ldr r2, [r3, r5, asl #2]
29763
- ldr r3, [sp, #36]
29764
- ldr r3, [r3, r5, asl #2]
29765
- cmp r2, r3
29766
- beq .L4885
29767
- mov r1, #0
29951
+ strb r3, [r4, #1110]
29952
+.L4788:
29953
+ ldr r3, [sp, #28]
29954
+ mov r2, #0
29955
+ lsl r3, r3, #7
29956
+.L4790:
29957
+ ldr r1, [sp, #20]
29958
+ ldr r0, [r1, r2, lsl #2]
29959
+ ldr r1, [sp, #32]
29960
+ ldr r1, [r1, r2, lsl #2]
29961
+ cmp r0, r1
29962
+ beq .L4789
2976829963 mov r2, #512
29769
- ldr r0, [sp, #24]
29964
+ mov r1, #0
29965
+ ldr r0, [sp, #20]
2977029966 bl ftl_memset
29967
+ mov r1, r10
2977129968 mov r0, #0
29772
- mov r1, r6
2977329969 bl flash_erase_block
29774
- cmp r5, r8
29775
- bcs .L4886
29776
- b .L4867
29777
-.L4885:
29778
- add r5, r5, #1
29779
- cmp r5, r8
29780
- bne .L4887
29781
-.L4886:
29782
- ldr r3, [sp, #40]
29783
- add r3, r3, #1
29784
- str r3, [sp, #40]
29785
- cmp r3, #5
29786
- bhi .L4888
29787
-.L4867:
29788
- ldr r3, [sp, #28]
29789
- add r3, r3, #1
29790
- str r3, [sp, #28]
29791
- ldr r3, [sp, #48]
29792
- add r3, r3, #4
29793
- str r3, [sp, #48]
29794
- ldr r3, [sp, #28]
29795
- cmp r3, #4
29796
- bne .L4889
29797
-.L4888:
29798
- mov r0, #0
29799
- bl zftl_flash_exit_slc_mode
29800
- ldr r3, .L4930
29801
- mov r0, #0
29802
- ldrb r2, [sp, #60] @ zero_extendqisi2
29803
- strb r2, [r3]
29804
- ldr r2, [sp, #20]
29970
+ b .L4755
29971
+.L4801:
29972
+ str fp, [sp, #28]
29973
+ mov r4, #0
29974
+ b .L4758
29975
+.L4772:
29976
+ ldr r3, [sp, #56]
29977
+ ldrb r2, [r7, #1110] @ zero_extendqisi2
29978
+ add r5, r3, r6
29979
+ ubfx r5, r5, #2, #16
2980529980 cmp r2, #0
29806
- ldrneb r2, [sp, #68] @ zero_extendqisi2
29807
- strneb r2, [r3, #1102]
29808
- mov r2, #2
29809
- strb r2, [r3, #1192]
29810
- bl zftl_flash_enter_slc_mode
29811
- ldr r0, [sp, #24]
29812
- bl ftl_free
29813
- ldr r3, [sp, #40]
29814
- clz r0, r3
29815
- mov r0, r0, lsr #5
29816
- rsb r0, r0, #0
29817
-.L4853:
29818
- add sp, sp, #156
29819
- @ sp needed
29820
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
29821
-.L4931:
29981
+ add r0, r5, #1
29982
+ lsl r1, r0, #1
29983
+ add r3, r7, r1
29984
+ ldrh r3, [r3, #4]
29985
+ beq .L4763
29986
+ ldrb r3, [r7, #1] @ zero_extendqisi2
29987
+ cmp r3, #0
29988
+ moveq r3, r0
29989
+ movne r3, r1
29990
+.L4763:
29991
+ ldrb r1, [r7, #1028] @ zero_extendqisi2
29992
+ cmp r1, #9
29993
+ subne r3, r3, #1
29994
+ lslne r3, r3, #2
29995
+ cmp r2, #0
29996
+ str r3, [sp, #112]
29997
+ movw r3, #61424
29998
+ str r3, [sp, #116]
29999
+ lsl r3, r5, #1
30000
+ add r1, r7, r3
30001
+ ldrh r1, [r1, #4]
30002
+ moveq r5, r1
30003
+ beq .L4768
30004
+ ldrb r2, [r7, #1] @ zero_extendqisi2
30005
+ cmp r2, #0
30006
+ movne r5, r3
30007
+.L4768:
30008
+ cmp r4, #0
30009
+ mul r0, r5, r8
30010
+ bne .L4769
30011
+ ldr r3, [sp, #44]
30012
+ add r3, r0, r3
30013
+ ldr r0, .L4848+44
30014
+ str r3, [sp, #60]
30015
+ movw r3, #61424
30016
+ str r3, [sp, #12]
30017
+ add r3, sp, #176
30018
+ mov r2, r3
30019
+ ldr r1, [sp, #60]
30020
+ ldr r3, [r2, #-64]!
30021
+ str r3, [sp, #8]
30022
+ ldr r3, [r9]
30023
+ str r2, [sp, #52]
30024
+ mov r2, r6
30025
+ str r9, [sp]
30026
+ str r3, [sp, #4]
30027
+ mov r3, fp
30028
+ bl printk
30029
+ mov r1, r9
30030
+ ldr r2, [sp, #52]
30031
+ ldr r0, [sp, #60]
30032
+ bl fw_flash_page_prog.constprop.29
30033
+ ldrb r3, [r7, #1110] @ zero_extendqisi2
30034
+ cmp r3, #0
30035
+ bne .L4770
30036
+ add r5, r5, #1
30037
+ mov r1, r8
30038
+ uxth r5, r5
30039
+ ldr r0, [sp, #44]
30040
+ bl __aeabi_uidiv
30041
+ mov r2, r5
30042
+ mov r1, r0
30043
+ mov r0, r4
30044
+ bl id_block_prog_msb_ff_data
30045
+.L4770:
30046
+ ldr r3, [sp, #28]
30047
+ add r9, r9, #2048
30048
+ add r3, r3, #16
30049
+ cmp r6, r3
30050
+ bcc .L4771
30051
+ ldr r3, [sp, #28]
30052
+ add r3, r3, #20
30053
+ cmp r6, r3
30054
+ ldrcc r3, [sp, #32]
30055
+ addcc r9, r3, #2048
30056
+.L4771:
30057
+ add r6, r6, #4
30058
+ mov r4, #0
30059
+ uxth r6, r6
30060
+ b .L4761
30061
+.L4769:
30062
+ ldr r3, [sp, #44]
30063
+ add r2, sp, #112
30064
+ mov r1, r4
30065
+ add r0, r0, r3
30066
+ bl fw_flash_page_prog.constprop.29
30067
+ b .L4771
30068
+.L4787:
30069
+ ldr r3, [sp, #56]
30070
+ mov r1, r8
30071
+ sub r3, r8, r3
30072
+ uxth r3, r3
30073
+ str r3, [sp, #60]
30074
+ ldr r3, [sp, #52]
30075
+ add r0, r3, r4
30076
+ bl __aeabi_uidiv
30077
+ uxth r0, r0
30078
+ ldrb r1, [r5, #1110] @ zero_extendqisi2
30079
+ lsl r3, r0, #1
30080
+ cmp r1, #0
30081
+ add r2, r5, r3
30082
+ ldrh r2, [r2, #4]
30083
+ moveq r0, r2
30084
+ beq .L4775
30085
+ ldrb r2, [r5, #1] @ zero_extendqisi2
30086
+ cmp r2, #0
30087
+ movne r0, r3
30088
+.L4775:
30089
+ ldr r2, [sp, #84]
30090
+ ldr r3, [sp, #80]
30091
+ ldrb r9, [r5, #1108] @ zero_extendqisi2
30092
+ mla r3, r0, r3, r2
30093
+ str r3, [sp, #88]
30094
+ ldr r3, [r5, #1104]
30095
+ ldr r2, [sp, #88]
30096
+ ldrb r1, [r3, #9] @ zero_extendqisi2
30097
+ ldr r3, [sp, #56]
30098
+ add r0, r3, r2
30099
+ bl __aeabi_uidiv
30100
+ ldrb r3, [r5, #1193] @ zero_extendqisi2
30101
+ str r0, [sp, #44]
30102
+ mov r0, r9
30103
+ str r3, [sp, #108]
30104
+ bl nandc_bch_sel
30105
+.L4776:
30106
+ str r8, [sp]
30107
+ add r3, sp, #112
30108
+ mov r2, r6
30109
+ ldr r1, [sp, #44]
30110
+ mov r0, #0
30111
+ bl flash_read_page
30112
+ cmn r0, #1
30113
+ mov r7, r0
30114
+ bne .L4777
30115
+ ldrb r3, [r5, #1196] @ zero_extendqisi2
30116
+ cmp r3, #0
30117
+ str r3, [sp, #92]
30118
+ bne .L4778
30119
+.L4781:
30120
+ ldr r3, .L4848+20
30121
+ ldr r3, [r3, #-100]
30122
+ subs ip, r3, #0
30123
+ bne .L4779
30124
+.L4780:
30125
+ ldrb r3, [r5, #1143] @ zero_extendqisi2
30126
+ cmp r3, #0
30127
+ beq .L4777
30128
+ str r8, [sp]
30129
+ add r3, sp, #112
30130
+ mov r2, r6
30131
+ ldr r1, [sp, #44]
30132
+ mov r0, #0
30133
+ bl flash_ddr_tuning_read
30134
+ b .L4846
30135
+.L4778:
30136
+ mov r0, #0
30137
+ add r3, sp, #112
30138
+ strb r0, [r5, #1196]
30139
+ mov r2, r6
30140
+ str r8, [sp]
30141
+ ldr r1, [sp, #44]
30142
+ bl flash_read_page
30143
+ ldrb r3, [sp, #92] @ zero_extendqisi2
30144
+ cmn r0, #1
30145
+ strb r3, [r5, #1196]
30146
+ beq .L4781
30147
+.L4846:
30148
+ mov r7, r0
30149
+.L4777:
30150
+ cmn r7, #1
30151
+ movne r7, #0
30152
+ moveq r7, #1
30153
+ cmp r9, #16
30154
+ moveq r9, #0
30155
+ andne r9, r7, #1
30156
+ cmp r9, #0
30157
+ beq .L4783
30158
+ mov r0, #16
30159
+ mov r9, #16
30160
+ bl nandc_bch_sel
30161
+ b .L4776
30162
+.L4779:
30163
+ str r8, [sp]
30164
+ add r3, sp, #112
30165
+ mov r2, r6
30166
+ ldr r1, [sp, #44]
30167
+ mov r0, #0
30168
+ blx ip
30169
+ cmn r0, #1
30170
+ beq .L4780
30171
+ b .L4846
30172
+.L4783:
30173
+ ldr r0, [sp, #108]
30174
+ bl nandc_bch_sel
30175
+ ldr r3, [sp, #64]
30176
+ cmp r7, #0
30177
+ mvnne r3, #0
30178
+ str r3, [sp, #64]
30179
+ ldr r3, [sp, #84]
30180
+ ldr r2, [sp, #64]
30181
+ cmp r10, r3
30182
+ cmpeq r4, #0
30183
+ moveq r3, #1
30184
+ movne r3, #0
30185
+ cmp r2, #0
30186
+ movne r3, #0
30187
+ andeq r3, r3, #1
30188
+ cmp r3, #0
30189
+ beq .L4785
30190
+ ldr r3, [r6]
30191
+ ldr r2, .L4848+40
30192
+ cmp r3, r2
30193
+ bne .L4785
30194
+ ldr r3, [sp, #68]
30195
+ ldr r2, [sp, #60]
30196
+ ldrb r8, [r6, #17] @ zero_extendqisi2
30197
+ add r3, r3, r2
30198
+ str r3, [sp, #68]
30199
+.L4786:
30200
+ ldr r3, [sp, #60]
30201
+ add r4, r3, r4
30202
+ uxth r4, r4
30203
+ b .L4773
30204
+.L4785:
30205
+ ldr r3, [sp, #60]
30206
+ mov r2, r4
30207
+ ldr r1, [sp, #88]
30208
+ ldr r0, .L4848+48
30209
+ add r6, r6, r3, lsl #9
30210
+ ldr r3, [sp, #116]
30211
+ str r3, [sp]
30212
+ ldr r3, [sp, #112]
30213
+ bl printk
30214
+ mov r3, #0
30215
+ str r3, [sp, #56]
30216
+ b .L4786
30217
+.L4789:
30218
+ add r2, r2, #1
30219
+ cmp r3, r2
30220
+ bne .L4790
30221
+ ldr r3, [sp, #36]
30222
+ add r3, r3, #1
30223
+ cmp r3, #5
30224
+ str r3, [sp, #36]
30225
+ bls .L4755
30226
+ b .L4794
30227
+.L4849:
2982230228 .align 2
29823
-.L4930:
30229
+.L4848:
2982430230 .word .LANCHOR0
29825
- .word 1397640018
29826
- .word .LANCHOR2
2982730231 .word -52655045
30232
+ .word 1397640018
2982830233 .word 1397967698
30234
+ .word .LANCHOR2
2982930235 .word .LANCHOR3
2983030236 .word 1314014539
2983130237 .word .LC318
2983230238 .word .LC319
29833
- .word .LC320
30239
+ .word .LC317
2983430240 .word 1179535694
30241
+ .word .LC320
2983530242 .word .LC321
2983630243 .fnend
2983730244 .size write_idblock, .-write_idblock
2983830245 .align 2
2983930246 .global write_loader_lba
30247
+ .syntax unified
30248
+ .arm
30249
+ .fpu softvfp
2984030250 .type write_loader_lba, %function
2984130251 write_loader_lba:
2984230252 .fnstart
2984330253 @ args = 0, pretend = 0, frame = 40
2984430254 @ frame_needed = 0, uses_anonymous_args = 0
2984530255 cmp r0, #64
29846
- stmfd sp!, {r4, r5, r6, r7, r8, r9, lr}
29847
- .save {r4, r5, r6, r7, r8, r9, lr}
29848
- mov r4, r0
29849
- .pad #52
29850
- sub sp, sp, #52
30256
+ push {r4, r5, r6, r7, r8, lr}
30257
+ .save {r4, r5, r6, r7, r8, lr}
30258
+ mov r5, r0
30259
+ .pad #48
30260
+ sub sp, sp, #48
2985130261 mov r6, r1
2985230262 mov r8, r2
29853
- ldr r5, .L4958
29854
- bne .L4933
29855
- ldr r3, [r2]
29856
- ldr r1, .L4958+4
29857
- ldr r2, .L4958+8
29858
- cmp r3, r1
29859
- cmpne r3, r2
29860
- ldr r1, .L4958+12
29861
- moveq r2, #1
29862
- movne r2, #0
29863
- cmp r3, r1
29864
- movne r3, r2
29865
- orreq r3, r2, #1
30263
+ ldr r4, .L4877
30264
+ bne .L4851
30265
+ ldr r3, .L4877+4
30266
+ ldr r2, [r2]
30267
+ ldr r1, .L4877+8
30268
+ cmp r2, r1
30269
+ cmpne r2, r3
30270
+ add r1, r1, #327680
30271
+ moveq r3, #1
30272
+ movne r3, #0
30273
+ cmp r2, r1
30274
+ orreq r3, r3, #1
2986630275 cmp r3, #0
29867
- beq .L4933
29868
- mov r0, #256000
30276
+ beq .L4851
2986930277 mov r3, #1
29870
- strb r3, [r5, #588]
30278
+ mov r0, #256000
30279
+ strb r3, [r4, #32]
2987130280 bl ftl_malloc
29872
- mov r1, #0
2987330281 mov r2, #256000
29874
- str r0, [r5, #592]
30282
+ mov r1, #0
30283
+ str r0, [r4, #36]
2987530284 bl ftl_memset
29876
- str r4, [r5, #596]
29877
-.L4933:
30285
+ str r5, [r4, #40]
30286
+.L4851:
2987830287 str r6, [sp]
29879
- mov r3, r4
29880
- ldr r0, .L4958+16
29881
- ldr r1, [r5, #592]
30288
+ mov r3, r5
2988230289 ldr r2, [r8]
30290
+ ldr r1, [r4, #36]
30291
+ ldr r0, .L4877+12
2988330292 bl printk
29884
- ldrb r3, [r5, #588] @ zero_extendqisi2
29885
- ldr r9, .L4958
30293
+ ldrb r3, [r4, #32] @ zero_extendqisi2
2988630294 cmp r3, #0
29887
- beq .L4932
29888
- ldr r7, [r9, #592]
30295
+ beq .L4850
30296
+ ldr r7, [r4, #36]
2988930297 cmp r7, #0
29890
- beq .L4932
29891
- sub r0, r4, #64
30298
+ beq .L4850
30299
+ sub r0, r5, #64
2989230300 cmp r0, #500
29893
- bcs .L4935
29894
- rsb r2, r4, #564
29895
- add r0, r7, r0, asl #9
29896
- cmp r2, r6
30301
+ bcs .L4853
30302
+ rsb r2, r5, #564
2989730303 mov r1, r8
29898
- movcs r2, r6
29899
- mov r2, r2, asl #9
30304
+ cmp r6, r2
30305
+ add r0, r7, r0, lsl #9
30306
+ movcc r2, r6
30307
+ lsl r2, r2, #9
2990030308 bl ftl_memcpy
29901
- b .L4936
29902
-.L4935:
29903
- cmp r4, #564
29904
- bcs .L4944
29905
-.L4936:
29906
- ldr r3, [r5, #596]
29907
- ldr r8, .L4958
29908
- cmp r3, r4
29909
- beq .L4942
30309
+.L4854:
30310
+ ldr r3, [r4, #40]
30311
+ cmp r5, r3
30312
+ beq .L4863
30313
+ mov r8, #0
2991030314 mov r0, r7
29911
- mov r9, #0
29912
- strb r9, [r8, #588]
30315
+ strb r8, [r4, #32]
2991330316 bl ftl_free
29914
- str r9, [r8, #592]
29915
-.L4942:
29916
- add r4, r4, r6
29917
- str r4, [r5, #596]
29918
- b .L4932
29919
-.L4944:
29920
- ldr r3, .L4958+20
29921
- ldr r0, [r9, #596]
29922
- ldr r3, [r3, #1096]
30317
+ str r8, [r4, #36]
30318
+ b .L4863
30319
+.L4853:
30320
+ cmp r5, #564
30321
+ bcc .L4854
30322
+ ldr r3, .L4877+16
30323
+ ldr r0, [r4, #40]
30324
+ ldr r3, [r3, #1104]
2992330325 sub r0, r0, #64
2992430326 cmp r0, #500
2992530327 ldrb r3, [r3, #9] @ zero_extendqisi2
2992630328 movcs r0, #500
2992730329 cmp r3, #4
29928
- beq .L4945
30330
+ beq .L4855
2992930331 mov r3, #2
2993030332 str r3, [sp, #8]
2993130333 mov r3, #3
....@@ -29936,650 +30338,164 @@
2993630338 str r3, [sp, #20]
2993730339 mov r3, #6
2993830340 str r3, [sp, #24]
29939
- b .L4938
29940
-.L4945:
29941
- mov r3, #0
29942
-.L4937:
29943
- cmp r0, #256
29944
- add r1, sp, #8
29945
- mov r2, r3, asl #1
29946
- movls r2, r3
29947
- str r2, [r1, r3, asl #2]
29948
- add r3, r3, #1
29949
- cmp r3, #5
29950
- bne .L4937
29951
-.L4938:
30341
+.L4856:
2995230342 mov r3, #61952
29953
-.L4941:
29954
- ldr r2, [r7, r3, asl #2]
30343
+.L4862:
30344
+ ldr r2, [r7, r3, lsl #2]
2995530345 cmp r2, #0
29956
- addne r3, r3, #2048
29957
- movne r0, r3, asl #2
29958
- bne .L4940
29959
-.L4939:
29960
- sub r3, r3, #1
29961
- cmp r3, #4096
29962
- bne .L4941
29963
- mov r0, r0, asl #9
29964
-.L4940:
30346
+ beq .L4860
30347
+ add r3, r3, #2048
30348
+ lsl r0, r3, #2
30349
+.L4861:
2996530350 mov r1, r7
2996630351 add r2, sp, #8
29967
- bl write_idblock
29968
- ldr r0, [r5, #592]
2996930352 mov r7, #0
29970
- strb r7, [r5, #588]
30353
+ bl write_idblock
30354
+ ldr r0, [r4, #36]
30355
+ strb r7, [r4, #32]
2997130356 bl ftl_free
29972
- str r7, [r5, #592]
29973
- b .L4942
29974
-.L4932:
29975
- add sp, sp, #52
30357
+ str r7, [r4, #36]
30358
+.L4863:
30359
+ add r5, r5, r6
30360
+ str r5, [r4, #40]
30361
+.L4850:
30362
+ add sp, sp, #48
2997630363 @ sp needed
29977
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
29978
-.L4959:
30364
+ pop {r4, r5, r6, r7, r8, pc}
30365
+.L4855:
30366
+ mov r2, #0
30367
+ add r3, sp, #8
30368
+.L4859:
30369
+ cmp r0, #256
30370
+ lslhi r1, r2, #1
30371
+ strls r2, [r3, r2, lsl #2]
30372
+ strhi r1, [r3, r2, lsl #2]
30373
+ add r2, r2, #1
30374
+ cmp r2, #5
30375
+ bne .L4859
30376
+ b .L4856
30377
+.L4860:
30378
+ sub r3, r3, #1
30379
+ cmp r3, #4096
30380
+ bne .L4862
30381
+ lsl r0, r0, #9
30382
+ b .L4861
30383
+.L4878:
2997930384 .align 2
29980
-.L4958:
30385
+.L4877:
2998130386 .word .LANCHOR3
2998230387 .word -52655045
2998330388 .word 1397640018
29984
- .word 1397967698
2998530389 .word .LC322
2998630390 .word .LANCHOR0
2998730391 .fnend
2998830392 .size write_loader_lba, .-write_loader_lba
2998930393 .align 2
2999030394 .global FtlWrite
30395
+ .syntax unified
30396
+ .arm
30397
+ .fpu softvfp
2999130398 .type FtlWrite, %function
2999230399 FtlWrite:
2999330400 .fnstart
2999430401 @ args = 0, pretend = 0, frame = 0
2999530402 @ frame_needed = 0, uses_anonymous_args = 0
29996
- stmfd sp!, {r4, r5, r6, r7, r8, lr}
30403
+ push {r4, r5, r6, r7, r8, lr}
2999730404 .save {r4, r5, r6, r7, r8, lr}
2999830405 mov r6, r2
2999930406 sub r2, r1, #64
3000030407 mov r4, r1
3000130408 cmp r2, #1984
30002
- mov r5, r3
30003
- mov r7, r0
30409
+ mov r7, r3
3000430410 movcs r2, #0
3000530411 movcc r2, #1
3000630412 cmp r0, #0
30413
+ mov r5, r0
3000730414 movne r2, #0
3000830415 cmp r2, #0
30009
- beq .L4961
30010
- mov r0, r1
30416
+ beq .L4880
3001130417 mov r2, r3
3001230418 mov r1, r6
30419
+ mov r0, r4
3001330420 bl write_loader_lba
30014
-.L4961:
30015
- ldr r3, .L4966
30016
- mov r0, r7
30017
- mov r1, r4
30421
+.L4880:
30422
+ ldr r3, .L4885
3001830423 mov r2, r6
30019
- ldr r3, [r3, #-136]
30020
- ldr ip, [r3, #24]
30021
- mov r3, r5
30022
- ldmfd sp!, {r4, r5, r6, r7, r8, lr}
30424
+ mov r1, r4
30425
+ mov r0, r5
30426
+ ldr r3, [r3, #-160]
30427
+ ldr lr, [r3, #24]
30428
+ mov r3, r7
30429
+ mov ip, lr
30430
+ pop {r4, r5, r6, r7, r8, lr}
3002330431 bx ip
30024
-.L4967:
30432
+.L4886:
3002530433 .align 2
30026
-.L4966:
30434
+.L4885:
3002730435 .word .LANCHOR3
3002830436 .fnend
3002930437 .size FtlWrite, .-FtlWrite
3003030438 .align 2
3003130439 .global rknand_sys_storage_ioctl
30440
+ .syntax unified
30441
+ .arm
30442
+ .fpu softvfp
3003230443 .type rknand_sys_storage_ioctl, %function
3003330444 rknand_sys_storage_ioctl:
3003430445 .fnstart
30035
- @ args = 0, pretend = 0, frame = 520
30446
+ @ args = 0, pretend = 0, frame = 0
3003630447 @ frame_needed = 0, uses_anonymous_args = 0
30037
- ldr r3, .L5025
30038
- stmfd sp!, {r4, r5, r6, r7, lr}
30039
- .save {r4, r5, r6, r7, lr}
30448
+ ldr r3, .L4896
3004030449 cmp r1, r3
30041
- .pad #524
30042
- sub sp, sp, #524
30043
- mov r4, r1
30044
- mov r5, r2
30045
- beq .L4970
30046
- bhi .L4971
30047
- sub r3, r3, #2080
30048
- sub r3, r3, #6
30049
- cmp r1, r3
30050
- beq .L4972
30051
- bhi .L4973
30052
- sub r3, r3, #238
30053
- cmp r1, r3
30054
- beq .L4974
30055
- add r3, r3, #237
30056
- cmp r1, r3
30057
- beq .L4975
30058
- b .L5005
30059
-.L4973:
30060
- ldr r3, .L5025+4
30061
- cmp r1, r3
30062
- beq .L4976
30063
- add r3, r3, #1
30064
- cmp r1, r3
30065
- beq .L4977
30066
- sub r3, r3, #124
30067
- cmp r1, r3
30068
- bne .L5005
30069
- b .L5023
30070
-.L4971:
30071
- ldr r3, .L5025+8
30072
- cmp r1, r3
30073
- mov r6, r3
30074
- beq .L4979
30075
- bhi .L4980
30076
- sub r3, r3, #2512
30077
- sub r3, r3, #14
30078
- cmp r1, r3
30079
- beq .L4970
30080
- add r3, r3, #10
30081
- cmp r1, r3
30082
- beq .L4970
30083
- b .L5005
30084
-.L4980:
30085
- ldr r3, .L5025+12
30086
- cmp r1, r3
30087
- beq .L4979
30088
- bcc .L4981
30089
- add r3, r3, #1
30090
- cmp r1, r3
30091
- beq .L4981
30092
- b .L5005
30093
-.L4975:
30094
- ldr r0, .L5025+16
30095
- bl printk
30096
- mov r1, r5
30097
- mov r2, #520
30098
- mov r0, sp
30099
- bl rk_copy_from_user
30100
- cmp r0, #0
30101
- beq .L4982
30102
-.L4988:
30103
- ldr r0, .L5025+20
30104
- bl printk
30105
- b .L5020
30106
-.L4982:
30107
- ldr r2, [sp]
30108
- ldr r3, .L5025+24
30109
- cmp r2, r3
30110
- beq .L4983
30111
-.L4985:
30112
- mvn r4, #0
30113
- b .L4984
30114
-.L4983:
30115
- ldr r3, [sp, #4]
30116
- cmp r3, #512
30117
- bhi .L4985
30118
- ldr r4, .L5025+28
30119
- mov r2, #512
30120
- mov r0, sp
30121
- ldr r1, [r4, #600]
30122
- bl memcpy
30123
- ldr r2, [r4, #604]
30124
- ldr r3, .L5025+32
30125
- cmp r2, r3
30126
- beq .L4986
30127
- mov r1, #0
30128
- add r0, sp, #64
30129
- mov r2, #128
30130
- str r1, [sp, #8]
30131
- str r1, [sp, #12]
30132
- bl memset
30133
-.L4986:
30134
- mov r1, #0
30135
- add r0, sp, #256
30136
- mov r2, #256
30137
- str r1, [sp, #16]
30138
- bl memset
30139
-.L5015:
30140
- mov r0, r5
30141
- mov r1, sp
30142
- mov r2, #520
30143
- bl rk_copy_to_user
30144
- cmp r0, #0
30145
- bne .L5020
30146
- b .L5019
30147
-.L4972:
30148
- ldr r0, .L5025+36
30149
- bl printk
30150
- mov r1, r5
30151
- mov r2, #520
30152
- mov r0, sp
30153
- bl rk_copy_from_user
30154
- cmp r0, #0
30155
- bne .L4988
30156
- ldr r2, [sp]
30157
- ldr r3, .L5025+24
30158
- cmp r2, r3
30159
- bne .L4985
30160
- ldr r3, [sp, #4]
30161
- cmp r3, #512
30162
- bhi .L4985
30163
- ldr r2, .L5025+28
30164
- ldr r3, .L5025+32
30165
- ldr r1, [r2, #604]
30166
- cmp r1, r3
30167
- mvnne r0, #1
30168
- bne .L4969
30169
- ldr r3, [sp, #12]
30170
- sub r1, r3, #1
30171
- cmp r1, #127
30172
- mvnhi r0, #2
30173
- bhi .L4969
30174
- ldr r4, [r2, #600]
30175
- add r1, sp, #64
30176
- add r0, r4, #64
30177
- str r3, [r4, #12]
30178
- ldr r2, [sp, #12]
30179
- bl memcpy
30180
- mov r0, #1
30181
- mov r1, r4
30182
- b .L5018
30183
-.L4977:
30184
- ldr r0, .L5025+40
30185
- bl printk
30186
- mov r1, r5
30187
- mov r2, #520
30188
- mov r0, sp
30189
- bl rk_copy_from_user
30190
- cmp r0, #0
30191
- bne .L4988
30192
- ldr r2, [sp]
30193
- ldr r3, .L5025+44
30194
- cmp r2, r3
30195
- bne .L4985
30196
- ldr r3, [sp, #4]
30197
- cmp r3, #512
30198
- bhi .L4985
30199
- ldr r5, .L5025+28
30200
- ldr r3, [r5, #608]
30201
- cmp r3, #0
30202
- bne .L4989
30203
-.L4992:
30204
- mov r0, #0
30205
- b .L4969
30206
-.L4989:
30207
- ldr r3, [r5, #612]
30208
- ldr r2, .L5025+48
30209
- ldr r1, [r3]
30210
- cmp r1, r2
30211
- beq .L4990
30212
- str r2, [r3]
30213
- mov r2, #504
30214
- ldr r3, .L5025+28
30215
- ldr r3, [r3, #612]
30216
- str r2, [r3, #4]
30217
- mov r2, #0
30218
- str r2, [r3, #8]
30219
- str r2, [r3, #12]
30220
-.L4990:
30221
- ldr r1, [r5, #612]
30222
- mov r4, #0
30223
- mov r0, r4
30224
- str r4, [r1, #16]
30225
- bl StorageSysDataStore
30226
- ldr r3, [r5, #600]
30227
- ldr r2, .L5025+24
30228
- ldr r1, [r3]
30229
- cmp r1, r2
30230
- strne r2, [r3]
30231
- ldr r6, [r5, #600]
30232
- ldrne r3, .L5025+28
30233
- movne r2, #504
30234
- add r0, r6, #64
30235
- ldrne r3, [r3, #600]
30236
- stmneib r3, {r2, r4}
30237
- mov r4, #0
30238
- mov r1, r4
30239
- mov r2, #128
30240
- str r4, [r6, #12]
30241
- bl memset
30242
- mov r0, #1
30243
- mov r1, r6
30244
- bl StorageSysDataStore
30245
- str r4, [r5, #608]
30246
- str r4, [r5, #604]
30247
- b .L4984
30248
-.L4976:
30249
- ldr r0, .L5025+52
30250
- bl printk
30251
- mov r1, r5
30252
- mov r2, #520
30253
- mov r0, sp
30254
- bl rk_copy_from_user
30255
- cmp r0, #0
30256
- bne .L4988
30257
- ldr r2, [sp]
30258
- ldr r3, .L5025+56
30259
- cmp r2, r3
30260
- bne .L4985
30261
- ldr r3, [sp, #4]
30262
- cmp r3, #512
30263
- bhi .L4985
30264
- ldr r5, .L5025+28
30265
- ldr r3, [r5, #608]
30266
- cmp r3, #1
30267
- beq .L4992
30268
- ldr r2, [r5, #612]
30269
- ldr r3, .L5025+48
30270
- ldr r1, [r2]
30271
- cmp r1, r3
30272
- beq .L4993
30273
- str r3, [r2]
30274
- mov r2, #504
30275
- ldr r3, [r5, #612]
30276
- str r2, [r3, #4]
30277
- mov r2, #0
30278
- str r2, [r3, #8]
30279
- str r2, [r3, #12]
30280
-.L4993:
30281
- ldr r1, [r5, #612]
30282
- mov r3, #1
30283
- mov r0, #0
30284
- mov r4, #0
30285
- str r3, [r1, #16]
30286
- bl StorageSysDataStore
30287
- ldr r3, [r5, #600]
30288
- ldr r2, .L5025+24
30289
- ldr r1, [r3]
30290
- cmp r1, r2
30291
- strne r2, [r3]
30292
- ldr r6, [r5, #600]
30293
- ldrne r3, .L5025+28
30294
- movne r1, #504
30295
- movne r2, #0
30296
- add r0, r6, #64
30297
- ldrne r3, [r3, #600]
30298
- stmneib r3, {r1, r2}
30299
- mov r1, r4
30300
- mov r2, #128
30301
- str r4, [r6, #12]
30302
- bl memset
30303
- mov r0, #1
30304
- mov r1, r6
30305
- bl StorageSysDataStore
30306
- mov r3, #1
30307
- str r3, [r5, #608]
30308
- b .L4984
30309
-.L5023:
30310
- ldr r0, .L5025+60
30311
- bl printk
30312
- mov r1, r5
30313
- mov r2, #520
30314
- mov r0, sp
30315
- bl rk_copy_from_user
30316
- cmp r0, #0
30317
- bne .L4988
30318
- ldr r2, [sp]
30319
- ldr r3, .L5025+64
30320
- cmp r2, r3
30321
- bne .L4985
30322
- ldr r2, [sp, #4]
30323
- cmp r2, #512
30324
- addls r0, sp, #8
30325
- ldrls r1, .L5025+68
30326
- bls .L5021
30327
- b .L4985
30328
-.L4970:
30329
- ldr r0, .L5025+72
30330
- cmp r4, r0
30331
- mov r7, r0
30332
- ldreq r0, .L5025+76
30333
- beq .L5017
30334
- ldr r3, .L5025+80
30335
- cmp r4, r3
30336
- ldreq r0, .L5025+84
30337
- ldrne r0, .L5025+88
30338
-.L5017:
30339
- bl printk
30340
- mov r1, r5
30341
- mov r2, #520
30342
- mov r0, sp
30343
- bl rk_copy_from_user
30344
- cmp r0, #0
30345
- bne .L4988
30346
- ldr r2, [sp]
30347
- ldr r3, .L5025+92
30348
- cmp r2, r3
30349
- bne .L5020
30350
- ldr r3, .L5025+80
30351
- ldr r6, .L5025+28
30352
- cmp r4, r3
30353
- bne .L4999
30354
- ldr r3, [r6, #600]
30355
- mov r0, r5
30356
- mov r1, sp
30357
- mov r2, #16
30358
- ldr r3, [r3, #20]
30359
- str r3, [sp, #4]
30360
- strb r3, [sp, #8]
30361
- bl rk_copy_to_user
30362
- cmp r0, #0
30363
- beq .L4969
30364
- b .L5020
30365
-.L4999:
30366
- ldr r3, [r6, #1128]
30367
- cmp r3, #10
30368
- bhi .L5020
30369
- ldr r1, [r6, #600]
30370
- ldr r2, [sp, #4]
30371
- ldr r3, [r1, #24]
30372
- cmp r3, r2
30373
- cmpne r3, #0
30374
- movne r3, #1
30375
- moveq r3, #0
30376
- beq .L5000
30377
- ldr r0, .L5025+96
30378
- mov r1, r2
30379
- bl printk
30380
- ldr r3, [r6, #1128]
30381
- add r3, r3, #1
30382
- str r3, [r6, #1128]
30383
-.L5020:
30384
- mvn r0, #13
30385
- b .L4969
30386
-.L5000:
30387
- cmp r4, r7
30388
- str r3, [r6, #1128]
30389
- mov r0, #1
30390
- moveq r2, r3
30391
- movne r3, #1
30392
- moveq r3, r2
30393
- str r2, [r1, #24]
30394
- str r3, [r1, #20]
30395
- bl StorageSysDataStore
30396
- cmn r0, #1
30397
- bne .L5019
30398
- b .L5024
30399
-.L4979:
30400
- ldr r0, .L5025+100
30401
- bl printk
30402
- mov r1, r5
30403
- mov r2, #520
30404
- mov r0, sp
30405
- bl rk_copy_from_user
30406
- cmp r0, #0
30407
- bne .L4988
30408
- ldr r2, [sp]
30409
- ldr r3, .L5025+104
30410
- cmp r2, r3
30411
- bne .L4985
30412
- ldr r2, [sp, #4]
30413
- cmp r2, #504
30414
- bhi .L4985
30415
- ldr r3, .L5025+28
30416
- cmp r4, r6
30417
- add r0, sp, #8
30418
- ldreq r1, [r3, #1132]
30419
- ldrne r1, [r3, #1136]
30420
- add r1, r1, #8
30421
-.L5021:
30422
- bl memcpy
30423
- b .L5015
30424
-.L4981:
30425
- ldr r0, .L5025+108
30426
- bl printk
30427
- mov r1, r5
30428
- mov r2, #520
30429
- mov r0, sp
30430
- bl rk_copy_from_user
30431
- cmp r0, #0
30432
- bne .L4988
30433
- ldr r2, [sp]
30434
- ldr r3, .L5025+104
30435
- cmp r2, r3
30436
- bne .L4985
30437
- ldr r2, [sp, #4]
30438
- cmp r2, #504
30439
- bhi .L4985
30440
- ldr r3, .L5025+112
30441
- add r2, r2, #8
30442
- cmp r4, r3
30443
- ldr r4, .L5025+28
30444
- bne .L5004
30445
- mov r1, sp
30446
- ldr r0, [r4, #1132]
30447
- bl memcpy
30448
- mov r0, #2
30449
- ldr r1, [r4, #1132]
30450
- b .L5018
30451
-.L5004:
30452
- mov r1, sp
30453
- ldr r0, [r4, #1136]
30454
- bl memcpy
30455
- ldr r1, [r4, #1136]
30456
- mov r0, #3
30457
-.L5018:
30458
- bl StorageSysDataStore
30459
- mov r4, r0
30460
- b .L4984
30461
-.L4974:
30450
+ bne .L4891
30451
+ push {r4, lr}
30452
+ .save {r4, lr}
3046230453 bl rknand_dev_flush
30463
-.L5019:
30464
- mov r4, #0
30465
- b .L4984
30466
-.L5024:
30467
- mvn r4, #1
30468
-.L4984:
30469
- ldr r0, .L5025+116
30470
- mov r1, r4
30454
+ mov r1, #0
30455
+ ldr r0, .L4896+4
3047130456 bl printk
30472
- mov r0, r4
30473
- b .L4969
30474
-.L5005:
30457
+ mov r0, #0
30458
+ pop {r4, pc}
30459
+.L4891:
3047530460 mvn r0, #21
30476
-.L4969:
30477
- add sp, sp, #524
30478
- @ sp needed
30479
- ldmfd sp!, {r4, r5, r6, r7, pc}
30480
-.L5026:
30461
+ bx lr
30462
+.L4897:
3048130463 .align 2
30482
-.L5025:
30483
- .word 1074031656
30484
- .word 1074029694
30485
- .word 1074034192
30486
- .word 1074034194
30464
+.L4896:
30465
+ .word 1074029332
3048730466 .word .LC323
30488
- .word .LC324
30489
- .word 1263358532
30490
- .word .LANCHOR3
30491
- .word -1067903959
30492
- .word .LC325
30493
- .word .LC326
30494
- .word 1112753220
30495
- .word 1146313043
30496
- .word .LC327
30497
- .word 1112755781
30498
- .word .LC328
30499
- .word 1094995539
30500
- .word .LANCHOR3+616
30501
- .word 1074031666
30502
- .word .LC329
30503
- .word 1074031676
30504
- .word .LC330
30505
- .word .LC331
30506
- .word 1280262987
30507
- .word .LC332
30508
- .word .LC333
30509
- .word 1145980246
30510
- .word .LC334
30511
- .word 1074034193
30512
- .word .LC335
3051330467 .fnend
3051430468 .size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl
3051530469 .align 2
3051630470 .global rk_ftl_storage_sys_init
30471
+ .syntax unified
30472
+ .arm
30473
+ .fpu softvfp
3051730474 .type rk_ftl_storage_sys_init, %function
3051830475 rk_ftl_storage_sys_init:
3051930476 .fnstart
3052030477 @ args = 0, pretend = 0, frame = 0
3052130478 @ frame_needed = 0, uses_anonymous_args = 0
30522
- stmfd sp!, {r4, r5, r6, lr}
30523
- .save {r4, r5, r6, lr}
30524
- mvn r3, #0
30525
- ldr r4, .L5036
30526
- mov r2, #512
30527
- mov r5, #0
30528
- add r0, r4, #616
30529
- ldr r1, [r4, #576]
30530
- str r3, [r4, #596]
30531
- add r3, r1, #512
30532
- str r3, [r4, #600]
30533
- str r1, [r4, #612]
30534
- add r3, r1, #1024
30535
- add r1, r1, #1536
30536
- str r3, [r4, #1132]
30537
- strb r5, [r4, #588]
30538
- str r5, [r4, #592]
30539
- str r5, [r4, #1140]
30540
- str r1, [r4, #1136]
30541
- bl ftl_memcpy
30542
- ldr r0, [r4, #612]
30543
- str r5, [r4, #604]
30544
- str r5, [r4, #1128]
30545
- ldr r6, [r0, #508]
30546
- ldr r3, [r0, #16]
30547
- cmp r6, r5
30548
- str r3, [r4, #608]
30549
- beq .L5029
30550
- mov r1, #508
30551
- bl js_hash
30552
- cmp r6, r0
30553
- beq .L5029
30554
- ldr r3, [r4, #612]
30555
- ldr r0, .L5036+4
30556
- str r5, [r4, #608]
30557
- str r5, [r3, #16]
30558
- bl printk
30559
-.L5029:
30560
- ldr r3, [r4, #608]
30561
- mov r0, #2
30562
- ldr r1, [r4, #1132]
30563
- cmp r3, #0
30564
- ldrne r2, .L5036+8
30565
- ldrne r3, .L5036
30566
- strne r2, [r3, #604]
30567
- bl StorageSysDataLoad
30568
- ldr r1, [r4, #1136]
30569
- mov r0, #3
30570
- bl StorageSysDataLoad
30571
- ldmfd sp!, {r4, r5, r6, lr}
30479
+ @ link register save eliminated.
30480
+ ldr r3, .L4899
30481
+ mov r2, #0
30482
+ mvn r1, #0
30483
+ strb r2, [r3, #32]
30484
+ str r1, [r3, #40]
30485
+ str r2, [r3, #36]
30486
+ str r2, [r3, #44]
3057230487 b rknand_sys_storage_init
30573
-.L5037:
30488
+.L4900:
3057430489 .align 2
30575
-.L5036:
30490
+.L4899:
3057630491 .word .LANCHOR3
30577
- .word .LC336
30578
- .word -1067903959
3057930492 .fnend
3058030493 .size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init
3058130494 .align 2
3058230495 .global StorageSysDataDeInit
30496
+ .syntax unified
30497
+ .arm
30498
+ .fpu softvfp
3058330499 .type StorageSysDataDeInit, %function
3058430500 StorageSysDataDeInit:
3058530501 .fnstart
....@@ -30592,269 +30508,271 @@
3059230508 .size StorageSysDataDeInit, .-StorageSysDataDeInit
3059330509 .align 2
3059430510 .global rk_ftl_vendor_storage_init
30511
+ .syntax unified
30512
+ .arm
30513
+ .fpu softvfp
3059530514 .type rk_ftl_vendor_storage_init, %function
3059630515 rk_ftl_vendor_storage_init:
3059730516 .fnstart
3059830517 @ args = 0, pretend = 0, frame = 0
3059930518 @ frame_needed = 0, uses_anonymous_args = 0
30600
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, lr}
30519
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
3060130520 .save {r4, r5, r6, r7, r8, r9, r10, lr}
30521
+ ldr r6, .L4913
30522
+ ldr r3, [r6, #48]
30523
+ cmp r3, #0
30524
+ bne .L4903
3060230525 mov r0, #65536
3060330526 bl ftl_malloc
30604
- ldr r6, .L5050
30605
- cmp r0, #0
30606
- str r0, [r6, #1144]
30607
- beq .L5045
30608
- ldr r9, .L5050+4
30609
- mov r8, #0
30610
- mov r4, r8
30611
- mov r7, r8
30612
- mov r10, r6
30613
-.L5043:
30614
- mov r0, r7, asl #7
30527
+ str r0, [r6, #48]
30528
+.L4903:
30529
+ ldr r3, [r6, #48]
30530
+ cmp r3, #0
30531
+ beq .L4908
30532
+ ldr r10, .L4913+4
30533
+ mov r7, #0
30534
+ ldr r9, .L4913+8
30535
+ mov r4, r7
30536
+ mov r8, r7
30537
+.L4906:
30538
+ ldr r2, [r6, #48]
3061530539 mov r1, #128
30616
- ldr r2, [r6, #1144]
30540
+ lsl r0, r8, #7
3061730541 bl FlashBootVendorRead
3061830542 cmp r0, #0
30619
- bne .L5041
30620
- ldr r3, [r10, #1144]
30621
- ldr r0, .L5050+8
30622
- add r2, r3, #61440
30623
- ldr r1, [r3]
30543
+ bne .L4909
30544
+ ldr r1, [r6, #48]
30545
+ mov r0, r10
30546
+ add r2, r1, #61440
30547
+ ldr r3, [r1, #4]
3062430548 ldr r2, [r2, #4092]
30625
- ldr r3, [r3, #4]
30549
+ ldr r1, [r1]
3062630550 bl printk
30627
- ldr r5, [r10, #1144]
30551
+ ldr r5, [r6, #48]
3062830552 ldr r3, [r5]
3062930553 cmp r3, r9
30630
- bne .L5042
30554
+ bne .L4905
3063130555 add r2, r5, #61440
3063230556 ldr r3, [r5, #4]
30633
- ldr r1, [r2, #4092]
30634
- cmp r4, r3
30635
- movcs r2, #0
30636
- movcc r2, #1
30637
- cmp r1, r3
30638
- movne r2, #0
30557
+ ldr r2, [r2, #4092]
30558
+ cmp r3, r4
30559
+ sub r2, r2, r3
30560
+ clz r2, r2
30561
+ lsr r2, r2, #5
30562
+ movls r2, #0
3063930563 cmp r2, #0
30640
- movne r8, r7
30564
+ movne r7, r8
3064130565 movne r4, r3
30642
-.L5042:
30643
- cmp r7, #1
30644
- movne r7, #1
30645
- bne .L5043
30646
-.L5049:
30566
+.L4905:
30567
+ add r8, r8, #1
30568
+ cmp r8, #2
30569
+ bne .L4906
3064730570 cmp r4, #0
30648
- beq .L5044
30649
- mov r0, r8, asl #7
30650
- mov r1, #128
30571
+ beq .L4907
3065130572 mov r2, r5
30573
+ mov r1, #128
30574
+ lsl r0, r7, #7
3065230575 bl FlashBootVendorRead
30653
- cmp r0, #0
30654
- bne .L5041
30655
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
30656
-.L5044:
30657
- mov r0, r5
30658
- mov r1, r4
30576
+ adds r0, r0, #0
30577
+ movne r0, #1
30578
+ rsb r0, r0, #0
30579
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
30580
+.L4907:
3065930581 mov r2, #65536
30582
+ mov r1, r4
30583
+ mov r0, r5
3066030584 bl memset
30661
- ldr r3, .L5050+4
30662
- str r7, [r5, #4]
30585
+ mov r3, #1
30586
+ add r2, r5, #61440
30587
+ str r3, [r5, #4]
3066330588 mov r0, r4
30664
- str r3, [r5]
30665
- add r3, r5, #61440
30666
- str r7, [r3, #4092]
30667
- ldr r3, .L5050+12
30589
+ str r9, [r5]
30590
+ str r3, [r2, #4092]
30591
+ ldr r3, .L4913+12
3066830592 strh r4, [r5, #12] @ movhi
3066930593 strh r3, [r5, #14] @ movhi
30670
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
30671
-.L5041:
30672
- ldr r0, [r6, #1144]
30673
- bl kfree
30674
- mov r3, #0
30675
- mvn r0, #0
30676
- str r3, [r6, #1144]
30677
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
30678
-.L5045:
30594
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
30595
+.L4908:
3067930596 mvn r0, #11
30680
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, pc}
30681
-.L5051:
30597
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
30598
+.L4909:
30599
+ mvn r0, #0
30600
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
30601
+.L4914:
3068230602 .align 2
30683
-.L5050:
30603
+.L4913:
3068430604 .word .LANCHOR3
30605
+ .word .LC324
3068530606 .word 1380668996
30686
- .word .LC337
3068730607 .word -1032
3068830608 .fnend
3068930609 .size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init
3069030610 .align 2
3069130611 .global rk_ftl_vendor_read
30612
+ .syntax unified
30613
+ .arm
30614
+ .fpu softvfp
3069230615 .type rk_ftl_vendor_read, %function
3069330616 rk_ftl_vendor_read:
3069430617 .fnstart
3069530618 @ args = 0, pretend = 0, frame = 0
3069630619 @ frame_needed = 0, uses_anonymous_args = 0
30697
- stmfd sp!, {r3, r4, r5, lr}
30698
- .save {r3, r4, r5, lr}
30699
- ldr r3, .L5059
30700
- ldr ip, [r3, #1144]
30620
+ ldr r3, .L4925
30621
+ ldr ip, [r3, #48]
3070130622 cmp ip, #0
30702
- ldrneh r4, [ip, #10]
30703
- movne r3, #0
30704
- beq .L5057
30705
-.L5054:
30623
+ beq .L4920
30624
+ push {r4, r5, r6, lr}
30625
+ .save {r4, r5, r6, lr}
30626
+ mov r3, #0
30627
+ ldrh r4, [ip, #10]
30628
+.L4917:
3070630629 cmp r3, r4
30707
- bcs .L5057
30708
- add lr, ip, r3, asl #3
30630
+ bcc .L4919
30631
+ mvn r0, #0
30632
+ pop {r4, r5, r6, pc}
30633
+.L4919:
30634
+ add lr, ip, r3, lsl #3
3070930635 ldrh r5, [lr, #16]
3071030636 cmp r5, r0
30711
- bne .L5055
30712
- ldrh r3, [lr, #20]
30637
+ bne .L4918
30638
+ ldrh r4, [lr, #20]
3071330639 mov r0, r1
3071430640 ldrh r1, [lr, #18]
30715
- mov r4, r2
30716
- cmp r2, r3
30641
+ cmp r4, r2
30642
+ movcs r4, r2
3071730643 add r1, r1, #1024
30718
- movcs r4, r3
30719
- add r1, ip, r1
3072030644 mov r2, r4
30645
+ add r1, ip, r1
3072130646 bl memcpy
3072230647 mov r0, r4
30723
- ldmfd sp!, {r3, r4, r5, pc}
30724
-.L5055:
30648
+ pop {r4, r5, r6, pc}
30649
+.L4918:
3072530650 add r3, r3, #1
30726
- b .L5054
30727
-.L5057:
30651
+ b .L4917
30652
+.L4920:
3072830653 mvn r0, #0
30729
- ldmfd sp!, {r3, r4, r5, pc}
30730
-.L5060:
30654
+ bx lr
30655
+.L4926:
3073130656 .align 2
30732
-.L5059:
30657
+.L4925:
3073330658 .word .LANCHOR3
3073430659 .fnend
3073530660 .size rk_ftl_vendor_read, .-rk_ftl_vendor_read
3073630661 .align 2
3073730662 .global rk_ftl_vendor_write
30663
+ .syntax unified
30664
+ .arm
30665
+ .fpu softvfp
3073830666 .type rk_ftl_vendor_write, %function
3073930667 rk_ftl_vendor_write:
3074030668 .fnstart
3074130669 @ args = 0, pretend = 0, frame = 24
3074230670 @ frame_needed = 0, uses_anonymous_args = 0
30743
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, lr}
30671
+ ldr r3, .L4948
30672
+ push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
3074430673 .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
30745
- mov r9, r2
30746
- ldr r2, .L5084
3074730674 .pad #28
3074830675 sub sp, sp, #28
30749
- ldr r4, [r2, #1144]
30676
+ ldr r4, [r3, #48]
3075030677 cmp r4, #0
30751
- beq .L5076
30752
- mov r3, r1
30753
- add r7, r9, #63
30754
- ldrh r1, [r4, #8]
30755
- bic r7, r7, #63
30678
+ beq .L4942
30679
+ mov r8, r2
3075630680 ldrh r2, [r4, #10]
30757
- mov ip, r0
30758
- mov r6, #0
30759
- str r1, [sp, #4]
30760
-.L5063:
30761
- cmp r6, r2
30762
- bcs .L5082
30763
- add r5, r4, r6, asl #3
30764
- ldrh r1, [r5, #16]
30765
- cmp r1, ip
30766
- bne .L5064
30767
- ldrh r1, [r5, #20]
30768
- add fp, r4, #1024
30769
- add r1, r1, #63
30770
- bic r1, r1, #63
30771
- str r1, [sp, #8]
30772
- cmp r9, r1
30773
- bls .L5065
30681
+ add r6, r8, #63
30682
+ ldrh r3, [r4, #8]
30683
+ mov fp, r1
30684
+ bic r6, r6, #63
30685
+ mov r7, #0
30686
+ str r3, [sp, #4]
30687
+.L4929:
30688
+ cmp r7, r2
30689
+ bcc .L4937
3077430690 ldrh r1, [r4, #14]
30775
- cmp r1, r7
30776
- subcs r2, r2, #1
30777
- strcs r2, [sp, #12]
30778
- ldrcsh r8, [r5, #18]
30779
- bcc .L5076
30780
-.L5066:
30781
- ldr r2, [sp, #12]
30782
- add r5, r5, #8
30783
- cmp r6, r2
30784
- bcs .L5083
30785
- ldrh r10, [r5, #20]
30786
- add r0, fp, r8
30787
- ldrh r2, [r5, #16]
30788
- add r6, r6, #1
30789
- ldrh r1, [r5, #18]
30790
- strh r10, [r5, #12] @ movhi
30791
- add r10, r10, #63
30792
- bic r10, r10, #63
30793
- strh r2, [r5, #8] @ movhi
30794
- strh r8, [r5, #10] @ movhi
30795
- add r1, fp, r1
30796
- mov r2, r10
30797
- str r3, [sp, #20]
30798
- str ip, [sp, #16]
30799
- bl memcpy
30800
- add r8, r8, r10
30801
- ldr r3, [sp, #20]
30802
- ldr ip, [sp, #16]
30803
- b .L5066
30804
-.L5083:
30805
- add r6, r4, r6, asl #3
30806
- uxth r8, r8
30807
- add r0, fp, r8
30808
- mov r1, r3
30809
- strh r8, [r6, #18] @ movhi
30810
- mov r2, r9
30811
- strh ip, [r6, #16] @ movhi
30812
- uxth r7, r7
30813
- strh r9, [r6, #20] @ movhi
30814
- add r8, r8, r7
30815
- bl memcpy
30816
- ldrh r5, [r4, #14]
30817
- strh r8, [r4, #12] @ movhi
30818
- ldr r3, [sp, #8]
30819
- add r5, r3, r5
30820
- rsb r7, r7, r5
30821
- strh r7, [r4, #14] @ movhi
30822
- b .L5081
30823
-.L5065:
30824
- ldrh r0, [r5, #18]
30825
- mov r1, r3
30826
- mov r2, r9
30827
- add r0, fp, r0
30828
- bl memcpy
30829
- strh r9, [r5, #20] @ movhi
30830
- b .L5081
30831
-.L5064:
30832
- add r6, r6, #1
30833
- b .L5063
30834
-.L5082:
30835
- ldrh r1, [r4, #14]
30836
- cmp r1, r7
30837
- bcc .L5076
30838
- add r2, r4, r2, asl #3
30839
- uxth r7, r7
30840
- rsb r1, r7, r1
30841
- strh ip, [r2, #16] @ movhi
30842
- ldrh r0, [r4, #12]
30843
- strh r9, [r2, #20] @ movhi
30844
- strh r0, [r2, #18] @ movhi
30845
- add r0, r7, r0
30846
- strh r1, [r4, #14] @ movhi
30847
- mov r1, r3
30848
- strh r0, [r4, #12] @ movhi
30849
- ldrh r0, [r2, #18]
30850
- mov r2, r9
30691
+ cmp r6, r1
30692
+ bhi .L4942
30693
+ add r3, r4, r2, lsl #3
30694
+ uxth r6, r6
30695
+ strh r0, [r3, #16] @ movhi
30696
+ ldrh r2, [r4, #12]
30697
+ strh r8, [r3, #20] @ movhi
30698
+ strh r2, [r3, #18] @ movhi
30699
+ add r2, r2, r6
30700
+ sub r6, r1, r6
30701
+ strh r2, [r4, #12] @ movhi
30702
+ strh r6, [r4, #14] @ movhi
30703
+ mov r2, r8
30704
+ ldrh r0, [r3, #18]
30705
+ mov r1, fp
3085130706 add r0, r0, #1024
3085230707 add r0, r4, r0
3085330708 bl memcpy
3085430709 ldrh r3, [r4, #10]
3085530710 add r3, r3, #1
3085630711 strh r3, [r4, #10] @ movhi
30857
-.L5081:
30712
+ b .L4947
30713
+.L4937:
30714
+ add r5, r4, r7, lsl #3
30715
+ ldrh r3, [r5, #16]
30716
+ cmp r3, r0
30717
+ str r3, [sp, #8]
30718
+ bne .L4930
30719
+ ldrh r1, [r5, #20]
30720
+ add r3, r4, #1024
30721
+ add r1, r1, #63
30722
+ bic r1, r1, #63
30723
+ cmp r8, r1
30724
+ str r1, [sp, #12]
30725
+ bls .L4931
30726
+ ldrh r1, [r4, #14]
30727
+ cmp r6, r1
30728
+ subls r2, r2, #1
30729
+ ldrhls r10, [r5, #18]
30730
+ strls r2, [sp, #16]
30731
+ bls .L4932
30732
+.L4942:
30733
+ mvn r0, #0
30734
+ b .L4927
30735
+.L4933:
30736
+ ldrh r9, [r5, #20]
30737
+ add r0, r3, r10
30738
+ ldrh r2, [r5, #16]
30739
+ add r7, r7, #1
30740
+ ldrh r1, [r5, #18]
30741
+ strh r9, [r5, #12] @ movhi
30742
+ add r9, r9, #63
30743
+ bic r9, r9, #63
30744
+ strh r2, [r5, #8] @ movhi
30745
+ strh r10, [r5, #10] @ movhi
30746
+ add r1, r3, r1
30747
+ mov r2, r9
30748
+ str r3, [sp, #20]
30749
+ bl memcpy
30750
+ ldr r3, [sp, #20]
30751
+ add r10, r10, r9
30752
+.L4932:
30753
+ ldr r2, [sp, #16]
30754
+ add r5, r5, #8
30755
+ cmp r7, r2
30756
+ bcc .L4933
30757
+ ldrh r2, [sp, #8]
30758
+ add r7, r4, r7, lsl #3
30759
+ uxth r5, r10
30760
+ uxtah r0, r3, r10
30761
+ strh r8, [r7, #20] @ movhi
30762
+ strh r2, [r7, #16] @ movhi
30763
+ mov r1, fp
30764
+ strh r5, [r7, #18] @ movhi
30765
+ mov r2, r8
30766
+ bl memcpy
30767
+ uxth r3, r6
30768
+ ldrh r6, [r4, #14]
30769
+ add r5, r5, r3
30770
+ sub r6, r6, r3
30771
+ ldr r3, [sp, #12]
30772
+ strh r5, [r4, #12] @ movhi
30773
+ add r6, r6, r3
30774
+ strh r6, [r4, #14] @ movhi
30775
+.L4947:
3085830776 ldr r3, [r4, #4]
3085930777 add r2, r4, #61440
3086030778 mov r1, #128
....@@ -30869,112 +30787,121 @@
3086930787 movhi r3, #0
3087030788 strh r3, [r4, #8] @ movhi
3087130789 ldr r3, [sp, #4]
30872
- mov r0, r3, asl #7
30790
+ lsl r0, r3, #7
3087330791 bl FlashBootVendorWrite
3087430792 mov r0, #0
30875
- b .L5062
30876
-.L5076:
30877
- mvn r0, #0
30878
-.L5062:
30793
+.L4927:
3087930794 add sp, sp, #28
3088030795 @ sp needed
30881
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, fp, pc}
30882
-.L5085:
30796
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
30797
+.L4931:
30798
+ ldrh r0, [r5, #18]
30799
+ mov r2, r8
30800
+ mov r1, fp
30801
+ add r0, r3, r0
30802
+ bl memcpy
30803
+ strh r8, [r5, #20] @ movhi
30804
+ b .L4947
30805
+.L4930:
30806
+ add r7, r7, #1
30807
+ b .L4929
30808
+.L4949:
3088330809 .align 2
30884
-.L5084:
30810
+.L4948:
3088530811 .word .LANCHOR3
3088630812 .fnend
3088730813 .size rk_ftl_vendor_write, .-rk_ftl_vendor_write
3088830814 .align 2
3088930815 .global rk_ftl_vendor_storage_ioctl
30816
+ .syntax unified
30817
+ .arm
30818
+ .fpu softvfp
3089030819 .type rk_ftl_vendor_storage_ioctl, %function
3089130820 rk_ftl_vendor_storage_ioctl:
3089230821 .fnstart
3089330822 @ args = 0, pretend = 0, frame = 0
3089430823 @ frame_needed = 0, uses_anonymous_args = 0
30895
- stmfd sp!, {r4, r5, r6, lr}
30824
+ push {r4, r5, r6, lr}
3089630825 .save {r4, r5, r6, lr}
30897
- mov r0, #4096
30826
+ mov r0, #9216
3089830827 mov r5, r2
3089930828 mov r6, r1
3090030829 bl ftl_malloc
3090130830 subs r4, r0, #0
3090230831 mvneq r5, #0
30903
- beq .L5087
30904
- ldr r3, .L5103
30832
+ beq .L4950
30833
+ ldr r3, .L4966
3090530834 cmp r6, r3
30906
- beq .L5089
30835
+ beq .L4953
3090730836 add r3, r3, #1
3090830837 cmp r6, r3
30909
- beq .L5090
30910
- b .L5101
30911
-.L5089:
30912
- mov r1, r5
30838
+ beq .L4954
30839
+.L4964:
30840
+ mvn r5, #13
30841
+ b .L4952
30842
+.L4953:
3091330843 mov r2, #8
30844
+ mov r1, r5
3091430845 bl rk_copy_from_user
3091530846 cmp r0, #0
30916
- bne .L5101
30847
+ bne .L4964
3091730848 ldr r2, [r4]
30918
- ldr r3, .L5103+4
30849
+ ldr r3, .L4966+4
3091930850 cmp r2, r3
30920
- beq .L5092
30921
-.L5093:
30851
+ beq .L4956
30852
+.L4957:
3092230853 mvn r5, #0
30923
- b .L5088
30924
-.L5092:
30925
- ldrh r0, [r4, #4]
30926
- add r1, r4, #8
30854
+.L4952:
30855
+ mov r0, r4
30856
+ bl kfree
30857
+.L4950:
30858
+ mov r0, r5
30859
+ pop {r4, r5, r6, pc}
30860
+.L4956:
3092730861 ldrh r2, [r4, #6]
30862
+ add r1, r4, #8
30863
+ ldrh r0, [r4, #4]
3092830864 bl rk_ftl_vendor_read
3092930865 cmn r0, #1
30930
- beq .L5093
30866
+ beq .L4957
3093130867 uxth r2, r0
3093230868 strh r0, [r4, #6] @ movhi
3093330869 mov r1, r4
3093430870 mov r0, r5
3093530871 add r2, r2, #8
3093630872 bl rk_copy_to_user
30937
- cmp r0, #0
30938
- moveq r5, #0
30939
- mvnne r5, #13
30940
- b .L5088
30941
-.L5090:
30942
- mov r1, r5
30873
+ subs r5, r0, #0
30874
+ beq .L4952
30875
+ b .L4964
30876
+.L4954:
3094330877 mov r2, #8
30878
+ mov r1, r5
3094430879 bl rk_copy_from_user
3094530880 cmp r0, #0
30946
- bne .L5101
30881
+ bne .L4964
3094730882 ldr r2, [r4]
30948
- ldr r3, .L5103+4
30883
+ ldr r3, .L4966+4
3094930884 cmp r2, r3
30950
- bne .L5093
30885
+ bne .L4957
3095130886 ldrh r2, [r4, #6]
3095230887 movw r3, #4087
3095330888 cmp r2, r3
30954
- bhi .L5093
30955
- mov r0, r4
30956
- mov r1, r5
30889
+ bhi .L4957
3095730890 add r2, r2, #8
30891
+ mov r1, r5
30892
+ mov r0, r4
3095830893 bl rk_copy_from_user
3095930894 cmp r0, #0
30960
- bne .L5101
30961
- ldrh r0, [r4, #4]
30962
- add r1, r4, #8
30895
+ bne .L4964
3096330896 ldrh r2, [r4, #6]
30897
+ add r1, r4, #8
30898
+ ldrh r0, [r4, #4]
3096430899 bl rk_ftl_vendor_write
3096530900 mov r5, r0
30966
- b .L5088
30967
-.L5101:
30968
- mvn r5, #13
30969
-.L5088:
30970
- mov r0, r4
30971
- bl kfree
30972
-.L5087:
30973
- mov r0, r5
30974
- ldmfd sp!, {r4, r5, r6, pc}
30975
-.L5104:
30901
+ b .L4952
30902
+.L4967:
3097630903 .align 2
30977
-.L5103:
30904
+.L4966:
3097830905 .word 1074034177
3097930906 .word 1448232273
3098030907 .fnend
....@@ -30988,6 +30915,8 @@
3098830915 .global gSnSectorData
3098930916 .global gpDrmKeyInfo
3099030917 .global gpBootConfig
30918
+ .global ftl_dma32_buffer_size
30919
+ .global ftl_dma32_buffer
3099130920 .global gLoaderBootInfo
3099230921 .global RK29_NANDC1_REG_BASE
3099330922 .global RK29_NANDC_REG_BASE
....@@ -31158,28 +31087,16 @@
3115831087 .global g_flash_spare_buffer
3115931088 .global g_flash_page_buffer
3116031089 .section .rodata
31161
- .align 3
31162
-.LANCHOR1 = . + 0
31163
- .type __func__.39677, %object
31164
- .size __func__.39677, 18
31165
-__func__.39677:
31090
+ .align 2
31091
+ .set .LANCHOR1,. + 0
31092
+ .type __func__.42945, %object
31093
+ .size __func__.42945, 18
31094
+__func__.42945:
3116631095 .ascii "_list_remove_node\000"
31167
- .space 2
31168
- .type __func__.39702, %object
31169
- .size __func__.39702, 23
31170
-__func__.39702:
31096
+ .type __func__.42970, %object
31097
+ .size __func__.42970, 23
31098
+__func__.42970:
3117131099 .ascii "_list_update_data_list\000"
31172
- .space 1
31173
- .type __func__.20210, %object
31174
- .size __func__.20210, 22
31175
-__func__.20210:
31176
- .ascii "nand_flash_print_info\000"
31177
- .space 2
31178
- .type __func__.20296, %object
31179
- .size __func__.20296, 11
31180
-__func__.20296:
31181
- .ascii "nandc_init\000"
31182
- .space 1
3118331100 .type toshiba_A19ref_value, %object
3118431101 .size toshiba_A19ref_value, 45
3118531102 toshiba_A19ref_value:
....@@ -31228,7 +31145,6 @@
3122831145 .byte 126
3122931146 .byte 124
3123031147 .byte 0
31231
- .space 3
3123231148 .type toshiba_15ref_value, %object
3123331149 .size toshiba_15ref_value, 95
3123431150 toshiba_15ref_value:
....@@ -31327,7 +31243,6 @@
3132731243 .byte 116
3132831244 .byte 114
3132931245 .byte 0
31330
- .space 1
3133131246 .type toshiba_ref_value, %object
3133231247 .size toshiba_ref_value, 8
3133331248 toshiba_ref_value:
....@@ -31339,15 +31254,18 @@
3133931254 .byte 8
3134031255 .byte 12
3134131256 .byte 112
31342
- .type __func__.19683, %object
31343
- .size __func__.19683, 28
31344
-__func__.19683:
31257
+ .type __func__.23463, %object
31258
+ .size __func__.23463, 22
31259
+__func__.23463:
31260
+ .ascii "nand_flash_print_info\000"
31261
+ .type __func__.22936, %object
31262
+ .size __func__.22936, 28
31263
+__func__.22936:
3134531264 .ascii "flash_wait_device_ready_raw\000"
31346
- .type __func__.19747, %object
31347
- .size __func__.19747, 22
31348
-__func__.19747:
31265
+ .type __func__.23000, %object
31266
+ .size __func__.23000, 22
31267
+__func__.23000:
3134931268 .ascii "flash_start_page_read\000"
31350
- .space 2
3135131269 .type toshiba_3D_tlc_value, %object
3135231270 .size toshiba_3D_tlc_value, 399
3135331271 toshiba_3D_tlc_value:
....@@ -31750,7 +31668,6 @@
3175031668 .byte 12
3175131669 .byte 12
3175231670 .byte 14
31753
- .space 1
3175431671 .type toshiba_3D_slc_value, %object
3175531672 .size toshiba_3D_slc_value, 11
3175631673 toshiba_3D_slc_value:
....@@ -31765,7 +31682,6 @@
3176531682 .byte 40
3176631683 .byte -56
3176731684 .byte 56
31768
- .space 1
3176931685 .type ymtc_3D_tlc_value, %object
3177031686 .size ymtc_3D_tlc_value, 357
3177131687 ymtc_3D_tlc_value:
....@@ -32126,7 +32042,6 @@
3212632042 .byte 12
3212732043 .byte 12
3212832044 .byte 14
32129
- .space 3
3213032045 .type ymtc_3D_slc_value, %object
3213132046 .size ymtc_3D_slc_value, 10
3213232047 ymtc_3D_slc_value:
....@@ -32140,22 +32055,18 @@
3214032055 .byte 40
3214132056 .byte -12
3214232057 .byte 56
32143
- .space 2
32144
- .type __func__.19772, %object
32145
- .size __func__.19772, 23
32146
-__func__.19772:
32058
+ .type __func__.23025, %object
32059
+ .size __func__.23025, 23
32060
+__func__.23025:
3214732061 .ascii "flash_start_plane_read\000"
32148
- .space 1
32149
- .type __func__.19658, %object
32150
- .size __func__.19658, 26
32151
-__func__.19658:
32062
+ .type __func__.22911, %object
32063
+ .size __func__.22911, 26
32064
+__func__.22911:
3215232065 .ascii "flash_erase_duplane_block\000"
32153
- .space 2
32154
- .type __func__.19669, %object
32155
- .size __func__.19669, 21
32156
-__func__.19669:
32066
+ .type __func__.22922, %object
32067
+ .size __func__.22922, 21
32068
+__func__.22922:
3215732069 .ascii "flash_erase_block_en\000"
32158
- .space 3
3215932070 .type random_seed, %object
3216032071 .size random_seed, 256
3216132072 random_seed:
....@@ -32287,109 +32198,98 @@
3228732198 .short 28406
3228832199 .short 17598
3228932200 .short 28087
32290
- .type __func__.20475, %object
32291
- .size __func__.20475, 13
32292
-__func__.20475:
32201
+ .type __func__.23728, %object
32202
+ .size __func__.23728, 13
32203
+__func__.23728:
3229332204 .ascii "buf_add_tail\000"
32294
- .space 3
32295
- .type __func__.20488, %object
32296
- .size __func__.20488, 10
32297
-__func__.20488:
32205
+ .type __func__.23741, %object
32206
+ .size __func__.23741, 10
32207
+__func__.23741:
3229832208 .ascii "buf_alloc\000"
32299
- .space 2
32300
- .type __func__.20502, %object
32301
- .size __func__.20502, 16
32302
-__func__.20502:
32209
+ .type __func__.23755, %object
32210
+ .size __func__.23755, 16
32211
+__func__.23755:
3230332212 .ascii "buf_remove_free\000"
32304
- .space 4
32213
+ .space 1
3230532214 .type zftl_debug_proc_fops, %object
32306
- .size zftl_debug_proc_fops, 160
32215
+ .size zftl_debug_proc_fops, 44
3230732216 zftl_debug_proc_fops:
32308
- .word 0
32309
- .word seq_lseek
32310
- .word seq_read
32311
- .word zftl_debug_proc_write
32312
- .space 36
32313
- .word zftl_debug_proc_open
3231432217 .space 4
32218
+ .word zftl_debug_proc_open
32219
+ .word seq_read
32220
+ .space 4
32221
+ .word zftl_debug_proc_write
32222
+ .word seq_lseek
3231532223 .word single_release
32316
- .space 96
32317
- .type __func__.39210, %object
32318
- .size __func__.39210, 12
32319
-__func__.39210:
32224
+ .space 16
32225
+ .type __func__.42478, %object
32226
+ .size __func__.42478, 12
32227
+__func__.42478:
3232032228 .ascii "gc_add_sblk\000"
32321
- .type __func__.39302, %object
32322
- .size __func__.39302, 19
32323
-__func__.39302:
32229
+ .type __func__.42570, %object
32230
+ .size __func__.42570, 19
32231
+__func__.42570:
3232432232 .ascii "gc_write_completed\000"
32325
- .space 1
32326
- .type __func__.39908, %object
32327
- .size __func__.39908, 18
32328
-__func__.39908:
32233
+ .type __func__.43176, %object
32234
+ .size __func__.43176, 18
32235
+__func__.43176:
3232932236 .ascii "ftl_alloc_sys_blk\000"
32330
- .space 2
32331
- .type __func__.39918, %object
32332
- .size __func__.39918, 17
32333
-__func__.39918:
32237
+ .type __func__.43186, %object
32238
+ .size __func__.43186, 17
32239
+__func__.43186:
3233432240 .ascii "ftl_free_sys_blk\000"
32335
- .space 3
32336
- .type __func__.40039, %object
32337
- .size __func__.40039, 23
32338
-__func__.40039:
32241
+ .type __func__.43307, %object
32242
+ .size __func__.43307, 23
32243
+__func__.43307:
3233932244 .ascii "ftl_get_ppa_from_index\000"
32340
- .space 1
32341
- .type __func__.40079, %object
32342
- .size __func__.40079, 22
32343
-__func__.40079:
32245
+ .type __func__.43347, %object
32246
+ .size __func__.43347, 22
32247
+__func__.43347:
3234432248 .ascii "ftl_get_new_free_page\000"
32345
- .space 2
32346
- .type __func__.40090, %object
32347
- .size __func__.40090, 22
32348
-__func__.40090:
32249
+ .type __func__.43358, %object
32250
+ .size __func__.43358, 22
32251
+__func__.43358:
3234932252 .ascii "ftl_ext_alloc_new_blk\000"
32350
- .space 2
32351
- .type __func__.39359, %object
32352
- .size __func__.39359, 16
32353
-__func__.39359:
32253
+ .type __func__.42627, %object
32254
+ .size __func__.42627, 16
32255
+__func__.42627:
3235432256 .ascii "gc_free_src_blk\000"
32355
- .type __func__.38953, %object
32356
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32858
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32860
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32862
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32864
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32866
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32868
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32870
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32872
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32874
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32878
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32880
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32882
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32884
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32886
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32888
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32890
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32892
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32894
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32898
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32900
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32902
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32904
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32906
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32908
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32910
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32913
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32914
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32916
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32917
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32919
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32920
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32921
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32922
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32923
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32924
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32925
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32926
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32927
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32929
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32930
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32931
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32932
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32933
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32935
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32937
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32938
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32939
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32940
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32941
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32942
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32943
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32944
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32945
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32946
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32948
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32949
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32950
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32952
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32955
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32957
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32959
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32960
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32961
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32962
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32963
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32965
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32967
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32968
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32969
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32970
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32971
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32972
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32973
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32974
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32975
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32976
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32977
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32978
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32979
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32980
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32981
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32982
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32983
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32984
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32985
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32988
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32989
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32990
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32991
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32992
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32993
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32994
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32995
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32996
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32997
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32998
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33000
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33001
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33002
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33004
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33006
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33008
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33010
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33012
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33014
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33016
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33018
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33019
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33020
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33021
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33022
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33023
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33024
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33025
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33026
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33027
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33028
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33029
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33030
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33031
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33032
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33033
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33034
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33035
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33036
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33037
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33038
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33039
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33040
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33041
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33042
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33043
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33044
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33045
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33046
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33047
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33048
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33049
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33050
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33051
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33052
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33053
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33054
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33055
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33056
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33057
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33058
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33059
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33060
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33061
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33062
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33063
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33064
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33065
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33067
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33068
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33070
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33071
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33072
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33073
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33074
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33075
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33076
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33077
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33078
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33079
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33080
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33081
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33082
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33083
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33084
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33085
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33086
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33087
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33088
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33089
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33090
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33091
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33092
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33093
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33094
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33095
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33096
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33097
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33098
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33099
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33100
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33101
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33102
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33103
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33104
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33105
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33106
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33107
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33108
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33109
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33110
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33111
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33112
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33113
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33114
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33116
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33117
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33118
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33119
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33120
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33121
- .ascii " %x %x, spare: %x %x %x %x\012\000"
33122
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33123
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33124
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33125
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33126
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33127
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33128
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33129
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33130
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33131
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33132
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33133
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33134
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33135
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33136
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33137
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33138
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33139
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33140
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33141
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33142
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33143
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33144
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33145
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33146
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33147
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33148
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33149
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33151
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33153
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33154
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33155
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33156
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33157
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33158
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33159
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33160
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33161
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33162
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33163
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33164
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33165
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33166
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33167
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33168
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33169
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33170
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33171
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33172
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33173
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33174
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33175
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33177
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33178
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33179
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33180
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33181
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33182
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33183
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33184
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33185
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33186
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33187
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33188
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33189
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33190
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33191
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33192
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33193
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33194
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33195
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33196
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33197
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33198
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33199
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33200
- .ascii "sblk:\000"
33201
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33202
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33203
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33204
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33205
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33206
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33207
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33208
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33209
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33210
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33211
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33212
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33213
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33214
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33215
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33216
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33217
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33218
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33219
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33220
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33221
- .ascii "pm_init recovery %x %x %x\012\000"
33222
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33223
- .ascii "pm_init hash %x error\012\000"
33224
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33225
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33226
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33227
- .ascii "ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
33228
- .ascii "%x %x %x\012\000"
33229
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33230
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33231
- .ascii "\000"
33232
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33233
- .ascii "gc_recovery: %x vpn = %x\012\000"
33234
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33235
- .ascii "gc_update_l2p_map_new sblk %x\012\000"
33236
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33237
- .ascii "gc_update_l2p_map_new: %x %x %x\012\000"
33238
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33239
- .ascii "lpa: %x %x %x\012\000"
33240
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33241
- .ascii "gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
33242
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33243
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33244
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33245
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33246
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33247
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33248
- .ascii "gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
33249
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33250
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33251
- .ascii "%d\012\000"
33252
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33253
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33254
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33255
- .ascii "ftl_sblk_dump = %x %x %x %x\012\000"
33256
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33257
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33258
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33259
- .ascii "index= %x, lpa=%x\012\000"
33260
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33261
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33262
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33263
- .ascii "ftl_read %x %x %x\012\000"
33264
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33265
- .ascii "ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
33266
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33267
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33268
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33269
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33270
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33271
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33272
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33273
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33274
- .ascii "dumpl2p\000"
33275
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33276
- .ascii "pm l2p:\000"
33277
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33278
- .ascii "pm blk:\000"
33279
-.LC270:
33280
- .ascii "dumppm:\000"
33281
-.LC271:
33282
- .ascii "p_cmd: %s\012\000"
33283
-.LC272:
33284
- .ascii "pm ram = %x, %x\012\000"
33285
-.LC273:
33286
- .ascii "ram:\000"
33287
-.LC274:
33288
- .ascii "pm:\000"
33289
-.LC275:
33290
- .ascii "dumpsys\000"
33291
-.LC276:
33292
- .ascii "dumplist:\000"
33293
-.LC277:
33294
- .ascii "vpncheck\000"
33295
-.LC278:
33296
- .ascii "dumpppa:\000"
33297
-.LC279:
33298
- .ascii "dumpblk:\000"
33299
-.LC280:
33300
- .ascii "setzdebug:\000"
33301
-.LC281:
33302
- .ascii "lpa2ppa:\000"
33303
-.LC282:
33304
- .ascii "lpa: %x--> ppa: %x\012\000"
33305
-.LC283:
33306
- .ascii "help:\012\000"
33307
-.LC284:
33308
- .ascii "1. echo dumpl2p > /proc/zftl_debug\012\000"
33309
-.LC285:
33310
- .ascii "2. echo dumppm:x > /proc/zftl_debug\012\000"
33311
-.LC286:
33312
- .ascii "3. echo dumpsys > /proc/zftl_debug\012\000"
33313
-.LC287:
33314
- .ascii "4. echo dumpppa:x > /proc/zftl_debug\012\000"
33315
-.LC288:
33316
- .ascii "5. echo vpncheck > /proc/zftl_debug\012\000"
33317
-.LC289:
33318
- .ascii "6. echo setzdebug:x > /proc/zftl_debug\012\000"
33319
-.LC290:
33320
- .ascii "7. echo dumplist:x > /proc/zftl_debug\012\000"
33321
-.LC291:
33322
- .ascii "8. echo lpa2ppa:x> /proc/zftl_debug\012\000"
33323
-.LC292:
33324
- .ascii "ftl_update_l2p_map: %x %x %x\012\000"
33325
-.LC293:
33326
- .ascii "ftl_update_l2p_map\000"
33327
-.LC294:
33328
- .ascii "lpa_tbl:\000"
33329
-.LC295:
33330
- .ascii "sblk %x vpn: %d %d\012\000"
33331
-.LC296:
33332
- .ascii "error gc_add_sblk: %x\012\000"
33333
-.LC297:
33334
- .ascii "%d read error: ppa:%x, lpa:%x, status:%x\012\000"
33335
-.LC298:
33336
- .ascii "gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
33337
-.LC299:
33338
- .ascii "gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
33339
- .ascii "page_index= %d\012\000"
33340
-.LC300:
33341
- .ascii "gc %d: %d %d %d %d %d %d %d\012\000"
33342
-.LC301:
33343
- .ascii "GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
33344
- .ascii "\000"
33345
-.LC302:
33346
- .ascii "gc free %x, %d\012\000"
33347
-.LC303:
33348
- .ascii "_c_user_data_density := %d\012\000"
33349
-.LC304:
33350
- .ascii "_c_totle_phy_density := %d\012\000"
33351
-.LC305:
33352
- .ascii "_c_totle_log_page := %d\012\000"
33353
-.LC306:
33354
- .ascii "_c_totle_data_density := %d\012\000"
33355
-.LC307:
33356
- .ascii "_c_ftl_pm_page_num := %d\012\000"
33357
-.LC308:
33358
- .ascii "_c_ftl_byte_pre_page := %d\012\000"
33359
-.LC309:
33360
- .ascii "_c_max_pm_sblk := %d\012\000"
33361
-.LC310:
33362
- .ascii "_min_slc_super_block := %d\012\000"
33363
-.LC311:
33364
- .ascii "_max_xlc_super_block := %d\012\000"
33365
-.LC312:
33366
- .ascii "gp_ftl_ext_info %p %p %p\012\000"
33367
-.LC313:
33368
- .ascii "flash info size: %d %d %d\012\000"
33369
-.LC314:
33370
- .ascii "ftl_init %x\012\000"
33371
-.LC315:
33372
- .ascii "ftlwrite %x %x %x %x\012\000"
33373
-.LC316:
33374
- .ascii "ftl_discard:(%x, %x, %x, %x)\012\000"
33375
-.LC317:
33376
- .ascii "id_block_prog_msb_ff_data slc page = %d pageadd=%x "
33377
- .ascii "%x\012\000"
33378
-.LC318:
33379
- .ascii "write_idblock fix data %x %x\012\000"
33380
-.LC319:
33381
- .ascii "idblk:\000"
33382
-.LC320:
33383
- .ascii "write_idblock totle_sec %x %x\012\000"
33384
-.LC321:
33385
- .ascii "prog page: %x %x %x, %p %x %x %x\012\000"
33386
-.LC322:
33387
- .ascii "wl_lba %p %x %x %x\012\000"
33388
-.LC323:
33389
- .ascii "RKNAND_GET_DRM_KEY\012\000"
33390
-.LC324:
33391
- .ascii "rk_copy_from_user error\012\000"
33392
-.LC325:
33393
- .ascii "RKNAND_STORE_DRM_KEY\012\000"
33394
-.LC326:
33395
- .ascii "RKNAND_DIASBLE_SECURE_BOOT\012\000"
33396
-.LC327:
33397
- .ascii "RKNAND_ENASBLE_SECURE_BOOT\012\000"
33398
-.LC328:
33399
- .ascii "RKNAND_GET_SN_SECTOR\012\000"
33400
-.LC329:
33401
- .ascii "RKNAND_LOADER_UNLOCK\012\000"
33402
-.LC330:
33403
- .ascii "RKNAND_LOADER_STATUS\012\000"
33404
-.LC331:
33405
- .ascii "RKNAND_LOADER_LOCK\012\000"
33406
-.LC332:
33407
- .ascii "LockKey not match %d\012\000"
33408
-.LC333:
33409
- .ascii "RKNAND_GET_VENDOR_SECTOR\012\000"
33410
-.LC334:
33411
- .ascii "RKNAND_STORE_VENDOR_SECTOR\012\000"
33412
-.LC335:
33413
- .ascii "return ret = %lx\012\000"
33414
-.LC336:
33415
- .ascii "secureBootEn check error\012\000"
33416
-.LC337:
33417
- .ascii "\0013vendor storage %x,%x,%x\012\000"
3341832577 .data
3341932578 .align 2
33420
-.LANCHOR2 = . + 0
32579
+ .set .LANCHOR2,. + 0
3342132580 .type zftl_debug, %object
3342232581 .size zftl_debug, 4
3342332582 zftl_debug:
....@@ -33785,7 +32944,6 @@
3378532944 .byte 0
3378632945 .byte -32
3378732946 .byte 0
33788
- .space 3
3378932947 .type sd15_slc_rr, %object
3379032948 .size sd15_slc_rr, 25
3379132949 sd15_slc_rr:
....@@ -33814,7 +32972,6 @@
3381432972 .byte 96
3381532973 .byte 104
3381632974 .byte 112
33817
- .space 3
3381832975 .type hy_f26_ref_value, %object
3381932976 .size hy_f26_ref_value, 28
3382032977 hy_f26_ref_value:
....@@ -36460,8 +35617,8 @@
3646035617 .short 1019
3646135618 .bss
3646235619 .align 6
36463
-.LANCHOR0 = . + 0
36464
-.LANCHOR3 = . + 8184
35620
+ .set .LANCHOR0,. + 0
35621
+ .set .LANCHOR3,. + 8184
3646535622 .type g_flash_slc_mode, %object
3646635623 .size g_flash_slc_mode, 1
3646735624 g_flash_slc_mode:
....@@ -36490,6 +35647,10 @@
3649035647 .type gp_sblk_list_tbl, %object
3649135648 .size gp_sblk_list_tbl, 4
3649235649 gp_sblk_list_tbl:
35650
+ .space 4
35651
+ .type gp_flash_info, %object
35652
+ .size gp_flash_info, 4
35653
+gp_flash_info:
3649335654 .space 4
3649435655 .type gp_nandc, %object
3649535656 .size gp_nandc, 4
....@@ -36549,6 +35710,15 @@
3654935710 .size gp_ftl_ext_info, 4
3655035711 gp_ftl_ext_info:
3655135712 .space 4
35713
+ .type g_retryMode, %object
35714
+ .size g_retryMode, 1
35715
+g_retryMode:
35716
+ .space 1
35717
+ .type g_maxRegNum, %object
35718
+ .size g_maxRegNum, 1
35719
+g_maxRegNum:
35720
+ .space 1
35721
+ .space 2
3655235722 .type gp_nand_para_info, %object
3655335723 .size gp_nand_para_info, 4
3655435724 gp_nand_para_info:
....@@ -36573,41 +35743,6 @@
3657335743 .size g_flash_toggle_mode_en, 1
3657435744 g_flash_toggle_mode_en:
3657535745 .space 1
36576
- .type nandc_hw_seed, %object
36577
- .size nandc_hw_seed, 1
36578
-nandc_hw_seed:
36579
- .space 1
36580
- .space 3
36581
- .type g_nandc_v6_master_info, %object
36582
- .size g_nandc_v6_master_info, 28
36583
-g_nandc_v6_master_info:
36584
- .space 28
36585
- .type nandc_randomizer_en, %object
36586
- .size nandc_randomizer_en, 1
36587
-nandc_randomizer_en:
36588
- .space 1
36589
- .space 1
36590
- .type fill_spare_size, %object
36591
- .size fill_spare_size, 2
36592
-fill_spare_size:
36593
- .space 2
36594
- .type g_nandc_ecc_bits, %object
36595
- .size g_nandc_ecc_bits, 1
36596
-g_nandc_ecc_bits:
36597
- .space 1
36598
- .type g_retryMode, %object
36599
- .size g_retryMode, 1
36600
-g_retryMode:
36601
- .space 1
36602
- .type g_maxRegNum, %object
36603
- .size g_maxRegNum, 1
36604
-g_maxRegNum:
36605
- .space 1
36606
- .space 1
36607
- .type gp_flash_info, %object
36608
- .size gp_flash_info, 4
36609
-gp_flash_info:
36610
- .space 4
3661135746 .type g_die_cs_idx, %object
3661235747 .size g_die_cs_idx, 8
3661335748 g_die_cs_idx:
....@@ -36620,7 +35755,6 @@
3662035755 .size _c_ftl_cs_bits, 1
3662135756 _c_ftl_cs_bits:
3662235757 .space 1
36623
- .space 2
3662435758 .type g_flash_cur_mode, %object
3662535759 .size g_flash_cur_mode, 4
3662635760 g_flash_cur_mode:
....@@ -36633,7 +35767,6 @@
3663335767 .size g_flash_ymtc_3d_tlc_flag, 1
3663435768 g_flash_ymtc_3d_tlc_flag:
3663535769 .space 1
36636
- .space 2
3663735770 .type IDByte, %object
3663835771 .size IDByte, 32
3663935772 IDByte:
....@@ -36642,19 +35775,36 @@
3664235775 .size g_flash_interface_mode, 1
3664335776 g_flash_interface_mode:
3664435777 .space 1
35778
+ .type g_nandc_ecc_bits, %object
35779
+ .size g_nandc_ecc_bits, 1
35780
+g_nandc_ecc_bits:
35781
+ .space 1
3664535782 .type g_flash_multi_page_prog_en, %object
3664635783 .size g_flash_multi_page_prog_en, 1
3664735784 g_flash_multi_page_prog_en:
3664835785 .space 1
35786
+ .type nandc_hw_seed, %object
35787
+ .size nandc_hw_seed, 1
35788
+nandc_hw_seed:
35789
+ .space 1
35790
+ .type nandc_randomizer_en, %object
35791
+ .size nandc_randomizer_en, 1
35792
+nandc_randomizer_en:
35793
+ .space 1
35794
+ .space 3
35795
+ .type g_nandc_v6_master_info, %object
35796
+ .size g_nandc_v6_master_info, 28
35797
+g_nandc_v6_master_info:
35798
+ .space 28
35799
+ .type fill_spare_size, %object
35800
+ .size fill_spare_size, 2
35801
+fill_spare_size:
35802
+ .space 2
3664935803 .space 2
3665035804 .type g_buf, %object
3665135805 .size g_buf, 1536
3665235806 g_buf:
3665335807 .space 1536
36654
- .type _c_ftl_sec_per_page, %object
36655
- .size _c_ftl_sec_per_page, 1
36656
-_c_ftl_sec_per_page:
36657
- .space 1
3665835808 .type p_free_buf_head, %object
3665935809 .size p_free_buf_head, 1
3666035810 p_free_buf_head:
....@@ -36679,7 +35829,7 @@
3667935829 .size sblk_write_completed_queue_head, 1
3668035830 sblk_write_completed_queue_head:
3668135831 .space 1
36682
- .space 1
35832
+ .space 2
3668335833 .type _c_totle_phy_density, %object
3668435834 .size _c_totle_phy_density, 4
3668535835 _c_totle_phy_density:
....@@ -36729,27 +35879,27 @@
3672935879 .size gc_free_slc_sblk_th, 2
3673035880 gc_free_slc_sblk_th:
3673135881 .space 2
36732
- .type gc_tlc_mode_tlc_vpn_th, %object
36733
- .size gc_tlc_mode_tlc_vpn_th, 2
36734
-gc_tlc_mode_tlc_vpn_th:
36735
- .space 2
3673635882 .type gc_tlc_mode_slc_vpn_th, %object
3673735883 .size gc_tlc_mode_slc_vpn_th, 2
3673835884 gc_tlc_mode_slc_vpn_th:
3673935885 .space 2
36740
- .type gc_slc_mode_vpn_th, %object
36741
- .size gc_slc_mode_vpn_th, 2
36742
-gc_slc_mode_vpn_th:
36743
- .space 2
36744
- .type gc_slc_mode_tlc_vpn_th, %object
36745
- .size gc_slc_mode_tlc_vpn_th, 2
36746
-gc_slc_mode_tlc_vpn_th:
35886
+ .type gc_tlc_mode_tlc_vpn_th, %object
35887
+ .size gc_tlc_mode_tlc_vpn_th, 2
35888
+gc_tlc_mode_tlc_vpn_th:
3674735889 .space 2
3674835890 .space 2
3674935891 .type _gc_after_discard_en, %object
3675035892 .size _gc_after_discard_en, 4
3675135893 _gc_after_discard_en:
3675235894 .space 4
35895
+ .type gc_slc_mode_tlc_vpn_th, %object
35896
+ .size gc_slc_mode_tlc_vpn_th, 2
35897
+gc_slc_mode_tlc_vpn_th:
35898
+ .space 2
35899
+ .type gc_slc_mode_vpn_th, %object
35900
+ .size gc_slc_mode_vpn_th, 2
35901
+gc_slc_mode_vpn_th:
35902
+ .space 2
3675335903 .type write_buf_head, %object
3675435904 .size write_buf_head, 1
3675535905 write_buf_head:
....@@ -36763,7 +35913,6 @@
3676335913 .size ftl_sblk_vpn_update_id, 2
3676435914 ftl_sblk_vpn_update_id:
3676535915 .space 2
36766
- .space 2
3676735916 .type ftl_sblk_update_list, %object
3676835917 .size ftl_sblk_update_list, 16
3676935918 ftl_sblk_update_list:
....@@ -36776,7 +35925,7 @@
3677635925 .size _c_ftl_planes_per_die, 1
3677735926 _c_ftl_planes_per_die:
3677835927 .space 1
36779
- .space 1
35928
+ .space 3
3678035929 .type gc_valid_page_ppa, %object
3678135930 .size gc_valid_page_ppa, 4
3678235931 gc_valid_page_ppa:
....@@ -36813,6 +35962,10 @@
3681335962 .size _c_ftl_page_pre_blk, 2
3681435963 _c_ftl_page_pre_blk:
3681535964 .space 2
35965
+ .type gp_data_slc_data_head, %object
35966
+ .size gp_data_slc_data_head, 4
35967
+gp_data_slc_data_head:
35968
+ .space 4
3681635969 .type gc_slc_data_index, %object
3681735970 .size gc_slc_data_index, 2
3681835971 gc_slc_data_index:
....@@ -36838,11 +35991,6 @@
3683835991 .size _c_ftl_page_pre_slc_blk, 2
3683935992 _c_ftl_page_pre_slc_blk:
3684035993 .space 2
36841
- .space 2
36842
- .type gp_data_slc_data_head, %object
36843
- .size gp_data_slc_data_head, 4
36844
-gp_data_slc_data_head:
36845
- .space 4
3684635994 .type gc_xlc_search_index, %object
3684735995 .size gc_xlc_search_index, 2
3684835996 gc_xlc_search_index:
....@@ -36854,7 +36002,6 @@
3685436002 .type _max_xlc_super_block, %object
3685536003 .size _max_xlc_super_block, 2
3685636004 _max_xlc_super_block:
36857
- .space 2
3685836005 .space 2
3685936006 .type gp_free_slc_head, %object
3686036007 .size gp_free_slc_head, 4
....@@ -36880,11 +36027,12 @@
3688036027 .size _c_ftl_nand_die_num, 1
3688136028 _c_ftl_nand_die_num:
3688236029 .space 1
36883
- .space 3
36030
+ .space 1
3688436031 .type lpa_hash, %object
3688536032 .size lpa_hash, 512
3688636033 lpa_hash:
3688736034 .space 512
36035
+ .space 2
3688836036 .type ftl_sblk_lpa_tbl, %object
3688936037 .size ftl_sblk_lpa_tbl, 4
3689036038 ftl_sblk_lpa_tbl:
....@@ -36897,6 +36045,11 @@
3689736045 .size ftl_vpn_update_count, 2
3689836046 ftl_vpn_update_count:
3689936047 .space 2
36048
+ .type _c_ftl_sec_per_page, %object
36049
+ .size _c_ftl_sec_per_page, 1
36050
+_c_ftl_sec_per_page:
36051
+ .space 1
36052
+ .space 1
3690036053 .type ftl_sblk_update_list_offset, %object
3690136054 .size ftl_sblk_update_list_offset, 2
3690236055 ftl_sblk_update_list_offset:
....@@ -36922,6 +36075,7 @@
3692236075 .size read_buf_count, 1
3692336076 read_buf_count:
3692436077 .space 1
36078
+ .space 2
3692536079 .type pm_ram_info, %object
3692636080 .size pm_ram_info, 256
3692736081 pm_ram_info:
....@@ -36948,32 +36102,7 @@
3694836102 .size g_totle_phy_block, 2
3694936103 g_totle_phy_block:
3695036104 .space 2
36951
- .type gc_state, %object
36952
- .size gc_state, 1
36953
-gc_state:
36954
- .space 1
36955
- .space 1
36956
- .type gc_search_count, %object
36957
- .size gc_search_count, 4
36958
-gc_search_count:
36959
- .space 4
36960
- .type gc_slc_mode_slc_vpn_th, %object
36961
- .size gc_slc_mode_slc_vpn_th, 2
36962
-gc_slc_mode_slc_vpn_th:
3696336105 .space 2
36964
- .space 2
36965
- .type gc_lpa_tbl, %object
36966
- .size gc_lpa_tbl, 4
36967
-gc_lpa_tbl:
36968
- .space 4
36969
- .type gc_pre_ppa_tbl, %object
36970
- .size gc_pre_ppa_tbl, 4
36971
-gc_pre_ppa_tbl:
36972
- .space 4
36973
- .type gc_des_ppa_tbl, %object
36974
- .size gc_des_ppa_tbl, 4
36975
-gc_des_ppa_tbl:
36976
- .space 4
3697736106 .type pm_force_gc, %object
3697836107 .size pm_force_gc, 4
3697936108 pm_force_gc:
....@@ -37003,6 +36132,40 @@
3700336132 .size RK29_NANDC_REG_BASE, 4
3700436133 RK29_NANDC_REG_BASE:
3700536134 .space 4
36135
+ .type ftl_dma32_buffer_size, %object
36136
+ .size ftl_dma32_buffer_size, 4
36137
+ftl_dma32_buffer_size:
36138
+ .space 4
36139
+ .type ftl_dma32_buffer, %object
36140
+ .size ftl_dma32_buffer, 4
36141
+ftl_dma32_buffer:
36142
+ .space 4
36143
+ .type gc_state, %object
36144
+ .size gc_state, 1
36145
+gc_state:
36146
+ .space 1
36147
+ .space 3
36148
+ .type gc_search_count, %object
36149
+ .size gc_search_count, 4
36150
+gc_search_count:
36151
+ .space 4
36152
+ .type gc_slc_mode_slc_vpn_th, %object
36153
+ .size gc_slc_mode_slc_vpn_th, 2
36154
+gc_slc_mode_slc_vpn_th:
36155
+ .space 2
36156
+ .space 2
36157
+ .type gc_lpa_tbl, %object
36158
+ .size gc_lpa_tbl, 4
36159
+gc_lpa_tbl:
36160
+ .space 4
36161
+ .type gc_pre_ppa_tbl, %object
36162
+ .size gc_pre_ppa_tbl, 4
36163
+gc_pre_ppa_tbl:
36164
+ .space 4
36165
+ .type gc_des_ppa_tbl, %object
36166
+ .size gc_des_ppa_tbl, 4
36167
+gc_des_ppa_tbl:
36168
+ .space 4
3700636169 .type g_flash_tmp_page_buffer, %object
3700736170 .size g_flash_tmp_page_buffer, 4
3700836171 g_flash_tmp_page_buffer:
....@@ -37029,13 +36192,13 @@
3702936192 .size flash_read_retry, 4
3703036193 flash_read_retry:
3703136194 .space 4
37032
- .type g_flash_page_buffer, %object
37033
- .size g_flash_page_buffer, 4
37034
-g_flash_page_buffer:
37035
- .space 4
3703636195 .type g_flash_spare_buffer, %object
3703736196 .size g_flash_spare_buffer, 4
3703836197 g_flash_spare_buffer:
36198
+ .space 4
36199
+ .type g_flash_page_buffer, %object
36200
+ .size g_flash_page_buffer, 4
36201
+g_flash_page_buffer:
3703936202 .space 4
3704036203 .type write_commit_head, %object
3704136204 .size write_commit_head, 1
....@@ -37050,11 +36213,12 @@
3705036213 .size g_flash_multi_page_read_en, 1
3705136214 g_flash_multi_page_read_en:
3705236215 .space 1
37053
- .space 31
36216
+ .space 3
3705436217 .type ftl_info_spare, %object
37055
- .size ftl_info_spare, 256
36218
+ .size ftl_info_spare, 4
3705636219 ftl_info_spare:
37057
- .space 256
36220
+ .space 4
36221
+ .space 16
3705836222 .type g_ftl_info_blk, %object
3705936223 .size g_ftl_info_blk, 4
3706036224 g_ftl_info_blk:
....@@ -37080,11 +36244,10 @@
3708036244 .size ftl_ext_info_data_buffer, 4
3708136245 ftl_ext_info_data_buffer:
3708236246 .space 4
37083
- .space 48
3708436247 .type ftl_tmp_spare, %object
37085
- .size ftl_tmp_spare, 256
36248
+ .size ftl_tmp_spare, 4
3708636249 ftl_tmp_spare:
37087
- .space 256
36250
+ .space 4
3708836251 .type pm_gc_enable, %object
3708936252 .size pm_gc_enable, 4
3709036253 pm_gc_enable:
....@@ -37182,9 +36345,17 @@
3718236345 .size idb_last_lba, 4
3718336346 idb_last_lba:
3718436347 .space 4
37185
- .type gpDrmKeyInfo, %object
37186
- .size gpDrmKeyInfo, 4
37187
-gpDrmKeyInfo:
36348
+ .type g_idb_buffer, %object
36349
+ .size g_idb_buffer, 4
36350
+g_idb_buffer:
36351
+ .space 4
36352
+ .type g_vendor, %object
36353
+ .size g_vendor, 4
36354
+g_vendor:
36355
+ .space 4
36356
+ .type SecureBootUnlockTryCount, %object
36357
+ .size SecureBootUnlockTryCount, 4
36358
+SecureBootUnlockTryCount:
3718836359 .space 4
3718936360 .type SecureBootCheckOK, %object
3719036361 .size SecureBootCheckOK, 4
....@@ -37194,33 +36365,25 @@
3719436365 .size SecureBootEn, 4
3719536366 SecureBootEn:
3719636367 .space 4
37197
- .type gpBootConfig, %object
37198
- .size gpBootConfig, 4
37199
-gpBootConfig:
37200
- .space 4
37201
- .type gSnSectorData, %object
37202
- .size gSnSectorData, 512
37203
-gSnSectorData:
37204
- .space 512
37205
- .type SecureBootUnlockTryCount, %object
37206
- .size SecureBootUnlockTryCount, 4
37207
-SecureBootUnlockTryCount:
36368
+ .type gpVendor1Info, %object
36369
+ .size gpVendor1Info, 4
36370
+gpVendor1Info:
3720836371 .space 4
3720936372 .type gpVendor0Info, %object
3721036373 .size gpVendor0Info, 4
3721136374 gpVendor0Info:
3721236375 .space 4
37213
- .type gpVendor1Info, %object
37214
- .size gpVendor1Info, 4
37215
-gpVendor1Info:
36376
+ .type gSnSectorData, %object
36377
+ .size gSnSectorData, 512
36378
+gSnSectorData:
36379
+ .space 512
36380
+ .type gpDrmKeyInfo, %object
36381
+ .size gpDrmKeyInfo, 4
36382
+gpDrmKeyInfo:
3721636383 .space 4
37217
- .type g_idb_buffer, %object
37218
- .size g_idb_buffer, 4
37219
-g_idb_buffer:
37220
- .space 4
37221
- .type g_vendor, %object
37222
- .size g_vendor, 4
37223
-g_vendor:
36384
+ .type gpBootConfig, %object
36385
+ .size gpBootConfig, 4
36386
+gpBootConfig:
3722436387 .space 4
3722536388 .type ftl_low_format_cur_blk, %object
3722636389 .size ftl_low_format_cur_blk, 2
....@@ -37235,7 +36398,6 @@
3723536398 .size _c_ftl_nand_blks_per_die, 2
3723636399 _c_ftl_nand_blks_per_die:
3723736400 .space 2
37238
- .space 2
3723936401 .type nandc_ecc_sts, %object
3724036402 .size nandc_ecc_sts, 16
3724136403 nandc_ecc_sts:
....@@ -37244,3 +36406,689 @@
3724436406 .size g_slc_mode_enable, 1
3724536407 g_slc_mode_enable:
3724636408 .space 1
36409
+ .section .rodata.str1.1,"aMS",%progbits,1
36410
+.LC0:
36411
+ .ascii "\012!!!!! error @ func:%s - line:%d\012\000"
36412
+.LC1:
36413
+ .ascii "FTL version: 6.0.24 20210716\000"
36414
+.LC2:
36415
+ .ascii "%s\012\000"
36416
+.LC3:
36417
+ .ascii "zftl_debug:0x%x\012\000"
36418
+.LC4:
36419
+ .ascii "...%s enter...\012\000"
36420
+.LC5:
36421
+ .ascii "No.0 FLASH ID: %x %x %x %x %x %x\012\000"
36422
+.LC6:
36423
+ .ascii "DiePerChip: %x\012\000"
36424
+.LC7:
36425
+ .ascii "SectPerPage: %x\012\000"
36426
+.LC8:
36427
+ .ascii "PagePerBlk: %x\012\000"
36428
+.LC9:
36429
+ .ascii "Cell: %x\012\000"
36430
+.LC10:
36431
+ .ascii "PlanePerDie: %x\012\000"
36432
+.LC11:
36433
+ .ascii "BlkPerPlane: %x\012\000"
36434
+.LC12:
36435
+ .ascii "die gap: %x\012\000"
36436
+.LC13:
36437
+ .ascii "lsbMode: %x\012\000"
36438
+.LC14:
36439
+ .ascii "ReadRetryMode: %x\012\000"
36440
+.LC15:
36441
+ .ascii "ecc: %x\012\000"
36442
+.LC16:
36443
+ .ascii "idb ecc: %x\012\000"
36444
+.LC17:
36445
+ .ascii "OptMode: %x\012\000"
36446
+.LC18:
36447
+ .ascii "g_nand_max_die: %x\012\000"
36448
+.LC19:
36449
+ .ascii "Cache read enable: %x\012\000"
36450
+.LC20:
36451
+ .ascii "Cache random read enable: %x\012\000"
36452
+.LC21:
36453
+ .ascii "Cache prog enable: %x\012\000"
36454
+.LC22:
36455
+ .ascii "multi read enable: %x\012\000"
36456
+.LC23:
36457
+ .ascii "multi prog enable: %x\012\000"
36458
+.LC24:
36459
+ .ascii "interleave enable: %x\012\000"
36460
+.LC25:
36461
+ .ascii "read retry enable: %x\012\000"
36462
+.LC26:
36463
+ .ascii "randomizer enable: %x\012\000"
36464
+.LC27:
36465
+ .ascii "SDR enable: %x\012\000"
36466
+.LC28:
36467
+ .ascii "ONFI enable: %x\012\000"
36468
+.LC29:
36469
+ .ascii "TOGGLE enable: %x\012\000"
36470
+.LC30:
36471
+ .ascii "g_flash_slc_mode: %x %x\012\000"
36472
+.LC31:
36473
+ .ascii "MultiPlaneProgCmd: %x %x\012\000"
36474
+.LC32:
36475
+ .ascii "MultiPlaneReadCmd: %x %x\012\000"
36476
+.LC33:
36477
+ .ascii "g_flash_toggle_mode_en: %x\012\000"
36478
+.LC34:
36479
+ .ascii "nand sdr mode %x\012\000"
36480
+.LC35:
36481
+ .ascii "nand ddr mode %x\012\000"
36482
+.LC36:
36483
+ .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000"
36484
+.LC37:
36485
+ .ascii "otp:%x %x %x %x\012\000"
36486
+.LC38:
36487
+ .ascii "bad block test:%x %x\012\000"
36488
+.LC39:
36489
+ .ascii "flash_erase_duplane_block %x %x %x\012\000"
36490
+.LC40:
36491
+ .ascii "flash_erase_duplane_block pageadd = %x status = %x\012"
36492
+ .ascii "\000"
36493
+.LC41:
36494
+ .ascii "flash_erase_block %x %x %x\012\000"
36495
+.LC42:
36496
+ .ascii "flash_erase_block %d block = %x status = %x\012\000"
36497
+.LC43:
36498
+ .ascii "erase done: %x\012\000"
36499
+.LC44:
36500
+ .ascii "sblk_queue_head = %d\012\000"
36501
+.LC45:
36502
+ .ascii "sblk_read_completed_queue_head = %d\012\000"
36503
+.LC46:
36504
+ .ascii "sblk_gc_write_completed_queue_head = %d\012\000"
36505
+.LC47:
36506
+ .ascii "sblk_write_completed_queue_head = %d\012\000"
36507
+.LC48:
36508
+ .ascii "p_free_buf_head = %d\012\000"
36509
+.LC49:
36510
+ .ascii "free_buf_count = %d\012\000"
36511
+.LC50:
36512
+ .ascii "buf = %d, next=%d, flag=%d gc_write_flag=%d, lun_st"
36513
+ .ascii "ate=%d, op_status = %d lpa=%x, ppa=%x\012\000"
36514
+.LC51:
36515
+ .ascii "flash_mask_bad_block %d %d\012\000"
36516
+.LC52:
36517
+ .ascii "zftl_debug\000"
36518
+.LC53:
36519
+ .ascii "FLASH ID: %x %x %x %x %x %x\012\000"
36520
+.LC54:
36521
+ .ascii "density: %d MB\012\000"
36522
+.LC55:
36523
+ .ascii "device density: %d MB\012\000"
36524
+.LC56:
36525
+ .ascii "FTL INFO:\012\000"
36526
+.LC57:
36527
+ .ascii "max_lpn = 0x%x\012\000"
36528
+.LC58:
36529
+ .ascii "density = 0x%x\012\000"
36530
+.LC59:
36531
+ .ascii "slc vpn = 0x%x\012\000"
36532
+.LC60:
36533
+ .ascii "xlc vpn = 0x%x\012\000"
36534
+.LC61:
36535
+ .ascii "free slc blk = 0x%x\012\000"
36536
+.LC62:
36537
+ .ascii "free xlc blk = 0x%x\012\000"
36538
+.LC63:
36539
+ .ascii "free mix blk = 0x%x\012\000"
36540
+.LC64:
36541
+ .ascii "slc data blk = 0x%x\012\000"
36542
+.LC65:
36543
+ .ascii "slc cache blk = 0x%x\012\000"
36544
+.LC66:
36545
+ .ascii "xlc data blk = 0x%x\012\000"
36546
+.LC67:
36547
+ .ascii "free buf = %d, %d, %d\012\000"
36548
+.LC68:
36549
+ .ascii "bad blk = %d %d\012\000"
36550
+.LC69:
36551
+ .ascii "TBW = %d MB\012\000"
36552
+.LC70:
36553
+ .ascii "TBR = %d MB\012\000"
36554
+.LC71:
36555
+ .ascii "POC = %d\012\000"
36556
+.LC72:
36557
+ .ascii "PLC = %d\012\000"
36558
+.LC73:
36559
+ .ascii "sys run time = %d S\012\000"
36560
+.LC74:
36561
+ .ascii "slc mode = %x %x %x\012\000"
36562
+.LC75:
36563
+ .ascii "prog err = %d\012\000"
36564
+.LC76:
36565
+ .ascii "read err = %d\012\000"
36566
+.LC77:
36567
+ .ascii "GC XLC page = %d\012\000"
36568
+.LC78:
36569
+ .ascii "GC SLC page = %d\012\000"
36570
+.LC79:
36571
+ .ascii "discard page = 0x%x\012\000"
36572
+.LC80:
36573
+ .ascii "version = %d\012\000"
36574
+.LC81:
36575
+ .ascii "acblk = 0x%x %d %d\012\000"
36576
+.LC82:
36577
+ .ascii "tmblk = 0x%x %d %d\012\000"
36578
+.LC83:
36579
+ .ascii "gcblk = 0x%x %d %d\012\000"
36580
+.LC84:
36581
+ .ascii "slc ec = %d, %d, %d, %d, %d\012\000"
36582
+.LC85:
36583
+ .ascii "xlc ec = %d, %d, %d, %d, %d\012\000"
36584
+.LC86:
36585
+ .ascii "gc free blk th = %d\012\000"
36586
+.LC87:
36587
+ .ascii "gc vpn th = %d %d %d %d %d\012\000"
36588
+.LC88:
36589
+ .ascii "swl blk = %x %x %x %x\012\000"
36590
+.LC89:
36591
+ .ascii "rf info = %x %x %x %x %x\012\000"
36592
+.LC90:
36593
+ .ascii "gc_add_sblk = %d, %d, %d, %d, %d, %d, %d\012\000"
36594
+.LC91:
36595
+ .ascii "gc_add_sblk = %d, %d, %d\012\000"
36596
+.LC92:
36597
+ .ascii "gc_add_sblk = %d, %d, %d,last update:%d, %d\012\000"
36598
+.LC93:
36599
+ .ascii "gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
36600
+.LC94:
36601
+ .ascii "gc_mark_bad_ppa %d %x %x\012\000"
36602
+.LC95:
36603
+ .ascii "status: %x, ppa: %x\012\000"
36604
+.LC96:
36605
+ .ascii "%d gc_free_temp_buf buf id= %x\012\000"
36606
+.LC97:
36607
+ .ascii "gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\012"
36608
+ .ascii "\000"
36609
+.LC98:
36610
+ .ascii "zftl_get_gc_node cache = %x index = %d vpn = %x\012"
36611
+ .ascii "\000"
36612
+.LC99:
36613
+ .ascii "gc_search_src_blk mode = %x, src mode = %x, count= "
36614
+ .ascii "%d %d\012\000"
36615
+.LC100:
36616
+ .ascii "swl_tlc_free_mini_ec_blk alloc sblk %x\012\000"
36617
+.LC101:
36618
+ .ascii "zftl_get_free_sblk %x %d, %p %d %d\012\000"
36619
+.LC102:
36620
+ .ascii "zftl_gc_get_free_sblk %x %x %x, %d %d %d\012\000"
36621
+.LC103:
36622
+ .ascii "swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
36623
+.LC104:
36624
+ .ascii "list count:%p %d\012\000"
36625
+.LC105:
36626
+ .ascii "%d: node:%x %x %x %x, %d %d %d %d %d\012\000"
36627
+.LC106:
36628
+ .ascii "ftl_vpn_decrement %x = %d, %d\012\000"
36629
+.LC107:
36630
+ .ascii "mask bad block:cs %x %x block: %x %x\012\000"
36631
+.LC108:
36632
+ .ascii "gc_free_bad_sblk 0x%x\012\000"
36633
+.LC109:
36634
+ .ascii "swl_slc_free_mini_ec_blk sblk %x\012\000"
36635
+.LC110:
36636
+ .ascii "gc_free_src_blk = %x, vpn = %d\012\000"
36637
+.LC111:
36638
+ .ascii "gc_free_src_blk %x, %d\012\000"
36639
+.LC112:
36640
+ .ascii "bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk"
36641
+ .ascii ":s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\012\000"
36642
+.LC113:
36643
+ .ascii "totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
36644
+.LC114:
36645
+ .ascii "gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
36646
+.LC115:
36647
+ .ascii "slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
36648
+.LC116:
36649
+ .ascii "gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:"
36650
+ .ascii "%d free_th: %d\012\000"
36651
+.LC117:
36652
+ .ascii "swl : %x %x %x %x %x %x\012\000"
36653
+.LC118:
36654
+ .ascii "ftl prog error =%x, lpa = %x, ppa= %x\012\000"
36655
+.LC119:
36656
+ .ascii "ftl re prog: lpa = %x, ppa= %x\012\000"
36657
+.LC120:
36658
+ .ascii "dump_sblk_queue: %d\012\000"
36659
+.LC121:
36660
+ .ascii "buf id= %d state = %d ppa = %x\012\000"
36661
+.LC122:
36662
+ .ascii "%s %d %d\012\000"
36663
+.LC123:
36664
+ .ascii "gc_static_wearleveling: min blk: %x,sec=%d,xec = %d"
36665
+ .ascii " ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
36666
+.LC124:
36667
+ .ascii "gc_static_wearleveling: min slc blk: %x,sec=%d,xec "
36668
+ .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
36669
+.LC125:
36670
+ .ascii "gc_static_wearleveling: min tlc blk: %x,sec=%d,xec "
36671
+ .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
36672
+.LC126:
36673
+ .ascii "gc_static_wearleveling: max slc blk: %x,sec=%d,xec "
36674
+ .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
36675
+.LC127:
36676
+ .ascii "gc_static_wearleveling: max xlc blk: %x,sec=%d,xec "
36677
+ .ascii "= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
36678
+.LC128:
36679
+ .ascii "gc_static_wearleveling: slc blk: %x, tlc blk: %d av"
36680
+ .ascii "g slc ec: %d, avg tlc ec: %d \012\000"
36681
+.LC129:
36682
+ .ascii "gc_static_wearleveling: min slc ec: %x, min tlc ec:"
36683
+ .ascii " %d max slc ec: %d, max tlc ec: %d; %d %d\012\000"
36684
+.LC130:
36685
+ .ascii "swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
36686
+.LC131:
36687
+ .ascii "swl add slc gc = %x, %d, %d, %d, %d, %d\012\000"
36688
+.LC132:
36689
+ .ascii "free blk vpn error: %x %x\012\000"
36690
+.LC133:
36691
+ .ascii "GC PM block %x %x %x %d\012\000"
36692
+.LC134:
36693
+ .ascii "ftl_free_no_use_map_blk %x %x %x %d\012\000"
36694
+.LC135:
36695
+ .ascii "...%d @ %s\012\000"
36696
+.LC136:
36697
+ .ascii "...%s enter... %p\012\000"
36698
+.LC137:
36699
+ .ascii "0:%x %x %x %x %x\012\000"
36700
+.LC138:
36701
+ .ascii "g_nandc_ver...%d\012\000"
36702
+.LC139:
36703
+ .ascii "rk_ftl_de_init %x\012\000"
36704
+.LC140:
36705
+ .ascii "\0013\000"
36706
+.LC141:
36707
+ .ascii "otp error! %d\000"
36708
+.LC142:
36709
+ .ascii "rr\000"
36710
+.LC143:
36711
+ .ascii "flash_abort_clear = %d\012\000"
36712
+.LC144:
36713
+ .ascii "%d mtrans_cnt = %d page_num = %d\012\000"
36714
+.LC145:
36715
+ .ascii "%d flReg.d32=%x %x\012\000"
36716
+.LC146:
36717
+ .ascii "nandc:\000"
36718
+.LC147:
36719
+ .ascii "nandc_xfer_done read error %x\012\000"
36720
+.LC148:
36721
+ .ascii "dqs data abort %x\012\000"
36722
+.LC149:
36723
+ .ascii "dqs data timeout %x\012\000"
36724
+.LC150:
36725
+ .ascii "xfer error %x\012\000"
36726
+.LC151:
36727
+ .ascii "MT %d row=%x,last status %d,status = %d\012\000"
36728
+.LC152:
36729
+ .ascii "MT RR %d row=%x,count %d,status=%d\012\000"
36730
+.LC153:
36731
+ .ascii "toshiba SRR %d row=%x, status=%d\012\000"
36732
+.LC154:
36733
+ .ascii "toshiba TRR %d row=%x, status=%d\012\000"
36734
+.LC155:
36735
+ .ascii "toshiba RR %d row=%x,count %d,status=%d\012\000"
36736
+.LC156:
36737
+ .ascii "YMTC RR %d row=%x,count %d,status=%d\012\000"
36738
+.LC157:
36739
+ .ascii "samsung SRR %d row=%x, status=%d\012\000"
36740
+.LC158:
36741
+ .ascii "samsung TRR %d row=%x, status=%d\012\000"
36742
+.LC159:
36743
+ .ascii "samsung RR %d row=%x,count %d,status=%d\012\000"
36744
+.LC160:
36745
+ .ascii "hynix RR %d row=%x, count %d, status=%d\012\000"
36746
+.LC161:
36747
+ .ascii "%d flash_ddr_tuning_read %x ecc=%d\012\000"
36748
+.LC162:
36749
+ .ascii "sync para %d\012\000"
36750
+.LC163:
36751
+ .ascii "DDR mode Read error %x %x\012\000"
36752
+.LC164:
36753
+ .ascii "SDR mode Read %x %x ecc:%x\012\000"
36754
+.LC165:
36755
+ .ascii "flash_read_page_en %x %x %x %x\012\000"
36756
+.LC166:
36757
+ .ascii "flash_read_page_en %x %x error_ecc %d %d\012\000"
36758
+.LC167:
36759
+ .ascii "flash_get_last_written_page: %x %x %x\012\000"
36760
+.LC168:
36761
+ .ascii "flash_prog_page page_addr = %x status = %x\012\000"
36762
+.LC169:
36763
+ .ascii "flash_prog_page %x %x %x\012\000"
36764
+.LC170:
36765
+ .ascii "ymtc_flash_tlc_page_prog page_addr = %x status = %x"
36766
+ .ascii "\012\000"
36767
+.LC171:
36768
+ .ascii "sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012"
36769
+ .ascii "\000"
36770
+.LC172:
36771
+ .ascii "flash_complete_page_read %x %x error_ecc %d %d\012\000"
36772
+.LC173:
36773
+ .ascii "read: %x %x %x %x\012\000"
36774
+.LC174:
36775
+ .ascii "0set buf %d,status = %x, ppa = %x lun state = %d\012"
36776
+ .ascii "\000"
36777
+.LC175:
36778
+ .ascii "prog end %x %x error_ecc %d %d\012\000"
36779
+.LC176:
36780
+ .ascii "1set buf %d,status = %x, ppa = %x lun state = %d\012"
36781
+ .ascii "\000"
36782
+.LC177:
36783
+ .ascii "dp prog end %x %x error_ecc %d %d\012\000"
36784
+.LC178:
36785
+ .ascii "sblk_prog_page ppa = %x, count = %d\012\000"
36786
+.LC179:
36787
+ .ascii "err: ppa = %x, status = %x, %x %x spare: %x %x %x %"
36788
+ .ascii "x\012\000"
36789
+.LC180:
36790
+ .ascii "flash_prog_page_en:%x %x %x\012\000"
36791
+.LC181:
36792
+ .ascii "w d:\000"
36793
+.LC182:
36794
+ .ascii "w s:\000"
36795
+.LC183:
36796
+ .ascii "spare\000"
36797
+.LC184:
36798
+ .ascii "data\000"
36799
+.LC185:
36800
+ .ascii "write error: %x\012\000"
36801
+.LC186:
36802
+ .ascii "g_ftl_info_blk blk = %x, page = %x version = %d\012"
36803
+ .ascii "\000"
36804
+.LC187:
36805
+ .ascii "%d %x @%d %x\012\000"
36806
+.LC188:
36807
+ .ascii "ftl_info_blk_init %d %d %x\012\000"
36808
+.LC189:
36809
+ .ascii "ftl info hash %x error\012\000"
36810
+.LC190:
36811
+ .ascii "ink flag: %x\012\000"
36812
+.LC191:
36813
+ .ascii "%s %d %d %x %x\012\000"
36814
+.LC192:
36815
+ .ascii "ext info hash %x error\012\000"
36816
+.LC193:
36817
+ .ascii "%s %x %x %x\012\000"
36818
+.LC194:
36819
+ .ascii "ftl_sblk_dump_write = %x %d %d %d %d\012\000"
36820
+.LC195:
36821
+ .ascii "blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
36822
+ .ascii " %x %x, spare: %x %x %x %x\012\000"
36823
+.LC196:
36824
+ .ascii "ftl_sblk_dump_write2 = %x %d %d %d\012\000"
36825
+.LC197:
36826
+ .ascii "ftl_sblk_dump_write = %x %x\012\000"
36827
+.LC198:
36828
+ .ascii "ftl_sblk_dump_write done = %x\012\000"
36829
+.LC199:
36830
+ .ascii "%x: ink_scaned_blk_num %x\012\000"
36831
+.LC200:
36832
+ .ascii "ftl_ink_check_sblk = %x %d %d\012\000"
36833
+.LC201:
36834
+ .ascii "ftl_ink_check_sblk = %x %d %d end\012\000"
36835
+.LC202:
36836
+ .ascii "alloc sblk %x %d\012\000"
36837
+.LC203:
36838
+ .ascii "blk %x is bad block\012\000"
36839
+.LC204:
36840
+ .ascii "pm_alloc_new_blk: %x %x %x %x\012\000"
36841
+.LC205:
36842
+ .ascii "pm_write_page write error: %x\012\000"
36843
+.LC206:
36844
+ .ascii "finfo:\000"
36845
+.LC207:
36846
+ .ascii "flash_info_flush id = %x, page = %x\012\000"
36847
+.LC208:
36848
+ .ascii "sys_info_flush error:%x\012\000"
36849
+.LC209:
36850
+ .ascii "...%d @ %s %d %p\012\000"
36851
+.LC210:
36852
+ .ascii "no sys info %x\012\000"
36853
+.LC211:
36854
+ .ascii "l2p:\000"
36855
+.LC212:
36856
+ .ascii "saved_active_page = %x\012\000"
36857
+.LC213:
36858
+ .ascii "saved_active_plane = %x\012\000"
36859
+.LC214:
36860
+ .ascii "sblk = %x\012\000"
36861
+.LC215:
36862
+ .ascii "phy_blk = %x %x\012\000"
36863
+.LC216:
36864
+ .ascii "num_planes = %x\012\000"
36865
+.LC217:
36866
+ .ascii "recovery blk=%x, page=%x, ppa = %x, status = %x, ha"
36867
+ .ascii "sh:%x\012\000"
36868
+.LC218:
36869
+ .ascii "data:\000"
36870
+.LC219:
36871
+ .ascii "sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
36872
+.LC220:
36873
+ .ascii "dump_write_lpa = %x %x %x %x\012\000"
36874
+.LC221:
36875
+ .ascii "dump write new ppa = %x, last ppa = %x lpa = %x\012"
36876
+ .ascii "\000"
36877
+.LC222:
36878
+ .ascii "dump write = %x %x %x\012\000"
36879
+.LC223:
36880
+ .ascii "dump write hash update = %x %x %x\012\000"
36881
+.LC224:
36882
+ .ascii "free_buf_count: %d\012\000"
36883
+.LC225:
36884
+ .ascii "g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
36885
+.LC226:
36886
+ .ascii "ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
36887
+.LC227:
36888
+ .ascii "ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
36889
+ .ascii "_index:0x%x\012\000"
36890
+.LC228:
36891
+ .ascii "tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
36892
+ .ascii "e_index:0x%x\012\000"
36893
+.LC229:
36894
+ .ascii "gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
36895
+ .ascii "_index:0x%x\012\000"
36896
+.LC230:
36897
+ .ascii "lpa:\000"
36898
+.LC231:
36899
+ .ascii "vpn:\000"
36900
+.LC232:
36901
+ .ascii "sblk:\000"
36902
+.LC233:
36903
+ .ascii "lpa_hash:\000"
36904
+.LC234:
36905
+ .ascii "lpa_hash_index:\000"
36906
+.LC235:
36907
+ .ascii "%s w error lpn = %x, max ppa = %d\012\000"
36908
+.LC236:
36909
+ .ascii "region_id = %d, pm_max_region = %d\012\000"
36910
+.LC237:
36911
+ .ascii "load_l2p_region no ppa = %x , %x, all setting 0xff."
36912
+ .ascii "...\012\000"
36913
+.LC238:
36914
+ .ascii "load_l2p_region = %x,%x,%x, %x\012\000"
36915
+.LC239:
36916
+ .ascii "pm_ppa:\000"
36917
+.LC240:
36918
+ .ascii "spare:\000"
36919
+.LC241:
36920
+ .ascii "pm_init posr %x %x %x\012\000"
36921
+.LC242:
36922
+ .ascii "pm_init recovery %x %x %x\012\000"
36923
+.LC243:
36924
+ .ascii "pm_init hash %x error\012\000"
36925
+.LC244:
36926
+ .ascii "pm_log2phys lpn = %d, max lpn = %d\012\000"
36927
+.LC245:
36928
+ .ascii "ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
36929
+ .ascii "%x %x %x\012\000"
36930
+.LC246:
36931
+ .ascii "ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
36932
+ .ascii "\000"
36933
+.LC247:
36934
+ .ascii "gc_recovery: %x vpn = %x\012\000"
36935
+.LC248:
36936
+ .ascii "gc_update_l2p_map_new sblk %x\012\000"
36937
+.LC249:
36938
+ .ascii "gc_update_l2p_map_new: %x %x %x\012\000"
36939
+.LC250:
36940
+ .ascii "lpa: %x %x %x\012\000"
36941
+.LC251:
36942
+ .ascii "gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
36943
+ .ascii "\000"
36944
+.LC252:
36945
+ .ascii "gc_scan_src_blk = %x, vpn = %d\012\000"
36946
+.LC253:
36947
+ .ascii "js hash error:%x %x %x\012\000"
36948
+.LC254:
36949
+ .ascii "gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
36950
+.LC255:
36951
+ .ascii "gc_block_vpn_scan = %x, s vpn0 = %d, c vpn1 = %d f:"
36952
+ .ascii "%d\012\000"
36953
+.LC256:
36954
+ .ascii "ftl_sblk_dump = %x %d %d %d %d\012\000"
36955
+.LC257:
36956
+ .ascii "ftl_sblk_dump = %x %x %x %x\012\000"
36957
+.LC258:
36958
+ .ascii "page_addr = %x, lpa=%x vpn = %d\012\000"
36959
+.LC259:
36960
+ .ascii "index= %x, lpa=%x\012\000"
36961
+.LC260:
36962
+ .ascii "block = %x, vpn=%x check vpn = %x\012\000"
36963
+.LC261:
36964
+ .ascii "ftl_read %x %x %x\012\000"
36965
+.LC262:
36966
+ .ascii "ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
36967
+.LC263:
36968
+ .ascii "id=%d, status = %x, lpa = %x, ppa = %x spare = %x %"
36969
+ .ascii "x %x %x\012\000"
36970
+.LC264:
36971
+ .ascii "zftl debug cmd: %s\012\000"
36972
+.LC265:
36973
+ .ascii "cmd:\000"
36974
+.LC266:
36975
+ .ascii "dumpl2p\000"
36976
+.LC267:
36977
+ .ascii "pm l2p:\000"
36978
+.LC268:
36979
+ .ascii "pm blk:\000"
36980
+.LC269:
36981
+ .ascii "dumppm:\000"
36982
+.LC270:
36983
+ .ascii "p_cmd: %s\012\000"
36984
+.LC271:
36985
+ .ascii "pm ram = %x, %x\012\000"
36986
+.LC272:
36987
+ .ascii "ram:\000"
36988
+.LC273:
36989
+ .ascii "pm:\000"
36990
+.LC274:
36991
+ .ascii "dumpsys\000"
36992
+.LC275:
36993
+ .ascii "dumplist:\000"
36994
+.LC276:
36995
+ .ascii "vpncheck\000"
36996
+.LC277:
36997
+ .ascii "dumpppa:\000"
36998
+.LC278:
36999
+ .ascii "dumpblk:\000"
37000
+.LC279:
37001
+ .ascii "setzdebug:\000"
37002
+.LC280:
37003
+ .ascii "lpa2ppa:\000"
37004
+.LC281:
37005
+ .ascii "lpa: %x--> ppa: %x\012\000"
37006
+.LC282:
37007
+ .ascii "help:\012\000"
37008
+.LC283:
37009
+ .ascii "1. echo dumpl2p > /proc/zftl_debug\012\000"
37010
+.LC284:
37011
+ .ascii "2. echo dumppm:x > /proc/zftl_debug\012\000"
37012
+.LC285:
37013
+ .ascii "3. echo dumpsys > /proc/zftl_debug\012\000"
37014
+.LC286:
37015
+ .ascii "4. echo dumpppa:x > /proc/zftl_debug\012\000"
37016
+.LC287:
37017
+ .ascii "5. echo vpncheck > /proc/zftl_debug\012\000"
37018
+.LC288:
37019
+ .ascii "6. echo setzdebug:x > /proc/zftl_debug\012\000"
37020
+.LC289:
37021
+ .ascii "7. echo dumplist:x > /proc/zftl_debug\012\000"
37022
+.LC290:
37023
+ .ascii "8. echo lpa2ppa:x> /proc/zftl_debug\012\000"
37024
+.LC291:
37025
+ .ascii "ftl_update_l2p_map: %x %x %x\012\000"
37026
+.LC292:
37027
+ .ascii "ftl_update_l2p_map\000"
37028
+.LC293:
37029
+ .ascii "lpa_tbl:\000"
37030
+.LC294:
37031
+ .ascii "sblk %x vpn: %d %d\012\000"
37032
+.LC295:
37033
+ .ascii "error gc_add_sblk: %x\012\000"
37034
+.LC296:
37035
+ .ascii "%d read error: ppa:%x, lpa:%x, status:%x\012\000"
37036
+.LC297:
37037
+ .ascii "gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
37038
+.LC298:
37039
+ .ascii "gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
37040
+ .ascii "page_index= %d\012\000"
37041
+.LC299:
37042
+ .ascii "gc %d: %d %d %d %d %d %d %d\012\000"
37043
+.LC300:
37044
+ .ascii "GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
37045
+ .ascii "\000"
37046
+.LC301:
37047
+ .ascii "gc free %x, %d\012\000"
37048
+.LC302:
37049
+ .ascii "_c_user_data_density := %d\012\000"
37050
+.LC303:
37051
+ .ascii "_c_totle_phy_density := %d\012\000"
37052
+.LC304:
37053
+ .ascii "_c_totle_log_page := %d\012\000"
37054
+.LC305:
37055
+ .ascii "_c_totle_data_density := %d\012\000"
37056
+.LC306:
37057
+ .ascii "_c_ftl_pm_page_num := %d\012\000"
37058
+.LC307:
37059
+ .ascii "_c_ftl_byte_pre_page := %d\012\000"
37060
+.LC308:
37061
+ .ascii "_c_max_pm_sblk := %d\012\000"
37062
+.LC309:
37063
+ .ascii "_min_slc_super_block := %d\012\000"
37064
+.LC310:
37065
+ .ascii "_max_xlc_super_block := %d\012\000"
37066
+.LC311:
37067
+ .ascii "gp_ftl_ext_info %p %p %p\012\000"
37068
+.LC312:
37069
+ .ascii "flash info size: %d %d %d\012\000"
37070
+.LC313:
37071
+ .ascii "ftl_init %x\012\000"
37072
+.LC314:
37073
+ .ascii "ftlwrite %x %x %x %x\012\000"
37074
+.LC315:
37075
+ .ascii "ftl_discard:(%x, %x, %x, %x)\012\000"
37076
+.LC316:
37077
+ .ascii "id_block_prog_msb_ff_data slc page = %d pageadd=%x "
37078
+ .ascii "%x\012\000"
37079
+.LC317:
37080
+ .ascii "write_idblock fix data %x %x\012\000"
37081
+.LC318:
37082
+ .ascii "idblk:\000"
37083
+.LC319:
37084
+ .ascii "write_idblock totle_sec %x %x\012\000"
37085
+.LC320:
37086
+ .ascii "prog page: %x %x %x, %p %x %x %x\012\000"
37087
+.LC321:
37088
+ .ascii "read page: %x %x %x %x\012\000"
37089
+.LC322:
37090
+ .ascii "wl_lba %p %x %x %x\012\000"
37091
+.LC323:
37092
+ .ascii "return ret = %lx\012\000"
37093
+.LC324:
37094
+ .ascii "\0013vendor storage %x,%x,%x\012\000"