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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/reset/Kconfig
....@@ -1,3 +1,4 @@
1
+# SPDX-License-Identifier: GPL-2.0-only
12 config ARCH_HAS_RESET_CONTROLLER
23 	bool
34 
....@@ -40,6 +41,23 @@
4041 	help
4142 	  This enables the reset controller driver for Marvell Berlin SoCs.
4243 
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+config RESET_BRCMSTB
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+	tristate "Broadcom STB reset controller"
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+	depends on ARCH_BRCMSTB || COMPILE_TEST
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+	default ARCH_BRCMSTB
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+	help
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+	  This enables the reset controller driver for Broadcom STB SoCs using
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+	  a SUN_TOP_CTRL_SW_INIT style controller.
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+
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+config RESET_BRCMSTB_RESCAL
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+	bool "Broadcom STB RESCAL reset controller"
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+	depends on HAS_IOMEM
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+	depends on ARCH_BRCMSTB || COMPILE_TEST
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+	default ARCH_BRCMSTB
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+	help
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+	  This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
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+	  BCM7216.
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+
4361 config RESET_HSDK
4462 	bool "Synopsys HSDK Reset Driver"
4563 	depends on HAS_IOMEM
....@@ -48,12 +66,23 @@
4866 	  This enables the reset controller driver for HSDK board.
4967 
5068 config RESET_IMX7
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-	bool "i.MX7 Reset Driver" if COMPILE_TEST
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+	tristate "i.MX7/8 Reset Driver"
5270 	depends on HAS_IOMEM
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-	default SOC_IMX7D
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+	depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
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+	default y if SOC_IMX7D
5473 	select MFD_SYSCON
5574 	help
5675 	  This enables the reset controller driver for i.MX7 SoCs.
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+
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+config RESET_INTEL_GW
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+	bool "Intel Reset Controller Driver"
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+	depends on X86 || COMPILE_TEST
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+	depends on OF && HAS_IOMEM
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+	select REGMAP_MMIO
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+	help
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+	  This enables the reset controller driver for Intel Gateway SoCs.
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+	  Say Y to control the reset signals provided by reset controller.
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+	  Otherwise, say N.
5786 
5887 config RESET_LANTIQ
5988 	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
....@@ -68,7 +97,8 @@
6897 	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
6998 
7099 config RESET_MESON
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-	bool "Meson Reset Driver" if COMPILE_TEST
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+	tristate "Meson Reset Driver"
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+	depends on ARCH_MESON || COMPILE_TEST
72102 	default ARCH_MESON
73103 	help
74104 	  This enables the reset driver for Amlogic Meson SoCs.
....@@ -80,6 +110,13 @@
80110 	  This enables the reset driver for Audio Memory Arbiter of
81111 	  Amlogic's A113 based SoCs
82112 
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+config RESET_NPCM
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+	bool "NPCM BMC Reset Driver" if COMPILE_TEST
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+	default ARCH_NPCM
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+	help
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+	  This enables the reset controller driver for Nuvoton NPCM
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+	  BMC SoCs.
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+
83120 config RESET_OXNAS
84121 	bool
85122 
....@@ -90,13 +127,33 @@
90127 	  This enables the reset driver for ImgTec Pistachio SoCs.
91128 
92129 config RESET_QCOM_AOSS
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-	bool "Qcom AOSS Reset Driver"
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+	tristate "Qcom AOSS Reset Driver"
94131 	depends on ARCH_QCOM || COMPILE_TEST
95132 	help
96133 	  This enables the AOSS (always on subsystem) reset driver
97134 	  for Qualcomm SDM845 SoCs. Say Y if you want to control
98135 	  reset signals provided by AOSS for Modem, Venus, ADSP,
99136 	  GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
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+
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+config RESET_QCOM_PDC
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+	tristate "Qualcomm PDC Reset Driver"
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+	depends on ARCH_QCOM || COMPILE_TEST
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+	help
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+	  This enables the PDC (Power Domain Controller) reset driver
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+	  for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
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+	  to control reset signals provided by PDC for Modem, Compute,
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+	  Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
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+
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+config RESET_RASPBERRYPI
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+	tristate "Raspberry Pi 4 Firmware Reset Driver"
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+	depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
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+	default USB_XHCI_PCI
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+	help
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+	  Raspberry Pi 4's co-processor controls some of the board's HW
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+	  initialization process, but it's up to Linux to trigger it when
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+	  relevant. This driver provides a reset controller capable of
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+	  interfacing with RPi4's co-processor and model these firmware
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+	  initialization routines as reset lines.
100157 
101158 config RESET_SCMI
102159 	tristate "Reset driver controlled via ARM SCMI interface"
....@@ -111,7 +168,7 @@
111168 
112169 config RESET_SIMPLE
113170 	bool "Simple Reset Controller Driver" if COMPILE_TEST
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-	default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
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+	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
115172 	help
116173 	  This enables a simple reset controller driver for reset lines that
117174 	  that can be asserted and deasserted by toggling bits in a contiguous,
....@@ -120,6 +177,8 @@
120177 	  Currently this driver supports:
121178 	   - Altera SoCFPGAs
122179 	   - ASPEED BMC SoCs
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+	   - Bitmain BM1880 SoC
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+	   - Realtek SoCs
123182 	   - RCC reset controller in STM32 MCUs
124183 	   - Allwinner SoCs
125184 	   - ZTE's zx2967 family
....@@ -129,6 +188,14 @@
129188 	default MACH_STM32MP157
130189 	help
131190 	  This enables the RCC reset controller driver for STM32 MPUs.
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+
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+config RESET_SOCFPGA
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+	bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
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+	default ARCH_SOCFPGA
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+	select RESET_SIMPLE
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+	help
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+	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
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+	  driver gets initialized early during platform init calls.
132199 
133200 config RESET_SUNXI
134201 	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
....@@ -165,15 +232,15 @@
165232 	  Say Y if you want to control reset signals provided by System Control
166233 	  block, Media I/O block, Peripheral Block.
167234 
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-config RESET_UNIPHIER_USB3
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-	tristate "USB3 reset driver for UniPhier SoCs"
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+config RESET_UNIPHIER_GLUE
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+	tristate "Reset driver in glue layer for UniPhier SoCs"
170237 	depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
171238 	default ARCH_UNIPHIER
172239 	select RESET_SIMPLE
173240 	help
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-	  Support for the USB3 core reset on UniPhier SoCs.
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-	  Say Y if you want to control reset signals provided by
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-	  USB3 glue layer.
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+	  Support for peripheral core reset included in its own glue layer
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+	  on UniPhier SoCs. Say Y if you want to control reset signals
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+	  provided by the glue layer.
177244 
178245 config RESET_ZYNQ
179246 	bool "ZYNQ Reset Driver" if COMPILE_TEST