add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/regulator/stm32-vrefbuf.c
..
..
@@ -1,9 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (C) STMicroelectronics 2017
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  *
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  * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
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- *
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- * License terms:  GNU General Public License (GPL), version 2
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  */
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7
 
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 #include <linux/bitfield.h>
..
..
@@ -15,6 +14,7 @@
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 #include <linux/platform_device.h>
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 #include <linux/regulator/driver.h>
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16
 #include <linux/regulator/of_regulator.h>
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+#include <linux/pm_runtime.h>
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18
 
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 /* STM32 VREFBUF registers */
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 #define STM32_VREFBUF_CSR		0x00
..
..
@@ -25,9 +25,12 @@
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 #define STM32_HIZ			BIT(1)
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 #define STM32_ENVR			BIT(0)
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27
 
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+#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS	10
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+
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 struct stm32_vrefbuf {
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 	void __iomem *base;
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32
 	struct clk *clk;
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+	struct device *dev;
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 };
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35
 
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 static const unsigned int stm32_vrefbuf_voltages[] = {
..
..
@@ -38,9 +41,16 @@
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 static int stm32_vrefbuf_enable(struct regulator_dev *rdev)
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 {
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 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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-	u32 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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+	u32 val;
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 	int ret;
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46
 
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+	ret = pm_runtime_get_sync(priv->dev);
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+	if (ret < 0) {
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+		pm_runtime_put_noidle(priv->dev);
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+		return ret;
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+	}
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+
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+	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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 	val = (val & ~STM32_HIZ) | STM32_ENVR;
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 	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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56
 
..
..
@@ -59,16 +69,30 @@
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 		writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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 	}
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71
 
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+	pm_runtime_mark_last_busy(priv->dev);
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+	pm_runtime_put_autosuspend(priv->dev);
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+
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 	return ret;
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 }
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77
 
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 static int stm32_vrefbuf_disable(struct regulator_dev *rdev)
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 {
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 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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-	u32 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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+	u32 val;
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+	int ret;
69
83
 
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-	val = (val & ~STM32_ENVR) | STM32_HIZ;
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+	ret = pm_runtime_get_sync(priv->dev);
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+	if (ret < 0) {
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+		pm_runtime_put_noidle(priv->dev);
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+		return ret;
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+	}
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+
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+	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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+	val &= ~STM32_ENVR;
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 	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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+
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+	pm_runtime_mark_last_busy(priv->dev);
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+	pm_runtime_put_autosuspend(priv->dev);
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96
 
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 	return 0;
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98
 }
..
..
@@ -76,18 +100,41 @@
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100
 static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev)
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101
 {
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102
 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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+	int ret;
79
104
 
80
-	return readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
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+	ret = pm_runtime_get_sync(priv->dev);
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+	if (ret < 0) {
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+		pm_runtime_put_noidle(priv->dev);
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+		return ret;
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+	}
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+
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+	ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
112
+
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+	pm_runtime_mark_last_busy(priv->dev);
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+	pm_runtime_put_autosuspend(priv->dev);
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+
116
+	return ret;
81
117
 }
82
118
 
83
119
 static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev,
84
120
 					 unsigned sel)
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 {
86
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 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
87
-	u32 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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+	u32 val;
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+	int ret;
88
125
 
126
+	ret = pm_runtime_get_sync(priv->dev);
127
+	if (ret < 0) {
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+		pm_runtime_put_noidle(priv->dev);
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+		return ret;
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+	}
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+
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+	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
89
133
 	val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel);
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134
 	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
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+
136
+	pm_runtime_mark_last_busy(priv->dev);
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+	pm_runtime_put_autosuspend(priv->dev);
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138
 
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 	return 0;
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140
 }
..
..
@@ -95,9 +142,22 @@
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 static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev)
96
143
 {
97
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 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
98
-	u32 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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+	u32 val;
146
+	int ret;
99
147
 
100
-	return FIELD_GET(STM32_VRS, val);
148
+	ret = pm_runtime_get_sync(priv->dev);
149
+	if (ret < 0) {
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+		pm_runtime_put_noidle(priv->dev);
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+		return ret;
152
+	}
153
+
154
+	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
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+	ret = FIELD_GET(STM32_VRS, val);
156
+
157
+	pm_runtime_mark_last_busy(priv->dev);
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+	pm_runtime_put_autosuspend(priv->dev);
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+
160
+	return ret;
101
161
 }
102
162
 
103
163
 static const struct regulator_ops stm32_vrefbuf_volt_ops = {
..
..
@@ -115,13 +175,13 @@
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 	.volt_table = stm32_vrefbuf_voltages,
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176
 	.n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
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 	.ops = &stm32_vrefbuf_volt_ops,
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+	.off_on_delay = 1000,
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179
 	.type = REGULATOR_VOLTAGE,
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180
 	.owner = THIS_MODULE,
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181
 };
121
182
 
122
183
 static int stm32_vrefbuf_probe(struct platform_device *pdev)
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184
 {
124
-	struct resource *res;
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185
 	struct stm32_vrefbuf *priv;
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186
 	struct regulator_config config = { };
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187
 	struct regulator_dev *rdev;
..
..
@@ -130,9 +190,9 @@
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 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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191
 	if (!priv)
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192
 		return -ENOMEM;
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+	priv->dev = &pdev->dev;
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194
 
134
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	priv->base = devm_ioremap_resource(&pdev->dev, res);
195
+	priv->base = devm_platform_ioremap_resource(pdev, 0);
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196
 	if (IS_ERR(priv->base))
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197
 		return PTR_ERR(priv->base);
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198
 
..
..
@@ -140,10 +200,17 @@
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200
 	if (IS_ERR(priv->clk))
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 		return PTR_ERR(priv->clk);
142
202
 
203
+	pm_runtime_get_noresume(&pdev->dev);
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+	pm_runtime_set_active(&pdev->dev);
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+	pm_runtime_set_autosuspend_delay(&pdev->dev,
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+					 STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS);
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+	pm_runtime_use_autosuspend(&pdev->dev);
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+	pm_runtime_enable(&pdev->dev);
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+
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210
 	ret = clk_prepare_enable(priv->clk);
144
211
 	if (ret) {
145
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 		dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
146
-		return ret;
213
+		goto err_pm_stop;
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214
 	}
148
215
 
149
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 	config.dev = &pdev->dev;
..
..
@@ -161,10 +228,17 @@
161
228
 	}
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229
 	platform_set_drvdata(pdev, rdev);
163
230
 
231
+	pm_runtime_mark_last_busy(&pdev->dev);
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+	pm_runtime_put_autosuspend(&pdev->dev);
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+
164
234
 	return 0;
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235
 
166
236
 err_clk_dis:
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 	clk_disable_unprepare(priv->clk);
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+err_pm_stop:
239
+	pm_runtime_disable(&pdev->dev);
240
+	pm_runtime_set_suspended(&pdev->dev);
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+	pm_runtime_put_noidle(&pdev->dev);
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242
 
169
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 	return ret;
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244
 }
..
..
@@ -174,13 +248,43 @@
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 	struct regulator_dev *rdev = platform_get_drvdata(pdev);
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 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
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250
 
251
+	pm_runtime_get_sync(&pdev->dev);
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 	regulator_unregister(rdev);
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 	clk_disable_unprepare(priv->clk);
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+	pm_runtime_disable(&pdev->dev);
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+	pm_runtime_set_suspended(&pdev->dev);
256
+	pm_runtime_put_noidle(&pdev->dev);
179
257
 
180
258
 	return 0;
181
259
 };
182
260
 
183
-static const struct of_device_id stm32_vrefbuf_of_match[] = {
261
+static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev)
262
+{
263
+	struct regulator_dev *rdev = dev_get_drvdata(dev);
264
+	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
265
+
266
+	clk_disable_unprepare(priv->clk);
267
+
268
+	return 0;
269
+}
270
+
271
+static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev)
272
+{
273
+	struct regulator_dev *rdev = dev_get_drvdata(dev);
274
+	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
275
+
276
+	return clk_prepare_enable(priv->clk);
277
+}
278
+
279
+static const struct dev_pm_ops stm32_vrefbuf_pm_ops = {
280
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
281
+				pm_runtime_force_resume)
282
+	SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend,
283
+			   stm32_vrefbuf_runtime_resume,
284
+			   NULL)
285
+};
286
+
287
+static const struct of_device_id __maybe_unused stm32_vrefbuf_of_match[] = {
184
288
 	{ .compatible = "st,stm32-vrefbuf", },
185
289
 	{},
186
290
 };
..
..
@@ -192,6 +296,7 @@
192
296
 	.driver = {
193
297
 		.name  = "stm32-vrefbuf",
194
298
 		.of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
299
+		.pm = &stm32_vrefbuf_pm_ops,
195
300
 	},
196
301
 };
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302
 module_platform_driver(stm32_vrefbuf_driver);