~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,15 +1,7 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (c) 2015, Sony Mobile Communications AB.
3	4	* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
4		- *
5		- * This program is free software; you can redistribute it and/or modify
6		- * it under the terms of the GNU General Public License version 2 and
7		- * only version 2 as published by the Free Software Foundation.
8		- *
9		- * This program is distributed in the hope that it will be useful,
10		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
11		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12		- * GNU General Public License for more details.
13	5	*/
14	6
15	7	#include <linux/module.h>
..	..	@@ -32,6 +24,11 @@
32	24
33	25	int is_enabled;
34	26	int uV;
	27	+ u32 load;
	28	+
	29	+ unsigned int enabled_updated:1;
	30	+ unsigned int uv_updated:1;
	31	+ unsigned int load_updated:1;
35	32	};
36	33
37	34	struct rpm_regulator_req {
..	..	@@ -44,30 +41,59 @@
44	41	#define RPM_KEY_UV 0x00007675 /* "uv" */
45	42	#define RPM_KEY_MA 0x0000616d /* "ma" */
46	43
47		-static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
48		- struct rpm_regulator_req *req,
49		- size_t size)
	44	+static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
50	45	{
51		- return qcom_rpm_smd_write(vreg->rpm,
52		- QCOM_SMD_RPM_ACTIVE_STATE,
53		- vreg->type,
54		- vreg->id,
55		- req, size);
	46	+ struct rpm_regulator_req req[3];
	47	+ int reqlen = 0;
	48	+ int ret;
	49	+
	50	+ if (vreg->enabled_updated) {
	51	+ req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
	52	+ req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
	53	+ req[reqlen].value = cpu_to_le32(vreg->is_enabled);
	54	+ reqlen++;
	55	+ }
	56	+
	57	+ if (vreg->uv_updated && vreg->is_enabled) {
	58	+ req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
	59	+ req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
	60	+ req[reqlen].value = cpu_to_le32(vreg->uV);
	61	+ reqlen++;
	62	+ }
	63	+
	64	+ if (vreg->load_updated && vreg->is_enabled) {
	65	+ req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
	66	+ req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
	67	+ req[reqlen].value = cpu_to_le32(vreg->load / 1000);
	68	+ reqlen++;
	69	+ }
	70	+
	71	+ if (!reqlen)
	72	+ return 0;
	73	+
	74	+ ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
	75	+ vreg->type, vreg->id,
	76	+ req, sizeof(req[0]) * reqlen);
	77	+ if (!ret) {
	78	+ vreg->enabled_updated = 0;
	79	+ vreg->uv_updated = 0;
	80	+ vreg->load_updated = 0;
	81	+ }
	82	+
	83	+ return ret;
56	84	}
57	85
58	86	static int rpm_reg_enable(struct regulator_dev *rdev)
59	87	{
60	88	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
61		- struct rpm_regulator_req req;
62	89	int ret;
63	90
64		- req.key = cpu_to_le32(RPM_KEY_SWEN);
65		- req.nbytes = cpu_to_le32(sizeof(u32));
66		- req.value = cpu_to_le32(1);
	91	+ vreg->is_enabled = 1;
	92	+ vreg->enabled_updated = 1;
67	93
68		- ret = rpm_reg_write_active(vreg, &req, sizeof(req));
69		- if (!ret)
70		- vreg->is_enabled = 1;
	94	+ ret = rpm_reg_write_active(vreg);
	95	+ if (ret)
	96	+ vreg->is_enabled = 0;
71	97
72	98	return ret;
73	99	}
..	..	@@ -82,16 +108,14 @@
82	108	static int rpm_reg_disable(struct regulator_dev *rdev)
83	109	{
84	110	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
85		- struct rpm_regulator_req req;
86	111	int ret;
87	112
88		- req.key = cpu_to_le32(RPM_KEY_SWEN);
89		- req.nbytes = cpu_to_le32(sizeof(u32));
90		- req.value = 0;
	113	+ vreg->is_enabled = 0;
	114	+ vreg->enabled_updated = 1;
91	115
92		- ret = rpm_reg_write_active(vreg, &req, sizeof(req));
93		- if (!ret)
94		- vreg->is_enabled = 0;
	116	+ ret = rpm_reg_write_active(vreg);
	117	+ if (ret)
	118	+ vreg->is_enabled = 1;
95	119
96	120	return ret;
97	121	}
..	..	@@ -109,16 +133,15 @@
109	133	unsigned *selector)
110	134	{
111	135	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
112		- struct rpm_regulator_req req;
113		- int ret = 0;
	136	+ int ret;
	137	+ int old_uV = vreg->uV;
114	138
115		- req.key = cpu_to_le32(RPM_KEY_UV);
116		- req.nbytes = cpu_to_le32(sizeof(u32));
117		- req.value = cpu_to_le32(min_uV);
	139	+ vreg->uV = min_uV;
	140	+ vreg->uv_updated = 1;
118	141
119		- ret = rpm_reg_write_active(vreg, &req, sizeof(req));
120		- if (!ret)
121		- vreg->uV = min_uV;
	142	+ ret = rpm_reg_write_active(vreg);
	143	+ if (ret)
	144	+ vreg->uV = old_uV;
122	145
123	146	return ret;
124	147	}
..	..	@@ -126,13 +149,16 @@
126	149	static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
127	150	{
128	151	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
129		- struct rpm_regulator_req req;
	152	+ u32 old_load = vreg->load;
	153	+ int ret;
130	154
131		- req.key = cpu_to_le32(RPM_KEY_MA);
132		- req.nbytes = cpu_to_le32(sizeof(u32));
133		- req.value = cpu_to_le32(load_uA / 1000);
	155	+ vreg->load = load_uA;
	156	+ vreg->load_updated = 1;
	157	+ ret = rpm_reg_write_active(vreg);
	158	+ if (ret)
	159	+ vreg->load = old_load;
134	160
135		- return rpm_reg_write_active(vreg, &req, sizeof(req));
	161	+ return ret;
136	162	}
137	163
138	164	static const struct regulator_ops rpm_smps_ldo_ops = {
..	..	@@ -173,8 +199,17 @@
173	199	.set_voltage = rpm_reg_set_voltage,
174	200	};
175	201
	202	+static const struct regulator_ops rpm_mp5496_ops = {
	203	+ .enable = rpm_reg_enable,
	204	+ .disable = rpm_reg_disable,
	205	+ .is_enabled = rpm_reg_is_enabled,
	206	+ .list_voltage = regulator_list_voltage_linear_range,
	207	+
	208	+ .set_voltage = rpm_reg_set_voltage,
	209	+};
	210	+
176	211	static const struct regulator_desc pma8084_hfsmps = {
177		- .linear_ranges = (struct regulator_linear_range[]) {
	212	+ .linear_ranges = (struct linear_range[]) {
178	213	REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
179	214	REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
180	215	},
..	..	@@ -184,7 +219,7 @@
184	219	};
185	220
186	221	static const struct regulator_desc pma8084_ftsmps = {
187		- .linear_ranges = (struct regulator_linear_range[]) {
	222	+ .linear_ranges = (struct linear_range[]) {
188	223	REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
189	224	REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
190	225	},
..	..	@@ -194,7 +229,7 @@
194	229	};
195	230
196	231	static const struct regulator_desc pma8084_pldo = {
197		- .linear_ranges = (struct regulator_linear_range[]) {
	232	+ .linear_ranges = (struct linear_range[]) {
198	233	REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
199	234	REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
200	235	REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
..	..	@@ -205,7 +240,7 @@
205	240	};
206	241
207	242	static const struct regulator_desc pma8084_nldo = {
208		- .linear_ranges = (struct regulator_linear_range[]) {
	243	+ .linear_ranges = (struct linear_range[]) {
209	244	REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
210	245	},
211	246	.n_linear_ranges = 1,
..	..	@@ -218,7 +253,7 @@
218	253	};
219	254
220	255	static const struct regulator_desc pm8x41_hfsmps = {
221		- .linear_ranges = (struct regulator_linear_range[]) {
	256	+ .linear_ranges = (struct linear_range[]) {
222	257	REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
223	258	REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
224	259	},
..	..	@@ -228,7 +263,7 @@
228	263	};
229	264
230	265	static const struct regulator_desc pm8841_ftsmps = {
231		- .linear_ranges = (struct regulator_linear_range[]) {
	266	+ .linear_ranges = (struct linear_range[]) {
232	267	REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
233	268	REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
234	269	},
..	..	@@ -238,7 +273,7 @@
238	273	};
239	274
240	275	static const struct regulator_desc pm8941_boost = {
241		- .linear_ranges = (struct regulator_linear_range[]) {
	276	+ .linear_ranges = (struct linear_range[]) {
242	277	REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
243	278	},
244	279	.n_linear_ranges = 1,
..	..	@@ -247,7 +282,7 @@
247	282	};
248	283
249	284	static const struct regulator_desc pm8941_pldo = {
250		- .linear_ranges = (struct regulator_linear_range[]) {
	285	+ .linear_ranges = (struct linear_range[]) {
251	286	REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
252	287	REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
253	288	REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
..	..	@@ -258,7 +293,7 @@
258	293	};
259	294
260	295	static const struct regulator_desc pm8941_nldo = {
261		- .linear_ranges = (struct regulator_linear_range[]) {
	296	+ .linear_ranges = (struct linear_range[]) {
262	297	REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
263	298	},
264	299	.n_linear_ranges = 1,
..	..	@@ -277,16 +312,16 @@
277	312	};
278	313
279	314	static const struct regulator_desc pm8916_pldo = {
280		- .linear_ranges = (struct regulator_linear_range[]) {
281		- REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
	315	+ .linear_ranges = (struct linear_range[]) {
	316	+ REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
282	317	},
283	318	.n_linear_ranges = 1,
284		- .n_voltages = 209,
	319	+ .n_voltages = 128,
285	320	.ops = &rpm_smps_ldo_ops,
286	321	};
287	322
288	323	static const struct regulator_desc pm8916_nldo = {
289		- .linear_ranges = (struct regulator_linear_range[]) {
	324	+ .linear_ranges = (struct linear_range[]) {
290	325	REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
291	326	},
292	327	.n_linear_ranges = 1,
..	..	@@ -295,7 +330,7 @@
295	330	};
296	331
297	332	static const struct regulator_desc pm8916_buck_lvo_smps = {
298		- .linear_ranges = (struct regulator_linear_range[]) {
	333	+ .linear_ranges = (struct linear_range[]) {
299	334	REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
300	335	REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
301	336	},
..	..	@@ -305,7 +340,7 @@
305	340	};
306	341
307	342	static const struct regulator_desc pm8916_buck_hvo_smps = {
308		- .linear_ranges = (struct regulator_linear_range[]) {
	343	+ .linear_ranges = (struct linear_range[]) {
309	344	REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
310	345	},
311	346	.n_linear_ranges = 1,
..	..	@@ -313,8 +348,83 @@
313	348	.ops = &rpm_smps_ldo_ops,
314	349	};
315	350
	351	+static const struct regulator_desc pm8950_hfsmps = {
	352	+ .linear_ranges = (struct linear_range[]) {
	353	+ REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
	354	+ REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
	355	+ },
	356	+ .n_linear_ranges = 2,
	357	+ .n_voltages = 128,
	358	+ .ops = &rpm_smps_ldo_ops,
	359	+};
	360	+
	361	+static const struct regulator_desc pm8950_ftsmps2p5 = {
	362	+ .linear_ranges = (struct linear_range[]) {
	363	+ REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
	364	+ REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
	365	+ },
	366	+ .n_linear_ranges = 2,
	367	+ .n_voltages = 461,
	368	+ .ops = &rpm_smps_ldo_ops,
	369	+};
	370	+
	371	+static const struct regulator_desc pm8950_ult_nldo = {
	372	+ .linear_ranges = (struct linear_range[]) {
	373	+ REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
	374	+ },
	375	+ .n_linear_ranges = 1,
	376	+ .n_voltages = 203,
	377	+ .ops = &rpm_smps_ldo_ops,
	378	+};
	379	+
	380	+static const struct regulator_desc pm8950_ult_pldo = {
	381	+ .linear_ranges = (struct linear_range[]) {
	382	+ REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
	383	+ },
	384	+ .n_linear_ranges = 1,
	385	+ .n_voltages = 128,
	386	+ .ops = &rpm_smps_ldo_ops,
	387	+};
	388	+
	389	+static const struct regulator_desc pm8950_pldo_lv = {
	390	+ .linear_ranges = (struct linear_range[]) {
	391	+ REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
	392	+ },
	393	+ .n_linear_ranges = 1,
	394	+ .n_voltages = 17,
	395	+ .ops = &rpm_smps_ldo_ops,
	396	+};
	397	+
	398	+static const struct regulator_desc pm8950_pldo = {
	399	+ .linear_ranges = (struct linear_range[]) {
	400	+ REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
	401	+ },
	402	+ .n_linear_ranges = 1,
	403	+ .n_voltages = 165,
	404	+ .ops = &rpm_smps_ldo_ops,
	405	+};
	406	+
	407	+static const struct regulator_desc pm8953_lnldo = {
	408	+ .linear_ranges = (struct linear_range[]) {
	409	+ REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
	410	+ REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
	411	+ },
	412	+ .n_linear_ranges = 2,
	413	+ .n_voltages = 16,
	414	+ .ops = &rpm_smps_ldo_ops,
	415	+};
	416	+
	417	+static const struct regulator_desc pm8953_ult_nldo = {
	418	+ .linear_ranges = (struct linear_range[]) {
	419	+ REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
	420	+ },
	421	+ .n_linear_ranges = 1,
	422	+ .n_voltages = 94,
	423	+ .ops = &rpm_smps_ldo_ops,
	424	+};
	425	+
316	426	static const struct regulator_desc pm8994_hfsmps = {
317		- .linear_ranges = (struct regulator_linear_range[]) {
	427	+ .linear_ranges = (struct linear_range[]) {
318	428	REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
319	429	REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
320	430	},
..	..	@@ -324,7 +434,7 @@
324	434	};
325	435
326	436	static const struct regulator_desc pm8994_ftsmps = {
327		- .linear_ranges = (struct regulator_linear_range[]) {
	437	+ .linear_ranges = (struct linear_range[]) {
328	438	REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
329	439	REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
330	440	},
..	..	@@ -334,7 +444,7 @@
334	444	};
335	445
336	446	static const struct regulator_desc pm8994_nldo = {
337		- .linear_ranges = (struct regulator_linear_range[]) {
	447	+ .linear_ranges = (struct linear_range[]) {
338	448	REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
339	449	},
340	450	.n_linear_ranges = 1,
..	..	@@ -343,7 +453,7 @@
343	453	};
344	454
345	455	static const struct regulator_desc pm8994_pldo = {
346		- .linear_ranges = (struct regulator_linear_range[]) {
	456	+ .linear_ranges = (struct linear_range[]) {
347	457	REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
348	458	REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
349	459	REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
..	..	@@ -363,8 +473,37 @@
363	473	.ops = &rpm_smps_ldo_ops_fixed,
364	474	};
365	475
	476	+static const struct regulator_desc pmi8994_ftsmps = {
	477	+ .linear_ranges = (struct linear_range[]) {
	478	+ REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
	479	+ REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
	480	+ },
	481	+ .n_linear_ranges = 2,
	482	+ .n_voltages = 350,
	483	+ .ops = &rpm_smps_ldo_ops,
	484	+};
	485	+
	486	+static const struct regulator_desc pmi8994_hfsmps = {
	487	+ .linear_ranges = (struct linear_range[]) {
	488	+ REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500),
	489	+ REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
	490	+ },
	491	+ .n_linear_ranges = 2,
	492	+ .n_voltages = 142,
	493	+ .ops = &rpm_smps_ldo_ops,
	494	+};
	495	+
	496	+static const struct regulator_desc pmi8994_bby = {
	497	+ .linear_ranges = (struct linear_range[]) {
	498	+ REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
	499	+ },
	500	+ .n_linear_ranges = 1,
	501	+ .n_voltages = 45,
	502	+ .ops = &rpm_bob_ops,
	503	+};
	504	+
366	505	static const struct regulator_desc pm8998_ftsmps = {
367		- .linear_ranges = (struct regulator_linear_range[]) {
	506	+ .linear_ranges = (struct linear_range[]) {
368	507	REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
369	508	},
370	509	.n_linear_ranges = 1,
..	..	@@ -373,7 +512,7 @@
373	512	};
374	513
375	514	static const struct regulator_desc pm8998_hfsmps = {
376		- .linear_ranges = (struct regulator_linear_range[]) {
	515	+ .linear_ranges = (struct linear_range[]) {
377	516	REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
378	517	},
379	518	.n_linear_ranges = 1,
..	..	@@ -382,7 +521,7 @@
382	521	};
383	522
384	523	static const struct regulator_desc pm8998_nldo = {
385		- .linear_ranges = (struct regulator_linear_range[]) {
	524	+ .linear_ranges = (struct linear_range[]) {
386	525	REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
387	526	},
388	527	.n_linear_ranges = 1,
..	..	@@ -391,7 +530,7 @@
391	530	};
392	531
393	532	static const struct regulator_desc pm8998_pldo = {
394		- .linear_ranges = (struct regulator_linear_range[]) {
	533	+ .linear_ranges = (struct linear_range[]) {
395	534	REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
396	535	},
397	536	.n_linear_ranges = 1,
..	..	@@ -400,7 +539,7 @@
400	539	};
401	540
402	541	static const struct regulator_desc pm8998_pldo_lv = {
403		- .linear_ranges = (struct regulator_linear_range[]) {
	542	+ .linear_ranges = (struct linear_range[]) {
404	543	REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
405	544	},
406	545	.n_linear_ranges = 1,
..	..	@@ -413,12 +552,147 @@
413	552	};
414	553
415	554	static const struct regulator_desc pmi8998_bob = {
416		- .linear_ranges = (struct regulator_linear_range[]) {
	555	+ .linear_ranges = (struct linear_range[]) {
417	556	REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
418	557	},
419	558	.n_linear_ranges = 1,
420	559	.n_voltages = 84,
421	560	.ops = &rpm_bob_ops,
	561	+};
	562	+
	563	+static const struct regulator_desc pm660_ftsmps = {
	564	+ .linear_ranges = (struct linear_range[]) {
	565	+ REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
	566	+ },
	567	+ .n_linear_ranges = 1,
	568	+ .n_voltages = 200,
	569	+ .ops = &rpm_smps_ldo_ops,
	570	+};
	571	+
	572	+static const struct regulator_desc pm660_hfsmps = {
	573	+ .linear_ranges = (struct linear_range[]) {
	574	+ REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
	575	+ },
	576	+ .n_linear_ranges = 1,
	577	+ .n_voltages = 217,
	578	+ .ops = &rpm_smps_ldo_ops,
	579	+};
	580	+
	581	+static const struct regulator_desc pm660_ht_nldo = {
	582	+ .linear_ranges = (struct linear_range[]) {
	583	+ REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
	584	+ },
	585	+ .n_linear_ranges = 1,
	586	+ .n_voltages = 125,
	587	+ .ops = &rpm_smps_ldo_ops,
	588	+};
	589	+
	590	+static const struct regulator_desc pm660_ht_lvpldo = {
	591	+ .linear_ranges = (struct linear_range[]) {
	592	+ REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
	593	+ },
	594	+ .n_linear_ranges = 1,
	595	+ .n_voltages = 63,
	596	+ .ops = &rpm_smps_ldo_ops,
	597	+};
	598	+
	599	+static const struct regulator_desc pm660_nldo660 = {
	600	+ .linear_ranges = (struct linear_range[]) {
	601	+ REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
	602	+ },
	603	+ .n_linear_ranges = 1,
	604	+ .n_voltages = 124,
	605	+ .ops = &rpm_smps_ldo_ops,
	606	+};
	607	+
	608	+static const struct regulator_desc pm660_pldo660 = {
	609	+ .linear_ranges = (struct linear_range[]) {
	610	+ REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
	611	+ },
	612	+ .n_linear_ranges = 1,
	613	+ .n_voltages = 256,
	614	+ .ops = &rpm_smps_ldo_ops,
	615	+};
	616	+
	617	+static const struct regulator_desc pm660l_bob = {
	618	+ .linear_ranges = (struct linear_range[]) {
	619	+ REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
	620	+ },
	621	+ .n_linear_ranges = 1,
	622	+ .n_voltages = 85,
	623	+ .ops = &rpm_bob_ops,
	624	+};
	625	+
	626	+static const struct regulator_desc pms405_hfsmps3 = {
	627	+ .linear_ranges = (struct linear_range[]) {
	628	+ REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
	629	+ },
	630	+ .n_linear_ranges = 1,
	631	+ .n_voltages = 216,
	632	+ .ops = &rpm_smps_ldo_ops,
	633	+};
	634	+
	635	+static const struct regulator_desc pms405_nldo300 = {
	636	+ .linear_ranges = (struct linear_range[]) {
	637	+ REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
	638	+ },
	639	+ .n_linear_ranges = 1,
	640	+ .n_voltages = 128,
	641	+ .ops = &rpm_smps_ldo_ops,
	642	+};
	643	+
	644	+static const struct regulator_desc pms405_nldo1200 = {
	645	+ .linear_ranges = (struct linear_range[]) {
	646	+ REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
	647	+ },
	648	+ .n_linear_ranges = 1,
	649	+ .n_voltages = 128,
	650	+ .ops = &rpm_smps_ldo_ops,
	651	+};
	652	+
	653	+static const struct regulator_desc pms405_pldo50 = {
	654	+ .linear_ranges = (struct linear_range[]) {
	655	+ REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
	656	+ },
	657	+ .n_linear_ranges = 1,
	658	+ .n_voltages = 129,
	659	+ .ops = &rpm_smps_ldo_ops,
	660	+};
	661	+
	662	+static const struct regulator_desc pms405_pldo150 = {
	663	+ .linear_ranges = (struct linear_range[]) {
	664	+ REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
	665	+ },
	666	+ .n_linear_ranges = 1,
	667	+ .n_voltages = 129,
	668	+ .ops = &rpm_smps_ldo_ops,
	669	+};
	670	+
	671	+static const struct regulator_desc pms405_pldo600 = {
	672	+ .linear_ranges = (struct linear_range[]) {
	673	+ REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
	674	+ },
	675	+ .n_linear_ranges = 1,
	676	+ .n_voltages = 99,
	677	+ .ops = &rpm_smps_ldo_ops,
	678	+};
	679	+
	680	+static const struct regulator_desc mp5496_smpa2 = {
	681	+ .linear_ranges = (struct linear_range[]) {
	682	+ REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500),
	683	+ },
	684	+ .n_linear_ranges = 1,
	685	+ .n_voltages = 28,
	686	+ .ops = &rpm_mp5496_ops,
	687	+};
	688	+
	689	+static const struct regulator_desc mp5496_ldoa2 = {
	690	+ .linear_ranges = (struct linear_range[]) {
	691	+ REGULATOR_LINEAR_RANGE(1800000, 0, 60, 25000),
	692	+ },
	693	+ .n_linear_ranges = 1,
	694	+ .n_voltages = 61,
	695	+ .ops = &rpm_mp5496_ops,
422	696	};
423	697
424	698	struct rpm_regulator_data {
..	..	@@ -427,6 +701,12 @@
427	701	u32 id;
428	702	const struct regulator_desc *desc;
429	703	const char *supply;
	704	+};
	705	+
	706	+static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
	707	+ { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
	708	+ { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
	709	+ {}
430	710	};
431	711
432	712	static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
..	..	@@ -559,6 +839,74 @@
559	839	{}
560	840	};
561	841
	842	+static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
	843	+ { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
	844	+ { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
	845	+ { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
	846	+ { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
	847	+ /* S5 is managed via SPMI. */
	848	+ { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
	849	+
	850	+ { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
	851	+ { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
	852	+ { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
	853	+ /* L4 seems not to exist. */
	854	+ { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
	855	+ { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
	856	+ { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
	857	+ { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
	858	+ { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
	859	+ { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
	860	+ { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
	861	+ { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
	862	+ { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
	863	+ { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
	864	+ { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
	865	+ { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" },
	866	+ { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
	867	+ /* L18 seems not to exist. */
	868	+ { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" },
	869	+ /* L20 & L21 seem not to exist. */
	870	+ { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" },
	871	+ { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" },
	872	+ {}
	873	+};
	874	+
	875	+static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
	876	+ { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" },
	877	+ { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" },
	878	+ { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
	879	+ { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
	880	+ { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
	881	+ { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" },
	882	+ { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
	883	+
	884	+ { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" },
	885	+ { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" },
	886	+ { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" },
	887	+ { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
	888	+ { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
	889	+ { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
	890	+ { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
	891	+ { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
	892	+ { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
	893	+ { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
	894	+ { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
	895	+ { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
	896	+ { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
	897	+ { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
	898	+ { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
	899	+ { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
	900	+ { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
	901	+ { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
	902	+ { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
	903	+ { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" },
	904	+ { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" },
	905	+ { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
	906	+ { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
	907	+ {}
	908	+};
	909	+
562	910	static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
563	911	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
564	912	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
..	..	@@ -607,6 +955,14 @@
607	955	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
608	956	{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
609	957
	958	+ {}
	959	+};
	960	+
	961	+static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
	962	+ { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
	963	+ { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
	964	+ { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
	965	+ { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
610	966	{}
611	967	};
612	968
..	..	@@ -662,14 +1018,91 @@
662	1018	{}
663	1019	};
664	1020
	1021	+static const struct rpm_regulator_data rpm_pm660_regulators[] = {
	1022	+ { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
	1023	+ { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
	1024	+ { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
	1025	+ { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
	1026	+ { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
	1027	+ { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
	1028	+ { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
	1029	+ { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
	1030	+ { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
	1031	+ /* l4 is unaccessible on PM660 */
	1032	+ { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
	1033	+ { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
	1034	+ { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
	1035	+ { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1036	+ { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1037	+ { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1038	+ { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1039	+ { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1040	+ { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1041	+ { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
	1042	+ { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
	1043	+ { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
	1044	+ { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
	1045	+ { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
	1046	+ { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
	1047	+ { }
	1048	+};
	1049	+
	1050	+static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
	1051	+ { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
	1052	+ { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
	1053	+ { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
	1054	+ { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
	1055	+ { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
	1056	+ { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
	1057	+ { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
	1058	+ { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
	1059	+ { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
	1060	+ { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
	1061	+ { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
	1062	+ { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
	1063	+ { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
	1064	+ { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
	1065	+ { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
	1066	+ { }
	1067	+};
	1068	+
	1069	+static const struct rpm_regulator_data rpm_pms405_regulators[] = {
	1070	+ { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
	1071	+ { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
	1072	+ { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
	1073	+ { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
	1074	+ { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
	1075	+ { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
	1076	+ { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
	1077	+ { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
	1078	+ { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
	1079	+ { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
	1080	+ { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
	1081	+ { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
	1082	+ { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
	1083	+ { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
	1084	+ { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
	1085	+ { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
	1086	+ { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
	1087	+ { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
	1088	+ {}
	1089	+};
	1090	+
665	1091	static const struct of_device_id rpm_of_match[] = {
	1092	+ { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
666	1093	{ .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
667	1094	{ .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
668	1095	{ .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
	1096	+ { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
	1097	+ { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
669	1098	{ .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
670	1099	{ .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
	1100	+ { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
	1101	+ { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
671	1102	{ .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
	1103	+ { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
672	1104	{ .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
	1105	+ { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
673	1106	{}
674	1107	};
675	1108	MODULE_DEVICE_TABLE(of, rpm_of_match);
..	..	@@ -751,8 +1184,10 @@
751	1184
752	1185	for_each_available_child_of_node(dev->of_node, node) {
753	1186	vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
754		- if (!vreg)
	1187	+ if (!vreg) {
	1188	+ of_node_put(node);
755	1189	return -ENOMEM;
	1190	+ }
756	1191
757	1192	ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
758	1193