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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * NXP LPC18xx State Configurable Timer - Pulse Width Modulator driver |
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3 | 4 | * |
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4 | 5 | * Copyright (c) 2015 Ariel D'Alessandro <ariel@vanguardiasur.com> |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify |
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7 | | - * it under the terms of the GNU General Public License as published by |
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8 | | - * the Free Software Foundation; either version 2 of the License. |
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9 | 6 | * |
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10 | 7 | * Notes |
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11 | 8 | * ===== |
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.. | .. |
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296 | 293 | |
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297 | 294 | set_bit(event, &lpc18xx_pwm->event_map); |
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298 | 295 | lpc18xx_data->duty_event = event; |
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299 | | - lpc18xx_pwm_config_duty(chip, pwm, pwm_get_duty_cycle(pwm)); |
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300 | 296 | |
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301 | 297 | return 0; |
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302 | 298 | } |
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.. | .. |
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306 | 302 | struct lpc18xx_pwm_chip *lpc18xx_pwm = to_lpc18xx_pwm_chip(chip); |
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307 | 303 | struct lpc18xx_pwm_data *lpc18xx_data = pwm_get_chip_data(pwm); |
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308 | 304 | |
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309 | | - pwm_disable(pwm); |
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310 | | - pwm_set_duty_cycle(pwm, 0); |
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311 | 305 | clear_bit(lpc18xx_data->duty_event, &lpc18xx_pwm->event_map); |
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312 | 306 | } |
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313 | 307 | |
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.. | .. |
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331 | 325 | { |
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332 | 326 | struct lpc18xx_pwm_chip *lpc18xx_pwm; |
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333 | 327 | struct pwm_device *pwm; |
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334 | | - struct resource *res; |
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335 | 328 | int ret, i; |
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336 | 329 | u64 val; |
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337 | 330 | |
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.. | .. |
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342 | 335 | |
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343 | 336 | lpc18xx_pwm->dev = &pdev->dev; |
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344 | 337 | |
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345 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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346 | | - lpc18xx_pwm->base = devm_ioremap_resource(&pdev->dev, res); |
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| 338 | + lpc18xx_pwm->base = devm_platform_ioremap_resource(pdev, 0); |
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347 | 339 | if (IS_ERR(lpc18xx_pwm->base)) |
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348 | 340 | return PTR_ERR(lpc18xx_pwm->base); |
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349 | 341 | |
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.. | .. |
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406 | 398 | lpc18xx_pwm_writel(lpc18xx_pwm, LPC18XX_PWM_LIMIT, |
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407 | 399 | BIT(lpc18xx_pwm->period_event)); |
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408 | 400 | |
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409 | | - ret = pwmchip_add(&lpc18xx_pwm->chip); |
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410 | | - if (ret < 0) { |
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411 | | - dev_err(&pdev->dev, "pwmchip_add failed: %d\n", ret); |
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412 | | - goto disable_pwmclk; |
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413 | | - } |
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414 | | - |
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415 | 401 | for (i = 0; i < lpc18xx_pwm->chip.npwm; i++) { |
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416 | 402 | struct lpc18xx_pwm_data *data; |
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417 | 403 | |
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.. | .. |
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421 | 407 | GFP_KERNEL); |
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422 | 408 | if (!data) { |
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423 | 409 | ret = -ENOMEM; |
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424 | | - goto remove_pwmchip; |
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| 410 | + goto disable_pwmclk; |
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425 | 411 | } |
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426 | 412 | |
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427 | 413 | pwm_set_chip_data(pwm, data); |
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428 | 414 | } |
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429 | | - |
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430 | | - platform_set_drvdata(pdev, lpc18xx_pwm); |
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431 | 415 | |
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432 | 416 | val = lpc18xx_pwm_readl(lpc18xx_pwm, LPC18XX_PWM_CTRL); |
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433 | 417 | val &= ~LPC18XX_PWM_BIDIR; |
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.. | .. |
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436 | 420 | val |= LPC18XX_PWM_PRE(0); |
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437 | 421 | lpc18xx_pwm_writel(lpc18xx_pwm, LPC18XX_PWM_CTRL, val); |
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438 | 422 | |
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| 423 | + ret = pwmchip_add(&lpc18xx_pwm->chip); |
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| 424 | + if (ret < 0) { |
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| 425 | + dev_err(&pdev->dev, "pwmchip_add failed: %d\n", ret); |
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| 426 | + goto disable_pwmclk; |
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| 427 | + } |
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| 428 | + |
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| 429 | + platform_set_drvdata(pdev, lpc18xx_pwm); |
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| 430 | + |
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439 | 431 | return 0; |
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440 | 432 | |
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441 | | -remove_pwmchip: |
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442 | | - pwmchip_remove(&lpc18xx_pwm->chip); |
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443 | 433 | disable_pwmclk: |
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444 | 434 | clk_disable_unprepare(lpc18xx_pwm->pwm_clk); |
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445 | 435 | return ret; |
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