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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/pinctrl/sprd/pinctrl-sprd.c
....@@ -1,15 +1,7 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Spreadtrum pin controller driver
34  * Copyright (C) 2017 Spreadtrum  - http://www.spreadtrum.com
4
- *
5
- * This program is free software; you can redistribute it and/or
6
- * modify it under the terms of the GNU General Public License
7
- * version 2 as published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but
10
- * WITHOUT ANY WARRANTY; without even the implied warranty of
11
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12
- * General Public License for more details.
135  */
146 
157 #include <linux/debugfs.h>
....@@ -49,7 +41,8 @@
4941 #define PUBCP_SLEEP_MODE		BIT(14)
5042 #define TGLDSP_SLEEP_MODE		BIT(15)
5143 #define AGDSP_SLEEP_MODE		BIT(16)
52
-#define SLEEP_MODE_MASK			GENMASK(3, 0)
44
+#define CM4_SLEEP_MODE			BIT(17)
45
+#define SLEEP_MODE_MASK			GENMASK(5, 0)
5346 #define SLEEP_MODE_SHIFT		13
5447 
5548 #define SLEEP_INPUT			BIT(1)
....@@ -75,8 +68,8 @@
7568 #define SLEEP_PULL_UP_MASK		0x1
7669 #define SLEEP_PULL_UP_SHIFT		3
7770 
78
-#define PULL_UP_20K			(BIT(12) | BIT(7))
79
-#define PULL_UP_4_7K			BIT(12)
71
+#define PULL_UP_4_7K			(BIT(12) | BIT(7))
72
+#define PULL_UP_20K			BIT(7)
8073 #define PULL_UP_MASK			0x21
8174 #define PULL_UP_SHIFT			7
8275 
....@@ -89,6 +82,7 @@
8982 	PUBCP_SLEEP = BIT(1),
9083 	TGLDSP_SLEEP = BIT(2),
9184 	AGDSP_SLEEP = BIT(3),
85
+	CM4_SLEEP = BIT(4),
9286 };
9387 
9488 enum pin_func_sel {
....@@ -462,7 +456,7 @@
462456 	if (pin->type == GLOBAL_CTRL_PIN &&
463457 	    param == SPRD_PIN_CONFIG_CONTROL) {
464458 		arg = reg;
465
-	} else if (pin->type == COMMON_PIN) {
459
+	} else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
466460 		switch (param) {
467461 		case SPRD_PIN_CONFIG_SLEEP_MODE:
468462 			arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
....@@ -470,17 +464,15 @@
470464 		case PIN_CONFIG_INPUT_ENABLE:
471465 			arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
472466 			break;
473
-		case PIN_CONFIG_OUTPUT:
467
+		case PIN_CONFIG_OUTPUT_ENABLE:
474468 			arg = reg & SLEEP_OUTPUT_MASK;
475469 			break;
476
-		case PIN_CONFIG_SLEEP_HARDWARE_STATE:
477
-			arg = 0;
470
+		case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
471
+			if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT))
472
+				return -EINVAL;
473
+
474
+			arg = 1;
478475 			break;
479
-		default:
480
-			return -ENOTSUPP;
481
-		}
482
-	} else if (pin->type == MISC_PIN) {
483
-		switch (param) {
484476 		case PIN_CONFIG_DRIVE_STRENGTH:
485477 			arg = (reg >> DRIVE_STRENGTH_SHIFT) &
486478 				DRIVE_STRENGTH_MASK;
....@@ -499,6 +491,13 @@
499491 			arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
500492 			       SLEEP_PULL_UP_MASK) << 16;
501493 			arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
494
+			break;
495
+		case PIN_CONFIG_BIAS_DISABLE:
496
+			if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) ||
497
+			    (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K)))
498
+				return -EINVAL;
499
+
500
+			arg = 1;
502501 			break;
503502 		case PIN_CONFIG_SLEEP_HARDWARE_STATE:
504503 			arg = 0;
....@@ -614,7 +613,7 @@
614613 		if (pin->type == GLOBAL_CTRL_PIN &&
615614 		    param == SPRD_PIN_CONFIG_CONTROL) {
616615 			val = arg;
617
-		} else if (pin->type == COMMON_PIN) {
616
+		} else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
618617 			switch (param) {
619618 			case SPRD_PIN_CONFIG_SLEEP_MODE:
620619 				if (arg & AP_SLEEP)
....@@ -625,6 +624,8 @@
625624 					val |= TGLDSP_SLEEP_MODE;
626625 				if (arg & AGDSP_SLEEP)
627626 					val |= AGDSP_SLEEP_MODE;
627
+				if (arg & CM4_SLEEP)
628
+					val |= CM4_SLEEP_MODE;
628629 
629630 				mask = SLEEP_MODE_MASK;
630631 				shift = SLEEP_MODE_SHIFT;
....@@ -640,20 +641,23 @@
640641 					shift = SLEEP_INPUT_SHIFT;
641642 				}
642643 				break;
643
-			case PIN_CONFIG_OUTPUT:
644
+			case PIN_CONFIG_OUTPUT_ENABLE:
644645 				if (is_sleep_config == true) {
645
-					val |= SLEEP_OUTPUT;
646
+					if (arg > 0)
647
+						val |= SLEEP_OUTPUT;
648
+					else
649
+						val &= ~SLEEP_OUTPUT;
650
+
646651 					mask = SLEEP_OUTPUT_MASK;
647652 					shift = SLEEP_OUTPUT_SHIFT;
648653 				}
649654 				break;
650
-			case PIN_CONFIG_SLEEP_HARDWARE_STATE:
651
-				continue;
652
-			default:
653
-				return -ENOTSUPP;
654
-			}
655
-		} else if (pin->type == MISC_PIN) {
656
-			switch (param) {
655
+			case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
656
+				if (is_sleep_config == true) {
657
+					val = shift = 0;
658
+					mask = SLEEP_OUTPUT | SLEEP_INPUT;
659
+				}
660
+				break;
657661 			case PIN_CONFIG_DRIVE_STRENGTH:
658662 				if (arg < 2 || arg > 60)
659663 					return -EINVAL;
....@@ -695,6 +699,16 @@
695699 
696700 					mask = PULL_UP_MASK;
697701 					shift = PULL_UP_SHIFT;
702
+				}
703
+				break;
704
+			case PIN_CONFIG_BIAS_DISABLE:
705
+				if (is_sleep_config == true) {
706
+					val = shift = 0;
707
+					mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP;
708
+				} else {
709
+					val = shift = 0;
710
+					mask = PULL_DOWN | PULL_UP_20K |
711
+						PULL_UP_4_7K;
698712 				}
699713 				break;
700714 			case PIN_CONFIG_SLEEP_HARDWARE_STATE:
....@@ -948,8 +962,10 @@
948962 
949963 	for_each_child_of_node(np, child) {
950964 		ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
951
-		if (ret)
965
+		if (ret) {
966
+			of_node_put(child);
952967 			return ret;
968
+		}
953969 
954970 		*temp++ = grp->name;
955971 		grp++;
....@@ -958,8 +974,11 @@
958974 			for_each_child_of_node(child, sub_child) {
959975 				ret = sprd_pinctrl_parse_groups(sub_child,
960976 								sprd_pctl, grp);
961
-				if (ret)
977
+				if (ret) {
978
+					of_node_put(sub_child);
979
+					of_node_put(child);
962980 					return ret;
981
+				}
963982 
964983 				*temp++ = grp->name;
965984 				grp++;
....@@ -1028,7 +1047,6 @@
10281047 	struct sprd_pinctrl *sprd_pctl;
10291048 	struct sprd_pinctrl_soc_info *pinctrl_info;
10301049 	struct pinctrl_pin_desc *pin_desc;
1031
-	struct resource *res;
10321050 	int ret, i;
10331051 
10341052 	sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
....@@ -1036,8 +1054,7 @@
10361054 	if (!sprd_pctl)
10371055 		return -ENOMEM;
10381056 
1039
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1040
-	sprd_pctl->base = devm_ioremap_resource(&pdev->dev, res);
1057
+	sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0);
10411058 	if (IS_ERR(sprd_pctl->base))
10421059 		return PTR_ERR(sprd_pctl->base);
10431060 
....@@ -1054,6 +1071,12 @@
10541071 	ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
10551072 	if (ret) {
10561073 		dev_err(&pdev->dev, "fail to add pins information\n");
1074
+		return ret;
1075
+	}
1076
+
1077
+	ret = sprd_pinctrl_parse_dt(sprd_pctl);
1078
+	if (ret) {
1079
+		dev_err(&pdev->dev, "fail to parse dt properties\n");
10571080 		return ret;
10581081 	}
10591082 
....@@ -1081,15 +1104,9 @@
10811104 		return PTR_ERR(sprd_pctl->pctl);
10821105 	}
10831106 
1084
-	ret = sprd_pinctrl_parse_dt(sprd_pctl);
1085
-	if (ret) {
1086
-		dev_err(&pdev->dev, "fail to parse dt properties\n");
1087
-		pinctrl_unregister(sprd_pctl->pctl);
1088
-		return ret;
1089
-	}
1090
-
10911107 	return 0;
10921108 }
1109
+EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe);
10931110 
10941111 int sprd_pinctrl_remove(struct platform_device *pdev)
10951112 {
....@@ -1098,6 +1115,7 @@
10981115 	pinctrl_unregister(sprd_pctl->pctl);
10991116 	return 0;
11001117 }
1118
+EXPORT_SYMBOL_GPL(sprd_pinctrl_remove);
11011119 
11021120 void sprd_pinctrl_shutdown(struct platform_device *pdev)
11031121 {
....@@ -1112,6 +1130,7 @@
11121130 		return;
11131131 	pinctrl_select_state(pinctl, state);
11141132 }
1133
+EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown);
11151134 
11161135 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
11171136 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");