hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/pinctrl/intel/pinctrl-denverton.c
....@@ -6,17 +6,18 @@
66 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
77 */
88
9
-#include <linux/acpi.h>
9
+#include <linux/mod_devicetable.h>
1010 #include <linux/module.h>
1111 #include <linux/platform_device.h>
12
-#include <linux/pm.h>
12
+
1313 #include <linux/pinctrl/pinctrl.h>
1414
1515 #include "pinctrl-intel.h"
1616
1717 #define DNV_PAD_OWN 0x020
18
-#define DNV_HOSTSW_OWN 0x0C0
1918 #define DNV_PADCFGLOCK 0x090
19
+#define DNV_HOSTSW_OWN 0x0C0
20
+#define DNV_GPI_IS 0x100
2021 #define DNV_GPI_IE 0x120
2122
2223 #define DNV_GPP(n, s, e) \
....@@ -32,6 +33,7 @@
3233 .padown_offset = DNV_PAD_OWN, \
3334 .padcfglock_offset = DNV_PADCFGLOCK, \
3435 .hostown_offset = DNV_HOSTSW_OWN, \
36
+ .is_offset = DNV_GPI_IS, \
3537 .ie_offset = DNV_GPI_IE, \
3638 .pin_base = (s), \
3739 .npins = ((e) - (s) + 1), \
....@@ -39,6 +41,7 @@
3941 .ngpps = ARRAY_SIZE(g), \
4042 }
4143
44
+/* Denverton */
4245 static const struct pinctrl_pin_desc dnv_pins[] = {
4346 /* North ALL */
4447 PINCTRL_PIN(0, "GBE0_SDP0"),
....@@ -59,7 +62,7 @@
5962 PINCTRL_PIN(15, "NCSI_CLK_IN"),
6063 PINCTRL_PIN(16, "NCSI_RXD1"),
6164 PINCTRL_PIN(17, "NCSI_CRS_DV"),
62
- PINCTRL_PIN(18, "NCSI_ARB_IN"),
65
+ PINCTRL_PIN(18, "IDSLDO_VID_TICKLE"),
6366 PINCTRL_PIN(19, "NCSI_TX_EN"),
6467 PINCTRL_PIN(20, "NCSI_TXD0"),
6568 PINCTRL_PIN(21, "NCSI_TXD1"),
....@@ -68,14 +71,14 @@
6871 PINCTRL_PIN(24, "GBE0_LED1"),
6972 PINCTRL_PIN(25, "GBE1_LED0"),
7073 PINCTRL_PIN(26, "GBE1_LED1"),
71
- PINCTRL_PIN(27, "GPIO_0"),
74
+ PINCTRL_PIN(27, "SPARE_0"),
7275 PINCTRL_PIN(28, "PCIE_CLKREQ0_N"),
7376 PINCTRL_PIN(29, "PCIE_CLKREQ1_N"),
7477 PINCTRL_PIN(30, "PCIE_CLKREQ2_N"),
7578 PINCTRL_PIN(31, "PCIE_CLKREQ3_N"),
7679 PINCTRL_PIN(32, "PCIE_CLKREQ4_N"),
77
- PINCTRL_PIN(33, "GPIO_1"),
78
- PINCTRL_PIN(34, "GPIO_2"),
80
+ PINCTRL_PIN(33, "GBE_MDC"),
81
+ PINCTRL_PIN(34, "GBE_MDIO"),
7982 PINCTRL_PIN(35, "SVID_ALERT_N"),
8083 PINCTRL_PIN(36, "SVID_DATA"),
8184 PINCTRL_PIN(37, "SVID_CLK"),
....@@ -102,15 +105,15 @@
102105 PINCTRL_PIN(57, "DFX_PORT14"),
103106 PINCTRL_PIN(58, "DFX_PORT15"),
104107 /* South GPP0 */
105
- PINCTRL_PIN(59, "GPIO_12"),
106
- PINCTRL_PIN(60, "SMB5_GBE_ALRT_N"),
108
+ PINCTRL_PIN(59, "SPI_TPM_CS_N"),
109
+ PINCTRL_PIN(60, "UART2_CTS"),
107110 PINCTRL_PIN(61, "PCIE_CLKREQ5_N"),
108111 PINCTRL_PIN(62, "PCIE_CLKREQ6_N"),
109112 PINCTRL_PIN(63, "PCIE_CLKREQ7_N"),
110113 PINCTRL_PIN(64, "UART0_RXD"),
111114 PINCTRL_PIN(65, "UART0_TXD"),
112
- PINCTRL_PIN(66, "SMB5_GBE_CLK"),
113
- PINCTRL_PIN(67, "SMB5_GBE_DATA"),
115
+ PINCTRL_PIN(66, "CPU_RESET_N"),
116
+ PINCTRL_PIN(67, "NMI"),
114117 PINCTRL_PIN(68, "ERROR2_N"),
115118 PINCTRL_PIN(69, "ERROR1_N"),
116119 PINCTRL_PIN(70, "ERROR0_N"),
....@@ -129,20 +132,20 @@
129132 PINCTRL_PIN(83, "USB_OC0_N"),
130133 PINCTRL_PIN(84, "FLEX_CLK_SE0"),
131134 PINCTRL_PIN(85, "FLEX_CLK_SE1"),
132
- PINCTRL_PIN(86, "GPIO_4"),
133
- PINCTRL_PIN(87, "GPIO_5"),
134
- PINCTRL_PIN(88, "GPIO_6"),
135
- PINCTRL_PIN(89, "GPIO_7"),
135
+ PINCTRL_PIN(86, "SPARE_4"),
136
+ PINCTRL_PIN(87, "SMB3_IE0_CLK"),
137
+ PINCTRL_PIN(88, "SMB3_IE0_DATA"),
138
+ PINCTRL_PIN(89, "SMB3_IE0_ALRT_N"),
136139 PINCTRL_PIN(90, "SATA0_LED_N"),
137140 PINCTRL_PIN(91, "SATA1_LED_N"),
138141 PINCTRL_PIN(92, "SATA_PDETECT0"),
139142 PINCTRL_PIN(93, "SATA_PDETECT1"),
140
- PINCTRL_PIN(94, "SATA0_SDOUT"),
141
- PINCTRL_PIN(95, "SATA1_SDOUT"),
143
+ PINCTRL_PIN(94, "UART1_RTS"),
144
+ PINCTRL_PIN(95, "UART1_CTS"),
142145 PINCTRL_PIN(96, "UART1_RXD"),
143146 PINCTRL_PIN(97, "UART1_TXD"),
144
- PINCTRL_PIN(98, "GPIO_8"),
145
- PINCTRL_PIN(99, "GPIO_9"),
147
+ PINCTRL_PIN(98, "SPARE_8"),
148
+ PINCTRL_PIN(99, "SPARE_9"),
146149 PINCTRL_PIN(100, "TCK"),
147150 PINCTRL_PIN(101, "TRST_N"),
148151 PINCTRL_PIN(102, "TMS"),
....@@ -150,11 +153,11 @@
150153 PINCTRL_PIN(104, "TDO"),
151154 PINCTRL_PIN(105, "CX_PRDY_N"),
152155 PINCTRL_PIN(106, "CX_PREQ_N"),
153
- PINCTRL_PIN(107, "CTBTRIGINOUT"),
154
- PINCTRL_PIN(108, "CTBTRIGOUT"),
155
- PINCTRL_PIN(109, "DFX_SPARE2"),
156
- PINCTRL_PIN(110, "DFX_SPARE3"),
157
- PINCTRL_PIN(111, "DFX_SPARE4"),
156
+ PINCTRL_PIN(107, "TAP1_TCK"),
157
+ PINCTRL_PIN(108, "TAP1_TRST_N"),
158
+ PINCTRL_PIN(109, "TAP1_TMS"),
159
+ PINCTRL_PIN(110, "TAP1_TDI"),
160
+ PINCTRL_PIN(111, "TAP1_TDO"),
158161 /* South GPP1 */
159162 PINCTRL_PIN(112, "SUSPWRDNACK"),
160163 PINCTRL_PIN(113, "PMU_SUSCLK"),
....@@ -183,8 +186,8 @@
183186 PINCTRL_PIN(136, "ESPI_CLK"),
184187 PINCTRL_PIN(137, "ESPI_RST_N"),
185188 PINCTRL_PIN(138, "ESPI_ALRT0_N"),
186
- PINCTRL_PIN(139, "GPIO_10"),
187
- PINCTRL_PIN(140, "GPIO_11"),
189
+ PINCTRL_PIN(139, "ESPI_CS1_N"),
190
+ PINCTRL_PIN(140, "ESPI_ALRT1_N"),
188191 PINCTRL_PIN(141, "ESPI_CLK_LOOPBK"),
189192 PINCTRL_PIN(142, "EMMC_CMD"),
190193 PINCTRL_PIN(143, "EMMC_STROBE"),
....@@ -197,7 +200,7 @@
197200 PINCTRL_PIN(150, "EMMC_D5"),
198201 PINCTRL_PIN(151, "EMMC_D6"),
199202 PINCTRL_PIN(152, "EMMC_D7"),
200
- PINCTRL_PIN(153, "GPIO_3"),
203
+ PINCTRL_PIN(153, "SPARE_3"),
201204 };
202205
203206 static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
....@@ -257,24 +260,16 @@
257260 .ncommunities = ARRAY_SIZE(dnv_communities),
258261 };
259262
260
-static int dnv_pinctrl_probe(struct platform_device *pdev)
261
-{
262
- return intel_pinctrl_probe(pdev, &dnv_soc_data);
263
-}
264
-
265
-static const struct dev_pm_ops dnv_pinctrl_pm_ops = {
266
- SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend,
267
- intel_pinctrl_resume)
268
-};
263
+static INTEL_PINCTRL_PM_OPS(dnv_pinctrl_pm_ops);
269264
270265 static const struct acpi_device_id dnv_pinctrl_acpi_match[] = {
271
- { "INTC3000" },
266
+ { "INTC3000", (kernel_ulong_t)&dnv_soc_data },
272267 { }
273268 };
274269 MODULE_DEVICE_TABLE(acpi, dnv_pinctrl_acpi_match);
275270
276271 static struct platform_driver dnv_pinctrl_driver = {
277
- .probe = dnv_pinctrl_probe,
272
+ .probe = intel_pinctrl_probe_by_hid,
278273 .driver = {
279274 .name = "denverton-pinctrl",
280275 .acpi_match_table = dnv_pinctrl_acpi_match,