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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/pinctrl/intel/pinctrl-baytrail.c
....@@ -6,22 +6,25 @@
66  * Author: Mathias Nyman <mathias.nyman@linux.intel.com>
77  */
88 
9
-#include <linux/kernel.h>
10
-#include <linux/init.h>
11
-#include <linux/types.h>
12
-#include <linux/bitops.h>
13
-#include <linux/interrupt.h>
14
-#include <linux/gpio.h>
15
-#include <linux/gpio/driver.h>
169 #include <linux/acpi.h>
17
-#include <linux/platform_device.h>
18
-#include <linux/seq_file.h>
10
+#include <linux/bitops.h>
11
+#include <linux/gpio/driver.h>
12
+#include <linux/init.h>
13
+#include <linux/interrupt.h>
1914 #include <linux/io.h>
15
+#include <linux/kernel.h>
16
+#include <linux/types.h>
17
+#include <linux/platform_device.h>
2018 #include <linux/pm_runtime.h>
19
+#include <linux/property.h>
20
+#include <linux/seq_file.h>
21
+
2122 #include <linux/pinctrl/pinctrl.h>
2223 #include <linux/pinctrl/pinmux.h>
2324 #include <linux/pinctrl/pinconf.h>
2425 #include <linux/pinctrl/pinconf-generic.h>
26
+
27
+#include "pinctrl-intel.h"
2528 
2629 /* memory mapped register offsets */
2730 #define BYT_CONF0_REG		0x000
....@@ -34,6 +37,7 @@
3437 /* BYT_CONF0_REG register bits */
3538 #define BYT_IODEN		BIT(31)
3639 #define BYT_DIRECT_IRQ_EN	BIT(27)
40
+#define BYT_TRIG_MASK		GENMASK(26, 24)
3741 #define BYT_TRIG_NEG		BIT(26)
3842 #define BYT_TRIG_POS		BIT(25)
3943 #define BYT_TRIG_LVL		BIT(24)
....@@ -42,31 +46,28 @@
4246 #define BYT_GLITCH_F_SLOW_CLK	BIT(17)
4347 #define BYT_GLITCH_F_FAST_CLK	BIT(16)
4448 #define BYT_PULL_STR_SHIFT	9
45
-#define BYT_PULL_STR_MASK	(3 << BYT_PULL_STR_SHIFT)
49
+#define BYT_PULL_STR_MASK	GENMASK(10, 9)
4650 #define BYT_PULL_STR_2K		(0 << BYT_PULL_STR_SHIFT)
4751 #define BYT_PULL_STR_10K	(1 << BYT_PULL_STR_SHIFT)
4852 #define BYT_PULL_STR_20K	(2 << BYT_PULL_STR_SHIFT)
4953 #define BYT_PULL_STR_40K	(3 << BYT_PULL_STR_SHIFT)
5054 #define BYT_PULL_ASSIGN_SHIFT	7
51
-#define BYT_PULL_ASSIGN_MASK	(3 << BYT_PULL_ASSIGN_SHIFT)
55
+#define BYT_PULL_ASSIGN_MASK	GENMASK(8, 7)
5256 #define BYT_PULL_ASSIGN_UP	(1 << BYT_PULL_ASSIGN_SHIFT)
5357 #define BYT_PULL_ASSIGN_DOWN	(2 << BYT_PULL_ASSIGN_SHIFT)
54
-#define BYT_PIN_MUX		0x07
58
+#define BYT_PIN_MUX		GENMASK(2, 0)
5559 
5660 /* BYT_VAL_REG register bits */
61
+#define BYT_DIR_MASK		GENMASK(2, 1)
5762 #define BYT_INPUT_EN		BIT(2)  /* 0: input enabled (active low)*/
5863 #define BYT_OUTPUT_EN		BIT(1)  /* 0: output enabled (active low)*/
5964 #define BYT_LEVEL		BIT(0)
6065 
61
-#define BYT_DIR_MASK		(BIT(1) | BIT(2))
62
-#define BYT_TRIG_MASK		(BIT(26) | BIT(25) | BIT(24))
63
-
64
-#define BYT_CONF0_RESTORE_MASK	(BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | \
65
-				 BYT_PIN_MUX)
66
+#define BYT_CONF0_RESTORE_MASK	(BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | BYT_PIN_MUX)
6667 #define BYT_VAL_RESTORE_MASK	(BYT_DIR_MASK | BYT_LEVEL)
6768 
6869 /* BYT_DEBOUNCE_REG bits */
69
-#define BYT_DEBOUNCE_PULSE_MASK		0x7
70
+#define BYT_DEBOUNCE_PULSE_MASK		GENMASK(2, 0)
7071 #define BYT_DEBOUNCE_PULSE_375US	1
7172 #define BYT_DEBOUNCE_PULSE_750US	2
7273 #define BYT_DEBOUNCE_PULSE_1500US	3
....@@ -90,87 +91,12 @@
9091  * does not find a match for the requested function.
9192  */
9293 #define BYT_DEFAULT_GPIO_MUX	0
94
+#define BYT_ALTER_GPIO_MUX	1
9395 
94
-struct byt_gpio_pin_context {
96
+struct intel_pad_context {
9597 	u32 conf0;
9698 	u32 val;
9799 };
98
-
99
-struct byt_simple_func_mux {
100
-	const char *name;
101
-	unsigned short func;
102
-};
103
-
104
-struct byt_mixed_func_mux {
105
-	const char *name;
106
-	const unsigned short *func_values;
107
-};
108
-
109
-struct byt_pingroup {
110
-	const char *name;
111
-	const unsigned int *pins;
112
-	size_t npins;
113
-	unsigned short has_simple_funcs;
114
-	union {
115
-		const struct byt_simple_func_mux *simple_funcs;
116
-		const struct byt_mixed_func_mux *mixed_funcs;
117
-	};
118
-	size_t nfuncs;
119
-};
120
-
121
-struct byt_function {
122
-	const char *name;
123
-	const char * const *groups;
124
-	size_t ngroups;
125
-};
126
-
127
-struct byt_community {
128
-	unsigned int pin_base;
129
-	size_t npins;
130
-	const unsigned int *pad_map;
131
-	void __iomem *reg_base;
132
-};
133
-
134
-#define SIMPLE_FUNC(n, f)	\
135
-	{			\
136
-		.name	= (n),	\
137
-		.func	= (f),	\
138
-	}
139
-#define MIXED_FUNC(n, f)		\
140
-	{				\
141
-		.name		= (n),	\
142
-		.func_values	= (f),	\
143
-	}
144
-
145
-#define PIN_GROUP_SIMPLE(n, p, f)				\
146
-	{							\
147
-		.name			= (n),			\
148
-		.pins			= (p),			\
149
-		.npins			= ARRAY_SIZE((p)),	\
150
-		.has_simple_funcs	= 1,			\
151
-		{						\
152
-			.simple_funcs		= (f),		\
153
-		},						\
154
-		.nfuncs			= ARRAY_SIZE((f)),	\
155
-	}
156
-#define PIN_GROUP_MIXED(n, p, f)				\
157
-	{							\
158
-		.name			= (n),			\
159
-		.pins			= (p),			\
160
-		.npins			= ARRAY_SIZE((p)),	\
161
-		.has_simple_funcs	= 0,			\
162
-		{						\
163
-			.mixed_funcs		= (f),		\
164
-		},						\
165
-		.nfuncs			= ARRAY_SIZE((f)),	\
166
-	}
167
-
168
-#define FUNCTION(n, g)					\
169
-	{						\
170
-		.name		= (n),			\
171
-		.groups		= (g),			\
172
-		.ngroups	= ARRAY_SIZE((g)),	\
173
-	}
174100 
175101 #define COMMUNITY(p, n, map)		\
176102 	{				\
....@@ -178,28 +104,6 @@
178104 		.npins		= (n),	\
179105 		.pad_map	= (map),\
180106 	}
181
-
182
-struct byt_pinctrl_soc_data {
183
-	const char *uid;
184
-	const struct pinctrl_pin_desc *pins;
185
-	size_t npins;
186
-	const struct byt_pingroup *groups;
187
-	size_t ngroups;
188
-	const struct byt_function *functions;
189
-	size_t nfunctions;
190
-	const struct byt_community *communities;
191
-	size_t ncommunities;
192
-};
193
-
194
-struct byt_gpio {
195
-	struct gpio_chip chip;
196
-	struct platform_device *pdev;
197
-	struct pinctrl_dev *pctl_dev;
198
-	struct pinctrl_desc pctl_desc;
199
-	const struct byt_pinctrl_soc_data *soc_data;
200
-	struct byt_community *communities_copy;
201
-	struct byt_gpio_pin_context *saved_context;
202
-};
203107 
204108 /* SCORE pins, aka GPIOC_<pin_no> or GPIO_S0_SC[<pin_no>] */
205109 static const struct pinctrl_pin_desc byt_score_pins[] = {
....@@ -324,20 +228,11 @@
324228 /* SCORE groups */
325229 static const unsigned int byt_score_uart1_pins[] = { 70, 71, 72, 73 };
326230 static const unsigned int byt_score_uart2_pins[] = { 74, 75, 76, 77 };
327
-static const struct byt_simple_func_mux byt_score_uart_mux[] = {
328
-	SIMPLE_FUNC("uart", 1),
329
-};
330231 
331232 static const unsigned int byt_score_pwm0_pins[] = { 94 };
332233 static const unsigned int byt_score_pwm1_pins[] = { 95 };
333
-static const struct byt_simple_func_mux byt_score_pwm_mux[] = {
334
-	SIMPLE_FUNC("pwm", 1),
335
-};
336234 
337235 static const unsigned int byt_score_sio_spi_pins[] = { 66, 67, 68, 69 };
338
-static const struct byt_simple_func_mux byt_score_spi_mux[] = {
339
-	SIMPLE_FUNC("spi", 1),
340
-};
341236 
342237 static const unsigned int byt_score_i2c5_pins[] = { 88, 89 };
343238 static const unsigned int byt_score_i2c6_pins[] = { 90, 91 };
....@@ -346,50 +241,29 @@
346241 static const unsigned int byt_score_i2c2_pins[] = { 82, 83 };
347242 static const unsigned int byt_score_i2c1_pins[] = { 80, 81 };
348243 static const unsigned int byt_score_i2c0_pins[] = { 78, 79 };
349
-static const struct byt_simple_func_mux byt_score_i2c_mux[] = {
350
-	SIMPLE_FUNC("i2c", 1),
351
-};
352244 
353245 static const unsigned int byt_score_ssp0_pins[] = { 8, 9, 10, 11 };
354246 static const unsigned int byt_score_ssp1_pins[] = { 12, 13, 14, 15 };
355247 static const unsigned int byt_score_ssp2_pins[] = { 62, 63, 64, 65 };
356
-static const struct byt_simple_func_mux byt_score_ssp_mux[] = {
357
-	SIMPLE_FUNC("ssp", 1),
358
-};
359248 
360249 static const unsigned int byt_score_sdcard_pins[] = {
361250 	7, 33, 34, 35, 36, 37, 38, 39, 40, 41,
362251 };
363
-static const unsigned short byt_score_sdcard_mux_values[] = {
252
+static const unsigned int byt_score_sdcard_mux_values[] = {
364253 	2, 1, 1, 1, 1, 1, 1, 1, 1, 1,
365
-};
366
-static const struct byt_mixed_func_mux byt_score_sdcard_mux[] = {
367
-	MIXED_FUNC("sdcard", byt_score_sdcard_mux_values),
368254 };
369255 
370256 static const unsigned int byt_score_sdio_pins[] = { 27, 28, 29, 30, 31, 32 };
371
-static const struct byt_simple_func_mux byt_score_sdio_mux[] = {
372
-	SIMPLE_FUNC("sdio", 1),
373
-};
374257 
375258 static const unsigned int byt_score_emmc_pins[] = {
376259 	16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
377
-};
378
-static const struct byt_simple_func_mux byt_score_emmc_mux[] = {
379
-	SIMPLE_FUNC("emmc", 1),
380260 };
381261 
382262 static const unsigned int byt_score_ilb_lpc_pins[] = {
383263 	42, 43, 44, 45, 46, 47, 48, 49, 50,
384264 };
385
-static const struct byt_simple_func_mux byt_score_lpc_mux[] = {
386
-	SIMPLE_FUNC("lpc", 1),
387
-};
388265 
389266 static const unsigned int byt_score_sata_pins[] = { 0, 1, 2 };
390
-static const struct byt_simple_func_mux byt_score_sata_mux[] = {
391
-	SIMPLE_FUNC("sata", 1),
392
-};
393267 
394268 static const unsigned int byt_score_plt_clk0_pins[] = { 96 };
395269 static const unsigned int byt_score_plt_clk1_pins[] = { 97 };
....@@ -397,70 +271,37 @@
397271 static const unsigned int byt_score_plt_clk3_pins[] = { 99 };
398272 static const unsigned int byt_score_plt_clk4_pins[] = { 100 };
399273 static const unsigned int byt_score_plt_clk5_pins[] = { 101 };
400
-static const struct byt_simple_func_mux byt_score_plt_clk_mux[] = {
401
-	SIMPLE_FUNC("plt_clk", 1),
402
-};
403274 
404275 static const unsigned int byt_score_smbus_pins[] = { 51, 52, 53 };
405
-static const struct byt_simple_func_mux byt_score_smbus_mux[] = {
406
-	SIMPLE_FUNC("smbus", 1),
407
-};
408276 
409
-static const struct byt_pingroup byt_score_groups[] = {
410
-	PIN_GROUP_SIMPLE("uart1_grp",
411
-			 byt_score_uart1_pins, byt_score_uart_mux),
412
-	PIN_GROUP_SIMPLE("uart2_grp",
413
-			 byt_score_uart2_pins, byt_score_uart_mux),
414
-	PIN_GROUP_SIMPLE("pwm0_grp",
415
-			 byt_score_pwm0_pins, byt_score_pwm_mux),
416
-	PIN_GROUP_SIMPLE("pwm1_grp",
417
-			 byt_score_pwm1_pins, byt_score_pwm_mux),
418
-	PIN_GROUP_SIMPLE("ssp2_grp",
419
-			 byt_score_ssp2_pins, byt_score_pwm_mux),
420
-	PIN_GROUP_SIMPLE("sio_spi_grp",
421
-			 byt_score_sio_spi_pins, byt_score_spi_mux),
422
-	PIN_GROUP_SIMPLE("i2c5_grp",
423
-			 byt_score_i2c5_pins, byt_score_i2c_mux),
424
-	PIN_GROUP_SIMPLE("i2c6_grp",
425
-			 byt_score_i2c6_pins, byt_score_i2c_mux),
426
-	PIN_GROUP_SIMPLE("i2c4_grp",
427
-			 byt_score_i2c4_pins, byt_score_i2c_mux),
428
-	PIN_GROUP_SIMPLE("i2c3_grp",
429
-			 byt_score_i2c3_pins, byt_score_i2c_mux),
430
-	PIN_GROUP_SIMPLE("i2c2_grp",
431
-			 byt_score_i2c2_pins, byt_score_i2c_mux),
432
-	PIN_GROUP_SIMPLE("i2c1_grp",
433
-			 byt_score_i2c1_pins, byt_score_i2c_mux),
434
-	PIN_GROUP_SIMPLE("i2c0_grp",
435
-			 byt_score_i2c0_pins, byt_score_i2c_mux),
436
-	PIN_GROUP_SIMPLE("ssp0_grp",
437
-			 byt_score_ssp0_pins, byt_score_ssp_mux),
438
-	PIN_GROUP_SIMPLE("ssp1_grp",
439
-			 byt_score_ssp1_pins, byt_score_ssp_mux),
440
-	PIN_GROUP_MIXED("sdcard_grp",
441
-			byt_score_sdcard_pins, byt_score_sdcard_mux),
442
-	PIN_GROUP_SIMPLE("sdio_grp",
443
-			 byt_score_sdio_pins, byt_score_sdio_mux),
444
-	PIN_GROUP_SIMPLE("emmc_grp",
445
-			 byt_score_emmc_pins, byt_score_emmc_mux),
446
-	PIN_GROUP_SIMPLE("lpc_grp",
447
-			 byt_score_ilb_lpc_pins, byt_score_lpc_mux),
448
-	PIN_GROUP_SIMPLE("sata_grp",
449
-			 byt_score_sata_pins, byt_score_sata_mux),
450
-	PIN_GROUP_SIMPLE("plt_clk0_grp",
451
-			 byt_score_plt_clk0_pins, byt_score_plt_clk_mux),
452
-	PIN_GROUP_SIMPLE("plt_clk1_grp",
453
-			 byt_score_plt_clk1_pins, byt_score_plt_clk_mux),
454
-	PIN_GROUP_SIMPLE("plt_clk2_grp",
455
-			 byt_score_plt_clk2_pins, byt_score_plt_clk_mux),
456
-	PIN_GROUP_SIMPLE("plt_clk3_grp",
457
-			 byt_score_plt_clk3_pins, byt_score_plt_clk_mux),
458
-	PIN_GROUP_SIMPLE("plt_clk4_grp",
459
-			 byt_score_plt_clk4_pins, byt_score_plt_clk_mux),
460
-	PIN_GROUP_SIMPLE("plt_clk5_grp",
461
-			 byt_score_plt_clk5_pins, byt_score_plt_clk_mux),
462
-	PIN_GROUP_SIMPLE("smbus_grp",
463
-			 byt_score_smbus_pins, byt_score_smbus_mux),
277
+static const struct intel_pingroup byt_score_groups[] = {
278
+	PIN_GROUP("uart1_grp", byt_score_uart1_pins, 1),
279
+	PIN_GROUP("uart2_grp", byt_score_uart2_pins, 1),
280
+	PIN_GROUP("pwm0_grp", byt_score_pwm0_pins, 1),
281
+	PIN_GROUP("pwm1_grp", byt_score_pwm1_pins, 1),
282
+	PIN_GROUP("ssp2_grp", byt_score_ssp2_pins, 1),
283
+	PIN_GROUP("sio_spi_grp", byt_score_sio_spi_pins, 1),
284
+	PIN_GROUP("i2c5_grp", byt_score_i2c5_pins, 1),
285
+	PIN_GROUP("i2c6_grp", byt_score_i2c6_pins, 1),
286
+	PIN_GROUP("i2c4_grp", byt_score_i2c4_pins, 1),
287
+	PIN_GROUP("i2c3_grp", byt_score_i2c3_pins, 1),
288
+	PIN_GROUP("i2c2_grp", byt_score_i2c2_pins, 1),
289
+	PIN_GROUP("i2c1_grp", byt_score_i2c1_pins, 1),
290
+	PIN_GROUP("i2c0_grp", byt_score_i2c0_pins, 1),
291
+	PIN_GROUP("ssp0_grp", byt_score_ssp0_pins, 1),
292
+	PIN_GROUP("ssp1_grp", byt_score_ssp1_pins, 1),
293
+	PIN_GROUP("sdcard_grp", byt_score_sdcard_pins, byt_score_sdcard_mux_values),
294
+	PIN_GROUP("sdio_grp", byt_score_sdio_pins, 1),
295
+	PIN_GROUP("emmc_grp", byt_score_emmc_pins, 1),
296
+	PIN_GROUP("lpc_grp", byt_score_ilb_lpc_pins, 1),
297
+	PIN_GROUP("sata_grp", byt_score_sata_pins, 1),
298
+	PIN_GROUP("plt_clk0_grp", byt_score_plt_clk0_pins, 1),
299
+	PIN_GROUP("plt_clk1_grp", byt_score_plt_clk1_pins, 1),
300
+	PIN_GROUP("plt_clk2_grp", byt_score_plt_clk2_pins, 1),
301
+	PIN_GROUP("plt_clk3_grp", byt_score_plt_clk3_pins, 1),
302
+	PIN_GROUP("plt_clk4_grp", byt_score_plt_clk4_pins, 1),
303
+	PIN_GROUP("plt_clk5_grp", byt_score_plt_clk5_pins, 1),
304
+	PIN_GROUP("smbus_grp", byt_score_smbus_pins, 1),
464305 };
465306 
466307 static const char * const byt_score_uart_groups[] = {
....@@ -494,10 +335,9 @@
494335 	"sdcard_grp", "sdio_grp", "emmc_grp", "lpc_grp", "sata_grp",
495336 	"plt_clk0_grp", "plt_clk1_grp", "plt_clk2_grp", "plt_clk3_grp",
496337 	"plt_clk4_grp", "plt_clk5_grp", "smbus_grp",
497
-
498338 };
499339 
500
-static const struct byt_function byt_score_functions[] = {
340
+static const struct intel_function byt_score_functions[] = {
501341 	FUNCTION("uart", byt_score_uart_groups),
502342 	FUNCTION("pwm", byt_score_pwm_groups),
503343 	FUNCTION("ssp", byt_score_ssp_groups),
....@@ -513,11 +353,11 @@
513353 	FUNCTION("gpio", byt_score_gpio_groups),
514354 };
515355 
516
-static const struct byt_community byt_score_communities[] = {
356
+static const struct intel_community byt_score_communities[] = {
517357 	COMMUNITY(0, BYT_NGPIO_SCORE, byt_score_pins_map),
518358 };
519359 
520
-static const struct byt_pinctrl_soc_data byt_score_soc_data = {
360
+static const struct intel_pinctrl_soc_data byt_score_soc_data = {
521361 	.uid		= BYT_SCORE_ACPI_UID,
522362 	.pins		= byt_score_pins,
523363 	.npins		= ARRAY_SIZE(byt_score_pins),
....@@ -586,38 +426,30 @@
586426 };
587427 
588428 static const unsigned int byt_sus_usb_over_current_pins[] = { 19, 20 };
589
-static const struct byt_simple_func_mux byt_sus_usb_oc_mux[] = {
590
-	SIMPLE_FUNC("usb", 0),
591
-	SIMPLE_FUNC("gpio", 1),
592
-};
429
+static const unsigned int byt_sus_usb_over_current_mode_values[] = { 0, 0 };
430
+static const unsigned int byt_sus_usb_over_current_gpio_mode_values[] = { 1, 1 };
593431 
594432 static const unsigned int byt_sus_usb_ulpi_pins[] = {
595433 	14, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43,
596434 };
597
-static const unsigned short byt_sus_usb_ulpi_mode_values[] = {
435
+static const unsigned int byt_sus_usb_ulpi_mode_values[] = {
598436 	2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
599437 };
600
-static const unsigned short byt_sus_usb_ulpi_gpio_mode_values[] = {
601
-	1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
602
-};
603
-static const struct byt_mixed_func_mux byt_sus_usb_ulpi_mux[] = {
604
-	MIXED_FUNC("usb", byt_sus_usb_ulpi_mode_values),
605
-	MIXED_FUNC("gpio", byt_sus_usb_ulpi_gpio_mode_values),
438
+static const unsigned int byt_sus_usb_ulpi_gpio_mode_values[] = {
439
+	1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
606440 };
607441 
608442 static const unsigned int byt_sus_pcu_spi_pins[] = { 21 };
609
-static const struct byt_simple_func_mux byt_sus_pcu_spi_mux[] = {
610
-	SIMPLE_FUNC("spi", 0),
611
-	SIMPLE_FUNC("gpio", 1),
612
-};
443
+static const unsigned int byt_sus_pcu_spi_mode_values[] = { 0 };
444
+static const unsigned int byt_sus_pcu_spi_gpio_mode_values[] = { 1 };
613445 
614
-static const struct byt_pingroup byt_sus_groups[] = {
615
-	PIN_GROUP_SIMPLE("usb_oc_grp",
616
-			byt_sus_usb_over_current_pins, byt_sus_usb_oc_mux),
617
-	PIN_GROUP_MIXED("usb_ulpi_grp",
618
-			byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_mux),
619
-	PIN_GROUP_SIMPLE("pcu_spi_grp",
620
-			byt_sus_pcu_spi_pins, byt_sus_pcu_spi_mux),
446
+static const struct intel_pingroup byt_sus_groups[] = {
447
+	PIN_GROUP("usb_oc_grp", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_mode_values),
448
+	PIN_GROUP("usb_ulpi_grp", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_mode_values),
449
+	PIN_GROUP("pcu_spi_grp", byt_sus_pcu_spi_pins, byt_sus_pcu_spi_mode_values),
450
+	PIN_GROUP("usb_oc_grp_gpio", byt_sus_usb_over_current_pins, byt_sus_usb_over_current_gpio_mode_values),
451
+	PIN_GROUP("usb_ulpi_grp_gpio", byt_sus_usb_ulpi_pins, byt_sus_usb_ulpi_gpio_mode_values),
452
+	PIN_GROUP("pcu_spi_grp_gpio", byt_sus_pcu_spi_pins, byt_sus_pcu_spi_gpio_mode_values),
621453 };
622454 
623455 static const char * const byt_sus_usb_groups[] = {
....@@ -625,20 +457,20 @@
625457 };
626458 static const char * const byt_sus_spi_groups[] = { "pcu_spi_grp" };
627459 static const char * const byt_sus_gpio_groups[] = {
628
-	"usb_oc_grp", "usb_ulpi_grp", "pcu_spi_grp",
460
+	"usb_oc_grp_gpio", "usb_ulpi_grp_gpio", "pcu_spi_grp_gpio",
629461 };
630462 
631
-static const struct byt_function byt_sus_functions[] = {
463
+static const struct intel_function byt_sus_functions[] = {
632464 	FUNCTION("usb", byt_sus_usb_groups),
633465 	FUNCTION("spi", byt_sus_spi_groups),
634466 	FUNCTION("gpio", byt_sus_gpio_groups),
635467 };
636468 
637
-static const struct byt_community byt_sus_communities[] = {
469
+static const struct intel_community byt_sus_communities[] = {
638470 	COMMUNITY(0, BYT_NGPIO_SUS, byt_sus_pins_map),
639471 };
640472 
641
-static const struct byt_pinctrl_soc_data byt_sus_soc_data = {
473
+static const struct intel_pinctrl_soc_data byt_sus_soc_data = {
642474 	.uid		= BYT_SUS_ACPI_UID,
643475 	.pins		= byt_sus_pins,
644476 	.npins		= ARRAY_SIZE(byt_sus_pins),
....@@ -651,47 +483,47 @@
651483 };
652484 
653485 static const struct pinctrl_pin_desc byt_ncore_pins[] = {
654
-	PINCTRL_PIN(0, "GPIO_NCORE0"),
655
-	PINCTRL_PIN(1, "GPIO_NCORE1"),
656
-	PINCTRL_PIN(2, "GPIO_NCORE2"),
657
-	PINCTRL_PIN(3, "GPIO_NCORE3"),
658
-	PINCTRL_PIN(4, "GPIO_NCORE4"),
659
-	PINCTRL_PIN(5, "GPIO_NCORE5"),
660
-	PINCTRL_PIN(6, "GPIO_NCORE6"),
661
-	PINCTRL_PIN(7, "GPIO_NCORE7"),
662
-	PINCTRL_PIN(8, "GPIO_NCORE8"),
663
-	PINCTRL_PIN(9, "GPIO_NCORE9"),
664
-	PINCTRL_PIN(10, "GPIO_NCORE10"),
665
-	PINCTRL_PIN(11, "GPIO_NCORE11"),
666
-	PINCTRL_PIN(12, "GPIO_NCORE12"),
667
-	PINCTRL_PIN(13, "GPIO_NCORE13"),
668
-	PINCTRL_PIN(14, "GPIO_NCORE14"),
669
-	PINCTRL_PIN(15, "GPIO_NCORE15"),
670
-	PINCTRL_PIN(16, "GPIO_NCORE16"),
671
-	PINCTRL_PIN(17, "GPIO_NCORE17"),
672
-	PINCTRL_PIN(18, "GPIO_NCORE18"),
673
-	PINCTRL_PIN(19, "GPIO_NCORE19"),
674
-	PINCTRL_PIN(20, "GPIO_NCORE20"),
675
-	PINCTRL_PIN(21, "GPIO_NCORE21"),
676
-	PINCTRL_PIN(22, "GPIO_NCORE22"),
677
-	PINCTRL_PIN(23, "GPIO_NCORE23"),
678
-	PINCTRL_PIN(24, "GPIO_NCORE24"),
679
-	PINCTRL_PIN(25, "GPIO_NCORE25"),
680
-	PINCTRL_PIN(26, "GPIO_NCORE26"),
681
-	PINCTRL_PIN(27, "GPIO_NCORE27"),
486
+	PINCTRL_PIN(0, "HV_DDI0_HPD"),
487
+	PINCTRL_PIN(1, "HV_DDI0_DDC_SDA"),
488
+	PINCTRL_PIN(2, "HV_DDI0_DDC_SCL"),
489
+	PINCTRL_PIN(3, "PANEL0_VDDEN"),
490
+	PINCTRL_PIN(4, "PANEL0_BKLTEN"),
491
+	PINCTRL_PIN(5, "PANEL0_BKLTCTL"),
492
+	PINCTRL_PIN(6, "HV_DDI1_HPD"),
493
+	PINCTRL_PIN(7, "HV_DDI1_DDC_SDA"),
494
+	PINCTRL_PIN(8, "HV_DDI1_DDC_SCL"),
495
+	PINCTRL_PIN(9, "PANEL1_VDDEN"),
496
+	PINCTRL_PIN(10, "PANEL1_BKLTEN"),
497
+	PINCTRL_PIN(11, "PANEL1_BKLTCTL"),
498
+	PINCTRL_PIN(12, "GP_INTD_DSI_TE1"),
499
+	PINCTRL_PIN(13, "HV_DDI2_DDC_SDA"),
500
+	PINCTRL_PIN(14, "HV_DDI2_DDC_SCL"),
501
+	PINCTRL_PIN(15, "GP_CAMERASB00"),
502
+	PINCTRL_PIN(16, "GP_CAMERASB01"),
503
+	PINCTRL_PIN(17, "GP_CAMERASB02"),
504
+	PINCTRL_PIN(18, "GP_CAMERASB03"),
505
+	PINCTRL_PIN(19, "GP_CAMERASB04"),
506
+	PINCTRL_PIN(20, "GP_CAMERASB05"),
507
+	PINCTRL_PIN(21, "GP_CAMERASB06"),
508
+	PINCTRL_PIN(22, "GP_CAMERASB07"),
509
+	PINCTRL_PIN(23, "GP_CAMERASB08"),
510
+	PINCTRL_PIN(24, "GP_CAMERASB09"),
511
+	PINCTRL_PIN(25, "GP_CAMERASB10"),
512
+	PINCTRL_PIN(26, "GP_CAMERASB11"),
513
+	PINCTRL_PIN(27, "GP_INTD_DSI_TE2"),
682514 };
683515 
684
-static unsigned const byt_ncore_pins_map[BYT_NGPIO_NCORE] = {
516
+static const unsigned int byt_ncore_pins_map[BYT_NGPIO_NCORE] = {
685517 	19, 18, 17, 20, 21, 22, 24, 25, 23, 16,
686518 	14, 15, 12, 26, 27, 1, 4, 8, 11, 0,
687519 	3, 6, 10, 13, 2, 5, 9, 7,
688520 };
689521 
690
-static const struct byt_community byt_ncore_communities[] = {
522
+static const struct intel_community byt_ncore_communities[] = {
691523 	COMMUNITY(0, BYT_NGPIO_NCORE, byt_ncore_pins_map),
692524 };
693525 
694
-static const struct byt_pinctrl_soc_data byt_ncore_soc_data = {
526
+static const struct intel_pinctrl_soc_data byt_ncore_soc_data = {
695527 	.uid		= BYT_NCORE_ACPI_UID,
696528 	.pins		= byt_ncore_pins,
697529 	.npins		= ARRAY_SIZE(byt_ncore_pins),
....@@ -699,23 +531,23 @@
699531 	.ncommunities	= ARRAY_SIZE(byt_ncore_communities),
700532 };
701533 
702
-static const struct byt_pinctrl_soc_data *byt_soc_data[] = {
534
+static const struct intel_pinctrl_soc_data *byt_soc_data[] = {
703535 	&byt_score_soc_data,
704536 	&byt_sus_soc_data,
705537 	&byt_ncore_soc_data,
706
-	NULL,
538
+	NULL
707539 };
708540 
709541 static DEFINE_RAW_SPINLOCK(byt_lock);
710542 
711
-static struct byt_community *byt_get_community(struct byt_gpio *vg,
712
-					       unsigned int pin)
543
+static struct intel_community *byt_get_community(struct intel_pinctrl *vg,
544
+						 unsigned int pin)
713545 {
714
-	struct byt_community *comm;
546
+	struct intel_community *comm;
715547 	int i;
716548 
717
-	for (i = 0; i < vg->soc_data->ncommunities; i++) {
718
-		comm = vg->communities_copy + i;
549
+	for (i = 0; i < vg->ncommunities; i++) {
550
+		comm = vg->communities + i;
719551 		if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base)
720552 			return comm;
721553 	}
....@@ -723,10 +555,10 @@
723555 	return NULL;
724556 }
725557 
726
-static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset,
558
+static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset,
727559 				  int reg)
728560 {
729
-	struct byt_community *comm = byt_get_community(vg, offset);
561
+	struct intel_community *comm = byt_get_community(vg, offset);
730562 	u32 reg_offset;
731563 
732564 	if (!comm)
....@@ -745,22 +577,22 @@
745577 		break;
746578 	}
747579 
748
-	return comm->reg_base + reg_offset + reg;
580
+	return comm->pad_regs + reg_offset + reg;
749581 }
750582 
751583 static int byt_get_groups_count(struct pinctrl_dev *pctldev)
752584 {
753
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
585
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
754586 
755
-	return vg->soc_data->ngroups;
587
+	return vg->soc->ngroups;
756588 }
757589 
758590 static const char *byt_get_group_name(struct pinctrl_dev *pctldev,
759591 				      unsigned int selector)
760592 {
761
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
593
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
762594 
763
-	return vg->soc_data->groups[selector].name;
595
+	return vg->soc->groups[selector].name;
764596 }
765597 
766598 static int byt_get_group_pins(struct pinctrl_dev *pctldev,
....@@ -768,10 +600,10 @@
768600 			      const unsigned int **pins,
769601 			      unsigned int *num_pins)
770602 {
771
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
603
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
772604 
773
-	*pins		= vg->soc_data->groups[selector].pins;
774
-	*num_pins	= vg->soc_data->groups[selector].npins;
605
+	*pins		= vg->soc->groups[selector].pins;
606
+	*num_pins	= vg->soc->groups[selector].npins;
775607 
776608 	return 0;
777609 }
....@@ -784,17 +616,17 @@
784616 
785617 static int byt_get_functions_count(struct pinctrl_dev *pctldev)
786618 {
787
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
619
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
788620 
789
-	return vg->soc_data->nfunctions;
621
+	return vg->soc->nfunctions;
790622 }
791623 
792624 static const char *byt_get_function_name(struct pinctrl_dev *pctldev,
793625 					 unsigned int selector)
794626 {
795
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
627
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
796628 
797
-	return vg->soc_data->functions[selector].name;
629
+	return vg->soc->functions[selector].name;
798630 }
799631 
800632 static int byt_get_function_groups(struct pinctrl_dev *pctldev,
....@@ -802,49 +634,17 @@
802634 				   const char * const **groups,
803635 				   unsigned int *num_groups)
804636 {
805
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
637
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
806638 
807
-	*groups		= vg->soc_data->functions[selector].groups;
808
-	*num_groups	= vg->soc_data->functions[selector].ngroups;
639
+	*groups		= vg->soc->functions[selector].groups;
640
+	*num_groups	= vg->soc->functions[selector].ngroups;
809641 
810642 	return 0;
811643 }
812644 
813
-static int byt_get_group_simple_mux(const struct byt_pingroup group,
814
-				    const char *func_name,
815
-				    unsigned short *func)
816
-{
817
-	int i;
818
-
819
-	for (i = 0; i < group.nfuncs; i++) {
820
-		if (!strcmp(group.simple_funcs[i].name, func_name)) {
821
-			*func = group.simple_funcs[i].func;
822
-			return 0;
823
-		}
824
-	}
825
-
826
-	return 1;
827
-}
828
-
829
-static int byt_get_group_mixed_mux(const struct byt_pingroup group,
830
-				   const char *func_name,
831
-				   const unsigned short **func)
832
-{
833
-	int i;
834
-
835
-	for (i = 0; i < group.nfuncs; i++) {
836
-		if (!strcmp(group.mixed_funcs[i].name, func_name)) {
837
-			*func = group.mixed_funcs[i].func_values;
838
-			return 0;
839
-		}
840
-	}
841
-
842
-	return 1;
843
-}
844
-
845
-static void byt_set_group_simple_mux(struct byt_gpio *vg,
846
-				     const struct byt_pingroup group,
847
-				     unsigned short func)
645
+static void byt_set_group_simple_mux(struct intel_pinctrl *vg,
646
+				     const struct intel_pingroup group,
647
+				     unsigned int func)
848648 {
849649 	unsigned long flags;
850650 	int i;
....@@ -857,7 +657,7 @@
857657 
858658 		padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG);
859659 		if (!padcfg0) {
860
-			dev_warn(&vg->pdev->dev,
660
+			dev_warn(vg->dev,
861661 				 "Group %s, pin %i not muxed (no padcfg0)\n",
862662 				 group.name, i);
863663 			continue;
....@@ -872,9 +672,9 @@
872672 	raw_spin_unlock_irqrestore(&byt_lock, flags);
873673 }
874674 
875
-static void byt_set_group_mixed_mux(struct byt_gpio *vg,
876
-				    const struct byt_pingroup group,
877
-				    const unsigned short *func)
675
+static void byt_set_group_mixed_mux(struct intel_pinctrl *vg,
676
+				    const struct intel_pingroup group,
677
+				    const unsigned int *func)
878678 {
879679 	unsigned long flags;
880680 	int i;
....@@ -887,7 +687,7 @@
887687 
888688 		padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG);
889689 		if (!padcfg0) {
890
-			dev_warn(&vg->pdev->dev,
690
+			dev_warn(vg->dev,
891691 				 "Group %s, pin %i not muxed (no padcfg0)\n",
892692 				 group.name, i);
893693 			continue;
....@@ -905,44 +705,36 @@
905705 static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector,
906706 		       unsigned int group_selector)
907707 {
908
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev);
909
-	const struct byt_function func = vg->soc_data->functions[func_selector];
910
-	const struct byt_pingroup group = vg->soc_data->groups[group_selector];
911
-	const unsigned short *mixed_func;
912
-	unsigned short simple_func;
913
-	int ret = 1;
708
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev);
709
+	const struct intel_function func = vg->soc->functions[func_selector];
710
+	const struct intel_pingroup group = vg->soc->groups[group_selector];
914711 
915
-	if (group.has_simple_funcs)
916
-		ret = byt_get_group_simple_mux(group, func.name, &simple_func);
917
-	else
918
-		ret = byt_get_group_mixed_mux(group, func.name, &mixed_func);
919
-
920
-	if (ret)
712
+	if (group.modes)
713
+		byt_set_group_mixed_mux(vg, group, group.modes);
714
+	else if (!strcmp(func.name, "gpio"))
921715 		byt_set_group_simple_mux(vg, group, BYT_DEFAULT_GPIO_MUX);
922
-	else if (group.has_simple_funcs)
923
-		byt_set_group_simple_mux(vg, group, simple_func);
924716 	else
925
-		byt_set_group_mixed_mux(vg, group, mixed_func);
717
+		byt_set_group_simple_mux(vg, group, group.mode);
926718 
927719 	return 0;
928720 }
929721 
930
-static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned offset)
722
+static u32 byt_get_gpio_mux(struct intel_pinctrl *vg, unsigned int offset)
931723 {
932724 	/* SCORE pin 92-93 */
933
-	if (!strcmp(vg->soc_data->uid, BYT_SCORE_ACPI_UID) &&
725
+	if (!strcmp(vg->soc->uid, BYT_SCORE_ACPI_UID) &&
934726 	    offset >= 92 && offset <= 93)
935
-		return 1;
727
+		return BYT_ALTER_GPIO_MUX;
936728 
937729 	/* SUS pin 11-21 */
938
-	if (!strcmp(vg->soc_data->uid, BYT_SUS_ACPI_UID) &&
730
+	if (!strcmp(vg->soc->uid, BYT_SUS_ACPI_UID) &&
939731 	    offset >= 11 && offset <= 21)
940
-		return 1;
732
+		return BYT_ALTER_GPIO_MUX;
941733 
942
-	return 0;
734
+	return BYT_DEFAULT_GPIO_MUX;
943735 }
944736 
945
-static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned int offset)
737
+static void byt_gpio_clear_triggering(struct intel_pinctrl *vg, unsigned int offset)
946738 {
947739 	void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
948740 	unsigned long flags;
....@@ -965,7 +757,7 @@
965757 				   struct pinctrl_gpio_range *range,
966758 				   unsigned int offset)
967759 {
968
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
760
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
969761 	void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
970762 	u32 value, gpio_mux;
971763 	unsigned long flags;
....@@ -988,13 +780,12 @@
988780 		value |= gpio_mux;
989781 		writel(value, reg);
990782 
991
-		dev_warn(&vg->pdev->dev, FW_BUG
992
-			 "pin %u forcibly re-configured as GPIO\n", offset);
783
+		dev_warn(vg->dev, FW_BUG "pin %u forcibly re-configured as GPIO\n", offset);
993784 	}
994785 
995786 	raw_spin_unlock_irqrestore(&byt_lock, flags);
996787 
997
-	pm_runtime_get(&vg->pdev->dev);
788
+	pm_runtime_get(vg->dev);
998789 
999790 	return 0;
1000791 }
....@@ -1003,13 +794,13 @@
1003794 				  struct pinctrl_gpio_range *range,
1004795 				  unsigned int offset)
1005796 {
1006
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
797
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
1007798 
1008799 	byt_gpio_clear_triggering(vg, offset);
1009
-	pm_runtime_put(&vg->pdev->dev);
800
+	pm_runtime_put(vg->dev);
1010801 }
1011802 
1012
-static void byt_gpio_direct_irq_check(struct byt_gpio *vg,
803
+static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg,
1013804 				      unsigned int offset)
1014805 {
1015806 	void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
....@@ -1021,7 +812,7 @@
1021812 	 * themselves in the foot.
1022813 	 */
1023814 	if (readl(conf_reg) & BYT_DIRECT_IRQ_EN)
1024
-		dev_info_once(&vg->pdev->dev, "Potential Error: Setting GPIO with direct_irq_en to output");
815
+		dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output");
1025816 }
1026817 
1027818 static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev,
....@@ -1029,7 +820,7 @@
1029820 				  unsigned int offset,
1030821 				  bool input)
1031822 {
1032
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
823
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
1033824 	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1034825 	unsigned long flags;
1035826 	u32 value;
....@@ -1105,7 +896,7 @@
1105896 static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset,
1106897 			      unsigned long *config)
1107898 {
1108
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
899
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
1109900 	enum pin_config_param param = pinconf_to_config_param(*config);
1110901 	void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
1111902 	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
....@@ -1190,7 +981,7 @@
1190981 			      unsigned long *configs,
1191982 			      unsigned int num_configs)
1192983 {
1193
-	struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev);
984
+	struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
1194985 	unsigned int param, arg;
1195986 	void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
1196987 	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
....@@ -1224,7 +1015,7 @@
12241015 			if (val & BYT_INPUT_EN) {
12251016 				val &= ~BYT_INPUT_EN;
12261017 				writel(val, val_reg);
1227
-				dev_warn(&vg->pdev->dev,
1018
+				dev_warn(vg->dev,
12281019 					 "pin %u forcibly set to input mode\n",
12291020 					 offset);
12301021 			}
....@@ -1246,7 +1037,7 @@
12461037 			if (val & BYT_INPUT_EN) {
12471038 				val &= ~BYT_INPUT_EN;
12481039 				writel(val, val_reg);
1249
-				dev_warn(&vg->pdev->dev,
1040
+				dev_warn(vg->dev,
12501041 					 "pin %u forcibly set to input mode\n",
12511042 					 offset);
12521043 			}
....@@ -1331,9 +1122,9 @@
13311122 	.owner		= THIS_MODULE,
13321123 };
13331124 
1334
-static int byt_gpio_get(struct gpio_chip *chip, unsigned offset)
1125
+static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset)
13351126 {
1336
-	struct byt_gpio *vg = gpiochip_get_data(chip);
1127
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
13371128 	void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
13381129 	unsigned long flags;
13391130 	u32 val;
....@@ -1345,9 +1136,9 @@
13451136 	return !!(val & BYT_LEVEL);
13461137 }
13471138 
1348
-static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1139
+static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
13491140 {
1350
-	struct byt_gpio *vg = gpiochip_get_data(chip);
1141
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
13511142 	void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
13521143 	unsigned long flags;
13531144 	u32 old_val;
....@@ -1366,7 +1157,7 @@
13661157 
13671158 static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
13681159 {
1369
-	struct byt_gpio *vg = gpiochip_get_data(chip);
1160
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
13701161 	void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
13711162 	unsigned long flags;
13721163 	u32 value;
....@@ -1379,16 +1170,16 @@
13791170 	raw_spin_unlock_irqrestore(&byt_lock, flags);
13801171 
13811172 	if (!(value & BYT_OUTPUT_EN))
1382
-		return GPIOF_DIR_OUT;
1173
+		return GPIO_LINE_DIRECTION_OUT;
13831174 	if (!(value & BYT_INPUT_EN))
1384
-		return GPIOF_DIR_IN;
1175
+		return GPIO_LINE_DIRECTION_IN;
13851176 
13861177 	return -EINVAL;
13871178 }
13881179 
13891180 static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
13901181 {
1391
-	struct byt_gpio *vg = gpiochip_get_data(chip);
1182
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
13921183 	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
13931184 	unsigned long flags;
13941185 	u32 reg;
....@@ -1413,7 +1204,7 @@
14131204 static int byt_gpio_direction_output(struct gpio_chip *chip,
14141205 				     unsigned int offset, int value)
14151206 {
1416
-	struct byt_gpio *vg = gpiochip_get_data(chip);
1207
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
14171208 	void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
14181209 	unsigned long flags;
14191210 	u32 reg;
....@@ -1437,12 +1228,12 @@
14371228 
14381229 static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
14391230 {
1440
-	struct byt_gpio *vg = gpiochip_get_data(chip);
1231
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
14411232 	int i;
14421233 	u32 conf0, val;
14431234 
1444
-	for (i = 0; i < vg->soc_data->npins; i++) {
1445
-		const struct byt_community *comm;
1235
+	for (i = 0; i < vg->soc->npins; i++) {
1236
+		const struct intel_community *comm;
14461237 		const char *pull_str = NULL;
14471238 		const char *pull = NULL;
14481239 		void __iomem *reg;
....@@ -1451,7 +1242,7 @@
14511242 		unsigned int pin;
14521243 
14531244 		raw_spin_lock_irqsave(&byt_lock, flags);
1454
-		pin = vg->soc_data->pins[i].number;
1245
+		pin = vg->soc->pins[i].number;
14551246 		reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
14561247 		if (!reg) {
14571248 			seq_printf(s,
....@@ -1547,8 +1338,8 @@
15471338 static void byt_irq_ack(struct irq_data *d)
15481339 {
15491340 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1550
-	struct byt_gpio *vg = gpiochip_get_data(gc);
1551
-	unsigned offset = irqd_to_hwirq(d);
1341
+	struct intel_pinctrl *vg = gpiochip_get_data(gc);
1342
+	unsigned int offset = irqd_to_hwirq(d);
15521343 	void __iomem *reg;
15531344 
15541345 	reg = byt_gpio_reg(vg, offset, BYT_INT_STAT_REG);
....@@ -1563,7 +1354,7 @@
15631354 static void byt_irq_mask(struct irq_data *d)
15641355 {
15651356 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1566
-	struct byt_gpio *vg = gpiochip_get_data(gc);
1357
+	struct intel_pinctrl *vg = gpiochip_get_data(gc);
15671358 
15681359 	byt_gpio_clear_triggering(vg, irqd_to_hwirq(d));
15691360 }
....@@ -1571,8 +1362,8 @@
15711362 static void byt_irq_unmask(struct irq_data *d)
15721363 {
15731364 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1574
-	struct byt_gpio *vg = gpiochip_get_data(gc);
1575
-	unsigned offset = irqd_to_hwirq(d);
1365
+	struct intel_pinctrl *vg = gpiochip_get_data(gc);
1366
+	unsigned int offset = irqd_to_hwirq(d);
15761367 	unsigned long flags;
15771368 	void __iomem *reg;
15781369 	u32 value;
....@@ -1587,13 +1378,13 @@
15871378 	switch (irqd_get_trigger_type(d)) {
15881379 	case IRQ_TYPE_LEVEL_HIGH:
15891380 		value |= BYT_TRIG_LVL;
1590
-		/* fall through */
1381
+		fallthrough;
15911382 	case IRQ_TYPE_EDGE_RISING:
15921383 		value |= BYT_TRIG_POS;
15931384 		break;
15941385 	case IRQ_TYPE_LEVEL_LOW:
15951386 		value |= BYT_TRIG_LVL;
1596
-		/* fall through */
1387
+		fallthrough;
15971388 	case IRQ_TYPE_EDGE_FALLING:
15981389 		value |= BYT_TRIG_NEG;
15991390 		break;
....@@ -1609,7 +1400,7 @@
16091400 
16101401 static int byt_irq_type(struct irq_data *d, unsigned int type)
16111402 {
1612
-	struct byt_gpio *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d));
1403
+	struct intel_pinctrl *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d));
16131404 	u32 offset = irqd_to_hwirq(d);
16141405 	u32 value;
16151406 	unsigned long flags;
....@@ -1645,20 +1436,10 @@
16451436 	return 0;
16461437 }
16471438 
1648
-static struct irq_chip byt_irqchip = {
1649
-	.name		= "BYT-GPIO",
1650
-	.irq_ack	= byt_irq_ack,
1651
-	.irq_mask	= byt_irq_mask,
1652
-	.irq_unmask	= byt_irq_unmask,
1653
-	.irq_set_type	= byt_irq_type,
1654
-	.flags		= IRQCHIP_SKIP_SET_WAKE,
1655
-};
1656
-
16571439 static void byt_gpio_irq_handler(struct irq_desc *desc)
16581440 {
16591441 	struct irq_data *data = irq_desc_get_irq_data(desc);
1660
-	struct byt_gpio *vg = gpiochip_get_data(
1661
-				irq_desc_get_handler_data(desc));
1442
+	struct intel_pinctrl *vg = gpiochip_get_data(irq_desc_get_handler_data(desc));
16621443 	struct irq_chip *chip = irq_data_get_irq_chip(data);
16631444 	u32 base, pin;
16641445 	void __iomem *reg;
....@@ -1670,7 +1451,7 @@
16701451 		reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG);
16711452 
16721453 		if (!reg) {
1673
-			dev_warn(&vg->pdev->dev,
1454
+			dev_warn(vg->dev,
16741455 				 "Pin %i: could not retrieve interrupt status register\n",
16751456 				 base);
16761457 			continue;
....@@ -1687,12 +1468,13 @@
16871468 	chip->irq_eoi(data);
16881469 }
16891470 
1690
-static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
1471
+static void byt_init_irq_valid_mask(struct gpio_chip *chip,
1472
+				    unsigned long *valid_mask,
1473
+				    unsigned int ngpios)
16911474 {
1692
-	struct gpio_chip *gc = &vg->chip;
1693
-	struct device *dev = &vg->pdev->dev;
1475
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
16941476 	void __iomem *reg;
1695
-	u32 base, value;
1477
+	u32 value;
16961478 	int i;
16971479 
16981480 	/*
....@@ -1700,12 +1482,12 @@
17001482 	 * do not use direct IRQ mode. This will prevent spurious
17011483 	 * interrupts from misconfigured pins.
17021484 	 */
1703
-	for (i = 0; i < vg->soc_data->npins; i++) {
1704
-		unsigned int pin = vg->soc_data->pins[i].number;
1485
+	for (i = 0; i < vg->soc->npins; i++) {
1486
+		unsigned int pin = vg->soc->pins[i].number;
17051487 
17061488 		reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
17071489 		if (!reg) {
1708
-			dev_warn(&vg->pdev->dev,
1490
+			dev_warn(vg->dev,
17091491 				 "Pin %i: could not retrieve conf0 register\n",
17101492 				 i);
17111493 			continue;
....@@ -1713,20 +1495,27 @@
17131495 
17141496 		value = readl(reg);
17151497 		if (value & BYT_DIRECT_IRQ_EN) {
1716
-			clear_bit(i, gc->irq.valid_mask);
1717
-			dev_dbg(dev, "excluding GPIO %d from IRQ domain\n", i);
1498
+			clear_bit(i, valid_mask);
1499
+			dev_dbg(vg->dev, "excluding GPIO %d from IRQ domain\n", i);
17181500 		} else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) {
17191501 			byt_gpio_clear_triggering(vg, i);
1720
-			dev_dbg(dev, "disabling GPIO %d\n", i);
1502
+			dev_dbg(vg->dev, "disabling GPIO %d\n", i);
17211503 		}
17221504 	}
1505
+}
1506
+
1507
+static int byt_gpio_irq_init_hw(struct gpio_chip *chip)
1508
+{
1509
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
1510
+	void __iomem *reg;
1511
+	u32 base, value;
17231512 
17241513 	/* clear interrupt status trigger registers */
1725
-	for (base = 0; base < vg->soc_data->npins; base += 32) {
1514
+	for (base = 0; base < vg->soc->npins; base += 32) {
17261515 		reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG);
17271516 
17281517 		if (!reg) {
1729
-			dev_warn(&vg->pdev->dev,
1518
+			dev_warn(vg->dev,
17301519 				 "Pin %i: could not retrieve irq status reg\n",
17311520 				 base);
17321521 			continue;
....@@ -1737,87 +1526,108 @@
17371526 		   might be misconfigured in bios */
17381527 		value = readl(reg);
17391528 		if (value)
1740
-			dev_err(&vg->pdev->dev,
1529
+			dev_err(vg->dev,
17411530 				"GPIO interrupt error, pins misconfigured. INT_STAT%u: 0x%08x\n",
17421531 				base / 32, value);
17431532 	}
1533
+
1534
+	return 0;
17441535 }
17451536 
1746
-static int byt_gpio_probe(struct byt_gpio *vg)
1537
+static int byt_gpio_add_pin_ranges(struct gpio_chip *chip)
17471538 {
1748
-	struct gpio_chip *gc;
1749
-	struct resource *irq_rc;
1539
+	struct intel_pinctrl *vg = gpiochip_get_data(chip);
1540
+	struct device *dev = vg->dev;
17501541 	int ret;
1542
+
1543
+	ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc->npins);
1544
+	if (ret)
1545
+		dev_err(dev, "failed to add GPIO pin range\n");
1546
+
1547
+	return ret;
1548
+}
1549
+
1550
+static int byt_gpio_probe(struct intel_pinctrl *vg)
1551
+{
1552
+	struct platform_device *pdev = to_platform_device(vg->dev);
1553
+	struct gpio_chip *gc;
1554
+	int irq, ret;
17511555 
17521556 	/* Set up gpio chip */
17531557 	vg->chip	= byt_gpio_chip;
17541558 	gc		= &vg->chip;
1755
-	gc->label	= dev_name(&vg->pdev->dev);
1559
+	gc->label	= dev_name(vg->dev);
17561560 	gc->base	= -1;
17571561 	gc->can_sleep	= false;
1758
-	gc->parent	= &vg->pdev->dev;
1759
-	gc->ngpio	= vg->soc_data->npins;
1760
-	gc->irq.need_valid_mask	= true;
1562
+	gc->add_pin_ranges = byt_gpio_add_pin_ranges;
1563
+	gc->parent	= vg->dev;
1564
+	gc->ngpio	= vg->soc->npins;
17611565 
17621566 #ifdef CONFIG_PM_SLEEP
1763
-	vg->saved_context = devm_kcalloc(&vg->pdev->dev, gc->ngpio,
1764
-				       sizeof(*vg->saved_context), GFP_KERNEL);
1567
+	vg->context.pads = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->context.pads),
1568
+					GFP_KERNEL);
1569
+	if (!vg->context.pads)
1570
+		return -ENOMEM;
17651571 #endif
1766
-	ret = devm_gpiochip_add_data(&vg->pdev->dev, gc, vg);
1767
-	if (ret) {
1768
-		dev_err(&vg->pdev->dev, "failed adding byt-gpio chip\n");
1769
-		return ret;
1770
-	}
1771
-
1772
-	ret = gpiochip_add_pin_range(&vg->chip, dev_name(&vg->pdev->dev),
1773
-				     0, 0, vg->soc_data->npins);
1774
-	if (ret) {
1775
-		dev_err(&vg->pdev->dev, "failed to add GPIO pin range\n");
1776
-		return ret;
1777
-	}
17781572 
17791573 	/* set up interrupts  */
1780
-	irq_rc = platform_get_resource(vg->pdev, IORESOURCE_IRQ, 0);
1781
-	if (irq_rc && irq_rc->start) {
1782
-		byt_gpio_irq_init_hw(vg);
1783
-		ret = gpiochip_irqchip_add(gc, &byt_irqchip, 0,
1784
-					   handle_bad_irq, IRQ_TYPE_NONE);
1785
-		if (ret) {
1786
-			dev_err(&vg->pdev->dev, "failed to add irqchip\n");
1787
-			return ret;
1788
-		}
1574
+	irq = platform_get_irq_optional(pdev, 0);
1575
+	if (irq > 0) {
1576
+		struct gpio_irq_chip *girq;
17891577 
1790
-		gpiochip_set_chained_irqchip(gc, &byt_irqchip,
1791
-					     (unsigned)irq_rc->start,
1792
-					     byt_gpio_irq_handler);
1578
+		vg->irqchip.name = "BYT-GPIO",
1579
+		vg->irqchip.irq_ack = byt_irq_ack,
1580
+		vg->irqchip.irq_mask = byt_irq_mask,
1581
+		vg->irqchip.irq_unmask = byt_irq_unmask,
1582
+		vg->irqchip.irq_set_type = byt_irq_type,
1583
+		vg->irqchip.flags = IRQCHIP_SKIP_SET_WAKE,
1584
+
1585
+		girq = &gc->irq;
1586
+		girq->chip = &vg->irqchip;
1587
+		girq->init_hw = byt_gpio_irq_init_hw;
1588
+		girq->init_valid_mask = byt_init_irq_valid_mask;
1589
+		girq->parent_handler = byt_gpio_irq_handler;
1590
+		girq->num_parents = 1;
1591
+		girq->parents = devm_kcalloc(vg->dev, girq->num_parents,
1592
+					     sizeof(*girq->parents), GFP_KERNEL);
1593
+		if (!girq->parents)
1594
+			return -ENOMEM;
1595
+		girq->parents[0] = irq;
1596
+		girq->default_type = IRQ_TYPE_NONE;
1597
+		girq->handler = handle_bad_irq;
1598
+	}
1599
+
1600
+	ret = devm_gpiochip_add_data(vg->dev, gc, vg);
1601
+	if (ret) {
1602
+		dev_err(vg->dev, "failed adding byt-gpio chip\n");
1603
+		return ret;
17931604 	}
17941605 
17951606 	return ret;
17961607 }
17971608 
1798
-static int byt_set_soc_data(struct byt_gpio *vg,
1799
-			    const struct byt_pinctrl_soc_data *soc_data)
1609
+static int byt_set_soc_data(struct intel_pinctrl *vg,
1610
+			    const struct intel_pinctrl_soc_data *soc)
18001611 {
1612
+	struct platform_device *pdev = to_platform_device(vg->dev);
18011613 	int i;
18021614 
1803
-	vg->soc_data = soc_data;
1804
-	vg->communities_copy = devm_kcalloc(&vg->pdev->dev,
1805
-					    soc_data->ncommunities,
1806
-					    sizeof(*vg->communities_copy),
1807
-					    GFP_KERNEL);
1808
-	if (!vg->communities_copy)
1615
+	vg->soc = soc;
1616
+
1617
+	vg->ncommunities = vg->soc->ncommunities;
1618
+	vg->communities = devm_kcalloc(vg->dev, vg->ncommunities,
1619
+				       sizeof(*vg->communities), GFP_KERNEL);
1620
+	if (!vg->communities)
18091621 		return -ENOMEM;
18101622 
1811
-	for (i = 0; i < soc_data->ncommunities; i++) {
1812
-		struct byt_community *comm = vg->communities_copy + i;
1813
-		struct resource *mem_rc;
1623
+	for (i = 0; i < vg->soc->ncommunities; i++) {
1624
+		struct intel_community *comm = vg->communities + i;
18141625 
1815
-		*comm = vg->soc_data->communities[i];
1626
+		*comm = vg->soc->communities[i];
18161627 
1817
-		mem_rc = platform_get_resource(vg->pdev, IORESOURCE_MEM, 0);
1818
-		comm->reg_base = devm_ioremap_resource(&vg->pdev->dev, mem_rc);
1819
-		if (IS_ERR(comm->reg_base))
1820
-			return PTR_ERR(comm->reg_base);
1628
+		comm->pad_regs = devm_platform_ioremap_resource(pdev, 0);
1629
+		if (IS_ERR(comm->pad_regs))
1630
+			return PTR_ERR(comm->pad_regs);
18211631 	}
18221632 
18231633 	return 0;
....@@ -1828,57 +1638,38 @@
18281638 	{ "INT33FC", (kernel_ulong_t)byt_soc_data },
18291639 	{ }
18301640 };
1831
-MODULE_DEVICE_TABLE(acpi, byt_gpio_acpi_match);
18321641 
18331642 static int byt_pinctrl_probe(struct platform_device *pdev)
18341643 {
1835
-	const struct byt_pinctrl_soc_data *soc_data = NULL;
1836
-	const struct byt_pinctrl_soc_data **soc_table;
1837
-	const struct acpi_device_id *acpi_id;
1838
-	struct acpi_device *acpi_dev;
1839
-	struct byt_gpio *vg;
1840
-	int i, ret;
1644
+	const struct intel_pinctrl_soc_data *soc_data;
1645
+	struct device *dev = &pdev->dev;
1646
+	struct intel_pinctrl *vg;
1647
+	int ret;
18411648 
1842
-	acpi_dev = ACPI_COMPANION(&pdev->dev);
1843
-	if (!acpi_dev)
1844
-		return -ENODEV;
1649
+	soc_data = intel_pinctrl_get_soc_data(pdev);
1650
+	if (IS_ERR(soc_data))
1651
+		return PTR_ERR(soc_data);
18451652 
1846
-	acpi_id = acpi_match_device(byt_gpio_acpi_match, &pdev->dev);
1847
-	if (!acpi_id)
1848
-		return -ENODEV;
1849
-
1850
-	soc_table = (const struct byt_pinctrl_soc_data **)acpi_id->driver_data;
1851
-
1852
-	for (i = 0; soc_table[i]; i++) {
1853
-		if (!strcmp(acpi_dev->pnp.unique_id, soc_table[i]->uid)) {
1854
-			soc_data = soc_table[i];
1855
-			break;
1856
-		}
1857
-	}
1858
-
1859
-	if (!soc_data)
1860
-		return -ENODEV;
1861
-
1862
-	vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
1653
+	vg = devm_kzalloc(dev, sizeof(*vg), GFP_KERNEL);
18631654 	if (!vg)
18641655 		return -ENOMEM;
18651656 
1866
-	vg->pdev = pdev;
1657
+	vg->dev = dev;
18671658 	ret = byt_set_soc_data(vg, soc_data);
18681659 	if (ret) {
1869
-		dev_err(&pdev->dev, "failed to set soc data\n");
1660
+		dev_err(dev, "failed to set soc data\n");
18701661 		return ret;
18711662 	}
18721663 
1873
-	vg->pctl_desc		= byt_pinctrl_desc;
1874
-	vg->pctl_desc.name	= dev_name(&pdev->dev);
1875
-	vg->pctl_desc.pins	= vg->soc_data->pins;
1876
-	vg->pctl_desc.npins	= vg->soc_data->npins;
1664
+	vg->pctldesc		= byt_pinctrl_desc;
1665
+	vg->pctldesc.name	= dev_name(dev);
1666
+	vg->pctldesc.pins	= vg->soc->pins;
1667
+	vg->pctldesc.npins	= vg->soc->npins;
18771668 
1878
-	vg->pctl_dev = devm_pinctrl_register(&pdev->dev, &vg->pctl_desc, vg);
1879
-	if (IS_ERR(vg->pctl_dev)) {
1880
-		dev_err(&pdev->dev, "failed to register pinctrl driver\n");
1881
-		return PTR_ERR(vg->pctl_dev);
1669
+	vg->pctldev = devm_pinctrl_register(dev, &vg->pctldesc, vg);
1670
+	if (IS_ERR(vg->pctldev)) {
1671
+		dev_err(dev, "failed to register pinctrl driver\n");
1672
+		return PTR_ERR(vg->pctldev);
18821673 	}
18831674 
18841675 	ret = byt_gpio_probe(vg);
....@@ -1886,7 +1677,7 @@
18861677 		return ret;
18871678 
18881679 	platform_set_drvdata(pdev, vg);
1889
-	pm_runtime_enable(&pdev->dev);
1680
+	pm_runtime_enable(dev);
18901681 
18911682 	return 0;
18921683 }
....@@ -1894,31 +1685,30 @@
18941685 #ifdef CONFIG_PM_SLEEP
18951686 static int byt_gpio_suspend(struct device *dev)
18961687 {
1897
-	struct platform_device *pdev = to_platform_device(dev);
1898
-	struct byt_gpio *vg = platform_get_drvdata(pdev);
1688
+	struct intel_pinctrl *vg = dev_get_drvdata(dev);
18991689 	unsigned long flags;
19001690 	int i;
19011691 
19021692 	raw_spin_lock_irqsave(&byt_lock, flags);
19031693 
1904
-	for (i = 0; i < vg->soc_data->npins; i++) {
1694
+	for (i = 0; i < vg->soc->npins; i++) {
19051695 		void __iomem *reg;
19061696 		u32 value;
1907
-		unsigned int pin = vg->soc_data->pins[i].number;
1697
+		unsigned int pin = vg->soc->pins[i].number;
19081698 
19091699 		reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
19101700 		if (!reg) {
1911
-			dev_warn(&vg->pdev->dev,
1701
+			dev_warn(vg->dev,
19121702 				 "Pin %i: could not retrieve conf0 register\n",
19131703 				 i);
19141704 			continue;
19151705 		}
19161706 		value = readl(reg) & BYT_CONF0_RESTORE_MASK;
1917
-		vg->saved_context[i].conf0 = value;
1707
+		vg->context.pads[i].conf0 = value;
19181708 
19191709 		reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
19201710 		value = readl(reg) & BYT_VAL_RESTORE_MASK;
1921
-		vg->saved_context[i].val = value;
1711
+		vg->context.pads[i].val = value;
19221712 	}
19231713 
19241714 	raw_spin_unlock_irqrestore(&byt_lock, flags);
....@@ -1927,30 +1717,29 @@
19271717 
19281718 static int byt_gpio_resume(struct device *dev)
19291719 {
1930
-	struct platform_device *pdev = to_platform_device(dev);
1931
-	struct byt_gpio *vg = platform_get_drvdata(pdev);
1720
+	struct intel_pinctrl *vg = dev_get_drvdata(dev);
19321721 	unsigned long flags;
19331722 	int i;
19341723 
19351724 	raw_spin_lock_irqsave(&byt_lock, flags);
19361725 
1937
-	for (i = 0; i < vg->soc_data->npins; i++) {
1726
+	for (i = 0; i < vg->soc->npins; i++) {
19381727 		void __iomem *reg;
19391728 		u32 value;
1940
-		unsigned int pin = vg->soc_data->pins[i].number;
1729
+		unsigned int pin = vg->soc->pins[i].number;
19411730 
19421731 		reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG);
19431732 		if (!reg) {
1944
-			dev_warn(&vg->pdev->dev,
1733
+			dev_warn(vg->dev,
19451734 				 "Pin %i: could not retrieve conf0 register\n",
19461735 				 i);
19471736 			continue;
19481737 		}
19491738 		value = readl(reg);
19501739 		if ((value & BYT_CONF0_RESTORE_MASK) !=
1951
-		     vg->saved_context[i].conf0) {
1740
+		     vg->context.pads[i].conf0) {
19521741 			value &= ~BYT_CONF0_RESTORE_MASK;
1953
-			value |= vg->saved_context[i].conf0;
1742
+			value |= vg->context.pads[i].conf0;
19541743 			writel(value, reg);
19551744 			dev_info(dev, "restored pin %d conf0 %#08x", i, value);
19561745 		}
....@@ -1958,11 +1747,11 @@
19581747 		reg = byt_gpio_reg(vg, pin, BYT_VAL_REG);
19591748 		value = readl(reg);
19601749 		if ((value & BYT_VAL_RESTORE_MASK) !=
1961
-		     vg->saved_context[i].val) {
1750
+		     vg->context.pads[i].val) {
19621751 			u32 v;
19631752 
19641753 			v = value & ~BYT_VAL_RESTORE_MASK;
1965
-			v |= vg->saved_context[i].val;
1754
+			v |= vg->context.pads[i].val;
19661755 			if (v != value) {
19671756 				writel(v, reg);
19681757 				dev_dbg(dev, "restored pin %d val %#08x\n",
....@@ -1999,9 +1788,8 @@
19991788 	.driver         = {
20001789 		.name			= "byt_gpio",
20011790 		.pm			= &byt_gpio_pm_ops,
1791
+		.acpi_match_table	= byt_gpio_acpi_match,
20021792 		.suppress_bind_attrs	= true,
2003
-
2004
-		.acpi_match_table = ACPI_PTR(byt_gpio_acpi_match),
20051793 	},
20061794 };
20071795