.. | .. |
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21 | 21 | #include <media/v4l2-fwnode.h> |
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22 | 22 | #include <media/v4l2-subdev.h> |
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23 | 23 | #include <media/v4l2-device.h> |
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| 24 | +#include <linux/phy/phy.h> |
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24 | 25 | #include "phy-rockchip-csi2-dphy-common.h" |
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| 26 | +#include "phy-rockchip-samsung-dcphy.h" |
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25 | 27 | |
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26 | 28 | struct sensor_async_subdev { |
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27 | 29 | struct v4l2_async_subdev asd; |
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.. | .. |
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29 | 31 | int lanes; |
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30 | 32 | }; |
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31 | 33 | |
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32 | | -static DEFINE_MUTEX(csi2dphy_dev_mutex); |
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33 | 34 | static LIST_HEAD(csi2dphy_device_list); |
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34 | 35 | |
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35 | 36 | static inline struct csi2_dphy *to_csi2_dphy(struct v4l2_subdev *subdev) |
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.. | .. |
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73 | 74 | struct v4l2_querymenu qm = { .id = V4L2_CID_LINK_FREQ, }; |
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74 | 75 | int ret; |
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75 | 76 | |
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| 77 | + if (!sensor_sd) |
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| 78 | + return -ENODEV; |
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| 79 | + |
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76 | 80 | link_freq = v4l2_ctrl_find(sensor_sd->ctrl_handler, V4L2_CID_LINK_FREQ); |
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77 | 81 | if (!link_freq) { |
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78 | 82 | v4l2_warn(sd, "No pixel rate control in subdev\n"); |
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.. | .. |
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101 | 105 | { |
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102 | 106 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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103 | 107 | struct v4l2_subdev *sensor_sd = get_remote_sensor(sd); |
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104 | | - struct csi2_sensor *sensor = sd_to_sensor(dphy, sensor_sd); |
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| 108 | + struct csi2_sensor *sensor; |
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105 | 109 | struct v4l2_mbus_config mbus; |
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| 110 | + struct rkmodule_bus_config bus_config; |
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106 | 111 | int ret; |
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107 | 112 | |
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108 | | - ret = v4l2_subdev_call(sensor_sd, video, g_mbus_config, &mbus); |
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| 113 | + if (!sensor_sd) |
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| 114 | + return -ENODEV; |
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| 115 | + sensor = sd_to_sensor(dphy, sensor_sd); |
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| 116 | + if (!sensor) |
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| 117 | + return -ENODEV; |
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| 118 | + |
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| 119 | + ret = v4l2_subdev_call(sensor_sd, pad, get_mbus_config, 0, &mbus); |
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109 | 120 | if (ret) |
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110 | 121 | return ret; |
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111 | 122 | |
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.. | .. |
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126 | 137 | default: |
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127 | 138 | return -EINVAL; |
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128 | 139 | } |
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129 | | - |
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130 | | - return 0; |
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| 140 | + if (dphy->drv_data->vendor == PHY_VENDOR_INNO) { |
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| 141 | + ret = v4l2_subdev_call(sensor_sd, core, ioctl, |
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| 142 | + RKMODULE_GET_BUS_CONFIG, &bus_config); |
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| 143 | + if (!ret) { |
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| 144 | + dev_info(dphy->dev, "phy_mode %d,lane %d\n", |
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| 145 | + bus_config.bus.phy_mode, bus_config.bus.lanes); |
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| 146 | + if (bus_config.bus.phy_mode == PHY_FULL_MODE) { |
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| 147 | + if (dphy->dphy_hw->drv_data->chip_id == CHIP_ID_RK3588 && |
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| 148 | + dphy->phy_index % 3 == 2) { |
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| 149 | + dev_err(dphy->dev, "%s dphy%d only use for PHY_SPLIT_23\n", |
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| 150 | + __func__, dphy->phy_index); |
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| 151 | + ret = -EINVAL; |
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| 152 | + } |
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| 153 | + dphy->lane_mode = LANE_MODE_FULL; |
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| 154 | + } else if (bus_config.bus.phy_mode == PHY_SPLIT_01) { |
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| 155 | + if (dphy->dphy_hw->drv_data->chip_id == CHIP_ID_RK3588_DCPHY) { |
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| 156 | + dev_err(dphy->dev, "%s The chip not support split mode\n", |
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| 157 | + __func__); |
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| 158 | + ret = -EINVAL; |
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| 159 | + } else if (dphy->phy_index % 3 == 2) { |
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| 160 | + dev_err(dphy->dev, "%s dphy%d only use for PHY_SPLIT_23\n", |
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| 161 | + __func__, dphy->phy_index); |
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| 162 | + ret = -EINVAL; |
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| 163 | + } else { |
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| 164 | + dphy->lane_mode = LANE_MODE_SPLIT; |
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| 165 | + } |
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| 166 | + } else if (bus_config.bus.phy_mode == PHY_SPLIT_23) { |
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| 167 | + if (dphy->dphy_hw->drv_data->chip_id == CHIP_ID_RK3588_DCPHY) { |
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| 168 | + dev_err(dphy->dev, "%s The chip not support split mode\n", |
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| 169 | + __func__); |
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| 170 | + ret = -EINVAL; |
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| 171 | + } else if (dphy->phy_index % 3 != 2) { |
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| 172 | + dev_err(dphy->dev, "%s dphy%d not support PHY_SPLIT_23\n", |
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| 173 | + __func__, dphy->phy_index); |
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| 174 | + ret = -EINVAL; |
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| 175 | + } else { |
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| 176 | + dphy->lane_mode = LANE_MODE_SPLIT; |
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| 177 | + } |
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| 178 | + } |
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| 179 | + if (!ret) |
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| 180 | + dphy->dphy_hw->lane_mode = dphy->lane_mode; |
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| 181 | + } else { |
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| 182 | + ret = 0; |
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| 183 | + } |
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| 184 | + } |
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| 185 | + if (dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) { |
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| 186 | + ret = v4l2_subdev_call(sensor_sd, core, ioctl, |
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| 187 | + RKMODULE_GET_CSI_DPHY_PARAM, |
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| 188 | + &dphy->dphy_param); |
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| 189 | + if (ret) { |
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| 190 | + dev_dbg(dphy->dev, "%s fail to get dphy param, used default value\n", |
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| 191 | + __func__); |
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| 192 | + ret = 0; |
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| 193 | + } |
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| 194 | + } |
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| 195 | + return ret; |
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131 | 196 | } |
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132 | 197 | |
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133 | 198 | static int csi2_dphy_s_stream_start(struct v4l2_subdev *sd) |
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134 | 199 | { |
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135 | 200 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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136 | 201 | struct csi2_dphy_hw *hw = dphy->dphy_hw; |
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| 202 | + struct samsung_mipi_dcphy *samsung_phy = dphy->samsung_phy; |
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137 | 203 | int ret = 0; |
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138 | 204 | |
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139 | 205 | if (dphy->is_streaming) |
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.. | .. |
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145 | 211 | |
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146 | 212 | csi2_dphy_update_sensor_mbus(sd); |
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147 | 213 | |
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148 | | - if (hw->stream_on) |
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149 | | - hw->stream_on(dphy, sd); |
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| 214 | + if (dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) { |
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| 215 | + if (samsung_phy && samsung_phy->stream_on) |
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| 216 | + samsung_phy->stream_on(dphy, sd); |
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| 217 | + } else { |
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| 218 | + if (hw->stream_on) |
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| 219 | + hw->stream_on(dphy, sd); |
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| 220 | + } |
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150 | 221 | |
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151 | 222 | dphy->is_streaming = true; |
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152 | 223 | |
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.. | .. |
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157 | 228 | { |
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158 | 229 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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159 | 230 | struct csi2_dphy_hw *hw = dphy->dphy_hw; |
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| 231 | + struct samsung_mipi_dcphy *samsung_phy = dphy->samsung_phy; |
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160 | 232 | |
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161 | 233 | if (!dphy->is_streaming) |
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162 | 234 | return 0; |
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163 | 235 | |
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164 | | - if (hw->stream_off) |
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165 | | - hw->stream_off(dphy, sd); |
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| 236 | + if (dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) { |
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| 237 | + if (samsung_phy && samsung_phy->stream_off) |
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| 238 | + samsung_phy->stream_off(dphy, sd); |
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| 239 | + } else { |
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| 240 | + if (hw->stream_off) |
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| 241 | + hw->stream_off(dphy, sd); |
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| 242 | + } |
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166 | 243 | |
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167 | 244 | dphy->is_streaming = false; |
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168 | 245 | |
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.. | .. |
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202 | 279 | } |
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203 | 280 | |
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204 | 281 | static int csi2_dphy_g_mbus_config(struct v4l2_subdev *sd, |
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205 | | - struct v4l2_mbus_config *config) |
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| 282 | + unsigned int pad_id, |
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| 283 | + struct v4l2_mbus_config *config) |
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206 | 284 | { |
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207 | 285 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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208 | 286 | struct v4l2_subdev *sensor_sd = get_remote_sensor(sd); |
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.. | .. |
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211 | 289 | if (!sensor_sd) |
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212 | 290 | return -ENODEV; |
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213 | 291 | sensor = sd_to_sensor(dphy, sensor_sd); |
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| 292 | + if (!sensor) |
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| 293 | + return -ENODEV; |
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214 | 294 | csi2_dphy_update_sensor_mbus(sd); |
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215 | 295 | *config = sensor->mbus; |
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216 | 296 | |
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.. | .. |
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233 | 313 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me); |
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234 | 314 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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235 | 315 | struct csi2_dphy_hw *hw = dphy->dphy_hw; |
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| 316 | + struct samsung_mipi_dcphy *samsung_phy = dphy->samsung_phy; |
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236 | 317 | |
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237 | | - if (hw) |
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238 | | - clk_bulk_disable_unprepare(hw->num_clks, hw->clks); |
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| 318 | + if (dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) { |
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| 319 | + if (samsung_phy) |
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| 320 | + clk_disable_unprepare(samsung_phy->pclk); |
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| 321 | + } else { |
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| 322 | + if (hw) |
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| 323 | + clk_bulk_disable_unprepare(hw->num_clks, hw->clks_bulk); |
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| 324 | + } |
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239 | 325 | |
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240 | 326 | return 0; |
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241 | 327 | } |
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.. | .. |
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246 | 332 | struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(me); |
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247 | 333 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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248 | 334 | struct csi2_dphy_hw *hw = dphy->dphy_hw; |
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| 335 | + struct samsung_mipi_dcphy *samsung_phy = dphy->samsung_phy; |
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249 | 336 | int ret; |
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250 | 337 | |
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251 | | - if (hw) { |
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252 | | - ret = clk_bulk_prepare_enable(hw->num_clks, hw->clks); |
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253 | | - if (ret) { |
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254 | | - dev_err(hw->dev, "failed to enable clks\n"); |
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255 | | - return ret; |
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| 338 | + if (dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) { |
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| 339 | + if (samsung_phy) |
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| 340 | + clk_prepare_enable(samsung_phy->pclk); |
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| 341 | + } else { |
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| 342 | + if (hw) { |
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| 343 | + ret = clk_bulk_prepare_enable(hw->num_clks, hw->clks_bulk); |
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| 344 | + if (ret) { |
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| 345 | + dev_err(hw->dev, "failed to enable clks\n"); |
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| 346 | + return ret; |
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| 347 | + } |
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256 | 348 | } |
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257 | 349 | } |
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258 | 350 | |
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.. | .. |
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266 | 358 | { |
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267 | 359 | struct csi2_dphy *dphy = to_csi2_dphy(sd); |
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268 | 360 | struct v4l2_subdev *sensor_sd = get_remote_sensor(sd); |
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269 | | - struct csi2_sensor *sensor = sd_to_sensor(dphy, sensor_sd); |
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| 361 | + struct csi2_sensor *sensor; |
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270 | 362 | int ret; |
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271 | 363 | /* |
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272 | 364 | * Do not allow format changes and just relay whatever |
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.. | .. |
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274 | 366 | */ |
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275 | 367 | if (!sensor_sd) |
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276 | 368 | return -ENODEV; |
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| 369 | + sensor = sd_to_sensor(dphy, sensor_sd); |
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| 370 | + if (!sensor) |
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| 371 | + return -ENODEV; |
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277 | 372 | ret = v4l2_subdev_call(sensor_sd, pad, get_fmt, NULL, fmt); |
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278 | | - if (!ret && fmt->pad == 0) |
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| 373 | + if (!ret && fmt->pad == 0 && fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) |
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279 | 374 | sensor->format = fmt->format; |
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280 | 375 | return ret; |
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281 | 376 | } |
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.. | .. |
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295 | 390 | |
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296 | 391 | static const struct v4l2_subdev_video_ops csi2_dphy_video_ops = { |
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297 | 392 | .g_frame_interval = csi2_dphy_g_frame_interval, |
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298 | | - .g_mbus_config = csi2_dphy_g_mbus_config, |
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299 | 393 | .s_stream = csi2_dphy_s_stream, |
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300 | 394 | }; |
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301 | 395 | |
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.. | .. |
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303 | 397 | .set_fmt = csi2_dphy_get_set_fmt, |
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304 | 398 | .get_fmt = csi2_dphy_get_set_fmt, |
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305 | 399 | .get_selection = csi2_dphy_get_selection, |
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| 400 | + .get_mbus_config = csi2_dphy_g_mbus_config, |
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306 | 401 | }; |
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307 | 402 | |
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308 | 403 | static const struct v4l2_subdev_ops csi2_dphy_subdev_ops = { |
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.. | .. |
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373 | 468 | notifier); |
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374 | 469 | struct csi2_sensor *sensor = sd_to_sensor(dphy, sd); |
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375 | 470 | |
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376 | | - sensor->sd = NULL; |
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| 471 | + if (sensor) |
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| 472 | + sensor->sd = NULL; |
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377 | 473 | } |
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378 | 474 | |
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379 | 475 | static const struct |
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.. | .. |
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395 | 491 | return -EINVAL; |
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396 | 492 | } |
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397 | 493 | |
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398 | | - if (vep->bus_type == V4L2_MBUS_CSI2) { |
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399 | | - config->type = V4L2_MBUS_CSI2; |
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| 494 | + if (vep->bus_type == V4L2_MBUS_CSI2_DPHY) { |
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| 495 | + config->type = V4L2_MBUS_CSI2_DPHY; |
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400 | 496 | config->flags = vep->bus.mipi_csi2.flags; |
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401 | 497 | s_asd->lanes = vep->bus.mipi_csi2.num_data_lanes; |
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| 498 | + } else if (vep->bus_type == V4L2_MBUS_CCP2) { |
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| 499 | + config->type = V4L2_MBUS_CCP2; |
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| 500 | + s_asd->lanes = vep->bus.mipi_csi1.data_lane; |
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402 | 501 | } else { |
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403 | 502 | dev_err(dev, "Only CSI2 type is currently supported\n"); |
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404 | 503 | return -EINVAL; |
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.. | .. |
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438 | 537 | if (ret < 0) |
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439 | 538 | return ret; |
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440 | 539 | |
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| 540 | + v4l2_async_notifier_init(&dphy->notifier); |
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| 541 | + |
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441 | 542 | ret = v4l2_async_notifier_parse_fwnode_endpoints_by_port( |
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442 | 543 | dphy->dev, &dphy->notifier, |
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443 | 544 | sizeof(struct sensor_async_subdev), 0, |
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444 | 545 | rockchip_csi2_dphy_fwnode_parse); |
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445 | 546 | if (ret < 0) |
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446 | 547 | return ret; |
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447 | | - |
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448 | | - if (!dphy->notifier.num_subdevs) |
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449 | | - return -ENODEV; /* no endpoint */ |
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450 | 548 | |
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451 | 549 | dphy->sd.subdev_notifier = &dphy->notifier; |
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452 | 550 | dphy->notifier.ops = &rockchip_csi2_dphy_async_ops; |
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.. | .. |
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461 | 559 | return v4l2_async_register_subdev(&dphy->sd); |
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462 | 560 | } |
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463 | 561 | |
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| 562 | +static int rockchip_csi2_dphy_attach_samsung_phy(struct csi2_dphy *dphy) |
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| 563 | +{ |
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| 564 | + struct device *dev = dphy->dev; |
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| 565 | + struct phy *dcphy; |
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| 566 | + struct samsung_mipi_dcphy *dphy_hw; |
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| 567 | + int ret = 0; |
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| 568 | + |
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| 569 | + dcphy = devm_phy_optional_get(dev, "dcphy"); |
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| 570 | + if (IS_ERR(dcphy)) { |
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| 571 | + ret = PTR_ERR(dcphy); |
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| 572 | + dev_err(dphy->dev, "failed to get mipi dcphy: %d\n", ret); |
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| 573 | + return ret; |
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| 574 | + } |
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| 575 | + |
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| 576 | + dphy_hw = phy_get_drvdata(dcphy); |
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| 577 | + dphy_hw->dphy_dev[dphy_hw->dphy_dev_num] = dphy; |
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| 578 | + dphy_hw->dphy_dev_num++; |
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| 579 | + dphy->samsung_phy = dphy_hw; |
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| 580 | + |
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| 581 | + return 0; |
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| 582 | +} |
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| 583 | + |
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| 584 | +static int rockchip_csi2_dphy_detach_samsung_phy(struct csi2_dphy *dphy) |
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| 585 | +{ |
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| 586 | + struct samsung_mipi_dcphy *dphy_hw = dphy->samsung_phy; |
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| 587 | + struct csi2_dphy *csi2_dphy = NULL; |
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| 588 | + int i; |
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| 589 | + |
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| 590 | + for (i = 0; i < dphy_hw->dphy_dev_num; i++) { |
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| 591 | + csi2_dphy = dphy_hw->dphy_dev[i]; |
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| 592 | + if (csi2_dphy && |
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| 593 | + csi2_dphy->phy_index == dphy->phy_index) { |
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| 594 | + dphy_hw->dphy_dev[i] = NULL; |
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| 595 | + dphy_hw->dphy_dev_num--; |
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| 596 | + break; |
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| 597 | + } |
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| 598 | + } |
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| 599 | + |
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| 600 | + return 0; |
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| 601 | +} |
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| 602 | + |
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464 | 603 | static int rockchip_csi2_dphy_attach_hw(struct csi2_dphy *dphy) |
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465 | 604 | { |
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466 | 605 | struct platform_device *plat_dev; |
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.. | .. |
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470 | 609 | enum csi2_dphy_lane_mode target_mode; |
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471 | 610 | int i; |
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472 | 611 | |
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473 | | - if (dphy->phy_index == 0) |
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| 612 | + if (dphy->phy_index % 3 == 0) |
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474 | 613 | target_mode = LANE_MODE_FULL; |
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475 | 614 | else |
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476 | 615 | target_mode = LANE_MODE_SPLIT; |
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.. | .. |
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547 | 686 | return 0; |
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548 | 687 | } |
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549 | 688 | |
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| 689 | +static struct dphy_drv_data rk3568_dphy_drv_data = { |
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| 690 | + .dev_name = "csi2dphy", |
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| 691 | + .vendor = PHY_VENDOR_INNO, |
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| 692 | +}; |
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| 693 | + |
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| 694 | +static struct dphy_drv_data rk3588_dcphy_drv_data = { |
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| 695 | + .dev_name = "csi2dcphy", |
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| 696 | + .vendor = PHY_VENDOR_SAMSUNG, |
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| 697 | +}; |
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| 698 | + |
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| 699 | +static struct rkmodule_csi_dphy_param rk3588_dcphy_param = { |
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| 700 | + .vendor = PHY_VENDOR_SAMSUNG, |
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| 701 | + .lp_vol_ref = 3, |
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| 702 | + .lp_hys_sw = {3, 0, 0, 0}, |
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| 703 | + .lp_escclk_pol_sel = {1, 0, 0, 0}, |
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| 704 | + .skew_data_cal_clk = {0, 3, 3, 3}, |
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| 705 | + .clk_hs_term_sel = 2, |
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| 706 | + .data_hs_term_sel = {2, 2, 2, 2}, |
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| 707 | + .reserved = {0}, |
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| 708 | +}; |
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| 709 | + |
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| 710 | +static struct dphy_drv_data rv1106_dphy_drv_data = { |
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| 711 | + .dev_name = "csi2dphy", |
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| 712 | + .vendor = PHY_VENDOR_INNO, |
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| 713 | +}; |
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| 714 | + |
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| 715 | +static struct dphy_drv_data rk3562_dphy_drv_data = { |
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| 716 | + .dev_name = "csi2dphy", |
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| 717 | + .vendor = PHY_VENDOR_INNO, |
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| 718 | +}; |
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| 719 | + |
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550 | 720 | static const struct of_device_id rockchip_csi2_dphy_match_id[] = { |
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551 | 721 | { |
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552 | 722 | .compatible = "rockchip,rk3568-csi2-dphy", |
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| 723 | + .data = &rk3568_dphy_drv_data, |
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| 724 | + }, |
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| 725 | + { |
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| 726 | + .compatible = "rockchip,rk3588-csi2-dcphy", |
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| 727 | + .data = &rk3588_dcphy_drv_data, |
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| 728 | + }, |
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| 729 | + { |
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| 730 | + .compatible = "rockchip,rv1106-csi2-dphy", |
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| 731 | + .data = &rv1106_dphy_drv_data, |
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| 732 | + }, |
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| 733 | + { |
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| 734 | + .compatible = "rockchip,rk3562-csi2-dphy", |
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| 735 | + .data = &rk3562_dphy_drv_data, |
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553 | 736 | }, |
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554 | 737 | {} |
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555 | 738 | }; |
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.. | .. |
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561 | 744 | const struct of_device_id *of_id; |
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562 | 745 | struct csi2_dphy *csi2dphy; |
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563 | 746 | struct v4l2_subdev *sd; |
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| 747 | + const struct dphy_drv_data *drv_data; |
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564 | 748 | int ret; |
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565 | 749 | |
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566 | 750 | csi2dphy = devm_kzalloc(dev, sizeof(*csi2dphy), GFP_KERNEL); |
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.. | .. |
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571 | 755 | of_id = of_match_device(rockchip_csi2_dphy_match_id, dev); |
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572 | 756 | if (!of_id) |
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573 | 757 | return -EINVAL; |
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574 | | - |
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575 | | - csi2dphy->phy_index = of_alias_get_id(dev->of_node, "csi2dphy"); |
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576 | | - if (csi2dphy->phy_index < 0 || csi2dphy->phy_index > 2) |
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| 758 | + drv_data = of_id->data; |
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| 759 | + csi2dphy->drv_data = drv_data; |
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| 760 | + csi2dphy->phy_index = of_alias_get_id(dev->of_node, drv_data->dev_name); |
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| 761 | + if (csi2dphy->phy_index < 0 || csi2dphy->phy_index >= PHY_MAX) |
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577 | 762 | csi2dphy->phy_index = 0; |
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578 | | - |
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579 | | - ret = rockchip_csi2_dphy_attach_hw(csi2dphy); |
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| 763 | + if (csi2dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) { |
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| 764 | + ret = rockchip_csi2_dphy_attach_samsung_phy(csi2dphy); |
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| 765 | + csi2dphy->dphy_param = rk3588_dcphy_param; |
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| 766 | + } else { |
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| 767 | + ret = rockchip_csi2_dphy_attach_hw(csi2dphy); |
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| 768 | + } |
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580 | 769 | if (ret) { |
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581 | 770 | dev_err(dev, |
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582 | 771 | "csi2 dphy hw can't be attached, register dphy%d failed!\n", |
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.. | .. |
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606 | 795 | |
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607 | 796 | detach_hw: |
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608 | 797 | mutex_destroy(&csi2dphy->mutex); |
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609 | | - rockchip_csi2_dphy_detach_hw(csi2dphy); |
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| 798 | + if (csi2dphy->drv_data->vendor == PHY_VENDOR_SAMSUNG) |
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| 799 | + rockchip_csi2_dphy_detach_samsung_phy(csi2dphy); |
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| 800 | + else |
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| 801 | + rockchip_csi2_dphy_detach_hw(csi2dphy); |
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610 | 802 | |
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611 | 803 | return 0; |
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612 | 804 | } |
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.. | .. |
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623 | 815 | mutex_destroy(&dphy->mutex); |
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624 | 816 | return 0; |
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625 | 817 | } |
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626 | | -static int __maybe_unused __rockchip_csi2dphy_clr_unready_dev(void) |
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627 | | -{ |
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628 | | - struct csi2_dphy *csi2dphy; |
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629 | | - |
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630 | | - mutex_lock(&csi2dphy_dev_mutex); |
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631 | | - list_for_each_entry(csi2dphy, &csi2dphy_device_list, list) |
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632 | | - v4l2_async_notifier_clr_unready_dev(&csi2dphy->notifier); |
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633 | | - mutex_unlock(&csi2dphy_dev_mutex); |
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634 | | - |
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635 | | - return 0; |
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636 | | -} |
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637 | | - |
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638 | | -static int rockchip_csi2dphy_clr_unready_dev_param_set(const char *val, |
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639 | | - const struct kernel_param *kp) |
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640 | | -{ |
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641 | | -#ifdef MODULE |
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642 | | - __rockchip_csi2dphy_clr_unready_dev(); |
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643 | | -#endif |
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644 | | - |
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645 | | - return 0; |
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646 | | -} |
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647 | | - |
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648 | | -module_param_call(clr_unready_dev, |
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649 | | - rockchip_csi2dphy_clr_unready_dev_param_set, |
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650 | | - NULL, NULL, 0200); |
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651 | | -MODULE_PARM_DESC(clr_unready_dev, "clear unready devices"); |
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652 | | - |
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653 | | -#ifndef MODULE |
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654 | | -static int __init rockchip_csi2_dphy_clr_unready_dev(void) |
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655 | | -{ |
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656 | | - __rockchip_csi2dphy_clr_unready_dev(); |
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657 | | - |
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658 | | - return 0; |
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659 | | -} |
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660 | | -late_initcall_sync(rockchip_csi2_dphy_clr_unready_dev); |
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661 | | -#endif |
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662 | 818 | |
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663 | 819 | static const struct dev_pm_ops rockchip_csi2_dphy_pm_ops = { |
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664 | 820 | SET_RUNTIME_PM_OPS(csi2_dphy_runtime_suspend, |
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.. | .. |
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674 | 830 | .of_match_table = rockchip_csi2_dphy_match_id, |
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675 | 831 | }, |
---|
676 | 832 | }; |
---|
677 | | -EXPORT_SYMBOL(rockchip_csi2_dphy_driver); |
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| 833 | + |
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| 834 | +int rockchip_csi2_dphy_init(void) |
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| 835 | +{ |
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| 836 | + return platform_driver_register(&rockchip_csi2_dphy_driver); |
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| 837 | +} |
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| 838 | + |
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| 839 | +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) |
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| 840 | +subsys_initcall(rockchip_csi2_dphy_init); |
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| 841 | +#else |
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| 842 | +#if !defined(CONFIG_VIDEO_REVERSE_IMAGE) |
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| 843 | +module_platform_driver(rockchip_csi2_dphy_driver); |
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| 844 | +#endif |
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| 845 | +#endif |
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678 | 846 | |
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679 | 847 | MODULE_AUTHOR("Rockchip Camera/ISP team"); |
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680 | 848 | MODULE_DESCRIPTION("Rockchip MIPI CSI2 DPHY driver"); |
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