hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/phy/rockchip/phy-rockchip-csi2-dphy-common.h
....@@ -8,9 +8,18 @@
88 #ifndef _PHY_ROCKCHIP_CSI2_DPHY_COMMON_H_
99 #define _PHY_ROCKCHIP_CSI2_DPHY_COMMON_H_
1010
11
+#include <linux/rk-camera-module.h>
12
+
13
+#define PHY_MAX 16
14
+#define MAX_DEV_NAME_LEN 32
15
+
1116 /* add new chip id in tail by time order */
1217 enum csi2_dphy_chip_id {
1318 CHIP_ID_RK3568 = 0x0,
19
+ CHIP_ID_RK3588 = 0x1,
20
+ CHIP_ID_RK3588_DCPHY = 0x2,
21
+ CHIP_ID_RV1106 = 0x3,
22
+ CHIP_ID_RK3562 = 0x4,
1423 };
1524
1625 enum csi2_dphy_rx_pads {
....@@ -46,11 +55,18 @@
4655 };
4756
4857 struct csi2_dphy_hw;
58
+struct samsung_mipi_dcphy;
59
+
60
+struct dphy_drv_data {
61
+ const char dev_name[MAX_DEV_NAME_LEN];
62
+ enum csi2_dphy_vendor vendor;
63
+};
4964
5065 struct csi2_dphy {
5166 struct device *dev;
5267 struct list_head list;
5368 struct csi2_dphy_hw *dphy_hw;
69
+ struct samsung_mipi_dcphy *samsung_phy;
5470 struct v4l2_async_notifier notifier;
5571 struct v4l2_subdev sd;
5672 struct mutex mutex; /* lock for updating protection */
....@@ -61,29 +77,35 @@
6177 int phy_index;
6278 bool is_streaming;
6379 enum csi2_dphy_lane_mode lane_mode;
80
+ const struct dphy_drv_data *drv_data;
81
+ struct rkmodule_csi_dphy_param dphy_param;
6482 };
6583
6684 struct dphy_hw_drv_data {
67
- const struct clk_bulk_data *clks;
68
- int num_clks;
6985 const struct hsfreq_range *hsfreq_ranges;
7086 int num_hsfreq_ranges;
87
+ const struct hsfreq_range *hsfreq_ranges_cphy;
88
+ int num_hsfreq_ranges_cphy;
7189 const struct grf_reg *grf_regs;
7290 const struct txrx_reg *txrx_regs;
7391 const struct csi2dphy_reg *csi2dphy_regs;
7492 void (*individual_init)(struct csi2_dphy_hw *hw);
93
+ int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
94
+ int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
7595 enum csi2_dphy_chip_id chip_id;
7696 };
7797
7898 struct csi2_dphy_hw {
7999 struct device *dev;
80100 struct regmap *regmap_grf;
101
+ struct regmap *regmap_sys_grf;
81102 const struct grf_reg *grf_regs;
82103 const struct txrx_reg *txrx_regs;
83104 const struct csi2dphy_reg *csi2dphy_regs;
84105 const struct dphy_hw_drv_data *drv_data;
85106 void __iomem *hw_base_addr;
86
- struct clk_bulk_data *clks;
107
+ struct clk_bulk_data *clks_bulk;
108
+ struct reset_control *rsts_bulk;
87109 struct csi2_dphy *dphy_dev[MAX_NUM_CSI2_DPHY];
88110 struct v4l2_subdev sd;
89111 struct mutex mutex; /* lock for updating protection */
....@@ -95,8 +117,11 @@
95117
96118 int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
97119 int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd);
120
+ int (*ttl_mode_enable)(struct csi2_dphy_hw *hw);
121
+ void (*ttl_mode_disable)(struct csi2_dphy_hw *hw);
98122 };
99123
100
-extern struct platform_driver rockchip_csi2_dphy_driver;
124
+int rockchip_csi2_dphy_hw_init(void);
125
+int rockchip_csi2_dphy_init(void);
101126
102127 #endif