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8 | 8 | #ifndef _PHY_ROCKCHIP_CSI2_DPHY_COMMON_H_ |
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9 | 9 | #define _PHY_ROCKCHIP_CSI2_DPHY_COMMON_H_ |
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10 | 10 | |
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| 11 | +#include <linux/rk-camera-module.h> |
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| 12 | + |
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| 13 | +#define PHY_MAX 16 |
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| 14 | +#define MAX_DEV_NAME_LEN 32 |
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| 15 | + |
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11 | 16 | /* add new chip id in tail by time order */ |
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12 | 17 | enum csi2_dphy_chip_id { |
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13 | 18 | CHIP_ID_RK3568 = 0x0, |
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| 19 | + CHIP_ID_RK3588 = 0x1, |
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| 20 | + CHIP_ID_RK3588_DCPHY = 0x2, |
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| 21 | + CHIP_ID_RV1106 = 0x3, |
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| 22 | + CHIP_ID_RK3562 = 0x4, |
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14 | 23 | }; |
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15 | 24 | |
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16 | 25 | enum csi2_dphy_rx_pads { |
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.. | .. |
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46 | 55 | }; |
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47 | 56 | |
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48 | 57 | struct csi2_dphy_hw; |
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| 58 | +struct samsung_mipi_dcphy; |
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| 59 | + |
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| 60 | +struct dphy_drv_data { |
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| 61 | + const char dev_name[MAX_DEV_NAME_LEN]; |
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| 62 | + enum csi2_dphy_vendor vendor; |
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| 63 | +}; |
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49 | 64 | |
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50 | 65 | struct csi2_dphy { |
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51 | 66 | struct device *dev; |
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52 | 67 | struct list_head list; |
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53 | 68 | struct csi2_dphy_hw *dphy_hw; |
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| 69 | + struct samsung_mipi_dcphy *samsung_phy; |
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54 | 70 | struct v4l2_async_notifier notifier; |
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55 | 71 | struct v4l2_subdev sd; |
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56 | 72 | struct mutex mutex; /* lock for updating protection */ |
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.. | .. |
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61 | 77 | int phy_index; |
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62 | 78 | bool is_streaming; |
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63 | 79 | enum csi2_dphy_lane_mode lane_mode; |
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| 80 | + const struct dphy_drv_data *drv_data; |
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| 81 | + struct rkmodule_csi_dphy_param dphy_param; |
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64 | 82 | }; |
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65 | 83 | |
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66 | 84 | struct dphy_hw_drv_data { |
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67 | | - const struct clk_bulk_data *clks; |
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68 | | - int num_clks; |
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69 | 85 | const struct hsfreq_range *hsfreq_ranges; |
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70 | 86 | int num_hsfreq_ranges; |
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| 87 | + const struct hsfreq_range *hsfreq_ranges_cphy; |
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| 88 | + int num_hsfreq_ranges_cphy; |
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71 | 89 | const struct grf_reg *grf_regs; |
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72 | 90 | const struct txrx_reg *txrx_regs; |
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73 | 91 | const struct csi2dphy_reg *csi2dphy_regs; |
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74 | 92 | void (*individual_init)(struct csi2_dphy_hw *hw); |
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| 93 | + int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd); |
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| 94 | + int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd); |
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75 | 95 | enum csi2_dphy_chip_id chip_id; |
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76 | 96 | }; |
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77 | 97 | |
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78 | 98 | struct csi2_dphy_hw { |
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79 | 99 | struct device *dev; |
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80 | 100 | struct regmap *regmap_grf; |
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| 101 | + struct regmap *regmap_sys_grf; |
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81 | 102 | const struct grf_reg *grf_regs; |
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82 | 103 | const struct txrx_reg *txrx_regs; |
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83 | 104 | const struct csi2dphy_reg *csi2dphy_regs; |
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84 | 105 | const struct dphy_hw_drv_data *drv_data; |
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85 | 106 | void __iomem *hw_base_addr; |
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86 | | - struct clk_bulk_data *clks; |
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| 107 | + struct clk_bulk_data *clks_bulk; |
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| 108 | + struct reset_control *rsts_bulk; |
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87 | 109 | struct csi2_dphy *dphy_dev[MAX_NUM_CSI2_DPHY]; |
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88 | 110 | struct v4l2_subdev sd; |
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89 | 111 | struct mutex mutex; /* lock for updating protection */ |
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.. | .. |
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95 | 117 | |
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96 | 118 | int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd); |
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97 | 119 | int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd); |
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| 120 | + int (*ttl_mode_enable)(struct csi2_dphy_hw *hw); |
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| 121 | + void (*ttl_mode_disable)(struct csi2_dphy_hw *hw); |
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98 | 122 | }; |
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99 | 123 | |
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100 | | -extern struct platform_driver rockchip_csi2_dphy_driver; |
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| 124 | +int rockchip_csi2_dphy_hw_init(void); |
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| 125 | +int rockchip_csi2_dphy_init(void); |
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101 | 126 | |
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102 | 127 | #endif |
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