hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/drivers/phy/marvell/phy-berlin-sata.c
....@@ -32,7 +32,7 @@
3232
3333 /* register 0x01 */
3434 #define REF_FREF_SEL_25 BIT(0)
35
-#define PHY_MODE_SATA (0x0 << 5)
35
+#define PHY_BERLIN_MODE_SATA (0x0 << 5)
3636
3737 /* register 0x02 */
3838 #define USE_MAX_PLL_RATE BIT(12)
....@@ -102,7 +102,8 @@
102102
103103 /* set PHY mode and ref freq to 25 MHz */
104104 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
105
- 0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
105
+ 0x00ff,
106
+ REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
106107
107108 /* set PHY up to 6 Gbps */
108109 phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
....@@ -231,14 +232,14 @@
231232 struct phy_berlin_desc *phy_desc;
232233
233234 if (of_property_read_u32(child, "reg", &phy_id)) {
234
- dev_err(dev, "missing reg property in node %s\n",
235
- child->name);
235
+ dev_err(dev, "missing reg property in node %pOFn\n",
236
+ child);
236237 ret = -EINVAL;
237238 goto put_child;
238239 }
239240
240241 if (phy_id >= ARRAY_SIZE(phy_berlin_power_down_bits)) {
241
- dev_err(dev, "invalid reg in node %s\n", child->name);
242
+ dev_err(dev, "invalid reg in node %pOFn\n", child);
242243 ret = -EINVAL;
243244 goto put_child;
244245 }