add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/spid.h
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@@ -1,15 +1,16 @@
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-/* SPDX-License-Identifier: GPL-2.0 */
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 /*
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  * SPI device spec header file
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  *
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- * Copyright (C) 1999-2019, Broadcom Corporation
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- * 
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+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
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+ *
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+ * Copyright (C) 1999-2017, Broadcom Corporation
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+ *
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  *      Unless you and Broadcom execute a separate written software license
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  * agreement governing use of this software, this software is licensed to you
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  * under the terms of the GNU General Public License version 2 (the "GPL"),
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  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
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  * following added to such license:
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- * 
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+ *
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  *      As a special exception, the copyright holders of this software give you
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  * permission to link this software with independent modules, and to copy and
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  * distribute the resulting executable under terms of your choice, provided that
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@@ -17,7 +18,7 @@
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  * the license of that module.  An independent module is a module which is not
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  * derived from this software.  The special exception does not apply to any
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  * modifications of the software.
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- * 
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+ *
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  *      Notwithstanding the above, under no circumstances may you combine this
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  * software in any way with any other Broadcom software provided under a license
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  * other than the GPL, without Broadcom's express prior written consent.
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@@ -100,6 +101,10 @@
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 #define RESET_ON_BT_BP_RESET	0x8	/* enable reset for BT backplane */
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 #define RESET_SPI		0x80	/* reset the above enabled logic */
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+/* Bit mask for card capability */
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+#define SPID_CHIPID_PRESENT		0x20	/* duplicate of cardcapability chipid present */
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+#define SPID_SECURE_MODE		0x40	/* duplicate of cardcapability secure mode */
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+
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 /* Bit mask for SPID_INTR_REG device register */
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 #define DATA_UNAVAILABLE	0x0001	/* Requested data not available; Clear by writing a "1" */
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 #define F2_F3_FIFO_RD_UNDERFLOW	0x0002
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@@ -163,7 +168,12 @@
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 #define SPI_FUNC_2		2
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 #define SPI_FUNC_3		3
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-#define WAIT_F2RXFIFORDY	100
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-#define WAIT_F2RXFIFORDY_DELAY	20
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+#ifdef BCMQT
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+#define WAIT_F2RXFIFORDY        200
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+#define WAIT_F2RXFIFORDY_DELAY  100
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+#else
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+#define WAIT_F2RXFIFORDY        100
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+#define WAIT_F2RXFIFORDY_DELAY  20
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+#endif // endif
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 #endif /* _SPI_H */