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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/sdiovar.h
....@@ -1,16 +1,17 @@
1
-/* SPDX-License-Identifier: GPL-2.0 */
21 /*
32  * Structure used by apps whose drivers access SDIO drivers.
43  * Pulled out separately so dhdu and wlu can both use it.
54  *
6
- * Copyright (C) 1999-2019, Broadcom Corporation
7
- * 
5
+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
6
+ *
7
+ * Copyright (C) 1999-2017, Broadcom Corporation
8
+ *
89  *      Unless you and Broadcom execute a separate written software license
910  * agreement governing use of this software, this software is licensed to you
1011  * under the terms of the GNU General Public License version 2 (the "GPL"),
1112  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
1213  * following added to such license:
13
- * 
14
+ *
1415  *      As a special exception, the copyright holders of this software give you
1516  * permission to link this software with independent modules, and to copy and
1617  * distribute the resulting executable under terms of your choice, provided that
....@@ -18,7 +19,7 @@
1819  * the license of that module.  An independent module is a module which is not
1920  * derived from this software.  The special exception does not apply to any
2021  * modifications of the software.
21
- * 
22
+ *
2223  *      Notwithstanding the above, under no circumstances may you combine this
2324  * software in any way with any other Broadcom software provided under a license
2425  * other than the GPL, without Broadcom's express prior written consent.
....@@ -26,17 +27,13 @@
2627  *
2728  * <<Broadcom-WL-IPTag/Open:>>
2829  *
29
- * $Id: sdiovar.h 514727 2014-11-12 03:02:48Z $
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+ * $Id: sdiovar.h 660496 2016-09-20 19:28:50Z $
3031  */
3132 
3233 #ifndef _sdiovar_h_
3334 #define _sdiovar_h_
3435 
3536 #include <typedefs.h>
36
-
37
-/* require default structure packing */
38
-#define BWL_DEFAULT_PACKING
39
-#include <packed_section_start.h>
4037 
4138 typedef struct sdreg {
4239 	int func;
....@@ -56,7 +53,73 @@
5653 
5754 #define NUM_PREV_TRANSACTIONS	16
5855 
56
+#ifdef BCMSPI
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+/* Error statistics for gSPI */
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+struct spierrstats_t {
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+	uint32  dna;	/* The requested data is not available. */
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+	uint32  rdunderflow;	/* FIFO underflow happened due to current (F2, F3) rd command */
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+	uint32  wroverflow;	/* FIFO underflow happened due to current (F1, F2, F3) wr command */
5962 
60
-#include <packed_section_end.h>
63
+	uint32  f2interrupt;	/* OR of all F2 related intr status bits. */
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+	uint32  f3interrupt;	/* OR of all F3 related intr status bits. */
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+
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+	uint32  f2rxnotready;	/* F2 FIFO is not ready to receive data (FIFO empty) */
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+	uint32  f3rxnotready;	/* F3 FIFO is not ready to receive data (FIFO empty) */
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+
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+	uint32  hostcmddataerr;	/* Error in command or host data, detected by CRC/checksum
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+	                         * (optional)
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+	                         */
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+	uint32  f2pktavailable;	/* Packet is available in F2 TX FIFO */
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+	uint32  f3pktavailable;	/* Packet is available in F2 TX FIFO */
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+
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+	uint32	dstatus[NUM_PREV_TRANSACTIONS];	/* dstatus bits of last 16 gSPI transactions */
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+	uint32  spicmd[NUM_PREV_TRANSACTIONS];
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+};
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+#endif /* BCMSPI */
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+
80
+typedef struct sdio_bus_metrics {
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+	uint32 active_dur;	/* msecs */
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+
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+	/* Generic */
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+	uint32 data_intr_cnt;	/* data interrupt counter */
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+	uint32 mb_intr_cnt;	/* mailbox interrupt counter */
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+	uint32 error_intr_cnt;	/* error interrupt counter */
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+	uint32 wakehost_cnt;	/* counter for OOB wakehost */
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+
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+	/* DS forcewake */
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+	uint32 ds_wake_on_cnt;	/* counter for (clock) ON   */
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+	uint32 ds_wake_on_dur;	/* duration for (clock) ON) */
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+	uint32 ds_wake_off_cnt;	/* counter for (clock) OFF  */
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+	uint32 ds_wake_off_dur;	/* duration for (clock) OFF */
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+
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+	/* DS_D0 state */
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+	uint32 ds_d0_cnt;	/* counter for DS_D0 state */
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+	uint32 ds_d0_dur;	/* duration for DS_D0 state */
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+
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+	/* DS_D3 state */
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+	uint32 ds_d3_cnt;	/* counter for DS_D3 state */
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+	uint32 ds_d3_dur;	/* duration for DS_D3 state */
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+
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+	/* DS DEV_WAKE */
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+	uint32 ds_dw_assrt_cnt;		/* counter for DW_ASSERT */
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+	uint32 ds_dw_dassrt_cnt;	/* counter for DW_DASSERT */
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+
107
+	/* DS mailbox signals */
108
+	uint32 ds_tx_dsreq_cnt;		/* counter for tx HMB_DATA_DSREQ */
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+	uint32 ds_tx_dsexit_cnt;	/* counter for tx HMB_DATA_DSEXIT */
110
+	uint32 ds_tx_d3ack_cnt;		/* counter for tx HMB_DATA_D3ACK */
111
+	uint32 ds_tx_d3exit_cnt;	/* counter for tx HMB_DATA_D3EXIT */
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+	uint32 ds_rx_dsack_cnt;		/* counter for rx SMB_DATA_DSACK */
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+	uint32 ds_rx_dsnack_cnt;	/* counter for rx SMB_DATA_DSNACK */
114
+	uint32 ds_rx_d3inform_cnt;	/* counter for rx SMB_DATA_D3INFORM */
115
+} sdio_bus_metrics_t;
116
+
117
+/* Bus interface info for SDIO */
118
+typedef struct wl_pwr_sdio_stats {
119
+	uint16 type;	     /* WL_PWRSTATS_TYPE_SDIO */
120
+	uint16 len;	     /* Up to 4K-1, top 4 bits are reserved */
121
+
122
+	sdio_bus_metrics_t sdio;	/* stats from SDIO bus driver */
123
+} wl_pwr_sdio_stats_t;
61124 
62125 #endif /* _sdiovar_h_ */