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1 | | -/* SPDX-License-Identifier: GPL-2.0 */ |
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2 | 1 | /* |
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3 | 2 | * Broadcom SiliconBackplane hardware register definitions. |
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4 | 3 | * |
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5 | | - * Copyright (C) 1999-2019, Broadcom Corporation |
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6 | | - * |
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| 4 | + * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation |
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| 5 | + * |
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| 6 | + * Copyright (C) 1999-2017, Broadcom Corporation |
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| 7 | + * |
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7 | 8 | * Unless you and Broadcom execute a separate written software license |
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8 | 9 | * agreement governing use of this software, this software is licensed to you |
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9 | 10 | * under the terms of the GNU General Public License version 2 (the "GPL"), |
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10 | 11 | * available at http://www.broadcom.com/licenses/GPLv2.php, with the |
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11 | 12 | * following added to such license: |
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12 | | - * |
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| 13 | + * |
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13 | 14 | * As a special exception, the copyright holders of this software give you |
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14 | 15 | * permission to link this software with independent modules, and to copy and |
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15 | 16 | * distribute the resulting executable under terms of your choice, provided that |
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17 | 18 | * the license of that module. An independent module is a module which is not |
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18 | 19 | * derived from this software. The special exception does not apply to any |
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19 | 20 | * modifications of the software. |
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20 | | - * |
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| 21 | + * |
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21 | 22 | * Notwithstanding the above, under no circumstances may you combine this |
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22 | 23 | * software in any way with any other Broadcom software provided under a license |
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23 | 24 | * other than the GPL, without Broadcom's express prior written consent. |
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25 | 26 | * |
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26 | 27 | * <<Broadcom-WL-IPTag/Open:>> |
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27 | 28 | * |
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28 | | - * $Id: sbconfig.h 530150 2015-01-29 08:43:40Z $ |
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| 29 | + * $Id: sbconfig.h 654158 2016-08-11 09:30:01Z $ |
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29 | 30 | */ |
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30 | 31 | |
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31 | 32 | #ifndef _SBCONFIG_H |
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36 | 37 | #define _PADLINE(line) pad ## line |
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37 | 38 | #define _XSTR(line) _PADLINE(line) |
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38 | 39 | #define PAD _XSTR(__LINE__) |
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39 | | -#endif |
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| 40 | +#endif // endif |
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40 | 41 | |
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41 | | -/* enumeration in SB is based on the premise that cores are contiguos in the |
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| 42 | +/* enumeration in SB is based on the premise that cores are contiguous in the |
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42 | 43 | * enumeration space. |
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43 | 44 | */ |
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44 | 45 | #define SB_BUS_SIZE 0x10000 /**< Each bus gets 64Kbytes for cores */ |
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45 | | -#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE) |
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| 46 | +#define SB_BUS_BASE(sih, b) (SI_ENUM_BASE(sih) + (b) * SB_BUS_SIZE) |
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46 | 47 | #define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) /**< Max cores per bus */ |
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47 | 48 | |
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48 | 49 | /* |
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