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1 | | -/* SPDX-License-Identifier: GPL-2.0 */ |
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2 | 1 | /* |
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3 | 2 | * HND SiliconBackplane PMU support. |
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4 | 3 | * |
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5 | | - * Copyright (C) 1999-2019, Broadcom Corporation |
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6 | | - * |
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| 4 | + * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation |
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| 5 | + * |
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| 6 | + * Copyright (C) 1999-2017, Broadcom Corporation |
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| 7 | + * |
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7 | 8 | * Unless you and Broadcom execute a separate written software license |
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8 | 9 | * agreement governing use of this software, this software is licensed to you |
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9 | 10 | * under the terms of the GNU General Public License version 2 (the "GPL"), |
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10 | 11 | * available at http://www.broadcom.com/licenses/GPLv2.php, with the |
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11 | 12 | * following added to such license: |
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12 | | - * |
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| 13 | + * |
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13 | 14 | * As a special exception, the copyright holders of this software give you |
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14 | 15 | * permission to link this software with independent modules, and to copy and |
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15 | 16 | * distribute the resulting executable under terms of your choice, provided that |
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.. | .. |
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17 | 18 | * the license of that module. An independent module is a module which is not |
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18 | 19 | * derived from this software. The special exception does not apply to any |
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19 | 20 | * modifications of the software. |
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20 | | - * |
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| 21 | + * |
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21 | 22 | * Notwithstanding the above, under no circumstances may you combine this |
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22 | 23 | * software in any way with any other Broadcom software provided under a license |
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23 | 24 | * other than the GPL, without Broadcom's express prior written consent. |
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.. | .. |
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25 | 26 | * |
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26 | 27 | * <<Broadcom-WL-IPTag/Open:>> |
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27 | 28 | * |
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28 | | - * $Id: hndpmu.h 530150 2015-01-29 08:43:40Z $ |
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| 29 | + * $Id: hndpmu.h 700376 2017-05-18 22:55:43Z $ |
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29 | 30 | */ |
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30 | 31 | |
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31 | 32 | #ifndef _hndpmu_h_ |
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.. | .. |
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34 | 35 | #include <typedefs.h> |
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35 | 36 | #include <osl_decl.h> |
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36 | 37 | #include <siutils.h> |
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| 38 | +#include <sbchipc.h> |
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37 | 39 | |
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| 40 | +extern uint32 si_pmu_rsrc_macphy_clk_deps(si_t *sih, osl_t *osh, int maccore_index); |
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| 41 | +extern uint32 si_pmu_rsrc_ht_avail_clk_deps(si_t *sih, osl_t *osh); |
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38 | 42 | |
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39 | 43 | extern void si_pmu_otp_power(si_t *sih, osl_t *osh, bool on, uint32* min_res_mask); |
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40 | 44 | extern void si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength); |
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41 | 45 | |
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42 | | -extern void si_pmu_minresmask_htavail_set(si_t *sih, osl_t *osh, bool set_clear); |
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43 | 46 | extern void si_pmu_slow_clk_reinit(si_t *sih, osl_t *osh); |
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44 | 47 | extern void si_pmu_avbtimer_enable(si_t *sih, osl_t *osh, bool set_flag); |
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45 | | - |
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| 48 | +extern uint32 si_pmu_dump_pmucap_binary(si_t *sih, uchar *p); |
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| 49 | +extern uint32 si_pmu_dump_buf_size_pmucap(si_t *sih); |
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| 50 | +extern int si_pmu_wait_for_steady_state(si_t *sih, osl_t *osh, pmuregs_t *pmu); |
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| 51 | +extern uint32 si_pmu_wake_bit_offset(si_t *sih); |
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| 52 | +#if defined(BCMULP) |
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| 53 | +int si_pmu_ulp_register(si_t *sih); |
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| 54 | +extern void si_pmu_ulp_chipconfig(si_t *sih, osl_t *osh); |
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| 55 | +extern void si_pmu_ulp_ilp_config(si_t *sih, osl_t *osh, uint32 ilp_period); |
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| 56 | +extern void si_pmu_ds1_res_init(si_t *sih, osl_t *osh); |
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| 57 | +#endif /* BCMULP */ |
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| 58 | +extern uint32 si_pmu_get_pmutimer(si_t *sih); |
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| 59 | +extern void si_switch_pmu_dependency(si_t *sih, uint mode); |
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| 60 | +extern void si_pmu_set_min_res_mask(si_t *sih, osl_t *osh, uint min_res_mask); |
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| 61 | +extern void si_pmu_set_mac_rsrc_req(si_t *sih, int macunit); |
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| 62 | +extern bool si_pmu_fast_lpo_enable_pcie(si_t *sih); |
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| 63 | +extern bool si_pmu_fast_lpo_enable_pmu(si_t *sih); |
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| 64 | +extern void si_pmu_chipcontrol_xtal_settings_4369(si_t *sih); |
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| 65 | +extern uint32 si_cur_pmu_time(si_t *sih); |
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| 66 | +extern bool si_pmu_cap_fast_lpo(si_t *sih); |
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| 67 | +extern int si_pmu_fast_lpo_disable(si_t *sih); |
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| 68 | +#ifdef BCMPMU_STATS |
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| 69 | +extern void si_pmustatstimer_init(si_t *sih); |
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| 70 | +extern void si_pmustatstimer_dump(si_t *sih); |
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| 71 | +extern void si_pmustatstimer_start(si_t *sih, uint8 timerid); |
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| 72 | +extern void si_pmustatstimer_stop(si_t *sih, uint8 timerid); |
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| 73 | +extern void si_pmustatstimer_clear(si_t *sih, uint8 timerid); |
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| 74 | +extern void si_pmustatstimer_clear_overflow(si_t *sih); |
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| 75 | +extern uint32 si_pmustatstimer_read(si_t *sih, uint8 timerid); |
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| 76 | +extern void si_pmustatstimer_cfg_src_num(si_t *sih, uint8 src_num, uint8 timerid); |
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| 77 | +extern void si_pmustatstimer_cfg_cnt_mode(si_t *sih, uint8 cnt_mode, uint8 timerid); |
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| 78 | +extern void si_pmustatstimer_int_enable(si_t *sih); |
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| 79 | +extern void si_pmustatstimer_int_disable(si_t *sih); |
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| 80 | +#endif /* BCMPMU_STATS */ |
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46 | 81 | #endif /* _hndpmu_h_ */ |
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